Bug #412
openx230 reboots on suspend
100%
Description
Very similar to issue 393 where the x230 reboots when suspended to RAM. Seems to be an issue with coreboot v4.16 & 4.17 or something is missing in the config (attached). Any insight on this would be appreciated!
Files
Updated by Paul Menzel over 2 years ago
Please attach the coreboot console messages from a normal boot, and from resuming from suspend to RAM.
In GNU/Linux you should be able to do it using cbmem -1
, or, if available, loading the module memconsole-coreboot with sudo modprobe memconsole-coreboot
, and looking at /sys/firmware/log
.
Updated by Carson A. over 2 years ago
- File normal_boot.txt normal_boot.txt added
- File suspend_boot.txt suspend_boot.txt added
Updated by Carson A. over 2 years ago
Paul Menzel wrote in #note-1:
Please attach the coreboot console messages from a normal boot, and from resuming from suspend to RAM.
In GNU/Linux you should be able to do it using
cbmem -1
, or, if available, loading the module memconsole-coreboot withsudo modprobe memconsole-coreboot
, and looking at/sys/firmware/log
.
Ok, I've attached the logs; one for booting normally and the other rebooting from suspend.
Updated by Nico Huber over 2 years ago
[ERROR] SF size 0xc00000 does not correspond to CONFIG_ROM_SIZE 0x400000!!
CONFIG_ROM_SIZE
needs to cover both chips. It's a known issue that coreboot will write the MRC cache at the wrong offset otherwise. As reading happens memory-mapped (not with manual SPI flash commands) it will use a different offset then. The cache is needed to bring DRAM up without destroying memory contents (would be bad during resume).
Updated by Angel Pons over 2 years ago
I concur with Nico's assessment. I imagine you changed the "ROM chip size" option to get a 4 MiB file to flash to the second flash chip (4 MiB).
Instead of doing that, https://doc.coreboot.org/mainboard/lenovo/Ivy_Bridge_series.html#splitting-the-coreboot-rom provides the commands to split a 12 MiB image into 8 MiB and 4 MiB parts. You'd want to use dd of=top.rom bs=1M if=build/coreboot.rom skip=8
to obtain a 4 MiB image.
As you've already installed coreboot, you can also flash internally with sudo flashrom -p internal --ifd -i bios -w build/coreboot.rom --noverify-all
. This tells flashrom to write build/coreboot.rom
to the flash chip(s) using the internal programmer, but only the "bios" region as described by the IFD of the system. The --noverify-all
option tells flashrom to not verify the entire flash chip (to make sure other regions did not change), but only the written regions. This is needed when flashrom cannot read the entire flash chip, and the ME region is not readable by default.
Updated by Carson A. over 2 years ago
Angel Pons wrote in #note-5:
I concur with Nico's assessment. I imagine you changed the "ROM chip size" option to get a 4 MiB file to flash to the second flash chip (4 MiB).
Instead of doing that, https://doc.coreboot.org/mainboard/lenovo/Ivy_Bridge_series.html#splitting-the-coreboot-rom provides the commands to split a 12 MiB image into 8 MiB and 4 MiB parts. You'd want to use
dd of=top.rom bs=1M if=build/coreboot.rom skip=8
to obtain a 4 MiB image.As you've already installed coreboot, you can also flash internally with
sudo flashrom -p internal --ifd -i bios -w build/coreboot.rom --noverify-all
. This tells flashrom to writebuild/coreboot.rom
to the flash chip(s) using the internal programmer, but only the "bios" region as described by the IFD of the system. The--noverify-all
option tells flashrom to not verify the entire flash chip (to make sure other regions did not change), but only the written regions. This is needed when flashrom cannot read the entire flash chip, and the ME region is not readable by default.
Yep, that worked, suspend works now. I've been having this issue for so long but didn't know exactly why. Thanks everyone for your help!
Edit: well it worked in linux, at least. Resuming S3 in windows flashes the power and mic LEDs, indicating a fatal error. I've attached the boot log (12mb_boot.txt) in case anyone has any ideas.
Edit 2: Nevermind, I figured it out. Just had to uncheck "rerun VGA option roms on S3 resume".
Updated by Josh R about 2 years ago
- File cbmem.20221019195923.normal_boot.log cbmem.20221019195923.normal_boot.log added
- File cbmem.20221019200724.from_suspend.log cbmem.20221019200724.from_suspend.log added
Carson A. wrote in #note-6:
Angel Pons wrote in #note-5:
I concur with Nico's assessment. I imagine you changed the "ROM chip size" option to get a 4 MiB file to flash to the second flash chip (4 MiB).
Instead of doing that, https://doc.coreboot.org/mainboard/lenovo/Ivy_Bridge_series.html#splitting-the-coreboot-rom provides the commands to split a 12 MiB image into 8 MiB and 4 MiB parts. You'd want to use
dd of=top.rom bs=1M if=build/coreboot.rom skip=8
to obtain a 4 MiB image.As you've already installed coreboot, you can also flash internally with
sudo flashrom -p internal --ifd -i bios -w build/coreboot.rom --noverify-all
. This tells flashrom to writebuild/coreboot.rom
to the flash chip(s) using the internal programmer, but only the "bios" region as described by the IFD of the system. The--noverify-all
option tells flashrom to not verify the entire flash chip (to make sure other regions did not change), but only the written regions. This is needed when flashrom cannot read the entire flash chip, and the ME region is not readable by default.Yep, that worked, suspend works now. I've been having this issue for so long but didn't know exactly why. Thanks everyone for your help!
Edit: well it worked in linux, at least. Resuming S3 in windows flashes the power and mic LEDs, indicating a fatal error. I've attached the boot log (12mb_boot.txt) in case anyone has any ideas.
Edit 2: Nevermind, I figured it out. Just had to uncheck "rerun VGA option roms on S3 resume".
Can you clarify which method you used to resolve this?
I am having a similar issue with my t440p. It already has coreboot installed, but my attempt at running the sudo flashrom -p internal --ifd -i bios -w the_full_coreboot_rom.rom --noverify-all
did not seem to do the trick (still "restarts" without resuming from RAM).
Note that I am using the "full" 12MB coreboot.rom (not split by 4MiB and 8MiB, as that seemed intended for the hardware flashing instructions).
coreboot version looks like 4.15.204, and flashrom version 1.2-640.
If it helps, attached cbmem -1
output with a "normal boot" followed by a later resume from suspend (that resulted in a restart).
Thanks in advance. I guess you don't realize how much you use suspend until it doesn't work anymore :)
Updated by Angel Pons about 2 years ago
Josh, could you please open a separate issue? Thanks.
Updated by Josh R about 2 years ago
Angel Pons wrote in #note-10:
Josh, could you please open a separate issue? Thanks.
Sure thing, added here: https://ticket.coreboot.org/issues/432
Updated by Pawel Radomychelski about 1 year ago
- File dmesg_ok.txt dmesg_ok.txt added
- File dmesg_broken.txt dmesg_broken.txt added
- File .config .config added
Hello guys!
I can confirm the same Problem on my ThinkPad X230t.
The first Coreboot 4.21 release: WakeUp from Standby is working fine,
Actual coreboot release: Computer restart after waking up from Standby.