Issue Tracker

07/21/2026

AP 10:25 AM coreboot Bug #658: asus p5g41c-m-lx pcie discovery of realtek 10ec:8168

Hi Gabriel,
You may want to check the Super I/O datasheet to see what the registers do. Each GPIO bank has a set of registers, with one bit per GPIO:
- I/O register: controls whether GPIOs are inputs or outputs
- Data register: show... Angel Pons

07/20/2026

AP 01:12 PM coreboot Bug #658: asus p5g41c-m-lx pcie discovery of realtek 10ec:8168

It is likely that the PCIe root port on the southbridge (`device pci 1c.X` in the devicetree/overridetree, where X is a number between 0 and 5) used for LAN on your board is disabled. You could try enabling all 6 PCIe root ports and see ... Angel Pons

05/26/2026

AP 08:06 PM coreboot Other #649 (Closed (locked)): yes again support for ideapad but im not needing help i just want contribuition and contribuition means help

A bug tracker is not meant to be used as a development scratchpad. Please refrain from creating any more issues. Angel Pons

05/23/2026

AP 11:54 AM coreboot Support #636: Building GCC v14.2.0 for target ... failed. Check 'build-i386-elf-GCC/build.log'.

Rahul Arasikere wrote in #note-5:
> I managed to get it to build by patching `util/crossgcc/buildgcc` and adding `-fno-char8_t` to `CXX_FOR_BUILD` variables in the script.
> ...
Did you mean `CXXFLAGS_FOR_BUILD`? Angel Pons

04/19/2026

AP 03:27 PM coreboot Bug #638: ACPI\LEN0068 (ThinkPad Extra Buttons) not detected by Windows 11 on ThinkPad T430

Avraham Hollander wrote in #note-2:
> Angel Pons wrote in #note-1:
> ...
I completely missed that, apologies. I see that `CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"` is set to the correct value so I wonder why Windows is not seeing the AC... Angel Pons

AP 10:46 AM coreboot Bug #638: ACPI\LEN0068 (ThinkPad Extra Buttons) not detected by Windows 11 on ThinkPad T430

Can you please post your coreboot config file? Angel Pons

AP 10:52 AM coreboot Bug #637: Sandybridge: C-States and Turbo not working in coreboot

I wonder if it has to do with when `BIOS_RESET_CPL` MCHBAR register gets set. Angel Pons

03/22/2026

AP 10:43 AM coreboot Bug #628 (Resolved): mb/asus/h61-series: variant p8h61-i_r2_0 won't POST on recent coreboot version mmio / tpm range ?

To my knowledge, this is resolved, so marking as such. Angel Pons

03/03/2026

AP 03:27 AM coreboot Support #626: Haswell Trad/T440p: Support for 16GB DDR3L modules with NRI?

Okay, false alarm: Nicholas Chin just let me know that the size reporting on Haswell / Lynx Point boards with 2 flash chips is consistently wrong. Looks like both coreboot and ifdtool decode the size wrongly. Angel Pons

AP 02:06 AM coreboot Support #626: Haswell Trad/T440p: Support for 16GB DDR3L modules with NRI?

Thanks for the logs. Margins look absolutely fine (yes, read timings have a bit of a positive offset, but I have seen this behaviour on all Haswell boards I've tried NRI on). I'm pretty sure this is a hardware limitation so the only thin... Angel Pons