coreboot

Still have to test without SPI log and on current coreboot codebase but looking at this latest SPI log with superio devices disabled in devicetree.cb as you hinted I see it progress beyond that point like the other 2 logs (normal lpc.c and the one without TPM region).

Spinning another current coreboot image with TPM region restored and devicetree.cb superio edits and without the SPI log and report back.

Thanks for the input sofar.

Fixed it works on current unaltered coreboot codebase!

Although these current logs aren't exactly the same, since not all debug options are enabled otherwise some debug options conflict with edk2 smm store and blocks POST. So I also uploaded a dmesg log from the system running with your unaltered CB:91040 patch and the superio devices disabled as proof.

1. I think the looping "resource didn't fit" thing should not be happening, as that's probably why coreboot hangs.
2. On the "old" logs, you seem to be using flashconsole with SMM. I think that can cause issues so it might be a good idea to disable flashconsole in SMM.
3. I see it seems to be working now. What was the actual issue?