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PR Patrick Rudolph

  • Login: siro
  • Email: siro@das-labor.org
  • Registered on: 11/21/2015
  • Last sign in: 02/21/2026

Issues

open closed Total
Assigned issues 3 3 6
Reported issues 12 7 19

Projects

Project Roles Registered on
coreboot Manager, Developer 11/21/2015
lava Manager 11/10/2018

Activity

02/21/2026

PR 05:31 PM coreboot Bug #628: mb/asus/h61-series: variant p8h61-i_r2_0 won't POST on recent coreboot version mmio / tpm range ?
I still don't see why the mentioned commit should make any difference. Your log shows issues with I/O resources on the Super I/O.
Try disabling unused SIO LDNs:
Add this to your devicetree:
```
device pnp 2e.0 off end # FDC
devi...
Patrick Rudolph

02/12/2026

PR 06:53 AM coreboot Bug #623: On T480/S, missing P-state data from ACPI tables prevents Xen from performing frequency scaling
Should be fixed by https://review.coreboot.org/c/coreboot/+/91173 Patrick Rudolph
PR 06:48 AM coreboot Bug #627: Lenovo ThinkPad X280 (20KE) only shows 4GB of RAM out of 16GB
According to the log it detects 2x "K4AAG165WB-MCRC". Maybe the capacity in the SPD file is incorrect? I don't see SPD files checked into the mainboard dir, so I cannot verify. Patrick Rudolph

02/03/2026

PR 07:14 PM coreboot Bug #623: On T480/S, missing P-state data from ACPI tables prevents Xen from performing frequency scaling
Set register "eist_enable" = "true" in devicetree.cb? Patrick Rudolph

01/01/2026

PR 11:40 AM coreboot Bug #620: X230(t) does not work since commit 97dbfd3098ae12ef3f51e5f95cd6d66c25214205 was merged
The original X230 firmware uses the same assembly code as introduced by 97dbfd3098ae12ef3f51e5f95cd6d66c25214205.
It's possible that it uncovered a different issue, since it now boots much faster. With cleaned ME it also skips some
s...
Patrick Rudolph

12/31/2025

PR 04:13 PM coreboot Bug #620: X230(t) does not work since commit 97dbfd3098ae12ef3f51e5f95cd6d66c25214205 was merged
The referenced commit seems to work fine on google/link (IVB) and lenovo/X220 (SNB).
Any ideas why there's a different behaviour?
Are microcode updates properly loaded?
Does it work with unstripped Intel ME?
Patrick Rudolph

09/07/2025

PR 05:05 PM coreboot Bug #608: Intel D510 (Pineview) CPU Index 0 - APIC 0 Unexpected Exception:2 @ 08:7f2a67d1 - Halting
It is possible that raminit isn't perfectly working and you end with a slightly unstable DIMM.
When the issue is 100% reproducible you can start a git bisect and try to figure out which code change made it worse.
Patrick Rudolph
PR 01:03 PM coreboot Feature #433 (Closed): Unify TPM drivers in coreboot
Patrick Rudolph
PR 11:47 AM coreboot Bug #538 (Closed): [Soft Brick] x230 Dock Causes Internal Display to "Permanently" Malfunction
Patrick Rudolph
PR 11:46 AM coreboot Bug #535 (Resolved): T420: Power light stays off after reboot
Patrick Rudolph

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