Bug #6

channel test fails on a Samsung DDR3L 8G memory with IVB processor

Added by Iru Cai almost 6 years ago. Updated over 5 years ago.

Status:ClosedStart date:11/20/2015
Priority:NormalDue date:
Assignee:-% Done:

0%

Category:-
Target version:-

Description

I'm using coreboot with a lenovo T420 laptop. I build coreboot as follows:
1. checkout to a commit
2. apply these patches:
- commit aad34cda4bc9c14ed10b00fe5da3f32233257913 (if the commit I checkout is older than this commit)
- http://review.coreboot.org/#/c/11765/
- http://review.coreboot.org/#/c/12087/2
3. build coreboot

I found the latest git code causes a channel test failure on Samsung 8G DDR3L M471B1G73DB0-YK0 with i7-3720QM(QS version) processor, it works fine if I do one of the following changes:
1. use i5-2520M processor
2. use a 1.5V DDR3 8G memory or a Samsung 4G DDR3L module M471B5173QH0-YK0

I did a git bisect and the first bad commit is 9f1fbb9a3002e8d74d53d7973bd1c7e3d4879238.

ehci.log Magnifier - log from EHCI debug port (2.79 KB) Iru Cai, 11/20/2015 04:06 AM

ehci_normal.log Magnifier - EHCI log after reverse patching that commit and use the Samsung 8G DDR3L (79.3 KB) Iru Cai, 11/21/2015 02:47 AM

config - my coreboot config (16.2 KB) Iru Cai, 11/21/2015 02:47 AM

faillog.tar.xz - verbose log on channel test fail (26.2 KB) Iru Cai, 11/23/2015 04:11 AM

normallog.tar.xz - verbose log on successful boots after a reverse patching (23.1 KB) Iru Cai, 11/23/2015 04:11 AM

History

#1 Updated by Alexander Couzens almost 6 years ago

@Iru it would be nice ifyou could add your .config,
what's the last upstream commit?

Ping siro about this.

#2 Updated by Stefan Reinauer almost 6 years ago

I did a git bisect and the first bad commit is 9f1fbb9a3002e8d74d53d7973bd1c7e3d4879238.

Did you verify if the problem goes away if you back out exactly this patch with a top of tree build?

Also, did you try running with mrc.bin instead of native ram init?

#3 Updated by Iru Cai almost 6 years ago

Stefan Reinauer wrote:

I did a git bisect and the first bad commit is 9f1fbb9a3002e8d74d53d7973bd1c7e3d4879238.

Did you verify if the problem goes away if you back out exactly this patch with a top of tree build?

Yes, I reverse patch that commit and the laptop boots with that memory module.

Also, did you try running with mrc.bin instead of native ram init?

Well, I don't know other MRC(is that the FSP or ChromiumOS MRC) other than the coreboot MRC.

And I've add my config and a normal boot log after reverse patching that commit and use that Samsung 8G DDR3L.

#4 Updated by Iru Cai almost 6 years ago

Alexander Couzens wrote:

@Iru it would be nice ifyou could add your .config,

I've just add my config.

what's the last upstream commit?

362dbea2c9674bb50ddf2da306f477e7ae091134

Ping siro about this.

#5 Updated by Patrick Rudolph almost 6 years ago

Please provide a full raminit log of the failing memory initialization.

#6 Updated by Iru Cai almost 6 years ago

Patrick Rudolph wrote:

Please provide a full raminit log of the failing memory initialization.

OK. I set up the verbose RAM init log debug option and do the test. And I get some logs about channel test failure, and successful boots after a reverse patchcing.

#7 Updated by Iru Cai over 5 years ago

I've done some more testing recently, and found some more details:
1. No bugs if I use a i5-3340M
2. I just tested with a hynix 8G DDR3L module HMT41GS6BFR8A-PB, the machine also failed to boot, reverting that patch also solved the problem.

#8 Updated by Patrick Rudolph over 5 years ago

This issue is fixed on master as https://review.coreboot.org/#/c/11248/ have been reverted. An updated version is under review: https://review.coreboot.org/#/c/13714/. Please test if possible.

#9 Updated by Iru Cai over 5 years ago

  • Status changed from New to Resolved

#10 Updated by Patrick Rudolph over 5 years ago

  • Status changed from Resolved to Closed

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