Bug #6
closedchannel test fails on a Samsung DDR3L 8G memory with IVB processor
0%
Description
I'm using coreboot with a lenovo T420 laptop. I build coreboot as follows:
- checkout to a commit
- apply these patches:
- commit aad34cda4bc9c14ed10b00fe5da3f32233257913 (if the commit I checkout is older than this commit)
- http://review.coreboot.org/#/c/11765/
- http://review.coreboot.org/#/c/12087/2
- build coreboot
I found the latest git code causes a channel test failure on Samsung 8G DDR3L M471B1G73DB0-YK0 with i7-3720QM(QS version) processor, it works fine if I do one of the following changes:
- use i5-2520M processor
- use a 1.5V DDR3 8G memory or a Samsung 4G DDR3L module M471B5173QH0-YK0
I did a git bisect and the first bad commit is 9f1fbb9a3002e8d74d53d7973bd1c7e3d4879238.
Files
Updated by Alexander Couzens almost 9 years ago
@Iru it would be nice ifyou could add your .config,
what's the last upstream commit?
Ping siro about this.
Updated by Stefan Reinauer almost 9 years ago
I did a git bisect and the first bad commit is 9f1fbb9a3002e8d74d53d7973bd1c7e3d4879238.
Did you verify if the problem goes away if you back out exactly this patch with a top of tree build?
Also, did you try running with mrc.bin instead of native ram init?
Updated by Iru Cai almost 9 years ago
- File ehci_normal.log ehci_normal.log added
- File config config added
Stefan Reinauer wrote:
I did a git bisect and the first bad commit is 9f1fbb9a3002e8d74d53d7973bd1c7e3d4879238.
Did you verify if the problem goes away if you back out exactly this patch with a top of tree build?
Yes, I reverse patch that commit and the laptop boots with that memory module.
Also, did you try running with mrc.bin instead of native ram init?
Well, I don't know other MRC(is that the FSP or ChromiumOS MRC) other than the coreboot MRC.
And I've add my config and a normal boot log after reverse patching that commit and use that Samsung 8G DDR3L.
Updated by Iru Cai almost 9 years ago
Alexander Couzens wrote:
@Iru it would be nice ifyou could add your .config,
I've just add my config.
what's the last upstream commit?
362dbea2c9674bb50ddf2da306f477e7ae091134
Ping siro about this.
Updated by Patrick Rudolph almost 9 years ago
Please provide a full raminit log of the failing memory initialization.
Updated by Iru Cai almost 9 years ago
- File faillog.tar.xz faillog.tar.xz added
- File normallog.tar.xz normallog.tar.xz added
Patrick Rudolph wrote:
Please provide a full raminit log of the failing memory initialization.
OK. I set up the verbose RAM init log debug option and do the test. And I get some logs about channel test failure, and successful boots after a reverse patchcing.
Updated by Iru Cai almost 9 years ago
I've done some more testing recently, and found some more details:
- No bugs if I use a i5-3340M
- I just tested with a hynix 8G DDR3L module HMT41GS6BFR8A-PB, the machine also failed to boot, reverting that patch also solved the problem.
Updated by Patrick Rudolph over 8 years ago
This issue is fixed on master as https://review.coreboot.org/#/c/11248/ have been reverted. An updated version is under review: https://review.coreboot.org/#/c/13714/. Please test if possible.
Updated by Patrick Rudolph over 8 years ago
- Status changed from Resolved to Closed