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Support #371

closed

Check XMC spi flash chips definitions

Added by Anastasia Klimchuk almost 2 years ago. Updated over 1 year ago.

Status:
Resolved
Priority:
Normal
Assignee:
Category:
Release prep
Target version:
Start date:
04/28/2022
Due date:
% Done:

90%

Estimated time:
Affected versions:
Needs backport to:
Affected hardware:
Affected OS:

Description

Chips to check:

XM25QU64C
XM25QU128C
XM25QU256C
XM25QH64C
XM25QH128C
XM25QH256C

Specific questions:
1) Looks like copy-pasta from Winbond chips.
2) Might miss some block erasers.
3) Missing 4BA_WRITE, is this correct?

Actions #1

Updated by Anastasia Klimchuk over 1 year ago

  • Assignee set to Anastasia Klimchuk
Actions #2

Updated by Anastasia Klimchuk over 1 year ago

After the discussion on the meeting, some answers to initial questions:
1) Yes, and this is WAI because these chips are copy-pasta of Winbond
3) This is correct.

Remaining question need to be answered is 2) which means checking the datasheets and compare with chip definitions for block erasers.

Actions #3

Updated by Felix Singer over 1 year ago

  • Tracker changed from Feature to Support
  • Target version changed from 1.3 to main
Actions #4

Updated by Liam Flaherty over 1 year ago

  • Assignee changed from Anastasia Klimchuk to Liam Flaherty
Actions #5

Updated by Liam Flaherty over 1 year ago

2) I have checked the erasers, they are all correct and none are missing.

On #3, the smaller variants of the chip (<256Mbit) do not support 4BA_WRITE, however the XM25Qx256C chips do appear to. They do also work in a "backwards compatible" mode that doesn't require the 4-byte addressing (see section "5.1.5 3-Byte/4-Byte Address Modes" of the datasheet), so they can work without 4BA_WRITE beings set as well.

Actions #6

Updated by Anastasia Klimchuk over 1 year ago

Looks like this is resolved, can be closed. Let me double-check.

Actions #7

Updated by Anastasia Klimchuk over 1 year ago

  • % Done changed from 0 to 90
Actions #8

Updated by Felix Singer over 1 year ago

I understand most of the chip definitions are correct. Is anything left to do on the chip definitions for XM25QH256C and XM25QU256C regarding the 4BA mode?

Actions #9

Updated by Felix Singer over 1 year ago

  • Status changed from New to Response Needed
Actions #10

Updated by Felix Singer over 1 year ago

  • Parent task deleted (#353)
Actions #11

Updated by Liam Flaherty over 1 year ago

I will add the FEATURE_4BA_WRITE flag for these chips.

Actions #12

Updated by Liam Flaherty over 1 year ago

  • Status changed from Response Needed to Resolved
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