coreboot

I'd just make the FMAP region 4KiB sized and aligned. I'm not aware of any alignments on files that would be larger than 4KiB.

mrc cache (in a non-cros configuration) is 64kb aligned. Not sure if that's actually needed, but that also depends on the flash chip that is used.

mrc cache shouldn't be added to cbfs. It should reside in an fmap region. Writing into the cbfs area is really not an appropriate action in my opinion. i.e. we don't have all the logic/smarts as cbfstool for such operations.

Right now, it resides in CBFS (for non-cros) and that works in shipping products.

We should change that, now that there's fmap in upstream, but the more general question remains what the alignment is supposed to represent, and alignment relative to flash addresses still looks like a smart idea to me: We don't typically have the requirement that files need to be aligned in special ways relative to CBFS, alignment is an issue only because some external actors need certain access patterns.

Yes, but for simplicity all CBFS regions should start at 4KiB alignment, etc. I don't see the point of bending over backwards for things that shouldn't be done which require an extreme alignment. Those requirements stem from a single board's flash setup, etc.

I have tried to address this issue in this patch: https://review.coreboot.org/#/c/13417