flashrom

Hello Emmanuel, thank you for reporting a bug!

I realise this was few months ago, but maybe you can provide full logs? if you can for example attach to this bug.

The working case has
Enabling hardware sequencing because some important opcode is locked.
and the other does not - but maybe you just skipped when copying pieces from logs?

It is possible to force enable hwseq with a param (internal:ich_spi_mode=hwseq). By default the mode is auto, so the decision is made during init, and one of the conditions is missing opcodes (which can be related to your first suspect commit).

Also which version of libpci you have? this is related to your third suspect

Links to suspects mentioned in the description:

https://review.coreboot.org/c/flashrom/+/84567
https://review.coreboot.org/c/flashrom/+/84593
https://review.coreboot.org/c/flashrom/+/83896

(but we don't know yet what is the root cause, might be some other commit)

I borrowed an Asus CX3400F chromebook with i7-1160G7 to test some operations.

# flashrom --version
flashrom v1.5.0 (git:v1.5.0) on Linux 6.12.94-01425-g32498b4fcee8 (x86_64)
flashrom is free software, get the source code at https://flashrom.org
# crossystem mainfw_act
B
# flashrom -p internal -r bios.bin
# flashrom -p internal --fmap -i RW_SECTION_A -E
flashrom v1.5.0 (git:v1.5.0) on Linux 6.12.94-01425-g32498b4fcee8 (x86_64)
flashrom is free software, get the source code at https://flashrom.org

coreboot table found at 0x76b22000.
Found chipset "Intel Tiger Lake LP".
Enabling flash write... Warning: Setting BIOS Control at 0xdc from 0x8b to 0x89 failed.
New value is 0x8b.
SPI Configuration is locked down.
FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-only.
FREG1: BIOS region (0x00500000-0x01ffffff) is read-write.
FREG2: Management Engine region (0x00001000-0x004fffff) is read-only.
Not all flash regions are freely accessible by flashrom. This is most likely
due to an active ME. Please see https://flashrom.org/ME for details.
GPR0: Warning: 0x00001000-0x0014bfff is read-only.
At least some flash regions are write protected. For write operations,
you should use a flash layout and include only writable regions. See
manpage for more details.
OK.
Found Winbond flash chip "W25Q256JV_M" (32768 kB, Programmer-specific) on internal.
===
This flash part has status UNTESTED for operations: WP
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom@flashrom.org if any of the above operations
work correctly for you with this flash chip. Please include the flashrom log
file for all operations you tested (see the man page for details), and mention
which mainboard or programmer you tested in the subject line.
You can also try to follow the instructions here:
https://www.flashrom.org/contrib_howtos/how_to_mark_chip_tested.html
Thanks for your help!
Using region: "RW_SECTION_A".
Erase/write done from 500000 to cfffff
# flashrom -p internal --fmap -i RW_SECTION_A -w bios.bin
flashrom v1.5.0 (git:v1.5.0) on Linux 6.12.94-01425-g32498b4fcee8 (x86_64)
flashrom is free software, get the source code at https://flashrom.org

coreboot table found at 0x76b22000.
Found chipset "Intel Tiger Lake LP".
Enabling flash write... Warning: Setting BIOS Control at 0xdc from 0x8b to 0x89 failed.
New value is 0x8b.
SPI Configuration is locked down.
FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-only.
FREG1: BIOS region (0x00500000-0x01ffffff) is read-write.
FREG2: Management Engine region (0x00001000-0x004fffff) is read-only.
Not all flash regions are freely accessible by flashrom. This is most likely
due to an active ME. Please see https://flashrom.org/ME for details.
GPR0: Warning: 0x00001000-0x0014bfff is read-only.
At least some flash regions are write protected. For write operations,
you should use a flash layout and include only writable regions. See
manpage for more details.
OK.
Found Winbond flash chip "W25Q256JV_M" (32768 kB, Programmer-specific) on internal.
===
This flash part has status UNTESTED for operations: WP
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom@flashrom.org if any of the above operations
work correctly for you with this flash chip. Please include the flashrom log
file for all operations you tested (see the man page for details), and mention
which mainboard or programmer you tested in the subject line.
You can also try to follow the instructions here:
https://www.flashrom.org/contrib_howtos/how_to_mark_chip_tested.html
Thanks for your help!
Using region: "RW_SECTION_A".
Reading old flash chip contents... done.
Updating flash chip contents... Erase/write done from 500000 to cfffff
Verifying flash... VERIFIED.

So at least on this configuration I don't see any problems.

I borrowed an Asus Chromebook Flip CX3 with i7-1160G7 to test some operations.

# flashrom --version
flashrom v1.5.0 (git:v1.5.0) on Linux 6.12.94-01425-g32498b4fcee8 (x86_64)
flashrom is free software, get the source code at https://flashrom.org
# crossystem mainfw_act
B
# flashrom -p internal -r bios.bin
# flashrom -p internal --fmap -i RW_SECTION_A -E
flashrom v1.5.0 (git:v1.5.0) on Linux 6.12.94-01425-g32498b4fcee8 (x86_64)
flashrom is free software, get the source code at https://flashrom.org

coreboot table found at 0x76b22000.
Found chipset "Intel Tiger Lake LP".
Enabling flash write... Warning: Setting BIOS Control at 0xdc from 0x8b to 0x89 failed.
New value is 0x8b.
SPI Configuration is locked down.
FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-only.
FREG1: BIOS region (0x00500000-0x01ffffff) is read-write.
FREG2: Management Engine region (0x00001000-0x004fffff) is read-only.
Not all flash regions are freely accessible by flashrom. This is most likely
due to an active ME. Please see https://flashrom.org/ME for details.
GPR0: Warning: 0x00001000-0x0014bfff is read-only.
At least some flash regions are write protected. For write operations,
you should use a flash layout and include only writable regions. See
manpage for more details.
OK.
Found Winbond flash chip "W25Q256JV_M" (32768 kB, Programmer-specific) on internal.
===
This flash part has status UNTESTED for operations: WP
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom@flashrom.org if any of the above operations
work correctly for you with this flash chip. Please include the flashrom log
file for all operations you tested (see the man page for details), and mention
which mainboard or programmer you tested in the subject line.
You can also try to follow the instructions here:
https://www.flashrom.org/contrib_howtos/how_to_mark_chip_tested.html
Thanks for your help!
Using region: "RW_SECTION_A".
Erase/write done from 500000 to cfffff
# flashrom -p internal --fmap -i RW_SECTION_A -w bios.bin
flashrom v1.5.0 (git:v1.5.0) on Linux 6.12.94-01425-g32498b4fcee8 (x86_64)
flashrom is free software, get the source code at https://flashrom.org

coreboot table found at 0x76b22000.
Found chipset "Intel Tiger Lake LP".
Enabling flash write... Warning: Setting BIOS Control at 0xdc from 0x8b to 0x89 failed.
New value is 0x8b.
SPI Configuration is locked down.
FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-only.
FREG1: BIOS region (0x00500000-0x01ffffff) is read-write.
FREG2: Management Engine region (0x00001000-0x004fffff) is read-only.
Not all flash regions are freely accessible by flashrom. This is most likely
due to an active ME. Please see https://flashrom.org/ME for details.
GPR0: Warning: 0x00001000-0x0014bfff is read-only.
At least some flash regions are write protected. For write operations,
you should use a flash layout and include only writable regions. See
manpage for more details.
OK.
Found Winbond flash chip "W25Q256JV_M" (32768 kB, Programmer-specific) on internal.
===
This flash part has status UNTESTED for operations: WP
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom@flashrom.org if any of the above operations
work correctly for you with this flash chip. Please include the flashrom log
file for all operations you tested (see the man page for details), and mention
which mainboard or programmer you tested in the subject line.
You can also try to follow the instructions here:
https://www.flashrom.org/contrib_howtos/how_to_mark_chip_tested.html
Thanks for your help!
Using region: "RW_SECTION_A".
Reading old flash chip contents... done.
Updating flash chip contents... Erase/write done from 500000 to cfffff
Verifying flash... VERIFIED.

So at least on this configuration I don't see any problems, but suspect whatever hardware the reported has is probably configured differently in ways that are important (and probably won't be the case on a chromebook).

Whoops, disregard the double update. I was trying to update my comment to note that this is a Chromebook Flip CX3, and I suspect chromebooks probably configure relevant bits differently from the reporter's hardware so this probably isn't very conclusive.

Fixed in https://review.coreboot.org/c/flashrom/+/94973 !

The bug was not about Tiger Lake but about ECAM: more details in the patch by the link.