flashrom

The initial implementation of speed optimization for promontory had a bug for chips larger than 16M size.
The bug was fixed under the ticket 370, there are more details in here: https://ticket.coreboot.org/issues/370

This leaves open the feature request for speed optimization for what's currently recognised as spi_master_promontory and chips >16M size.

For additional context, below is the attempt to gather the prior art unsubmitted patches which could be relevant to this feature. Note they are mostly few years old, however might be useful.

58776: sb600spi: Remove memory-mapped read workaround | https://review.coreboot.org/c/flashrom/+/58776

65853: [NOTFORMERGE]sb600spi.c: Speed up MMIO on the FIFO buffer | https://review.coreboot.org/c/flashrom/+/65853

65237: amd_spi.c: Everything after rev 0x4a is a SPI100 ctrl | https://review.coreboot.org/c/flashrom/+/65237

65238: amd_spi.c: Combine CHIPSET_YANGTZE and CHIPSET_PROMONTORY | https://review.coreboot.org/c/flashrom/+/65238

65239: amd_spi.c: Add memory map path | https://review.coreboot.org/c/flashrom/+/65239