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Feature #583

open

Allow reconfiguring PCIe slots on Asus P8Z77-V

Added by Keith Hui 14 days ago. Updated about 9 hours ago.

Status:
New
Priority:
Normal
Assignee:
Category:
board support
Target version:
Start date:
11/30/2024
Due date:
% Done:

0%

Estimated time:
Affected versions:
Needs backport to:
Affected hardware:
mb/asus/p8z77-v
Affected OS:

Description

Vendor firmware allows configuring the PCIe slots in three different ways, by reallocating 4 of the PCIe lanes between PCIEX16_3, PCIEX1_1, PCIEX1_2, and the onboard ASM1061 serial ATA controller providing 2 additional SATA ports. The options are (devices not shown are disabled):

  • X4: PCIEX16_3 as x4
  • X1: PCIEX16_3 as x1, PCIEX1_1, PCIEX1_2
  • Auto: PCIEX16_3 as x1, PCIEX1_1, ASM1061

The technical details have been worked out and implemented as patch CB:85413. However, two issues remain:

  1. Despite our best efforts, PCIEX1_2 still doesn't work.
  2. Configuring PCIEX16_3 for 4x requires changing a PCH soft strap from firmware, and coreboot lacks infrastructure for doing so. It has been established that the descriptor itself, which contains the soft straps, needs to be reflashed to make this change.

This issue tracks our progress implementing this feature.


Files

autoport-p8z77v-gb83fac3e1c74-dirty.tgz (106 KB) autoport-p8z77v-gb83fac3e1c74-dirty.tgz Bill XIE, 03/28/2025 05:01 AM
cbmem-0-2-7-noPCIEX1_2.log (81.2 KB) cbmem-0-2-7-noPCIEX1_2.log Bill XIE, 03/28/2025 06:01 AM
p8z77-v-pcielane-gpio-probe-map.png (257 KB) p8z77-v-pcielane-gpio-probe-map.png Keith Hui, 03/30/2025 01:36 AM
p8z77v-r1.02.png (3.09 MB) p8z77v-r1.02.png Bill XIE, 03/31/2025 07:29 AM
p8z77v-r1.02-where-to-probe.png (3.09 MB) p8z77v-r1.02-where-to-probe.png Keith Hui, 03/31/2025 11:02 AM
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