

[NOTE ]  coreboot-25.03-204-g40d4ad9cb172-dirty Sat Apr 19 20:32:38 UTC 2025 x86_32 bootblock starting (log level: 7)...
[DEBUG]  SMBus controller enabled
[INFO ]  Detected system type: desktop
[DEBUG]  Setting up static northbridge registers... done
[DEBUG]  Initializing Graphics...
[DEBUG]  FMAP: Found "FLASH" version 1.1 at 0x1b0000.
[DEBUG]  FMAP: base = 0x0 size = 0x800000 #areas = 4
[DEBUG]  FMAP: area COREBOOT found @ 1b0200 (6618624 bytes)
[INFO ]  CBFS: mcache @0xfeff0e00 built for 15 files, used 0x2e0 of 0x4000 bytes
[INFO ]  CBFS: Found 'cmos_layout.bin' @0x27300 size 0x5dc in mcache @0xfeff0fd8
[DEBUG]  Back from systemagent_early_init()
[INFO ]  Intel ME early init
[INFO ]  Intel ME firmware is ready
[DEBUG]  ME: Requested 16MB UMA
[DEBUG]  Starting native Platform init
[DEBUG]  DMI: Running at X4 @ 5000MT/s
[DEBUG]  FMAP: area RW_MRC_CACHE found @ 1a0000 (65536 bytes)
[DEBUG]  Trying stored timings.
[DEBUG]  Starting Ivy Bridge RAM training (fast boot).
[DEBUG]  100MHz reference clock support: yes
[DEBUG]  PLL_REF100_CFG value: 0x2
[DEBUG]  Trying CAS 9, tCK 320.
[DEBUG]  Found compatible clock, CAS pair.
[DEBUG]  Selected DRAM frequency: 800 MHz
[DEBUG]  Selected CAS latency   : 9T
[DEBUG]  MPLL busy... done in 10 us
[DEBUG]  MPLL frequency is set at : 800 MHz
[DEBUG]  Done dimm mapping
[DEBUG]  Update PCI-E configuration space:
[DEBUG]  PCI(0, 0, 0)[a0] = 0
[DEBUG]  PCI(0, 0, 0)[a4] = 8
[DEBUG]  PCI(0, 0, 0)[bc] = 84a00000
[DEBUG]  PCI(0, 0, 0)[a8] = 7a600000
[DEBUG]  PCI(0, 0, 0)[ac] = 8
[DEBUG]  PCI(0, 0, 0)[b8] = 80000000
[DEBUG]  PCI(0, 0, 0)[b0] = 80a00000
[DEBUG]  PCI(0, 0, 0)[b4] = 80800000
[DEBUG]  PCI(0, 0, 0)[7c] = 7f
[DEBUG]  PCI(0, 0, 0)[70] = ff000000
[DEBUG]  PCI(0, 0, 0)[74] = 7
[DEBUG]  PCI(0, 0, 0)[78] = ff000c00
[DEBUG]  Done memory map
[DEBUG]  Done io registers
[DEBUG]  t123: 1767, 6000, 6120
[NOTE ]  ME: FWS2: 0x101f0126
[NOTE ]  ME:  Bist in progress: 0x0
[NOTE ]  ME:  ICC Status      : 0x3
[NOTE ]  ME:  Invoke MEBx     : 0x0
[NOTE ]  ME:  CPU replaced    : 0x0
[NOTE ]  ME:  MBP ready       : 0x1
[NOTE ]  ME:  MFS failure     : 0x0
[NOTE ]  ME:  Warm reset req  : 0x0
[NOTE ]  ME:  CPU repl valid  : 0x1
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  FW update req   : 0x0
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  Current state   : 0x1f
[NOTE ]  ME:  Current PM event: 0x0
[NOTE ]  ME:  Progress code   : 0x1
[NOTE ]  PASSED! Tell ME that DRAM is ready
[NOTE ]  ME: FWS2: 0x10500126
[NOTE ]  ME:  Bist in progress: 0x0
[NOTE ]  ME:  ICC Status      : 0x3
[NOTE ]  ME:  Invoke MEBx     : 0x0
[NOTE ]  ME:  CPU replaced    : 0x0
[NOTE ]  ME:  MBP ready       : 0x1
[NOTE ]  ME:  MFS failure     : 0x0
[NOTE ]  ME:  Warm reset req  : 0x0
[NOTE ]  ME:  CPU repl valid  : 0x1
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  FW update req   : 0x0
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  Current state   : 0x50
[NOTE ]  ME:  Current PM event: 0x0
[NOTE ]  ME:  Progress code   : 0x1
[NOTE ]  ME: Requested BIOS Action: Continue to boot
[DEBUG]  ME: FW Partition Table      : OK
[DEBUG]  ME: Bringup Loader Failure  : NO
[DEBUG]  ME: Firmware Init Complete  : NO
[DEBUG]  ME: Manufacturing Mode      : NO
[DEBUG]  ME: Boot Options Present    : NO
[DEBUG]  ME: Update In Progress      : NO
[DEBUG]  ME: Current Working State   : Normal
[DEBUG]  ME: Current Operation State : M0 with UMA
[DEBUG]  ME: Current Operation Mode  : Normal
[DEBUG]  ME: Error Code              : No Error
[DEBUG]  ME: Progress Phase          : uKernel Phase
[DEBUG]  ME: Power Management Event  : Clean Moff->Mx wake
[DEBUG]  ME: Progress Phase State    : Unknown 0x00
[DEBUG]  memcfg DDR3 ref clock 133 MHz
[DEBUG]  memcfg DDR3 clock 1596 MHz
[DEBUG]  memcfg channel assignment: A: 0, B  1, C  2
[DEBUG]  memcfg channel[0] config (00662020):
[DEBUG]     ECC inactive
[DEBUG]     enhanced interleave mode on
[DEBUG]     rank interleave on
[DEBUG]     DIMMA 8192 MB width x8 dual rank, selected
[DEBUG]     DIMMB 8192 MB width x8 dual rank
[DEBUG]  memcfg channel[1] config (00662020):
[DEBUG]     ECC inactive
[DEBUG]     enhanced interleave mode on
[DEBUG]     rank interleave on
[DEBUG]     DIMMA 8192 MB width x8 dual rank, selected
[DEBUG]     DIMMB 8192 MB width x8 dual rank
[DEBUG]  CBMEM:
[DEBUG]  IMD: root @ 0x7ffff000 254 entries.
[DEBUG]  IMD: root @ 0x7fffec00 62 entries.
[DEBUG]  External stage cache:
[DEBUG]  IMD: root @ 0x803ff000 254 entries.
[DEBUG]  IMD: root @ 0x803fec00 62 entries.
[DEBUG]  CBMEM entry for DIMM info: 0x7ffdc000
[DEBUG]  SMM Memory Map
[DEBUG]  SMRAM       : 0x80000000 0x800000
[DEBUG]   Subregion 0: 0x80000000 0x300000
[DEBUG]   Subregion 1: 0x80300000 0x100000
[DEBUG]   Subregion 2: 0x80400000 0x400000
[DEBUG]  Normal boot
[INFO ]  CBFS: Found 'fallback/postcar' @0x27940 size 0x3cb8 in mcache @0xfeff1000
[DEBUG]  Loading module at 0x7ffd2000 with entry 0x7ffd2031. filesize: 0x3b48 memsize: 0x9a38
[DEBUG]  Processing 76 relocs. Offset value of 0x7dfd2000
[DEBUG]  BS: bootblock times (exec / console): total (unknown) / 523 ms


[NOTE ]  coreboot-25.03-204-g01164f20b29a-dirty Sat Apr 19 23:37:21 UTC 2025 x86_32 ramstage starting (log level: 7)...
[DEBUG]  Normal boot
[DEBUG]  Old/New PCHSTRP9[PCIEPCS1] = 3/1
[INFO ]  Reflashing IFD... erase_size = 0x1000
[INFO ]  Manufacturer: ef
[INFO ]  SF: Detected ef 7017 with sector size 0x1000, total 0x800000
[DEBUG]  rdev read:
[DEBUG]  0x7fed03d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff  ................
[DEBUG]  0x7fed03e0: 5a a5 f0 0f 03 00 04 02 06 02 10 12 20 01 21 00  Z........... .!.
[DEBUG]  0x7fed03f0: 25 00 00 00 ff ff ff ff ff ff ff ff ff ff ff ff  %...............
[DEBUG]  0x7fed0400: 24 00 30 09 00 00 00 00 00 00 00 00 ff ff ff ff  $.0.............
[DEBUG]  0x7fed0410: 00 00 00 00 80 01 ff 07 01 00 7f 01 ff 1f 00 00  ................
[DEBUG]  0x7fed0420: ff 1f 00 00 ff ff ff ff ff ff ff ff ff ff ff ff  ................
[DEBUG]  0x7fed0430: 00 00 ff ff 00 00 ff ff 18 01 ff ff ff ff ff ff  ................
[DEBUG]  0x7fed0440: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff  ................
[DEBUG]  ...
[DEBUG]  0x7fed04d0: 82 d6 20 48 0f 01 00 00 00 00 56 00 00 00 00 00  .. H......V.....
[DEBUG]  0x7fed04e0: 00 e0 c8 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
[DEBUG]  0x7fed04f0: 00 00 00 00 83 45 00 30                          .....E.0
[DEBUG]  SF: Successfully erased 4096 bytes @ 0x0
[INFO ]  done.
[INFO ]  full_reset() called!


[NOTE ]  coreboot-25.03-204-g40d4ad9cb172-dirty Sat Apr 19 20:32:38 UTC 2025 x86_32 bootblock starting (log level: 7)...
[DEBUG]  SMBus controller enabled
[INFO ]  Detected system type: desktop
[DEBUG]  Setting up static northbridge registers... done
[DEBUG]  Initializing Graphics...
[DEBUG]  FMAP: Found "FLASH" version 1.1 at 0x1b0000.
[DEBUG]  FMAP: base = 0x0 size = 0x800000 #areas = 4
[DEBUG]  FMAP: area COREBOOT found @ 1b0200 (6618624 bytes)
[INFO ]  CBFS: mcache @0xfeff0e00 built for 15 files, used 0x2e0 of 0x4000 bytes
[INFO ]  CBFS: Found 'cmos_layout.bin' @0x27300 size 0x5dc in mcache @0xfeff0fd8
[DEBUG]  Back from systemagent_early_init()
[INFO ]  Intel ME early init
[INFO ]  Intel ME firmware is ready
[DEBUG]  ME: Requested 16MB UMA
[DEBUG]  Starting native Platform init
[DEBUG]  DMI: Running at X4 @ 5000MT/s
[DEBUG]  FMAP: area RW_MRC_CACHE found @ 1a0000 (65536 bytes)
[DEBUG]  Trying stored timings.
[DEBUG]  Starting Ivy Bridge RAM training (fast boot).
[DEBUG]  100MHz reference clock support: yes
[DEBUG]  PLL_REF100_CFG value: 0x2
[DEBUG]  Trying CAS 9, tCK 320.
[DEBUG]  Found compatible clock, CAS pair.
[DEBUG]  Selected DRAM frequency: 800 MHz
[DEBUG]  Selected CAS latency   : 9T
[DEBUG]  MPLL busy... done in 10 us
[DEBUG]  MPLL frequency is set at : 800 MHz
[DEBUG]  Done dimm mapping
[DEBUG]  Update PCI-E configuration space:
[DEBUG]  PCI(0, 0, 0)[a0] = 0
[DEBUG]  PCI(0, 0, 0)[a4] = 8
[DEBUG]  PCI(0, 0, 0)[bc] = 84a00000
[DEBUG]  PCI(0, 0, 0)[a8] = 7a600000
[DEBUG]  PCI(0, 0, 0)[ac] = 8
[DEBUG]  PCI(0, 0, 0)[b8] = 80000000
[DEBUG]  PCI(0, 0, 0)[b0] = 80a00000
[DEBUG]  PCI(0, 0, 0)[b4] = 80800000
[DEBUG]  PCI(0, 0, 0)[7c] = 7f
[DEBUG]  PCI(0, 0, 0)[70] = ff000000
[DEBUG]  PCI(0, 0, 0)[74] = 7
[DEBUG]  PCI(0, 0, 0)[78] = ff000c00
[DEBUG]  Done memory map
[DEBUG]  Done io registers
[DEBUG]  t123: 1767, 6000, 6120
[NOTE ]  ME: FWS2: 0x1b1f0126
[NOTE ]  ME:  Bist in progress: 0x0
[NOTE ]  ME:  ICC Status      : 0x3
[NOTE ]  ME:  Invoke MEBx     : 0x0
[NOTE ]  ME:  CPU replaced    : 0x0
[NOTE ]  ME:  MBP ready       : 0x1
[NOTE ]  ME:  MFS failure     : 0x0
[NOTE ]  ME:  Warm reset req  : 0x0
[NOTE ]  ME:  CPU repl valid  : 0x1
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  FW update req   : 0x0
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  Current state   : 0x1f
[NOTE ]  ME:  Current PM event: 0xb
[NOTE ]  ME:  Progress code   : 0x1
[NOTE ]  PASSED! Tell ME that DRAM is ready
[NOTE ]  ME: FWS2: 0x1b500126
[NOTE ]  ME:  Bist in progress: 0x0
[NOTE ]  ME:  ICC Status      : 0x3
[NOTE ]  ME:  Invoke MEBx     : 0x0
[NOTE ]  ME:  CPU replaced    : 0x0
[NOTE ]  ME:  MBP ready       : 0x1
[NOTE ]  ME:  MFS failure     : 0x0
[NOTE ]  ME:  Warm reset req  : 0x0
[NOTE ]  ME:  CPU repl valid  : 0x1
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  FW update req   : 0x0
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  Current state   : 0x50
[NOTE ]  ME:  Current PM event: 0xb
[NOTE ]  ME:  Progress code   : 0x1
[NOTE ]  ME: Requested BIOS Action: Continue to boot
[DEBUG]  ME: FW Partition Table      : OK
[DEBUG]  ME: Bringup Loader Failure  : NO
[DEBUG]  ME: Firmware Init Complete  : NO
[DEBUG]  ME: Manufacturing Mode      : NO
[DEBUG]  ME: Boot Options Present    : NO
[DEBUG]  ME: Update In Progress      : NO
[DEBUG]  ME: Current Working State   : Normal
[DEBUG]  ME: Current Operation State : M0 with UMA
[DEBUG]  ME: Current Operation Mode  : Normal
[DEBUG]  ME: Error Code              : No Error
[DEBUG]  ME: Progress Phase          : uKernel Phase
[DEBUG]  ME: Power Management Event  : Power cycle reset through Moff
[DEBUG]  ME: Progress Phase State    : Unknown 0x00
[DEBUG]  memcfg DDR3 ref clock 133 MHz
[DEBUG]  memcfg DDR3 clock 1596 MHz
[DEBUG]  memcfg channel assignment: A: 0, B  1, C  2
[DEBUG]  memcfg channel[0] config (00662020):
[DEBUG]     ECC inactive
[DEBUG]     enhanced interleave mode on
[DEBUG]     rank interleave on
[DEBUG]     DIMMA 8192 MB width x8 dual rank, selected
[DEBUG]     DIMMB 8192 MB width x8 dual rank
[DEBUG]  memcfg channel[1] config (00662020):
[DEBUG]     ECC inactive
[DEBUG]     enhanced interleave mode on
[DEBUG]     rank interleave on
[DEBUG]     DIMMA 8192 MB width x8 dual rank, selected
[DEBUG]     DIMMB 8192 MB width x8 dual rank
[DEBUG]  CBMEM:
[DEBUG]  IMD: root @ 0x7ffff000 254 entries.
[DEBUG]  IMD: root @ 0x7fffec00 62 entries.
[DEBUG]  External stage cache:
[DEBUG]  IMD: root @ 0x803ff000 254 entries.
[DEBUG]  IMD: root @ 0x803fec00 62 entries.
[DEBUG]  CBMEM entry for DIMM info: 0x7ffdc000
[DEBUG]  SMM Memory Map
[DEBUG]  SMRAM       : 0x80000000 0x800000
[DEBUG]   Subregion 0: 0x80000000 0x300000
[DEBUG]   Subregion 1: 0x80300000 0x100000
[DEBUG]   Subregion 2: 0x80400000 0x400000
[DEBUG]  Normal boot
[INFO ]  CBFS: Found 'fallback/postcar' @0x27940 size 0x3cb8 in mcache @0xfeff1000
[DEBUG]  Loading module at 0x7ffd2000 with entry 0x7ffd2031. filesize: 0x3b48 memsize: 0x9a38
[DEBUG]  Processing 76 relocs. Offset value of 0x7dfd2000
[DEBUG]  BS: bootblock times (exec / console): total (unknown) / 524 ms


[NOTE ]  coreboot-25.03-204-g01164f20b29a-dirty Sat Apr 19 23:37:21 UTC 2025 x86_32 ramstage starting (log level: 7)...
[DEBUG]  Normal boot
[INFO ]  Enumerating buses...
[DEBUG]  Root Device scanning...
[DEBUG]  CPU_CLUSTER: 0 enabled
[DEBUG]  DOMAIN: 00000000 enabled
[DEBUG]  DOMAIN: 00000000 scanning...
[DEBUG]  PCI: pci_scan_bus for segment group 00 bus 00
[DEBUG]  PCI: 00:00:00.0 [8086/0150] enabled
[DEBUG]  PCI: 00:00:01.0 [8086/0151] enabled
[INFO ]  PCI: Static device PCI: 00:00:01.1 not found, disabling it.
[DEBUG]  PCI: 00:00:01.2 [0000/0000] hidden
[DEBUG]  PCI: 00:00:02.0 [8086/0162] enabled
[DEBUG]  PCI: 00:00:04.0 [0000/0000] hidden
[DEBUG]  PCI: 00:00:06.0 [0000/0000] hidden
[DEBUG]  PCI: 00:00:14.0 [8086/1e31] enabled
[DEBUG]  PCI: 00:00:16.0 [8086/1e3a] enabled
[DEBUG]  PCI: 00:00:16.1: Disabling device
[DEBUG]  PCI: 00:00:16.1 [8086/1e3b] disabled No operations
[DEBUG]  PCI: 00:00:16.2: Disabling device
[DEBUG]  PCI: 00:00:16.3: Disabling device
[DEBUG]  PCI: 00:00:19.0: Disabling device
[DEBUG]  PCI: 00:00:1a.0 [8086/1e2d] enabled
[DEBUG]  PCI: 00:00:1b.0 [8086/1e20] enabled
[DEBUG]  PCI: 00:00:1c.0: Found a downstream device
[DEBUG]  PCI: 00:00:1c.0 [8086/1e10] enabled
[DEBUG]  PCI: 00:00:1c.1: Found a downstream device
[DEBUG]  PCI: 00:00:1c.1: Disabling device
[DEBUG]  PCI: 00:00:1c.2: No downstream device
[DEBUG]  PCI: 00:00:1c.2: Disabling device
[DEBUG]  PCI: 00:00:1c.2 [8086/1e14] disabled
[DEBUG]  PCI: 00:00:1c.3: No downstream device
[DEBUG]  PCI: 00:00:1c.3: Disabling device
[DEBUG]  PCI: 00:00:1c.3 [8086/1e16] disabled
[DEBUG]  PCI: 00:00:1c.4: Found a downstream device
[DEBUG]  PCI: 00:00:1c.4 [8086/1e18] enabled
[DEBUG]  PCI: 00:00:1c.5: Found a downstream device
[DEBUG]  PCI: 00:00:1c.5 [8086/1e1a] enabled
[DEBUG]  PCI: 00:00:1c.6: Found a downstream device
[DEBUG]  PCI: 00:00:1c.6 [8086/1e1c] enabled
[DEBUG]  PCI: 00:00:1c.7: Found a downstream device
[DEBUG]  PCI: 00:00:1c.7 [8086/1e1e] enabled
[DEBUG]  PCI: 00:00:1d.0 [8086/1e26] enabled
[DEBUG]  PCI: 00:00:1e.0: Disabling device
[DEBUG]  PCI: 00:00:1e.0 [8086/244e] disabled
[DEBUG]  PCI: 00:00:1f.0 [8086/1e44] enabled
[DEBUG]  PCI: 00:00:1f.2 [8086/1e00] enabled
[DEBUG]  PCI: 00:00:1f.3 [8086/1e22] enabled
[DEBUG]  PCI: 00:00:1f.5: Disabling device
[DEBUG]  PCI: 00:00:1f.5 [8086/1e08] disabled No operations
[DEBUG]  PCI: 00:00:1f.6: Disabling device
[DEBUG]  PCI: 00:00:1f.6 [8086/1e24] disabled No operations
[WARN ]  PCI: Leftover static devices:
[WARN ]  PCI: 00:00:01.1
[WARN ]  PCI: Check your devicetree.cb.
[DEBUG]  PCI: 00:00:01.0 scanning...
[DEBUG]  PCI: pci_scan_bus for segment group 00 bus 01
[INFO ]  PCI: 00:00:01.0: Setting Max_Payload_Size to 256 for devices under this root port
[DEBUG]  scan_bus: bus PCI: 00:00:01.0 finished in 14 msecs
[DEBUG]  PCI: 00:00:01.2 scanning...
[DEBUG]  scan_bus: bus PCI: 00:00:01.2 finished in 0 msecs
[DEBUG]  PCI: 00:00:04.0 scanning...
[DEBUG]  scan_bus: bus PCI: 00:00:04.0 finished in 0 msecs
[DEBUG]  PCI: 00:00:06.0 scanning...
[DEBUG]  scan_bus: bus PCI: 00:00:06.0 finished in 0 msecs
[DEBUG]  PCI: 00:00:1c.0 scanning...
[DEBUG]  PCI: pci_scan_bus for segment group 00 bus 02
[DEBUG]  PCI: 00:02:00.0 [8086/0975] enabled
[INFO ]  Enabling Common Clock Configuration
[INFO ]  ASPM: Enabled L1
[INFO ]  PCI: 00:00:1c.0: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG]  scan_bus: bus PCI: 00:00:1c.0 finished in 26 msecs
[DEBUG]  PCI: 00:00:1c.4 scanning...
[DEBUG]  PCI: pci_scan_bus for segment group 00 bus 03
[DEBUG]  PCI: 00:03:00.0 [10ec/8168] enabled
[INFO ]  Enabling Common Clock Configuration
[INFO ]  ASPM: Enabled L1
[DEBUG]  PCI: 00:03:00.0: No LTR support
[INFO ]  PCI: 00:00:1c.4: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG]  scan_bus: bus PCI: 00:00:1c.4 finished in 30 msecs
[DEBUG]  PCI: 00:00:1c.5 scanning...
[DEBUG]  PCI: pci_scan_bus for segment group 00 bus 04
[DEBUG]  PCI: 00:04:00.0 subordinate PCI
[DEBUG]  PCI: 00:04:00.0 [1b21/1080] enabled
[DEBUG]  PCI: 00:04:00.0 scanning...
[DEBUG]  PCI: pci_scan_bus for segment group 00 bus 05
[DEBUG]  scan_bus: bus PCI: 00:04:00.0 finished in 5 msecs
[INFO ]  ASPM: Enabled None
[DEBUG]  PCI: 00:04:00.0: No LTR support
[INFO ]  PCI: 00:00:1c.5: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG]  scan_bus: bus PCI: 00:00:1c.5 finished in 46 msecs
[DEBUG]  PCI: 00:00:1c.6 scanning...
[DEBUG]  PCI: pci_scan_bus for segment group 00 bus 06
[DEBUG]  PCI: 00:06:00.0 [1b4b/9122] enabled
[DEBUG]  PCI: 00:06:00.1 [1b4b/91a4] enabled
[INFO ]  Enabling Common Clock Configuration
[INFO ]  ASPM: Enabled L0s
[DEBUG]  PCI: 00:06:00.0: No LTR support
[INFO ]  Enabling Common Clock Configuration
[INFO ]  ASPM: Enabled L0s
[DEBUG]  PCI: 00:06:00.1: No LTR support
[INFO ]  PCI: 00:00:1c.6: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG]  scan_bus: bus PCI: 00:00:1c.6 finished in 47 msecs
[DEBUG]  PCI: 00:00:1c.7 scanning...
[DEBUG]  PCI: pci_scan_bus for segment group 00 bus 07
[DEBUG]  PCI: 00:07:00.0 [1b21/1042] enabled
[INFO ]  Enabling Common Clock Configuration
[INFO ]  ASPM: Enabled None
[DEBUG]  PCI: 00:07:00.0: No LTR support
[INFO ]  PCI: 00:00:1c.7: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG]  scan_bus: bus PCI: 00:00:1c.7 finished in 31 msecs
[DEBUG]  PCI: 00:00:1f.0 scanning...
[DEBUG]  PNP: 002e.1 disabled
[DEBUG]  PNP: 002e.2 enabled
[DEBUG]  PNP: 002e.3 disabled
[DEBUG]  PNP: 002e.5 enabled
[DEBUG]  PNP: 002e.6 disabled
[DEBUG]  PNP: 002e.7 disabled
[DEBUG]  PNP: 002e.8 disabled
[DEBUG]  PNP: 002e.108 enabled
[DEBUG]  PNP: 002e.109 enabled
[DEBUG]  PNP: 002e.509 enabled
[DEBUG]  PNP: 002e.a enabled
[DEBUG]  PNP: 002e.b enabled
[DEBUG]  PNP: 002e.d disabled
[DEBUG]  PNP: 002e.e disabled
[DEBUG]  PNP: 002e.f disabled
[DEBUG]  PNP: 002e.14 enabled
[DEBUG]  PNP: 002e.16 disabled
[DEBUG]  PNP: 002e.308 enabled
[DEBUG]  PNP: 002e.209 enabled
[DEBUG]  PNP: 002e.309 enabled
[DEBUG]  PNP: 002e.409 enabled
[DEBUG]  PNP: 002e.609 enabled
[DEBUG]  PNP: 002e.709 enabled
[DEBUG]  PNP: 002e.9 enabled
[DEBUG]  scan_bus: bus PCI: 00:00:1f.0 finished in 81 msecs
[DEBUG]  PCI: 00:00:1f.3 scanning...
[DEBUG]  scan_bus: bus PCI: 00:00:1f.3 finished in 0 msecs
[DEBUG]  scan_bus: bus DOMAIN: 00000000 finished in 618 msecs
[DEBUG]  scan_bus: bus Root Device finished in 635 msecs
[INFO ]  done
[DEBUG]  BS: BS_DEV_ENUMERATE run times (exec / console): 2 / 648 ms
[DEBUG]  found VGA at PCI: 00:00:02.0
[DEBUG]  Setting up VGA for PCI: 00:00:02.0
[DEBUG]  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000
[DEBUG]  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
[INFO ]  Allocating resources...
[INFO ]  Reading resources...
[DEBUG]  Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
[DEBUG]  TOUUD 0x87a600000 TOLUD 0x84a00000 TOM 0x800000000
[DEBUG]  MEBASE 0x7ff000000
[DEBUG]  IGD decoded, subtracting 64M UMA and 2M GTT
[DEBUG]  TSEG base 0x80000000 size 8M
[INFO ]  Available memory below 4GB: 2048M
[INFO ]  Available memory above 4GB: 30630M
[INFO ]  Done reading resources.
[INFO ]  === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) ===
[DEBUG]   PCI: 00:00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG]   PCI: 00:00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
[DEBUG]   PCI: 00:00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG]    PCI: 00:02:00.0 10 *  [0x0 - 0x3fff] mem
[DEBUG]   PCI: 00:00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG]   PCI: 00:00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG]   PCI: 00:00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[DEBUG]   PCI: 00:00:1c.4 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG]    PCI: 00:03:00.0 10 *  [0x0 - 0xff] io
[DEBUG]   PCI: 00:00:1c.4 io: size: 1000 align: 12 gran: 12 limit: ffff done
[DEBUG]   PCI: 00:00:1c.4 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG]   PCI: 00:00:1c.4 mem: size: 0 align: 20 gran: 20 limit: ffffffff done
[DEBUG]   PCI: 00:00:1c.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG]    PCI: 00:03:00.0 20 *  [0x0 - 0x3fff] prefmem
[DEBUG]    PCI: 00:03:00.0 18 *  [0x4000 - 0x4fff] prefmem
[DEBUG]   PCI: 00:00:1c.4 prefmem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG]   PCI: 00:00:1c.5 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG]   PCI: 00:00:1c.5 io: size: 0 align: 12 gran: 12 limit: ffff done
[DEBUG]   PCI: 00:00:1c.5 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG]   PCI: 00:00:1c.5 mem: size: 0 align: 20 gran: 20 limit: ffffffff done
[DEBUG]   PCI: 00:00:1c.5 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG]   PCI: 00:00:1c.5 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[DEBUG]   PCI: 00:00:1c.6 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG]    PCI: 00:06:00.0 20 *  [0x0 - 0xf] io
[DEBUG]    PCI: 00:06:00.1 20 *  [0x10 - 0x1f] io
[DEBUG]    PCI: 00:06:00.0 10 *  [0x20 - 0x27] io
[DEBUG]    PCI: 00:06:00.0 18 *  [0x28 - 0x2f] io
[DEBUG]    PCI: 00:06:00.1 10 *  [0x30 - 0x37] io
[DEBUG]    PCI: 00:06:00.1 18 *  [0x38 - 0x3f] io
[DEBUG]    PCI: 00:06:00.0 14 *  [0x40 - 0x43] io
[DEBUG]    PCI: 00:06:00.0 1c *  [0x44 - 0x47] io
[DEBUG]    PCI: 00:06:00.1 14 *  [0x48 - 0x4b] io
[DEBUG]    PCI: 00:06:00.1 1c *  [0x4c - 0x4f] io
[DEBUG]   PCI: 00:00:1c.6 io: size: 1000 align: 12 gran: 12 limit: ffff done
[DEBUG]   PCI: 00:00:1c.6 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG]    PCI: 00:06:00.0 30 *  [0x0 - 0xffff] mem
[DEBUG]    PCI: 00:06:00.1 30 *  [0x10000 - 0x13fff] mem
[DEBUG]    PCI: 00:06:00.0 24 *  [0x14000 - 0x147ff] mem
[DEBUG]    PCI: 00:06:00.1 24 *  [0x15000 - 0x1500f] mem
[DEBUG]   PCI: 00:00:1c.6 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG]   PCI: 00:00:1c.6 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG]   PCI: 00:00:1c.6 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[DEBUG]   PCI: 00:00:1c.7 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG]   PCI: 00:00:1c.7 io: size: 0 align: 12 gran: 12 limit: ffff done
[DEBUG]   PCI: 00:00:1c.7 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG]    PCI: 00:07:00.0 10 *  [0x0 - 0x7fff] mem
[DEBUG]   PCI: 00:00:1c.7 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG]   PCI: 00:00:1c.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG]   PCI: 00:00:1c.7 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[INFO ]  === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) ===
[DEBUG]  DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
[DEBUG]   avoid_fixed_resources: PCI: 00:00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
[DEBUG]   avoid_fixed_resources: PNP: 002e.2 60 base 000003f8 limit 000003ff io (fixed)
[DEBUG]   avoid_fixed_resources: PNP: 002e.5 60 base 00000060 limit 00000060 io (fixed)
[DEBUG]   avoid_fixed_resources: PNP: 002e.5 62 base 00000064 limit 00000064 io (fixed)
[DEBUG]   avoid_fixed_resources: PNP: 002e.b 60 base 00000290 limit 00000291 io (fixed)
[DEBUG]   avoid_fixed_resources: PNP: 002e.b 62 base 00000000 limit 00000001 io (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:1f.3 20 base 00000400 limit 0000041f io (fixed)
[INFO ]   DOMAIN: 00000000: Resource ranges:
[INFO ]   * Base: 1000, Size: f000, Tag: 100
[DEBUG]    PCI: 00:00:1c.4 1c *  [0xf000 - 0xffff] limit: ffff io
[DEBUG]    PCI: 00:00:1c.6 1c *  [0xe000 - 0xefff] limit: efff io
[DEBUG]    PCI: 00:00:02.0 20 *  [0xdfc0 - 0xdfff] limit: dfff io
[DEBUG]    PCI: 00:00:1f.2 20 *  [0xdfa0 - 0xdfbf] limit: dfbf io
[ERROR]  Resource didn't fit!!!
[DEBUG]    PNP: 002e.308 60 *  size: 0x8 limit: fff io
[DEBUG]    PCI: 00:00:1f.2 10 *  [0xdf98 - 0xdf9f] limit: df9f io
[DEBUG]    PCI: 00:00:1f.2 18 *  [0xdf90 - 0xdf97] limit: df97 io
[DEBUG]    PCI: 00:00:1f.2 14 *  [0xdf8c - 0xdf8f] limit: df8f io
[DEBUG]    PCI: 00:00:1f.2 1c *  [0xdf88 - 0xdf8b] limit: df8b io
[DEBUG]  DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
[DEBUG]  DOMAIN: 00000000 mem: base: 80000000 size: 0 align: 0 gran: 0 limit: efffffff
[DEBUG]  DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: fffffffff
[DEBUG]   avoid_fixed_resources: PCI: 00:00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:00.0 03 base 00000000 limit 0009ffff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:00.0 04 base 00100000 limit 7fffffff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:00.0 05 base 100000000 limit 87a5fffff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:00.0 06 base 80000000 limit 849fffff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:1f.0 10000100 base ff000000 limit ffffffff mem (fixed)
[DEBUG]   avoid_fixed_resources: PCI: 00:00:1f.0 03 base fec00000 limit fec00fff mem (fixed)
[INFO ]   DOMAIN: 00000000: Resource ranges:
[INFO ]   * Base: 84a00000, Size: 6b600000, Tag: 200
[INFO ]   * Base: 87a600000, Size: 785a00000, Tag: 200
[DEBUG]    PCI: 00:00:02.0 18 *  [0xe0000000 - 0xefffffff] limit: efffffff prefmem
[DEBUG]    PCI: 00:00:02.0 10 *  [0xdfc00000 - 0xdfffffff] limit: dfffffff mem
[DEBUG]    PCI: 00:00:1c.0 20 *  [0xdfb00000 - 0xdfbfffff] limit: dfbfffff mem
[DEBUG]    PCI: 00:00:1c.4 24 *  [0xdfa00000 - 0xdfafffff] limit: dfafffff prefmem
[DEBUG]    PCI: 00:00:1c.6 20 *  [0xdf900000 - 0xdf9fffff] limit: df9fffff mem
[DEBUG]    PCI: 00:00:1c.7 20 *  [0xdf800000 - 0xdf8fffff] limit: df8fffff mem
[DEBUG]    PCI: 00:00:14.0 10 *  [0xdf7f0000 - 0xdf7fffff] limit: df7fffff mem
[DEBUG]    PCI: 00:00:1b.0 10 *  [0xdf7ec000 - 0xdf7effff] limit: df7effff mem
[DEBUG]    PCI: 00:00:1f.2 24 *  [0xdf7eb000 - 0xdf7eb7ff] limit: df7eb7ff mem
[DEBUG]    PCI: 00:00:1a.0 10 *  [0xdf7ea000 - 0xdf7ea3ff] limit: df7ea3ff mem
[DEBUG]    PCI: 00:00:1d.0 10 *  [0xdf7e9000 - 0xdf7e93ff] limit: df7e93ff mem
[DEBUG]    PCI: 00:00:1f.3 10 *  [0xdf7e8000 - 0xdf7e80ff] limit: df7e80ff mem
[DEBUG]    PCI: 00:00:16.0 10 *  [0xdf7e7000 - 0xdf7e700f] limit: df7e700f mem
[DEBUG]  DOMAIN: 00000000 mem: base: 80000000 size: 0 align: 0 gran: 0 limit: efffffff done
[DEBUG]  DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: fffffffff done
[DEBUG]    PCI: 00:02:00.0 10 *  [0xdfb00000 - 0xdfb03fff] limit: dfb03fff mem
[DEBUG]    PCI: 00:03:00.0 10 *  [0xf000 - 0xf0ff] limit: f0ff io
[DEBUG]    PCI: 00:03:00.0 18 *  [0xdfa04000 - 0xdfa04fff] limit: dfa04fff prefmem
[DEBUG]    PCI: 00:03:00.0 20 *  [0xdfa00000 - 0xdfa03fff] limit: dfa03fff prefmem
[DEBUG]    PCI: 00:06:00.0 10 *  [0xe020 - 0xe027] limit: e027 io
[DEBUG]    PCI: 00:06:00.0 14 *  [0xe040 - 0xe043] limit: e043 io
[DEBUG]    PCI: 00:06:00.0 18 *  [0xe028 - 0xe02f] limit: e02f io
[DEBUG]    PCI: 00:06:00.0 1c *  [0xe044 - 0xe047] limit: e047 io
[DEBUG]    PCI: 00:06:00.0 20 *  [0xe000 - 0xe00f] limit: e00f io
[DEBUG]    PCI: 00:06:00.1 10 *  [0xe030 - 0xe037] limit: e037 io
[DEBUG]    PCI: 00:06:00.1 14 *  [0xe048 - 0xe04b] limit: e04b io
[DEBUG]    PCI: 00:06:00.1 18 *  [0xe038 - 0xe03f] limit: e03f io
[DEBUG]    PCI: 00:06:00.1 1c *  [0xe04c - 0xe04f] limit: e04f io
[DEBUG]    PCI: 00:06:00.1 20 *  [0xe010 - 0xe01f] limit: e01f io
[DEBUG]    PCI: 00:06:00.0 24 *  [0xdf914000 - 0xdf9147ff] limit: df9147ff mem
[DEBUG]    PCI: 00:06:00.0 30 *  [0xdf900000 - 0xdf90ffff] limit: df90ffff mem
[DEBUG]    PCI: 00:06:00.1 24 *  [0xdf915000 - 0xdf91500f] limit: df91500f mem
[DEBUG]    PCI: 00:06:00.1 30 *  [0xdf910000 - 0xdf913fff] limit: df913fff mem
[DEBUG]    PCI: 00:07:00.0 10 *  [0xdf800000 - 0xdf807fff] limit: df807fff mem
[INFO ]  === Resource allocator: DOMAIN: 00000000 - resource allocation complete ===
[DEBUG]  PCI: 00:00:01.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 01 io
[DEBUG]  PCI: 00:00:01.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 01 prefmem
[DEBUG]  PCI: 00:00:01.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 01 mem
[DEBUG]  PCI: 00:00:02.0 10 <- [0x00000000dfc00000 - 0x00000000dfffffff] size 0x00400000 gran 0x16 mem64
[DEBUG]  PCI: 00:00:02.0 18 <- [0x00000000e0000000 - 0x00000000efffffff] size 0x10000000 gran 0x1c prefmem64
[DEBUG]  PCI: 00:00:02.0 20 <- [0x000000000000dfc0 - 0x000000000000dfff] size 0x00000040 gran 0x06 io
[DEBUG]  PCI: 00:00:14.0 10 <- [0x00000000df7f0000 - 0x00000000df7fffff] size 0x00010000 gran 0x10 mem64
[DEBUG]  PCI: 00:00:16.0 10 <- [0x00000000df7e7000 - 0x00000000df7e700f] size 0x00000010 gran 0x04 mem64
[DEBUG]  PCI: 00:00:1a.0 10 <- [0x00000000df7ea000 - 0x00000000df7ea3ff] size 0x00000400 gran 0x0a mem
[DEBUG]  PCI: 00:00:1b.0 10 <- [0x00000000df7ec000 - 0x00000000df7effff] size 0x00004000 gran 0x0e mem64
[DEBUG]  PCI: 00:00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 02 io
[DEBUG]  PCI: 00:00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 02 prefmem
[DEBUG]  PCI: 00:00:1c.0 20 <- [0x00000000dfb00000 - 0x00000000dfbfffff] size 0x00100000 gran 0x14 seg 00 bus 02 mem
[DEBUG]  PCI: 00:02:00.0 10 <- [0x00000000dfb00000 - 0x00000000dfb03fff] size 0x00004000 gran 0x0e mem64
[DEBUG]  PCI: 00:00:1c.4 1c <- [0x000000000000f000 - 0x000000000000ffff] size 0x00001000 gran 0x0c seg 00 bus 03 io
[DEBUG]  PCI: 00:00:1c.4 24 <- [0x00000000dfa00000 - 0x00000000dfafffff] size 0x00100000 gran 0x14 seg 00 bus 03 prefmem
[DEBUG]  PCI: 00:00:1c.4 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 03 mem
[DEBUG]  PCI: 00:03:00.0 10 <- [0x000000000000f000 - 0x000000000000f0ff] size 0x00000100 gran 0x08 io
[DEBUG]  PCI: 00:03:00.0 18 <- [0x00000000dfa04000 - 0x00000000dfa04fff] size 0x00001000 gran 0x0c prefmem64
[DEBUG]  PCI: 00:03:00.0 20 <- [0x00000000dfa00000 - 0x00000000dfa03fff] size 0x00004000 gran 0x0e prefmem64
[DEBUG]  PCI: 00:00:1c.5 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 04 io
[DEBUG]  PCI: 00:00:1c.5 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 04 prefmem
[DEBUG]  PCI: 00:00:1c.5 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 04 mem
[DEBUG]  PCI: 00:04:00.0 1c <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x0c seg 00 bus 05 io
[DEBUG]  PCI: 00:04:00.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 05 prefmem
[DEBUG]  PCI: 00:04:00.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 05 mem
[DEBUG]  PCI: 00:00:1c.6 1c <- [0x000000000000e000 - 0x000000000000efff] size 0x00001000 gran 0x0c seg 00 bus 06 io
[DEBUG]  PCI: 00:00:1c.6 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 06 prefmem
[DEBUG]  PCI: 00:00:1c.6 20 <- [0x00000000df900000 - 0x00000000df9fffff] size 0x00100000 gran 0x14 seg 00 bus 06 mem
[DEBUG]  PCI: 00:06:00.0 10 <- [0x000000000000e020 - 0x000000000000e027] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 00:06:00.0 14 <- [0x000000000000e040 - 0x000000000000e043] size 0x00000004 gran 0x02 io
[DEBUG]  PCI: 00:06:00.0 18 <- [0x000000000000e028 - 0x000000000000e02f] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 00:06:00.0 1c <- [0x000000000000e044 - 0x000000000000e047] size 0x00000004 gran 0x02 io
[DEBUG]  PCI: 00:06:00.0 20 <- [0x000000000000e000 - 0x000000000000e00f] size 0x00000010 gran 0x04 io
[DEBUG]  PCI: 00:06:00.0 24 <- [0x00000000df914000 - 0x00000000df9147ff] size 0x00000800 gran 0x0b mem
[DEBUG]  PCI: 00:06:00.0 30 <- [0x00000000df900000 - 0x00000000df90ffff] size 0x00010000 gran 0x10 romem
[DEBUG]  PCI: 00:06:00.1 10 <- [0x000000000000e030 - 0x000000000000e037] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 00:06:00.1 14 <- [0x000000000000e048 - 0x000000000000e04b] size 0x00000004 gran 0x02 io
[DEBUG]  PCI: 00:06:00.1 18 <- [0x000000000000e038 - 0x000000000000e03f] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 00:06:00.1 1c <- [0x000000000000e04c - 0x000000000000e04f] size 0x00000004 gran 0x02 io
[DEBUG]  PCI: 00:06:00.1 20 <- [0x000000000000e010 - 0x000000000000e01f] size 0x00000010 gran 0x04 io
[DEBUG]  PCI: 00:06:00.1 24 <- [0x00000000df915000 - 0x00000000df91500f] size 0x00000010 gran 0x04 mem
[DEBUG]  PCI: 00:06:00.1 30 <- [0x00000000df910000 - 0x00000000df913fff] size 0x00004000 gran 0x0e romem
[DEBUG]  PCI: 00:00:1c.7 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 07 io
[DEBUG]  PCI: 00:00:1c.7 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 07 prefmem
[DEBUG]  PCI: 00:00:1c.7 20 <- [0x00000000df800000 - 0x00000000df8fffff] size 0x00100000 gran 0x14 seg 00 bus 07 mem
[DEBUG]  PCI: 00:07:00.0 10 <- [0x00000000df800000 - 0x00000000df807fff] size 0x00008000 gran 0x0f mem64
[DEBUG]  PCI: 00:00:1d.0 10 <- [0x00000000df7e9000 - 0x00000000df7e93ff] size 0x00000400 gran 0x0a mem
[DEBUG]  PNP: 002e.2 60 <- [0x00000000000003f8 - 0x00000000000003ff] size 0x00000008 gran 0x03 io
[DEBUG]  PNP: 002e.2 70 <- [0x0000000000000004 - 0x0000000000000004] size 0x00000001 gran 0x00 irq
[DEBUG]  PNP: 002e.5 60 <- [0x0000000000000060 - 0x0000000000000060] size 0x00000001 gran 0x00 io
[DEBUG]  PNP: 002e.5 62 <- [0x0000000000000064 - 0x0000000000000064] size 0x00000001 gran 0x00 io
[DEBUG]  PNP: 002e.5 70 <- [0x0000000000000001 - 0x0000000000000001] size 0x00000001 gran 0x00 irq
[DEBUG]  PNP: 002e.5 72 <- [0x000000000000000c - 0x000000000000000c] size 0x00000001 gran 0x00 irq
[DEBUG]  PNP: 002e.5 f0 <- [0x0000000000000082 - 0x0000000000000081] size 0x00000000 gran 0x00 drq
[NOTE ]  PNP: 002e.509 f4 irq size: 0x0000000001 not assigned in devicetree
[NOTE ]  PNP: 002e.509 f5 irq size: 0x0000000001 not assigned in devicetree
[DEBUG]  PNP: 002e.a e7 <- [0x0000000000000011 - 0x0000000000000010] size 0x00000000 gran 0x00 drq
[DEBUG]  PNP: 002e.a f2 <- [0x000000000000005d - 0x000000000000005d] size 0x00000001 gran 0x00 drq
[DEBUG]  PNP: 002e.b 60 <- [0x0000000000000290 - 0x0000000000000291] size 0x00000002 gran 0x01 io
[DEBUG]  PNP: 002e.b 62 <- [0x0000000000000000 - 0x0000000000000001] size 0x00000002 gran 0x01 io
[DEBUG]  PNP: 002e.b 70 <- [0x0000000000000000 - 0x0000000000000000] size 0x00000001 gran 0x00 irq
[DEBUG]  PNP: 002e.b e4 <- [0x00000000000000f9 - 0x00000000000000f8] size 0x00000000 gran 0x00 drq
[NOTE ]  PNP: 002e.b f0 irq size: 0x0000000001 not assigned in devicetree
[NOTE ]  PNP: 002e.308 60 io size: 0x0000000008 not assigned in devicetree
[NOTE ]  PNP: 002e.609 f4 irq size: 0x0000000001 not assigned in devicetree
[NOTE ]  PNP: 002e.609 f5 irq size: 0x0000000001 not assigned in devicetree
[DEBUG]  PCI: 00:00:1f.2 10 <- [0x000000000000df98 - 0x000000000000df9f] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 00:00:1f.2 14 <- [0x000000000000df8c - 0x000000000000df8f] size 0x00000004 gran 0x02 io
[DEBUG]  PCI: 00:00:1f.2 18 <- [0x000000000000df90 - 0x000000000000df97] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 00:00:1f.2 1c <- [0x000000000000df88 - 0x000000000000df8b] size 0x00000004 gran 0x02 io
[DEBUG]  PCI: 00:00:1f.2 20 <- [0x000000000000dfa0 - 0x000000000000dfbf] size 0x00000020 gran 0x05 io
[DEBUG]  PCI: 00:00:1f.2 24 <- [0x00000000df7eb000 - 0x00000000df7eb7ff] size 0x00000800 gran 0x0b mem
[DEBUG]  PCI: 00:00:1f.3 10 <- [0x00000000df7e8000 - 0x00000000df7e80ff] size 0x00000100 gran 0x08 mem64
[INFO ]  Done setting resources.
[INFO ]  Done allocating resources.
[DEBUG]  BS: BS_DEV_RESOURCES run times (exec / console): 2 / 1661 ms
[INFO ]  Enabling resources...
[DEBUG]  PCI: 00:00:00.0 subsystem <- 1043/84ca
[DEBUG]  PCI: 00:00:00.0 cmd <- 06
[DEBUG]  PCI: 00:00:01.0 bridge ctrl <- 0013
[DEBUG]  PCI: 00:00:01.0 subsystem <- 1043/84ca
[DEBUG]  PCI: 00:00:01.0 cmd <- 00
[DEBUG]  PCI: 00:00:02.0 subsystem <- 1043/84ca
[DEBUG]  PCI: 00:00:02.0 cmd <- 03
[DEBUG]  PCI: 00:00:14.0 subsystem <- 1043/84ca
[DEBUG]  PCI: 00:00:14.0 cmd <- 102
[DEBUG]  PCI: 00:00:16.0 subsystem <- 1043/84ca
[DEBUG]  PCI: 00:00:16.0 cmd <- 02
[DEBUG]  PCI: 00:00:1a.0 subsystem <- 1043/84ca
[DEBUG]  PCI: 00:00:1a.0 cmd <- 102
[DEBUG]  PCI: 00:00:1b.0 subsystem <- 1043/841a
[DEBUG]  PCI: 00:00:1b.0 cmd <- 102
[DEBUG]  PCI: 00:00:1c.0 bridge ctrl <- 0013
[DEBUG]  PCI: 00:00:1c.0 subsystem <- 1043/84ca
[DEBUG]  PCI: 00:00:1c.0 cmd <- 106
[DEBUG]  PCI: 00:00:1c.4 bridge ctrl <- 0013
[DEBUG]  PCI: 00:00:1c.4 subsystem <- 1043/84ca
[DEBUG]  PCI: 00:00:1c.4 cmd <- 107
[DEBUG]  PCI: 00:00:1c.5 bridge ctrl <- 0013
[DEBUG]  PCI: 00:00:1c.5 subsystem <- 1043/8489
[DEBUG]  PCI: 00:00:1c.5 cmd <- 100
[DEBUG]  PCI: 00:00:1c.6 bridge ctrl <- 0013
[DEBUG]  PCI: 00:00:1c.6 subsystem <- 1043/83ba
[DEBUG]  PCI: 00:00:1c.6 cmd <- 107
[DEBUG]  PCI: 00:00:1c.7 bridge ctrl <- 0013
[DEBUG]  PCI: 00:00:1c.7 subsystem <- 1043/8488
[DEBUG]  PCI: 00:00:1c.7 cmd <- 106
[DEBUG]  PCI: 00:00:1d.0 subsystem <- 1043/84ca
[DEBUG]  PCI: 00:00:1d.0 cmd <- 102
[DEBUG]  PCI: 00:00:1f.0 subsystem <- 1043/84ca
[DEBUG]  PCI: 00:00:1f.0 cmd <- 107
[DEBUG]  PCI: 00:00:1f.2 subsystem <- 1043/84ca
[DEBUG]  PCI: 00:00:1f.2 cmd <- 03
[DEBUG]  PCI: 00:00:1f.3 subsystem <- 1043/84ca
[DEBUG]  PCI: 00:00:1f.3 cmd <- 103
[DEBUG]  PCI: 00:02:00.0 cmd <- 02
[DEBUG]  PCI: 00:03:00.0 cmd <- 03
[DEBUG]  PCI: 00:04:00.0 bridge ctrl <- 0013
[DEBUG]  PCI: 00:04:00.0 cmd <- 00
[DEBUG]  PCI: 00:06:00.0 cmd <- 03
[DEBUG]  PCI: 00:06:00.1 cmd <- 03
[DEBUG]  PCI: 00:07:00.0 cmd <- 02
[INFO ]  done.
[DEBUG]  BS: BS_DEV_ENABLE run times (exec / console): 1 / 201 ms
[INFO ]  Initializing devices...
[DEBUG]  CPU_CLUSTER: 0 init
[INFO ]  LAPIC 0x0 in XAPIC mode.
[DEBUG]  MTRR: Physical address space:
[DEBUG]  0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
[DEBUG]  0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
[DEBUG]  0x00000000000c0000 - 0x000000007fffffff size 0x7ff40000 type 6
[DEBUG]  0x0000000080000000 - 0x00000000dfffffff size 0x60000000 type 0
[DEBUG]  0x00000000e0000000 - 0x00000000efffffff size 0x10000000 type 1
[DEBUG]  0x00000000f0000000 - 0x00000000ffffffff size 0x10000000 type 0
[DEBUG]  0x0000000100000000 - 0x000000087a5fffff size 0x77a600000 type 6
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
[DEBUG]  apic_id 0x0 setup mtrr for CPU physical address size: 36 bits
[DEBUG]  MTRR: default type WB/UC MTRR counts: 4/6.
[DEBUG]  MTRR: WB selected as default type.
[DEBUG]  MTRR: 0 base 0x0000000080000000 mask 0x0000000fc0000000 type 0
[DEBUG]  MTRR: 1 base 0x00000000c0000000 mask 0x0000000fe0000000 type 0
[DEBUG]  MTRR: 2 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1
[DEBUG]  MTRR: 3 base 0x00000000f0000000 mask 0x0000000ff0000000 type 0

[DEBUG]  MTRR check
[DEBUG]  Fixed MTRRs   : Enabled
[DEBUG]  Variable MTRRs: Enabled

[DEBUG]  CPU has 4 cores, 8 threads enabled.
[DEBUG]  Setting up SMI for CPU
[INFO ]  Will perform SMM setup.
[DEBUG]  microcode: sig=0x306a9 pf=0x2 revision=0x21
[INFO ]  CBFS: Found 'cpu_microcode_blob.bin' @0x80 size 0x6800 in mcache @0x7fffe94c
[INFO ]  CPU: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz.
[INFO ]  LAPIC 0x0 in XAPIC mode.
[DEBUG]  CPU: APIC: 00 enabled
[DEBUG]  CPU: APIC: 01 enabled
[DEBUG]  CPU: APIC: 02 enabled
[DEBUG]  CPU: APIC: 03 enabled
[DEBUG]  CPU: APIC: 04 enabled
[DEBUG]  CPU: APIC: 05 enabled
[DEBUG]  CPU: APIC: 06 enabled
[DEBUG]  CPU: APIC: 07 enabled
[DEBUG]  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
[DEBUG]  Processing 16 relocs. Offset value of 0x00030000
[DEBUG]  Attempting to start 7 APs
[DEBUG]  Waiting for 10ms after sending INIT.
[DEBUG]  Waiting for SIPI to complete...
[INFO ]  LAPIC 0x1 in XAPIC mode.
[DEBUG]  done.
[INFO ]  AP: slot 2 apic_id 1, MCU rev: 0x00000021
[DEBUG]  Waiting for SIPI to complete...
[DEBUG]  done.
[INFO ]  LAPIC 0x6 in XAPIC mode.
[INFO ]  LAPIC 0x7 in XAPIC mode.
[INFO ]  AP: slot 5 apic_id 6, MCU rev: 0x00000021
[INFO ]  AP: slot 4 apic_id 7, MCU rev: 0x00000021
[INFO ]  LAPIC 0x3 in XAPIC mode.
[INFO ]  LAPIC 0x2 in XAPIC mode.
[INFO ]  AP: slot 6 apic_id 3, MCU rev: 0x00000021
[INFO ]  AP: slot 7 apic_id 2, MCU rev: 0x00000021
[INFO ]  LAPIC 0x5 in XAPIC mode.
[INFO ]  LAPIC 0x4 in XAPIC mode.
[INFO ]  AP: slot 1 apic_id 5, MCU rev: 0x00000021
[INFO ]  AP: slot 3 apic_id 4, MCU rev: 0x00000021
[DEBUG]  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1a0 memsize: 0x1a0
[DEBUG]  Processing 9 relocs. Offset value of 0x00038000
[DEBUG]  smm_module_setup_stub: stack_top = 0x80002000
[DEBUG]  smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG]  smm_module_setup_stub: runtime.smm_size = 0x10000
[DEBUG]  SMM Module: stub loaded at 38000. Will call 0x7fea76f6
[DEBUG]  Installing permanent SMM handler to 0x80000000
[DEBUG]  HANDLER      [0x802fe000-0x802ffd37]

[DEBUG]  CPU 0
[DEBUG]    ss0        [0x802fdc00-0x802fdfff]
[DEBUG]    stub0      [0x802f6000-0x802f619f]

[DEBUG]  CPU 1
[DEBUG]    ss1        [0x802fd800-0x802fdbff]
[DEBUG]    stub1      [0x802f5c00-0x802f5d9f]

[DEBUG]  CPU 2
[DEBUG]    ss2        [0x802fd400-0x802fd7ff]
[DEBUG]    stub2      [0x802f5800-0x802f599f]

[DEBUG]  CPU 3
[DEBUG]    ss3        [0x802fd000-0x802fd3ff]
[DEBUG]    stub3      [0x802f5400-0x802f559f]

[DEBUG]  CPU 4
[DEBUG]    ss4        [0x802fcc00-0x802fcfff]
[DEBUG]    stub4      [0x802f5000-0x802f519f]

[DEBUG]  CPU 5
[DEBUG]    ss5        [0x802fc800-0x802fcbff]
[DEBUG]    stub5      [0x802f4c00-0x802f4d9f]

[DEBUG]  CPU 6
[DEBUG]    ss6        [0x802fc400-0x802fc7ff]
[DEBUG]    stub6      [0x802f4800-0x802f499f]

[DEBUG]  CPU 7
[DEBUG]    ss7        [0x802fc000-0x802fc3ff]
[DEBUG]    stub7      [0x802f4400-0x802f459f]

[DEBUG]  stacks       [0x80000000-0x80001fff]
[DEBUG]  Loading module at 0x802fe000 with entry 0x802fe77f. filesize: 0x1cd0 memsize: 0x1d38
[DEBUG]  Processing 78 relocs. Offset value of 0x802fe000
[DEBUG]  Loading module at 0x802f6000 with entry 0x802f6000. filesize: 0x1a0 memsize: 0x1a0
[DEBUG]  Processing 9 relocs. Offset value of 0x802f6000
[DEBUG]  smm_module_setup_stub: stack_top = 0x80002000
[DEBUG]  smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG]  smm_module_setup_stub: runtime.smm_size = 0x300000
[DEBUG]  SMM Module: placing smm entry code at 802f5c00,  cpu # 0x1
[DEBUG]  SMM Module: placing smm entry code at 802f5800,  cpu # 0x2
[DEBUG]  SMM Module: placing smm entry code at 802f5400,  cpu # 0x3
[DEBUG]  SMM Module: placing smm entry code at 802f5000,  cpu # 0x4
[DEBUG]  SMM Module: placing smm entry code at 802f4c00,  cpu # 0x5
[DEBUG]  SMM Module: placing smm entry code at 802f4800,  cpu # 0x6
[DEBUG]  SMM Module: placing smm entry code at 802f4400,  cpu # 0x7
[DEBUG]  SMM Module: stub loaded at 802f6000. Will call 0x802fe77f
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ee000, cpu = 0
[DEBUG]  In relocation handler: cpu 0
[DEBUG]  New SMBASE=0x802ee000 IEDBASE=0x80400000
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ed800, cpu = 2
[INFO ]  microcode: Update skipped, already up-to-date
[DEBUG]  In relocation handler: cpu 2
[DEBUG]  New SMBASE=0x802ed800 IEDBASE=0x80400000
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  microcode: Update skipped, already up-to-date
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ed400, cpu = 3
[DEBUG]  In relocation handler: cpu 3
[DEBUG]  New SMBASE=0x802ed400 IEDBASE=0x80400000
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802edc00, cpu = 1
[INFO ]  microcode: Update skipped, already up-to-date
[DEBUG]  In relocation handler: cpu 1
[DEBUG]  New SMBASE=0x802edc00 IEDBASE=0x80400000
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  microcode: Update skipped, already up-to-date
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ed000, cpu = 4
[DEBUG]  In relocation handler: cpu 4
[DEBUG]  New SMBASE=0x802ed000 IEDBASE=0x80400000
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ecc00, cpu = 5
[INFO ]  microcode: Update skipped, already up-to-date
[DEBUG]  In relocation handler: cpu 5
[DEBUG]  New SMBASE=0x802ecc00 IEDBASE=0x80400000
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  microcode: Update skipped, already up-to-date
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ec400, cpu = 7
[DEBUG]  In relocation handler: cpu 7
[DEBUG]  New SMBASE=0x802ec400 IEDBASE=0x80400000
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ec800, cpu = 6
[INFO ]  microcode: Update skipped, already up-to-date
[DEBUG]  In relocation handler: cpu 6
[DEBUG]  New SMBASE=0x802ec800 IEDBASE=0x80400000
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  microcode: Update skipped, already up-to-date
[INFO ]  Initializing CPU #0
[DEBUG]  CPU: vendor Intel device 306a9
[DEBUG]  CPU: family 06, model 3a, stepping 09
[INFO ]  CPU: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz.
[INFO ]  CPU: cpuid(1) 0x306a9
[INFO ]  CPU: AES supported
[INFO ]  CPU: TXT NOT supported
[INFO ]  CPU: VT supported
[DEBUG]  VMX status: enabled
[DEBUG]  IA32_FEATURE_CONTROL status: locked
[INFO ]  APIC: 00: PP0 current limit not set in devicetree
[INFO ]  APIC: 00: PP0 PSI0 not set in devicetree
[INFO ]  APIC: 00: PP0 PSI1 not set in devicetree
[INFO ]  APIC: 00: PP0 PSI2 not set in devicetree
[INFO ]  APIC: 00: PP1 current limit not set in devicetree
[INFO ]  APIC: 00: PP1 PSI0 not set in devicetree
[INFO ]  APIC: 00: PP1 PSI1 not set in devicetree
[INFO ]  APIC: 00: PP1 PSI2 not set in devicetree
[DEBUG]  cpu: energy policy set to 6
[DEBUG]  model_x06ax: frequency set to 3500
[INFO ]  Turbo is available but hidden
[INFO ]  Turbo is available and visible
[INFO ]  CPU #0 initialized
[INFO ]  Initializing CPU #2
[INFO ]  Initializing CPU #6
[INFO ]  Initializing CPU #7
[DEBUG]  CPU: vendor Intel device 306a9
[DEBUG]  CPU: family 06, model 3a, stepping 09
[DEBUG]  CPU: vendor Intel device 306a9
[DEBUG]  CPU: family 06, model 3a, stepping 09
[INFO ]  CPU: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz.
[INFO ]  CPU: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz.
[INFO ]  CPU: cpuid(1) 0x306a9
[INFO ]  CPU: cpuid(1) 0x306a9
[INFO ]  CPU: AES supported
[INFO ]  CPU: TXT NOT supported
[INFO ]  CPU: VT supported
[INFO ]  CPU: AES supported
[INFO ]  CPU: TXT NOT supported
[INFO ]  CPU: VT supported
[DEBUG]  VMX status: enabled
[DEBUG]  VMX status: enabled
[DEBUG]  IA32_FEATURE_CONTROL status: locked
[DEBUG]  IA32_FEATURE_CONTROL status: locked
[DEBUG]  cpu: energy policy set to 6
[DEBUG]  cpu: energy policy set to 6
[DEBUG]  model_x06ax: frequency set to 3500
[INFO ]  CPU #6 initialized
[DEBUG]  model_x06ax: frequency set to 3500
[INFO ]  CPU #7 initialized
[INFO ]  Initializing CPU #5
[INFO ]  Initializing CPU #4
[DEBUG]  CPU: vendor Intel device 306a9
[DEBUG]  CPU: family 06, model 3a, stepping 09
[DEBUG]  CPU: vendor Intel device 306a9
[DEBUG]  CPU: family 06, model 3a, stepping 09
[INFO ]  CPU: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz.
[INFO ]  CPU: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz.
[INFO ]  CPU: cpuid(1) 0x306a9
[INFO ]  CPU: cpuid(1) 0x306a9
[INFO ]  CPU: AES supported
[INFO ]  CPU: TXT NOT supported
[INFO ]  CPU: VT supported
[INFO ]  CPU: AES supported
[INFO ]  CPU: TXT NOT supported
[INFO ]  CPU: VT supported
[DEBUG]  VMX status: enabled
[DEBUG]  VMX status: enabled
[DEBUG]  IA32_FEATURE_CONTROL status: locked
[DEBUG]  IA32_FEATURE_CONTROL status: locked
[DEBUG]  cpu: energy policy set to 6
[DEBUG]  cpu: energy policy set to 6
[DEBUG]  model_x06ax: frequency set to 3500
[DEBUG]  model_x06ax: frequency set to 3500
[INFO ]  CPU #4 initialized
[INFO ]  CPU #5 initialized
[INFO ]  Initializing CPU #3
[INFO ]  Initializing CPU #1
[DEBUG]  CPU: vendor Intel device 306a9
[DEBUG]  CPU: vendor Intel device 306a9
[DEBUG]  CPU: family 06, model 3a, stepping 09
[DEBUG]  CPU: family 06, model 3a, stepping 09
[INFO ]  CPU: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz.
[INFO ]  CPU: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz.
[INFO ]  CPU: cpuid(1) 0x306a9
[INFO ]  CPU: cpuid(1) 0x306a9
[INFO ]  CPU: AES supported
[INFO ]  CPU: TXT NOT supported
[INFO ]  CPU: VT supported
[INFO ]  CPU: AES supported
[INFO ]  CPU: TXT NOT supported
[INFO ]  CPU: VT supported
[DEBUG]  VMX status: enabled
[DEBUG]  VMX status: enabled
[DEBUG]  IA32_FEATURE_CONTROL status: locked
[DEBUG]  IA32_FEATURE_CONTROL status: locked
[DEBUG]  cpu: energy policy set to 6
[DEBUG]  cpu: energy policy set to 6
[DEBUG]  model_x06ax: frequency set to 3500
[INFO ]  CPU #1 initialized
[DEBUG]  model_x06ax: frequency set to 3500
[INFO ]  CPU #3 initialized
[DEBUG]  CPU: vendor Intel device 306a9
[DEBUG]  CPU: family 06, model 3a, stepping 09
[INFO ]  CPU: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz.
[INFO ]  CPU: cpuid(1) 0x306a9
[INFO ]  CPU: AES supported
[INFO ]  CPU: TXT NOT supported
[INFO ]  CPU: VT supported
[DEBUG]  VMX status: enabled
[DEBUG]  IA32_FEATURE_CONTROL status: locked
[DEBUG]  cpu: energy policy set to 6
[DEBUG]  model_x06ax: frequency set to 3500
[INFO ]  CPU #2 initialized
[INFO ]  bsp_do_flight_plan done after 1024 msecs.
[DEBUG]  SMI_STS: 
[DEBUG]  GPE0_STS: GPIO15 GPIO14 GPIO10 GPIO9 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 
[DEBUG]  ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 
[DEBUG]  TCO_STS: 
[DEBUG]  Locking SMM.
[DEBUG]  CPU_CLUSTER: 0 init finished in 1352 msecs
[DEBUG]  PCI: 00:00:00.0 init
[DEBUG]  Disabling PEG11.
[DEBUG]  Disabling Device 7.
[DEBUG]  Set BIOS_RESET_CPL
[DEBUG]  CPU TDP: 77 Watts
[DEBUG]  PCI: 00:00:00.0 init finished in 13 msecs
[DEBUG]  PCI: 00:00:01.0 init
[DEBUG]  PCI: 00:00:01.0 init finished in 0 msecs
[DEBUG]  PCI: 00:00:02.0 init
[INFO ]  CBFS: Found 'vbt.bin' @0x26c80 size 0x4df in mcache @0x7fffeaa0
[INFO ]  Found a VBT of 3902 bytes
[INFO ]  GMA: Found VBT in CBFS
[INFO ]  GMA: Found valid VBT in CBFS
[DEBUG]  GT Power Management Init
[DEBUG]  IVB GT2 35W Power Meter Weights
[DEBUG]  GT Power Management Init (post VBIOS)
[INFO ]  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
[INFO ]                     x_res x y_res: 1920 x 1080, size: 8294400 at 0xe0000000
[DEBUG]  PCI: 00:00:02.0 init finished in 60 msecs
[DEBUG]  PCI: 00:00:14.0 init
[DEBUG]  XHCI: Setting up controller.. done.
[DEBUG]  PCI: 00:00:14.0 init finished in 4 msecs
[DEBUG]  PCI: 00:00:16.0 init
[DEBUG]  ME: FW Partition Table      : OK
[DEBUG]  ME: Bringup Loader Failure  : NO
[DEBUG]  ME: Firmware Init Complete  : YES
[DEBUG]  ME: Manufacturing Mode      : YES
[DEBUG]  ME: Boot Options Present    : NO
[DEBUG]  ME: Update In Progress      : NO
[DEBUG]  ME: Current Working State   : Normal
[DEBUG]  ME: Current Operation State : M0 with UMA
[DEBUG]  ME: Current Operation Mode  : Normal
[DEBUG]  ME: Error Code              : No Error
[DEBUG]  ME: Progress Phase          : Host Communication
[DEBUG]  ME: Power Management Event  : Power cycle reset through Moff
[DEBUG]  ME: Progress Phase State    : Host communication established
[NOTE ]  ME: BIOS path: Normal
[DEBUG]  No CMOS option 'me_state'.
[DEBUG]  No CMOS option 'me_state_prev'.
[DEBUG]  ME: me_state=0, me_state_prev=0
[DEBUG]  ME: Extend SHA-256: 88cdce2cfa55c4884272f0b35648cbb01caa6e7b03bbd7f814da3bd6cc758d71
[INFO ]  ME: MBP item header 00020103
[INFO ]  ME: MBP item header 00050102
[INFO ]  ME: MBP item header 00020501
[INFO ]  ME: MBP item header 00020201
[INFO ]  ME: MBP item header 02030101
[INFO ]  ME: MBP item header 02060301
[INFO ]  ME: MBP item header 02090401
[DEBUG]  ME: found version 8.0.4.1441
[DEBUG]  ME Capability: Full Network manageability                : disabled
[DEBUG]  ME Capability: Regular Network manageability             : disabled
[DEBUG]  ME Capability: Manageability                             : disabled
[DEBUG]  ME Capability: Small business technology                 : disabled
[DEBUG]  ME Capability: Level III manageability                   : disabled
[DEBUG]  ME Capability: IntelR Anti-Theft (AT)                    : disabled
[DEBUG]  ME Capability: IntelR Capability Licensing Service (CLS) :  enabled
[DEBUG]  ME Capability: IntelR Power Sharing Technology (MPC)     :  enabled
[DEBUG]  ME Capability: ICC Over Clocking                         :  enabled
[DEBUG]  ME Capability: Protected Audio Video Path (PAVP)         :  enabled
[DEBUG]  ME Capability: IPV6                                      : disabled
[DEBUG]  ME Capability: KVM Remote Control (KVM)                  : disabled
[DEBUG]  ME Capability: Outbreak Containment Heuristic (OCH)      : disabled
[DEBUG]  ME Capability: Virtual LAN (VLAN)                        :  enabled
[DEBUG]  ME Capability: TLS                                       : disabled
[DEBUG]  ME Capability: Wireless LAN (WLAN)                       : disabled
[DEBUG]  PCI: 00:00:16.0 init finished in 242 msecs
[DEBUG]  PCI: 00:00:1a.0 init
[DEBUG]  EHCI: Setting up controller.. done.
[DEBUG]  PCI: 00:00:1a.0 init finished in 4 msecs
[DEBUG]  PCI: 00:00:1b.0 init
[DEBUG]  Azalia: base = 0xdf7ec000
[DEBUG]  Azalia: codec_mask = 09
[DEBUG]  azalia_audio: initializing codec #3...
[DEBUG]  azalia_audio:  - vendor/device id: 0x80862806
[DEBUG]  azalia_audio:  - verb size: 16
[DEBUG]  azalia_audio:  - verb loaded
[DEBUG]  azalia_audio: initializing codec #0...
[DEBUG]  azalia_audio:  - vendor/device id: 0x10ec0889
[DEBUG]  azalia_audio:  - verb size: 60
[DEBUG]  azalia_audio:  - verb loaded
[DEBUG]  PCI: 00:00:1b.0 init finished in 49 msecs
[DEBUG]  PCI: 00:00:1c.0 init
[DEBUG]  Initializing PCH PCIe bridge.
[DEBUG]  PCI: 00:00:1c.0 init finished in 4 msecs
[DEBUG]  PCI: 00:00:1c.4 init
[DEBUG]  Initializing PCH PCIe bridge.
[DEBUG]  PCI: 00:00:1c.4 init finished in 4 msecs
[DEBUG]  PCI: 00:00:1c.5 init
[DEBUG]  Initializing PCH PCIe bridge.
[DEBUG]  PCI: 00:00:1c.5 init finished in 4 msecs
[DEBUG]  PCI: 00:00:1c.6 init
[DEBUG]  Initializing PCH PCIe bridge.
[DEBUG]  PCI: 00:00:1c.6 init finished in 4 msecs
[DEBUG]  PCI: 00:00:1c.7 init
[DEBUG]  Initializing PCH PCIe bridge.
[DEBUG]  PCI: 00:00:1c.7 init finished in 4 msecs
[DEBUG]  PCI: 00:00:1d.0 init
[DEBUG]  EHCI: Setting up controller.. done.
[DEBUG]  PCI: 00:00:1d.0 init finished in 4 msecs
[DEBUG]  PCI: 00:00:1f.0 init
[DEBUG]  pch: lpc_init
[INFO ]  PCH: detected Z77, device id: 0x1e44, rev id 0x4
[DEBUG]  IOAPIC: Initializing IOAPIC at fec00000
[DEBUG]  IOAPIC: ID = 0x00
[DEBUG]  IOAPIC: 24 interrupts
[DEBUG]  IOAPIC: Clearing IOAPIC at fec00000
[DEBUG]  IOAPIC: Bootstrap Processor Local APIC = 0x00
[INFO ]  Set power off after power failure.
[INFO ]  NMI sources disabled.
[DEBUG]  PantherPoint PM init
[DEBUG]  RTC: failed = 0x0
[DEBUG]  RTC Init
[DEBUG]  apm_control: Disabling ACPI.
[DEBUG]  APMC done.
[DEBUG]  pch_spi_init
[DEBUG]  PCI: 00:00:1f.0 init finished in 56 msecs
[DEBUG]  PCI: 00:00:1f.2 init
[DEBUG]  SATA: Initializing...
[DEBUG]  SATA: Controller in AHCI mode.
[DEBUG]  ABAR: 0xdf7eb000
[DEBUG]  PCI: 00:00:1f.2 init finished in 10 msecs
[DEBUG]  PCI: 00:00:1f.3 init
[DEBUG]  PCI: 00:00:1f.3 init finished in 0 msecs
[DEBUG]  PCI: 00:02:00.0 init
[DEBUG]  PCI: 00:02:00.0 init finished in 0 msecs
[DEBUG]  PCI: 00:03:00.0 init
[INFO ]  CBFS: Found 'rt8168-macaddress' @0x26c40 size 0x11 in mcache @0x7fffea74
[DEBUG]  r8168: Resetting NIC...done
[DEBUG]  r8168: Programming MAC Address...done
[DEBUG]  r8168: Customized LED 0x482
[DEBUG]  r8168: read back LED setting as 0x482
[DEBUG]  PCI: 00:03:00.0 init finished in 25 msecs
[DEBUG]  PCI: 00:06:00.0 init
[DEBUG]  PCI: 00:06:00.0 init finished in 0 msecs
[DEBUG]  PCI: 00:06:00.1 init
[DEBUG]  PCI: 00:06:00.1 init finished in 0 msecs
[DEBUG]  PCI: 00:07:00.0 init
[DEBUG]  PCI: 00:07:00.0 init finished in 0 msecs
[DEBUG]  PNP: 002e.2 init
[DEBUG]  PNP: 002e.2 init finished in 0 msecs
[DEBUG]  PNP: 002e.5 init
[DEBUG]  PNP: 002e.5 init finished in 0 msecs
[DEBUG]  PNP: 002e.108 init
[DEBUG]  PNP: 002e.108 init finished in 0 msecs
[DEBUG]  PNP: 002e.109 init
[DEBUG]  PNP: 002e.109 init finished in 0 msecs
[DEBUG]  PNP: 002e.509 init
[DEBUG]  PNP: 002e.509 init finished in 0 msecs
[DEBUG]  PNP: 002e.a init
[DEBUG]  PNP: 002e.a init finished in 0 msecs
[DEBUG]  PNP: 002e.b init
[DEBUG]  PNP: 002e.b init finished in 0 msecs
[DEBUG]  PNP: 002e.14 init
[DEBUG]  PNP: 002e.14 init finished in 0 msecs
[DEBUG]  PNP: 002e.308 init
[DEBUG]  PNP: 002e.308 init finished in 0 msecs
[DEBUG]  PNP: 002e.209 init
[DEBUG]  PNP: 002e.209 init finished in 0 msecs
[DEBUG]  PNP: 002e.309 init
[DEBUG]  PNP: 002e.309 init finished in 0 msecs
[DEBUG]  PNP: 002e.409 init
[DEBUG]  PNP: 002e.409 init finished in 0 msecs
[DEBUG]  PNP: 002e.609 init
[DEBUG]  PNP: 002e.609 init finished in 0 msecs
[DEBUG]  PNP: 002e.709 init
[DEBUG]  PNP: 002e.709 init finished in 0 msecs
[DEBUG]  PNP: 002e.9 init
[DEBUG]  PNP: 002e.9 init finished in 0 msecs
[INFO ]  Devices initialized
[DEBUG]  BS: BS_DEV_INIT run times (exec / console): 684 / 1477 ms
[INFO ]  Finalize devices...
[DEBUG]  PCI: 00:00:1f.0 final
[INFO ]  Manufacturer: ef
[INFO ]  SF: Detected ef 7017 with sector size 0x1000, total 0x800000
[DEBUG]  apm_control: Finalizing SMM.
[DEBUG]  APMC done.
[INFO ]  Devices finalized
[DEBUG]  BS: BS_POST_DEVICE run times (exec / console): 5 / 26 ms
[INFO ]  CBFS: Found 'fallback/dsdt.aml' @0x248c0 size 0x2332 in mcache @0x7fffea48
[WARN ]  CBFS: 'fallback/slic' not found.
[INFO ]  ACPI: Writing ACPI tables at 7fe48000.
[DEBUG]  ACPI:    * FACS
[DEBUG]  ACPI:    * FACP
[DEBUG]  ACPI: added table 1/32, length now 44
[DEBUG]  Found 1 CPU(s) with 8 core(s) each.
[DEBUG]  Supported C-states:  C0 C1 C1E C3 C6
[DEBUG]  PSS: 3501MHz power 77000 control 0x2700 status 0x2700
[DEBUG]  PSS: 3500MHz power 77000 control 0x2300 status 0x2300
[DEBUG]  PSS: 2800MHz power 56733 control 0x1c00 status 0x1c00
[DEBUG]  PSS: 2400MHz power 46310 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 36756 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 27975 control 0x1000 status 0x1000
[INFO ]  Requested C-state C7 not supported, using C6 instead
[DEBUG]  Advertising ACPI C State type C1 as CPU C1
[DEBUG]  Advertising ACPI C State type C2 as CPU C3
[DEBUG]  Advertising ACPI C State type C3 as CPU C6
[DEBUG]  PSS: 3501MHz power 77000 control 0x2700 status 0x2700
[DEBUG]  PSS: 3500MHz power 77000 control 0x2300 status 0x2300
[DEBUG]  PSS: 2800MHz power 56733 control 0x1c00 status 0x1c00
[DEBUG]  PSS: 2400MHz power 46310 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 36756 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 27975 control 0x1000 status 0x1000
[INFO ]  Requested C-state C7 not supported, using C6 instead
[DEBUG]  Advertising ACPI C State type C1 as CPU C1
[DEBUG]  Advertising ACPI C State type C2 as CPU C3
[DEBUG]  Advertising ACPI C State type C3 as CPU C6
[DEBUG]  PSS: 3501MHz power 77000 control 0x2700 status 0x2700
[DEBUG]  PSS: 3500MHz power 77000 control 0x2300 status 0x2300
[DEBUG]  PSS: 2800MHz power 56733 control 0x1c00 status 0x1c00
[DEBUG]  PSS: 2400MHz power 46310 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 36756 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 27975 control 0x1000 status 0x1000
[INFO ]  Requested C-state C7 not supported, using C6 instead
[DEBUG]  Advertising ACPI C State type C1 as CPU C1
[DEBUG]  Advertising ACPI C State type C2 as CPU C3
[DEBUG]  Advertising ACPI C State type C3 as CPU C6
[DEBUG]  PSS: 3501MHz power 77000 control 0x2700 status 0x2700
[DEBUG]  PSS: 3500MHz power 77000 control 0x2300 status 0x2300
[DEBUG]  PSS: 2800MHz power 56733 control 0x1c00 status 0x1c00
[DEBUG]  PSS: 2400MHz power 46310 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 36756 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 27975 control 0x1000 status 0x1000
[INFO ]  Requested C-state C7 not supported, using C6 instead
[DEBUG]  Advertising ACPI C State type C1 as CPU C1
[DEBUG]  Advertising ACPI C State type C2 as CPU C3
[DEBUG]  Advertising ACPI C State type C3 as CPU C6
[DEBUG]  PSS: 3501MHz power 77000 control 0x2700 status 0x2700
[DEBUG]  PSS: 3500MHz power 77000 control 0x2300 status 0x2300
[DEBUG]  PSS: 2800MHz power 56733 control 0x1c00 status 0x1c00
[DEBUG]  PSS: 2400MHz power 46310 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 36756 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 27975 control 0x1000 status 0x1000
[INFO ]  Requested C-state C7 not supported, using C6 instead
[DEBUG]  Advertising ACPI C State type C1 as CPU C1
[DEBUG]  Advertising ACPI C State type C2 as CPU C3
[DEBUG]  Advertising ACPI C State type C3 as CPU C6
[DEBUG]  PSS: 3501MHz power 77000 control 0x2700 status 0x2700
[DEBUG]  PSS: 3500MHz power 77000 control 0x2300 status 0x2300
[DEBUG]  PSS: 2800MHz power 56733 control 0x1c00 status 0x1c00
[DEBUG]  PSS: 2400MHz power 46310 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 36756 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 27975 control 0x1000 status 0x1000
[INFO ]  Requested C-state C7 not supported, using C6 instead
[DEBUG]  Advertising ACPI C State type C1 as CPU C1
[DEBUG]  Advertising ACPI C State type C2 as CPU C3
[DEBUG]  Advertising ACPI C State type C3 as CPU C6
[DEBUG]  PSS: 3501MHz power 77000 control 0x2700 status 0x2700
[DEBUG]  PSS: 3500MHz power 77000 control 0x2300 status 0x2300
[DEBUG]  PSS: 2800MHz power 56733 control 0x1c00 status 0x1c00
[DEBUG]  PSS: 2400MHz power 46310 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 36756 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 27975 control 0x1000 status 0x1000
[INFO ]  Requested C-state C7 not supported, using C6 instead
[DEBUG]  Advertising ACPI C State type C1 as CPU C1
[DEBUG]  Advertising ACPI C State type C2 as CPU C3
[DEBUG]  Advertising ACPI C State type C3 as CPU C6
[DEBUG]  PSS: 3501MHz power 77000 control 0x2700 status 0x2700
[DEBUG]  PSS: 3500MHz power 77000 control 0x2300 status 0x2300
[DEBUG]  PSS: 2800MHz power 56733 control 0x1c00 status 0x1c00
[DEBUG]  PSS: 2400MHz power 46310 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 36756 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 27975 control 0x1000 status 0x1000
[INFO ]  Requested C-state C7 not supported, using C6 instead
[DEBUG]  Advertising ACPI C State type C1 as CPU C1
[DEBUG]  Advertising ACPI C State type C2 as CPU C3
[DEBUG]  Advertising ACPI C State type C3 as CPU C6
[DEBUG]  PCI space above 4GB MMIO is at 0x87a600000, len = 0x785a00000
[DEBUG]  Generating ACPI PIRQ entries
[INFO ]  \_SB.PCI0.RP05.RLTK.RLTK: Realtek r8168 PCI: 00:03:00.0
[DEBUG]  ACPI:    * SSDT
[DEBUG]  ACPI: added table 2/32, length now 52
[DEBUG]  ACPI:    * MCFG
[DEBUG]  ACPI: added table 3/32, length now 60
[DEBUG]  IOAPIC: 24 interrupts
[DEBUG]  ACPI:    * APIC
[DEBUG]  ACPI: added table 4/32, length now 68
[DEBUG]  ACPI:    * SPCR
[DEBUG]  ACPI: added table 5/32, length now 76
[DEBUG]  current = 7fe4cb60
[DEBUG]  ACPI:    * HPET
[DEBUG]  ACPI: added table 6/32, length now 84
[INFO ]  ACPI: done.
[DEBUG]  ACPI tables: 19360 bytes.
[DEBUG]  smbios_write_tables: 7fe40000
[DEBUG]  SMBIOS firmware version is set to coreboot_version: '25.03-204-g01164f20b29a-dirty'
[INFO ]  Create SMBIOS type 16
[INFO ]  Create SMBIOS type 17
[INFO ]  Create SMBIOS type 20
[DEBUG]  SMBIOS tables: 1395 bytes.
[DEBUG]  Writing table forward entry at 0x00000500
[DEBUG]  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum bff7
[DEBUG]  Writing coreboot table at 0x7fe6c000
[INFO ]  CBFS: Found 'cmos_layout.bin' @0x27300 size 0x5dc in mcache @0x7fffeaf8
[DEBUG]   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
[DEBUG]   1. 0000000000001000-000000000009ffff: RAM
[DEBUG]   2. 00000000000a0000-00000000000f5fff: RESERVED
[DEBUG]   3. 00000000000f6000-00000000000f6fff: CONFIGURATION TABLES
[DEBUG]   4. 00000000000f7000-00000000000fffff: RESERVED
[DEBUG]   5. 0000000000100000-000000007fe3ffff: RAM
[DEBUG]   6. 000000007fe40000-000000007fe87fff: CONFIGURATION TABLES
[DEBUG]   7. 000000007fe88000-000000007ffd0fff: RAMSTAGE
[DEBUG]   8. 000000007ffd1000-000000007fffffff: CONFIGURATION TABLES
[DEBUG]   9. 0000000080000000-00000000849fffff: RESERVED
[DEBUG]  10. 00000000f0000000-00000000f3ffffff: RESERVED
[DEBUG]  11. 0000000100000000-000000087a5fffff: RAM
[DEBUG]  Wrote coreboot table at: 0x7fe6c000, 0x9e0 bytes, checksum bb22
[DEBUG]  coreboot table: 2552 bytes.
[DEBUG]  IMD ROOT    0. 0x7ffff000 0x00001000
[DEBUG]  IMD SMALL   1. 0x7fffe000 0x00001000
[DEBUG]  CONSOLE     2. 0x7ffde000 0x00020000
[DEBUG]  TIME STAMP  3. 0x7ffdd000 0x00000910
[DEBUG]  MEM INFO    4. 0x7ffdc000 0x00000f48
[DEBUG]  AFTER CAR   5. 0x7ffd1000 0x0000b000
[DEBUG]  RAMSTAGE    6. 0x7fe87000 0x0014a000
[DEBUG]  SMM BACKUP  7. 0x7fe77000 0x00010000
[DEBUG]  IGD OPREGION 8. 0x7fe74000 0x00003000
[DEBUG]  COREBOOT    9. 0x7fe6c000 0x00008000
[DEBUG]  ACPI       10. 0x7fe48000 0x00024000
[DEBUG]  SMBIOS     11. 0x7fe40000 0x00008000
[DEBUG]  IMD small region:
[DEBUG]    IMD ROOT    0. 0x7fffec00 0x00000400
[DEBUG]    RO MCACHE   1. 0x7fffe920 0x000002e0
[DEBUG]    FMAP        2. 0x7fffe840 0x000000e0
[DEBUG]    ROMSTAGE    3. 0x7fffe820 0x00000004
[DEBUG]    ROMSTG STCK 4. 0x7fffe760 0x000000a8
[DEBUG]    ACPI GNVS   5. 0x7fffe660 0x00000100
[DEBUG]  BS: BS_WRITE_TABLES run times (exec / console): 3 / 806 ms
[INFO ]  CBFS: Found 'fallback/payload' @0x2b640 size 0xd323a in mcache @0x7fffeb64
[DEBUG]  Checking segment from ROM address 0xff9db86c
[DEBUG]  Checking segment from ROM address 0xff9db888
[DEBUG]  Loading segment from ROM address 0xff9db86c
[DEBUG]    code (compression=1)
[DEBUG]    New segment dstaddr 0x00800000 memsize 0x800000 srcaddr 0xff9db8a4 filesize 0xd3202
[DEBUG]  Loading Segment: addr: 0x00800000 memsz: 0x0000000000800000 filesz: 0x00000000000d3202
[DEBUG]  using LZMA
[DEBUG]  Loading segment from ROM address 0xff9db888
[DEBUG]    Entry Point 0x008024cc
[DEBUG]  BS: BS_PAYLOAD_LOAD run times (exec / console): 261 / 57 ms
[DEBUG]  ICH-NM10-PCH: watchdog disabled
[DEBUG]  Jumping to boot code at 0x008024cc(0x7fe6c000)
