Bug #310: Coreboot 4.14 fails on a Lenvovo T440p - coreboot - Issue Tracker

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Bug #310

closed

Coreboot 4.14 fails on a Lenvovo T440p

Added by David Hoelscher almost 3 years ago. Updated over 1 year ago.

Status:

Resolved

Priority:

Normal

Assignee:

Angel Pons

Category:

Target version:

Start date:

06/02/2021

Due date:

% Done:

100%

Estimated time:

Affected versions:

Needs backport to:

Affected hardware:

ThinkPad T440p

Affected OS:

All (coreboot bug)

Description

Hi all,

coreboot 4.14 dies on early boot. The T440p ended with led blinking and beep sound.

This was my first try - so i think it was maybe a problem with mrc.bin or vga.rom. But if I skip back to version 4.13, everything works fine (4.13 working config is appended). I don't know how to get debug information on this early stage of boot. Does anyone has a hint? A Raspberry Pi as an external flasher is available.

Further - is it possible to flash only the 4 MB BIOS chip? This IC is very easy accessible. I am afraid to disassemble the complete backplate to access the other 8MB chip again. Initially I flashed the complete Rom without ME on both chips.

Files

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Coreboot_4.13.config (23.6 KB) Coreboot_4.13.config	Coreboot 4.13 Working config	David Hoelscher, 06/02/2021 07:53 PM
descriptor.bin (4 KB) descriptor.bin	BIOS Descriptor.bin	David Hoelscher, 06/02/2021 08:07 PM

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Updated by Bob Dobbs almost 3 years ago

I flashed each T440p-related commit made after the 4.13 release until I found the one that no longer boots. This appears to be the breaking change:

https://review.coreboot.org/plugins/gitiles/coreboot/+/ae999503f62ef8a3b9b2756a2810d29c383a009e

I tried reverting the changes made in this commit (PEG_CAP,PEG_DCAP,etc) and was then able to build from master/4.14 and get a bootable, working 4.14 ROM for the T440p. FWIW my T440p doesn't have a dGPU.

Side note: Flashing only the 4MB chip seems to work (for me, anyway) to get the system booting again.

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Updated by Angel Pons almost 3 years ago

A coreboot log would tell what exactly is going on. You can use flashconsole (CONSOLE_SPI_FLASH Kconfig option) to retrieve one. I think I know what's going on, though: the straps on the mainboard enable PEG x8/x8 bifurcation, which means there's a PCI device at 00:01.0 (Bus:Dev.Func) where the dGPU would be connected to, and another unused PCI device at 00:01.1 which is not present in the devicetree. The config_of() function call added in that commit makes coreboot die when it runs for PCI device 00:01.1 because the device node isn't linked to any chip.

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Updated by Angel Pons almost 3 years ago

Status changed from New to Response Needed
Assignee set to Angel Pons
% Done changed from 0 to 100

https://review.coreboot.org/q/topic:%22haswell-peg-woes%22 should fix booting on T440p. The three T440p changes alone should be enough to fix booting, but the other three address issues in northbridge code, including the one that led to the breakage.

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Updated by Bob Dobbs almost 3 years ago

Angel Pons wrote:

A coreboot log would tell what exactly is going on. You can use flashconsole (CONSOLE_SPI_FLASH Kconfig option) to retrieve one. I think I know what's going on, though: the straps on the mainboard enable PEG x8/x8 bifurcation, which means there's a PCI device at 00:01.0 (Bus:Dev.Func) where the dGPU would be connected to, and another unused PCI device at 00:01.1 which is not present in the devicetree. The config_of() function call added in that commit makes coreboot die when it runs for PCI device 00:01.1 because the device node isn't linked to any chip.

I can confirm adding device pci 01.1 off end # Unused PCIe Bridge to devicetree.cb resolves the issue for me. I can now build (and boot!) master. Thanks so much Angel!

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