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coreboot-4.9 Wed Dec 19 18:05:51 UTC 2018 romstage starting...
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Intel ME early init
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Intel ME firmware is ready
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coreboot-4.9 Wed Dec 19 18:05:51 UTC 2018 postcar starting...
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coreboot-4.9 Wed Dec 19 18:05:51 UTC 2018 ramstage starting...
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Enumerating buses...
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PCI: Static device PCI: 00:16.2 not found, disabling it.
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Enabling Common Clock Configuration
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ASPM: Enabled L1
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Failed to enable LTR for dev = PCI: 05:00.0
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PMH7: ID 04 Revision 01
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EC Firmware ID 6QHT34WW-3.18, Version 5.01B
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H8: BDC not installed
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H8: WWAN detection not implemented. Assuming WWAN installed
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done
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Manufacturer: c2
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SF: Detected MX25L6405D with sector size 0x1000, total 0x800000
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Allocating resources...
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Reading resources...
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PNP: 00ff.1 missing read_resources
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PNP: 00ff.2 missing read_resources
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Done reading resources.
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skipping PNP: 164e.3@29 fixed resource, size=0!
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skipping PNP: 164e.3@f0 fixed resource, size=0!
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skipping PNP: 00ff.2@60 fixed resource, size=0!
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skipping PNP: 00ff.2@62 fixed resource, size=0!
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skipping PNP: 00ff.2@64 fixed resource, size=0!
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skipping PNP: 00ff.2@66 fixed resource, size=0!
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Setting resources...
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PNP: 00ff.1 missing set_resources
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PNP: 00ff.2 missing set_resources
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Done setting resources.
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Done allocating resources.
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Enabling resources...
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done.
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Found TPM ST33ZP24 by ST Microelectronics
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TPM: Handle S3 resume.
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TPM: Resume failed (0x9).
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Initializing devices...
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Initializing CPU #0
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Enabling cache
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CBFS: 'Master Header Locator' located CBFS at [720000:800000)
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CBFS: Locating 'cpu_microcode_blob.bin'
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CBFS: Found @ offset 10100 size 2c00
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CPU: Intel(R) Core(TM) i5 CPU M 540 @ 2.53GHz.
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CPU:lapic=0, boot_cpu=1
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Setting up local APIC...done.
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Turbo is available and visible
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Initializing CPU #1
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Enabling cache
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CBFS: 'Master Header Locator' located CBFS at [720000:800000)
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CBFS: Locating 'cpu_microcode_blob.bin'
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CBFS: Found @ offset 10100 size 2c00
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CPU: Intel(R) Core(TM) i5 CPU M 540 @ 2.53GHz.
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CPU:lapic=1, boot_cpu=0
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Setting up local APIC...done.
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CPU #1 initialized
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Initializing CPU #2
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Enabling cache
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CBFS: 'Master Header Locator' located CBFS at [720000:800000)
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Initializing CPU #3
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CBFS: Locating 'cpu_microcode_blob.bin'
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CPU #0 initialized
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Waiting for 2 CPUS to stop
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Enabling cache
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CBFS: 'Master Header Locator' located CBFS at [720000:800000)
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CBFS: Found @ offset 10100 size 2c00
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CBFS: Locating 'cpu_microcode_blob.bin'
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CPU: Intel(R) Core(TM) i5 CPU M 540 @ 2.53GHz.
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CBFS: Found @ offset 10100 size 2c00
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CPU:lapic=4, boot_cpu=0
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CPU: Intel(R) Core(TM) i5 CPU M 540 @ 2.53GHz.
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Setting up local APIC...CPU:lapic=5, boot_cpu=0
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done.
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CPU #2 initialized
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Waiting for 1 CPUS to stop
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Setting up local APIC...done.
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CPU #3 initialized
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GT init timeout
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GT init timeout
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ME: BIOS path: S3 Wake
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Set power off after power failure.
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NMI sources disabled.
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Devices initialized
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Finalize devices...
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Devices finalized
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