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Bug #637

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Sandybridge: C-States and Turbo not working in coreboot

Bug #637: Sandybridge: C-States and Turbo not working in coreboot

Added by Patrick Rudolph 20 days ago. Updated 1 day ago.

Status:
New
Priority:
Normal
Assignee:
-
Category:
chipset configuration
Target version:
Start date:
04/06/2026
Due date:
% Done:

0%

Estimated time:
Affected versions:
Needs backport to:
Affected hardware:
Affected OS:

Description

Observations showed that in coreboot:

  • C-States are not working (asm("mwait"); has no effect)
  • Turbo states (core above P0 frequency) aren't working

The P-state can be changed after BIOS_RESET_CPL, but it never goes into turbo mode.

On Linux both are working fine.

It would be nice to have both fixed as turbo states could reduce boot time when extracting the LZMA payload.
Tests show that around 20msec of boottime improvements are possible, just for extracting the LZMA payload.

Tested version: 654f32847428f36c92c19932bdfec9f3510bf384

PR Updated by Patrick Rudolph 14 days ago Actions #1

"mwait" is working when you execute the monitor instruction first. It doesn't work without monitor, even when you not want to use it and just want the core to enter C-state.
Tested C1 and C3, but turbo is still not working within coreboot.

PR Updated by Patrick Rudolph 12 days ago Actions #2

Tests show that turbo fully works after 2 seconds. After 1 second it partly works and LZMA is 10msec faster.

AP Updated by Angel Pons 7 days ago Actions #3

I wonder if it has to do with when BIOS_RESET_CPL MCHBAR register gets set.

PR Updated by Patrick Rudolph 1 day ago Actions #4

Likely yes, but BIOS_RESET_CPL can only be set after several MSRs / registers have been written, so enabling it earlier is not possible.

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