coreboot

Upon looking further into things, I think Haswell ULT only supports 11-bit column addresses for LPDDR3, not DDR3. However, Broadwell ULT might actually support 11-bit column addresses for DDR3. Broadwell Trad is out of the question for now since it currently doesn't work at all.

Thanks for the logs. Margins look absolutely fine (yes, read timings have a bit of a positive offset, but I have seen this behaviour on all Haswell boards I've tried NRI on). I'm pretty sure this is a hardware limitation so the only thing left to do here is for me to add a check in NRI to check for non-10-bit column addresses and report that they're unsupported.

Aside: I have noticed that your logs say the following: SF size 0x2800000 does not correspond to CONFIG_ROM_SIZE 0xc00000!!
The T440p has 12 MiB of flash (8 MiB + 4 MiB), but the IFD is reporting a much larger size (40 MiB total, probably 8 MiB + 32 MiB). This means the flash component sizes in your IFD are misconfigured. This is not a coreboot issue and this should NEVER happen if you used the IFD that came with your mainboard. However, if you're using an IFD from some other source (e.g. you flashed a full libreboot image with a "cleaned" ME firmware), please check if they have already fixed this in an update, otherwise raise an issue in their bugtracker.

Thanks for looking into it!

Aside: I have noticed that your logs say the following: SF size 0x2800000 does not correspond to CONFIG_ROM_SIZE 0xc00000!!
The T440p has 12 MiB of flash (8 MiB + 4 MiB), but the IFD is reporting a much larger size (40 MiB total, probably 8 MiB + 32 MiB). This means the flash component sizes in your IFD are misconfigured. This is not a coreboot issue and this should NEVER happen if you used the IFD that came with your mainboard. However, if you're using an IFD from some other source (e.g. you flashed a full libreboot image with a "cleaned" ME firmware), please check if they have already fixed this in an update, otherwise raise an issue in their bugtracker.

Strange. I've never used Libreboot on any device, only self-built Coreboot ROMs with extracted blobs from original Lenovo BIOS flash. But I can't speak for the previous owner(s), I don't know what they've done to this device. I got it with an outdated BIOS and updated BIOS+ME before fiddling around with Coreboot...

Anyways, thanks for this hint! This is only my "naked" mainboard for various tests. I'll compare the IFD stuff with my real T440p daily-driver. (Which is still on v25.06 with NRI disabled.)

Okay, false alarm: Nicholas Chin just let me know that the size reporting on Haswell / Lynx Point boards with 2 flash chips is consistently wrong. Looks like both coreboot and ifdtool decode the size wrongly.