coreboot

On several (but not all) Chromebook platforms which use an I2C interface for the CR50 TPM, the TPM fails to initialize due to I2C transaction errors.

The following boards with I2C CR50 TPM are known to be affected:
google/brya (banshee variant confirmed, others untested)
google/drallion
google/poppy (soraka and nautilus variants)
google/reef (all variants)

The following boards with I2C CR50 TPM are known to be working:
google/eve
google/guybrush
google/kahlee
google/zork

cbmem shows the following, with the i2c transactions repeating 100x until failing. This causes a significant increase in boot time.

[INFO ]  Probing TPM I2C: i2c 2:50 W 1 bytes : 06                                              
[ERROR]  I2C TX abort detected (00000001)                                                      
[ERROR]  cr50_i2c_read: Address write failed                                                   
[INFO ]  .i2c 2:50 W 1 bytes : 06                                                              
[ERROR]  I2C TX abort detected (00000001)                                                      
[ERROR]  cr50_i2c_read: Address write failed                                                   
...

soraka/nautilus show slightly different output:

[INFO ]  Probing TPM I2C: Cr50 TPM IRQ timeout!
[INFO ]  .Cr50 TPM IRQ timeout!
[INFO ]  .Cr50 TPM IRQ timeout!
[INFO ]  .Cr50 TPM IRQ timeout!
...