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diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c
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index 122b8ac..f95a291 100644
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--- a/src/northbridge/intel/nehalem/raminit.c
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+++ b/src/northbridge/intel/nehalem/raminit.c
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@@ -1753,24 +1753,45 @@ static const struct ram_training *get_cached_training(void)
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}
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#endif
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-/* FIXME: add timeout. */
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+/* FIXME: timeout added to workaround the lack of ME in the case it has been removed with me_cleaner. Testing needed. */
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static void wait_heci_ready(void)
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{
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- while (!(read32(DEFAULT_HECIBAR + 0xc) & 8)); // = 0x8000000c
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+ int timeout;
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+
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+ timeout = 0x7ff;
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+ while (!(read32(DEFAULT_HECIBAR + 0xc) & 8) && --timeout) { // = 0x8000000c
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+ udelay(10);
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+ if ((timeout & 0xff) == 0)
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+ printk(BIOS_SPEW, ".");
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+ }
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+ if (!timeout) {
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+ printk(BIOS_DEBUG, "Timeout while waiting for ME init!\n");
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+ // return -1;
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+ }
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write32((DEFAULT_HECIBAR + 0x4),
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(read32(DEFAULT_HECIBAR + 0x4) & ~0x10) | 0xc);
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}
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-/* FIXME: add timeout. */
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+/* FIXME: timeout added to workaround the lack of ME in the case it has been removed with me_cleaner. Testing needed. */
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static void wait_heci_cb_avail(int len)
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{
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+ int timeout;
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+
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union {
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struct mei_csr csr;
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u32 raw;
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} csr;
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- while (!(read32(DEFAULT_HECIBAR + 0xc) & 8));
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-
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+ timeout = 0x7ff;
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+ while (!(read32(DEFAULT_HECIBAR + 0xc) & 8) && --timeout) {
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+ udelay(10);
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+ if ((timeout & 0xff) == 0)
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+ printk(BIOS_SPEW, ".");
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+ };
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+ if (!timeout) {
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+ printk(BIOS_DEBUG, "Timeout while waiting for ME init!\n");
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+ // return -1;
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+ }
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do
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csr.raw = read32(DEFAULT_HECIBAR + 0x4);
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while (len >
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