Bug #318
closeddenverton_ns: Fix MRC cache write
0%
Description
The RW_MRC_CACHE write is broken in denverton_ns platforms.
More info:
https://mail.coreboot.org/hyperkitty/list/coreboot@coreboot.org/message/26YJ22Z64DZXPAK2VMT6L3FNANNLHMDQ/
https://review.coreboot.org/c/coreboot/+/57033 (patch set as abandoned, it was already agreed with Mariusz to proceed the codereview process).
Updated by King Sumo almost 3 years ago
Fixed:
ommit 3990da0bfe18e3b76751fd35fef9e5ec55c2fd29
Author: Kyösti Mälkki kyosti.malkki@gmail.com
Date: Mon Nov 15 17:25:54 2021 +0200
soc/intel/denverton_ns: Fix MRC_RW_CACHE
It is required to set WPD (Write Protect Disable) bit
to make it possible to use MRC_RW_CACHE region with
CACHE_MRC_SETTINGS=y.
Change-Id: Iacab44b00d08c9bdc18bc3bdcb88833634c0b02e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60091
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Updated by King Sumo over 2 years ago
- Status changed from New to Response Needed
Updated by King Sumo over 2 years ago
King Sumo wrote in #note-1:
Fixed:
ommit 3990da0bfe18e3b76751fd35fef9e5ec55c2fd29
Author: Kyösti Mälkki kyosti.malkki@gmail.com
Date: Mon Nov 15 17:25:54 2021 +0200soc/intel/denverton_ns: Fix MRC_RW_CACHE It is required to set WPD (Write Protect Disable) bit to make it possible to use MRC_RW_CACHE region with CACHE_MRC_SETTINGS=y. Change-Id: Iacab44b00d08c9bdc18bc3bdcb88833634c0b02e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60091 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Please someone close this ticked, I guess only may developers can do this.
Updated by Angel Pons over 2 years ago
- Status changed from Response Needed to Resolved
Marked as resolved, I don't know if backports are done yet.