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Bug #21

open

If a PCI device requests more memory space than is available, coreboot gives it to the device anyway, causing a board hang.

Added by Martin Roth over 8 years ago.

Status:
New
Priority:
Normal
Assignee:
-
Category:
infrastructure
Target version:
-
Start date:
12/30/2015
Due date:
% Done:

0%

Estimated time:
Affected versions:
Needs backport to:
Affected hardware:
Affected OS:

Description

Here are the issues and their locations:

Current code:
device.c: avoid_fixed_resources()

        if (res->flags & IORESOURCE_MEM)
            res->base = resource_max(res);

res->base isn't checked to make sure that it's valid.

device_util.c: resource_max()

    resource_t max;
    max = align_down(resource->limit - resource->size + 1, resource->align);
    return max;

The max value also isn't checked for validity here.

Currently if a device requests 2GB of memory, it's assigned memory at address 0x00.

I don't believe that this is as simple as just not assigning memory to the offending BAR, as that will leave the device in a very odd state with some BARs enabled, and others not enabled.

An initial attempt to fix this problem was proposed in https://review.coreboot.org/#/c/12575

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