If a PCI device requests more memory space than is available, coreboot gives it to the device anyway, causing a board hang.
Here are the issues and their locations:
if (res->flags & IORESOURCE_MEM)
res->base = resource_max(res);
res->base isn't checked to make sure that it's valid.
max = align_down(resource->limit - resource->size + 1, resource->align);
The max value also isn't checked for validity here.
Currently if a device requests 2GB of memory, it's assigned memory at address 0x00.
I don't believe that this is as simple as just not assigning memory to the offending BAR, as that will leave the device in a very odd state with some BARs enabled, and others not enabled.
An initial attempt to fix this problem was proposed in https://review.coreboot.org/#/c/12575