Project

General

Profile

Actions

Bug #174

closed

libgfxinit on T420 results in black screen

Added by Evgeny Zinoviev over 5 years ago. Updated almost 5 years ago.

Status:
Closed
Priority:
Normal
Assignee:
Category:
board support
Target version:
-
Start date:
09/09/2018
Due date:
% Done:

0%

Estimated time:
Affected versions:
Needs backport to:
Affected hardware:
Affected OS:

Description

Native graphics initialization works fine. But libgfxinit method results in black screen, and not even a backlight until linux kernel. When kernel boots, backlight turns on but the screen remains black.

This T420 doesn't have discrete nvidia GPU.


Files

t420_libgfxinit_cbmem.txt (38.3 KB) t420_libgfxinit_cbmem.txt Evgeny Zinoviev, 09/09/2018 09:47 PM
Actions #1

Updated by Nico Huber over 5 years ago

PCI: 00:02.0 init finished in 341 usecs

It seems that libgfxinit is either not run at all or bails out very early. It might just miss a PCI ID. Please provide your coreboot .config and the output of lspci -nn -s 0:2.0.

Actions #2

Updated by Evgeny Zinoviev over 5 years ago

Nico Huber wrote:

PCI: 00:02.0 init finished in 341 usecs

It seems that libgfxinit is either not run at all or bails out very early. It might just miss a PCI ID. Please provide your coreboot .config and the output of lspci -nn -s 0:2.0.

This is the config, the only changed part is native graphics init vs libgfxinit: https://review.coreboot.org/cgit/board-status.git/diff/lenovo/t420/4.8-1436-g41979d8/2018-09-07T23_40_08Z/config.txt?id=f7264c82915d465a536f1aeab8f29c29c7bb73eb

I'll provide the lspci output when I can.

Actions #3

Updated by Evgeny Zinoviev over 5 years ago

Nico Huber wrote:

Please provide [...] the output of lspci -nn -s 0:2.0.

# lspci -nn -s 0:2.0
00:02.0 VGA compatible controller [0300]: Intel Corporation 3rd Gen Core processor Graphics Controller [8086:0166] (rev 09)
# lspci -nn
00:00.0 Host bridge [0600]: Intel Corporation 3rd Gen Core processor DRAM Controller [8086:0154] (rev 09)
00:02.0 VGA compatible controller [0300]: Intel Corporation 3rd Gen Core processor Graphics Controller [8086:0166] (rev 09)
00:04.0 Signal processing controller [1180]: Intel Corporation 3rd Gen Core Processor Thermal Subsystem [8086:0153] (rev 09)
00:19.0 Ethernet controller [0200]: Intel Corporation 82579LM Gigabit Network Connection [8086:1502] (rev 05)
00:1a.0 USB controller [0c03]: Intel Corporation 6 Series/C200 Series Chipset Family USB Enhanced Host Controller #2 [8086:1c2d] (rev 05)
00:1b.0 Audio device [0403]: Intel Corporation 6 Series/C200 Series Chipset Family High Definition Audio Controller [8086:1c20] (rev 05)
00:1c.0 PCI bridge [0604]: Intel Corporation 6 Series/C200 Series Chipset Family PCI Express Root Port 2 [8086:1c12] (rev b5)
00:1c.1 PCI bridge [0604]: Intel Corporation 6 Series/C200 Series Chipset Family PCI Express Root Port 4 [8086:1c16] (rev b5)
00:1c.3 PCI bridge [0604]: Intel Corporation 6 Series/C200 Series Chipset Family PCI Express Root Port 5 [8086:1c18] (rev b5)
00:1d.0 USB controller [0c03]: Intel Corporation 6 Series/C200 Series Chipset Family USB Enhanced Host Controller #1 [8086:1c26] (rev 05)
00:1f.0 ISA bridge [0601]: Intel Corporation QM67 Express Chipset Family LPC Controller [8086:1c4f] (rev 05)
00:1f.2 SATA controller [0106]: Intel Corporation 6 Series/C200 Series Chipset Family 6 port SATA AHCI Controller [8086:1c03] (rev 05)
00:1f.3 SMBus [0c05]: Intel Corporation 6 Series/C200 Series Chipset Family SMBus Controller [8086:1c22] (rev 05)
00:1f.6 Signal processing controller [1180]: Intel Corporation 6 Series/C200 Series Chipset Family Thermal Management Controller [8086:1c24] (rev 05)
01:00.0 Network controller [0280]: Intel Corporation Centrino Advanced-N 6205 [Taylor Peak] [8086:0085] (rev 34)
03:00.0 SD Host controller [0805]: Ricoh Co Ltd MMC/SD Host Controller [1180:e822] (rev 08)
Actions #4

Updated by Nico Huber over 5 years ago

Looks like you switched your CPU for an Ivy Bridge one? Currently*, libgfxinit has no way to detect the CPU at runtime. You'd have to change Kconfig to select Ivy Bridge, I guess.

*There are patches, feel free to review: https://review.coreboot.org/q/topic:%22dyncpu_config%22+(status:open%20OR%20status:merged)

Actions #5

Updated by Evgeny Zinoviev almost 5 years ago

I guess this can be closed.

Actions #6

Updated by Nico Huber almost 5 years ago

  • Status changed from New to Resolved
  • Assignee set to Nico Huber

I guess this can be closed.

That would be your part ;) the assignee solves the issue, the issuer closes it when satisfied.

Actions #7

Updated by Evgeny Zinoviev almost 5 years ago

  • Status changed from Resolved to Closed
Actions

Also available in: Atom PDF