cbmem -c

[NOTE ] coreboot-26.03-498-g9e3ace1027ac Sat Apr 25 03:20:08 UTC 2026 x86_32 bootblock starting (log level: 7)...
[DEBUG] Starting cbfs_boot_device
[DEBUG] Starting cbfs_boot_device
[DEBUG] FMAP: Found "FLASH" version 1.1 at 0x710000.
[DEBUG] FMAP: base = 0x0 size = 0x800000 #areas = 4
[DEBUG] FMAP: area COREBOOT found @ 711000 (978944 bytes)
[INFO ] Booting from COREBOOT region
[INFO ] CBFS: mcache @0xfefc2e00 built for 22 files, used 0x428 of 0x4000 bytes
[INFO ] CBFS: Found 'fallback/romstage' @0x34c0 size 0x140f8 in mcache @0xfefc2e5c
[DEBUG] BS: bootblock times (exec / console): total (unknown) / 1 ms

[NOTE ] coreboot-26.03-498-g9e3ace1027ac Sat Apr 25 03:20:08 UTC 2026 x86_32 romstage starting (log level: 7)...
[DEBUG] Setting up static southbridge registers... done.
[DEBUG] Disabling Watchdog reboot... done.
[DEBUG] Setting up static northbridge registers... done.
[DEBUG] SMBus controller enabled
[DEBUG] Setting up Chipset Initialization Registers (CIR)
[INFO ] Intel ME early init
[INFO ] Intel ME firmware is ready
[DEBUG] ME: Requested 32MB UMA
[DEBUG] CAPID0[0] = 0x010c0009
[DEBUG] CAPID0[1] = 0x00316126
[DEBUG] CAPID0[2] = 0x00040088
[DEBUG] Revision ID: 0x18
[DEBUG] Device ID: 0x44
[DEBUG] FMAP: area RW_MRC_CACHE found @ 700000 (65536 bytes)
[DEBUG] CBMEM:
[DEBUG] IMD: root @ 0x7f7ff000 254 entries.
[DEBUG] IMD: root @ 0x7f7fec00 62 entries.
[DEBUG] Starting cbfs_boot_device
[DEBUG] External stage cache:
[DEBUG] IMD: root @ 0x7ffff000 254 entries.
[DEBUG] IMD: root @ 0x7fffec00 62 entries.
[DEBUG] FMAP: area RW_MRC_CACHE found @ 700000 (65536 bytes)
[DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'.
[INFO ] Manufacturer: c2
[INFO ] SF: Detected c2 2017 with sector size 0x1000, total 0x800000
[DEBUG] MRC: 'RW_MRC_CACHE' does not need update.
[DEBUG] ME: FW Partition Table : OK
[DEBUG] ME: Bringup Loader Failure : NO
[DEBUG] ME: Firmware Init Complete : NO
[DEBUG] ME: Manufacturing Mode : NO
[DEBUG] ME: Boot Options Present : NO
[DEBUG] ME: Update In Progress : NO
[DEBUG] ME: Current Working State : Normal
[DEBUG] ME: Current Operation State : Bring up
[DEBUG] ME: Current Operation Mode : Normal
[DEBUG] ME: Error Code : No Error
[DEBUG] ME: Progress Phase : BUP Phase
[DEBUG] ME: Power Management Event : Clean Moff->Mx wake
[DEBUG] ME: Progress Phase State : 0x41
[DEBUG] SMM Memory Map
[DEBUG] SMRAM : 0x7f800000 0x800000
[DEBUG] Subregion 0: 0x7f800000 0x700000
[DEBUG] Subregion 2: 0x7ff00000 0x100000
[DEBUG] Subregion 3: 0x80000000 0x0
[DEBUG] Normal boot
[DEBUG] Starting cbfs_boot_device
[INFO ] CBFS: Found 'fallback/postcar' @0x45ec0 size 0x59b0 in mcache @0xfefc3064
[DEBUG] Loading module at 0x7f7d0000 with entry 0x7f7d0031. filesize: 0x55c8 memsize: 0xb918
[DEBUG] Processing 234 relocs. Offset value of 0x7d7d0000
[DEBUG] BS: romstage times (exec / console): total (unknown) / 2 ms

[NOTE ] coreboot-26.03-498-g9e3ace1027ac Sat Apr 25 03:20:08 UTC 2026 x86_32 postcar starting (log level: 7)...
[DEBUG] Normal boot
[DEBUG] Starting cbfs_boot_device
[INFO ] CBFS: Found 'fallback/ramstage' @0x17640 size 0x21f39 in mcache @0x7f7dd0bc
[DEBUG] Loading module at 0x7f67a000 with entry 0x7f67a000. filesize: 0x43990 memsize: 0x1549c8
[DEBUG] Processing 4305 relocs. Offset value of 0x7b67a000
[DEBUG] BS: postcar times (exec / console): total (unknown) / 0 ms

[NOTE ] coreboot-26.03-498-g9e3ace1027ac Sat Apr 25 03:20:08 UTC 2026 x86_32 ramstage starting (log level: 7)...
[INFO ] POST: 0x39
[INFO ] POST: 0x6f
[DEBUG] Normal boot
[INFO ] POST: 0x70
[INFO ] POST: 0x71
[DEBUG] Disabling PEG10.
[INFO ] POST: 0x72
[INFO ] Enumerating buses...
[DEBUG] Root Device scanning...
[DEBUG] CPU_CLUSTER: 0 enabled
[DEBUG] DOMAIN: 00000000 enabled
[DEBUG] DOMAIN: 00000000 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 00
[INFO ] POST: 0x24
[DEBUG] PCI: 00:00:00.0 [8086/0044] enabled
[DEBUG] PCI: 00:00:02.0 [8086/0046] enabled
[DEBUG] PCI: 00:00:16.0 [8086/3b64] enabled
[DEBUG] PCI: 00:00:16.1: Disabling device
[DEBUG] PCI: 00:00:16.2: Disabling device
[DEBUG] PCI: 00:00:16.3: Disabling device
[DEBUG] PCI: 00:00:19.0 [8086/10ea] enabled
[DEBUG] PCI: 00:00:1a.0 [8086/3b3c] enabled
[DEBUG] PCI: 00:00:1b.0 [8086/3b56] enabled
[DEBUG] PCI: 00:00:1c.0 subordinate bus PCI Express
[DEBUG] PCI: 00:00:1c.0 [8086/3b42] enabled
[DEBUG] PCI: 00:00:1c.1 subordinate bus PCI Express
[DEBUG] PCI: 00:00:1c.1 [8086/3b44] enabled
[DEBUG] PCI: 00:00:1c.2: Disabling device
[DEBUG] PCI: 00:00:1c.2 [8086/3b46] disabled No operations
[DEBUG] PCI: 00:00:1c.3 subordinate bus PCI Express
[DEBUG] PCI: 00:00:1c.3 [8086/3b48] enabled
[DEBUG] PCI: 00:00:1c.4 subordinate bus PCI Express
[DEBUG] PCI: 00:00:1c.4 [8086/3b4a] enabled
[DEBUG] PCI: 00:00:1c.5: Disabling device
[DEBUG] PCI: 00:00:1c.5 [8086/3b4c] disabled No operations
[DEBUG] PCI: 00:00:1c.6: Disabling device
[DEBUG] PCI: 00:00:1c.6 [8086/3b4e] disabled No operations
[DEBUG] PCI: 00:00:1c.7: Disabling device
[DEBUG] PCI: 00:00:1c.7 [8086/3b50] disabled No operations
[DEBUG] PCI: 00:00:1d.0 [8086/3b34] enabled
[DEBUG] PCI: 00:00:1e.0 [8086/2448] enabled
[DEBUG] PCI: 00:00:1f.0 [8086/3b07] enabled
[DEBUG] PCI: 00:00:1f.2 [8086/3b2e] enabled
[DEBUG] PCI: 00:00:1f.3 [8086/3b30] enabled
[DEBUG] PCI: 00:00:1f.4: Disabling device
[DEBUG] PCI: 00:00:1f.5: Disabling device
[DEBUG] PCI: 00:00:1f.5 [8086/3b2d] disabled No operations
[DEBUG] PCI: 00:00:1f.6 [8086/3b32] enabled
[DEBUG] PCI: 00:00:1c.0 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 01
[INFO ] POST: 0x24
[INFO ] POST: 0x25
[INFO ] PCI: 00:00:1c.0: ASPM enabled L0s and L1 (no endpoint)
[INFO ] PCI: 00:00:1c.0: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG] scan_bus: bus PCI: 00:00:1c.0 finished in 0 msecs
[DEBUG] PCI: 00:00:1c.1 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 02
[INFO ] POST: 0x24
[INFO ] POST: 0x25
[INFO ] PCI: 00:00:1c.1: ASPM enabled L0s and L1 (no endpoint)
[INFO ] PCI: 00:00:1c.1: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG] scan_bus: bus PCI: 00:00:1c.1 finished in 0 msecs
[DEBUG] PCI: 00:00:1c.3 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 03
[INFO ] POST: 0x24
[INFO ] POST: 0x25
[INFO ] PCI: 00:00:1c.3: ASPM enabled L0s and L1 (no endpoint)
[INFO ] PCI: 00:00:1c.3: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG] scan_bus: bus PCI: 00:00:1c.3 finished in 0 msecs
[DEBUG] PCI: 00:00:1c.4 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 04
[INFO ] POST: 0x24
[DEBUG] PCI: 00:04:00.0 [8086/4238] enabled
[INFO ] POST: 0x25
[INFO ] Enabling Common Clock Configuration
[INFO ] ASPM: Enabled L0s and L1
[DEBUG] PCI: 00:04:00.0: No LTR support
[INFO ] PCI: 00:00:1c.4: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG] scan_bus: bus PCI: 00:00:1c.4 finished in 0 msecs
[DEBUG] PCI: 00:00:1e.0 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 05
[INFO ] POST: 0x24
[INFO ] POST: 0x25
[DEBUG] scan_bus: bus PCI: 00:00:1e.0 finished in 0 msecs
[DEBUG] PCI: 00:00:1f.0 scanning...
[DEBUG] PNP: 164e.3 enabled
[DEBUG] PNP: 164e.2 disabled
[DEBUG] PNP: 164e.7 disabled
[DEBUG] PNP: 164e.19 disabled
[INFO ] Found TPM 1.2 ST33ZP24 (0x0000) by ST Microelectronics (0x104a)
[DEBUG] PNP: 0c31.0 enabled
[INFO ] PMH7: ID 04 Revision 20
[DEBUG] PNP: 00ff.1 enabled
[INFO ] H8: EC Firmware ID 6SHT34WW-3.18, Version 5.01B
[INFO ] H8: WWAN detection not implemented. Assuming WWAN installed
[DEBUG] dock is not connected
[DEBUG] PNP: 00ff.2 enabled
[DEBUG] scan_bus: bus PCI: 00:00:1f.0 finished in 7 msecs
[DEBUG] PCI: 00:00:1f.3 scanning...
[DEBUG] I2C: 01:54 enabled
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:55 enabled
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:56 enabled
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:57 enabled
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:5c enabled
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:5d enabled
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:5e enabled
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:5f enabled
[DEBUG] bus: PCI: 00:00:1f.3->scan_bus: bus PCI: 00:00:1f.3 finished in 0 msecs
[INFO ] POST: 0x25
[DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 8 msecs
[DEBUG] scan_bus: bus Root Device finished in 8 msecs
[INFO ] done
[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 8 / 0 ms
[INFO ] POST: 0x73
[DEBUG] found VGA at PCI: 00:00:02.0
[DEBUG] Setting up VGA for PCI: 00:00:02.0
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
[INFO ] Allocating resources...
[INFO ] Reading resources...
[DEBUG] Adding PCIe enhanced config space BAR 0xe0000000-0xf0000000.
[DEBUG] ram_before_4g_top: 0x7f800000
[DEBUG] TOUUD: 0x2700
[INFO ] Available memory above 4GB: 5888M
[INFO ] Done reading resources.
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) ===
[DEBUG] PCI: 00:00:1c.4 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG] PCI: 00:00:1c.4 io: size: 0 align: 12 gran: 12 limit: ffff done
[DEBUG] PCI: 00:00:1c.4 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG] PCI: 00:04:00.0 10 * [0x0 - 0x1fff] mem
[DEBUG] PCI: 00:00:1c.4 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG] PCI: 00:00:1c.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG] PCI: 00:00:1c.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) ===
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000200 base 00001600 limit 0000167b io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000300 base 000015e0 limit 000015eb io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000400 base 00001680 limit 0000169b io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 164e.3 60 base 00000200 limit 00000207 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.1 15e0 base 000015e0 limit 000015ef io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 60 base 00000060 limit 00000060 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 62 base 00000062 limit 00000062 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 64 base 00000064 limit 00000064 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 66 base 00000066 limit 00000066 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 1600 base 00001600 limit 00001600 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 1604 base 00001604 limit 00001604 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 1602 base 00001602 limit 00001602 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 1606 base 00001606 limit 00001606 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 1610 base 00001610 limit 0000161f io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.3 20 base 00000400 limit 0000041f io (fixed)
[INFO ] DOMAIN: 00000000: Resource ranges:
[INFO ] * Base: 1000, Size: 5e0, Tag: 100
[INFO ] * Base: 15f0, Size: 10, Tag: 100
[INFO ] * Base: 167c, Size: 4, Tag: 100
[INFO ] * Base: 169c, Size: e964, Tag: 100
[DEBUG] PCI: 00:00:19.0 18 * [0xffe0 - 0xffff] limit: ffff io
[DEBUG] PCI: 00:00:1f.2 20 * [0xffc0 - 0xffdf] limit: ffdf io
[DEBUG] PCI: 00:00:02.0 20 * [0xffb8 - 0xffbf] limit: ffbf io
[DEBUG] PCI: 00:00:1f.2 10 * [0xffb0 - 0xffb7] limit: ffb7 io
[DEBUG] PCI: 00:00:1f.2 18 * [0xffa8 - 0xffaf] limit: ffaf io
[DEBUG] PCI: 00:00:1f.2 14 * [0xffa4 - 0xffa7] limit: ffa7 io
[DEBUG] PCI: 00:00:1f.2 1c * [0xffa0 - 0xffa3] limit: ffa3 io
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
[DEBUG] DOMAIN: 00000000 mem: base: 7f800000 size: 0 align: 0 gran: 0 limit: febfffff
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: fffffffff
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 50 base e0000000 limit efffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 03 base 00000000 limit 0009ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 04 base 00100000 limit 7f7fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 05 base 7f800000 limit 7fffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 06 base 80000000 limit 81bfffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 07 base 81c00000 limit 81ffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 08 base 82000000 limit 8bffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 09 base 100000000 limit 26fffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0a base 1fc000000 limit 1ffffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0b base fed00000 limit fedfffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0c base 000a0000 limit 000bffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0d base 000c0000 limit 000fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:02.0 18 base d0000000 limit dfffffff prefmem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000100 base ff800000 limit ffffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 03 base fec00000 limit fec00fff mem (fixed)
[DEBUG] avoid_fixed_resources: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
[INFO ] DOMAIN: 00000000: Resource ranges:
[INFO ] * Base: 8c000000, Size: 44000000, Tag: 200
[INFO ] * Base: f0000000, Size: ec00000, Tag: 200
[INFO ] * Base: 270000000, Size: d90000000, Tag: 200
[DEBUG] PCI: 00:00:02.0 10 * [0xfe800000 - 0xfebfffff] limit: febfffff mem
[DEBUG] PCI: 00:00:1c.4 20 * [0xfe700000 - 0xfe7fffff] limit: fe7fffff mem
[DEBUG] PCI: 00:00:19.0 10 * [0xfe6e0000 - 0xfe6fffff] limit: fe6fffff mem
[DEBUG] PCI: 00:00:1b.0 10 * [0xfe6dc000 - 0xfe6dffff] limit: fe6dffff mem
[DEBUG] PCI: 00:00:19.0 14 * [0xfe6db000 - 0xfe6dbfff] limit: fe6dbfff mem
[DEBUG] PCI: 00:00:1f.6 10 * [0xfe6da000 - 0xfe6dafff] limit: fe6dafff mem
[DEBUG] PCI: 00:00:1f.2 24 * [0xfe6d9000 - 0xfe6d97ff] limit: fe6d97ff mem
[DEBUG] PCI: 00:00:1a.0 10 * [0xfe6d8000 - 0xfe6d83ff] limit: fe6d83ff mem
[DEBUG] PCI: 00:00:1d.0 10 * [0xfe6d7000 - 0xfe6d73ff] limit: fe6d73ff mem
[DEBUG] PCI: 00:00:1f.3 10 * [0xfe6d6000 - 0xfe6d60ff] limit: fe6d60ff mem
[DEBUG] PCI: 00:00:16.0 10 * [0xfe6d5000 - 0xfe6d500f] limit: fe6d500f mem
[DEBUG] DOMAIN: 00000000 mem: base: 7f800000 size: 0 align: 0 gran: 0 limit: febfffff done
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: fffffffff done
[DEBUG] PCI: 00:04:00.0 10 * [0xfe700000 - 0xfe701fff] limit: fe701fff mem
[INFO ] === Resource allocator: DOMAIN: 00000000 - resource allocation complete ===
[DEBUG] PCI: 00:00:02.0 10 <- [0x00000000fe800000 - 0x00000000febfffff] size 0x00400000 gran 0x16 mem64
[DEBUG] PCI: 00:00:02.0 20 <- [0x000000000000ffb8 - 0x000000000000ffbf] size 0x00000008 gran 0x03 io
[DEBUG] PCI: 00:00:16.0 10 <- [0x00000000fe6d5000 - 0x00000000fe6d500f] size 0x00000010 gran 0x04 mem64
[DEBUG] PCI: 00:00:19.0 10 <- [0x00000000fe6e0000 - 0x00000000fe6fffff] size 0x00020000 gran 0x11 mem
[DEBUG] PCI: 00:00:19.0 14 <- [0x00000000fe6db000 - 0x00000000fe6dbfff] size 0x00001000 gran 0x0c mem
[DEBUG] PCI: 00:00:19.0 18 <- [0x000000000000ffe0 - 0x000000000000ffff] size 0x00000020 gran 0x05 io
[DEBUG] PCI: 00:00:1a.0 10 <- [0x00000000fe6d8000 - 0x00000000fe6d83ff] size 0x00000400 gran 0x0a mem
[DEBUG] PCI: 00:00:1b.0 10 <- [0x00000000fe6dc000 - 0x00000000fe6dffff] size 0x00004000 gran 0x0e mem64
[DEBUG] PCI: 00:00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 01 io
[DEBUG] PCI: 00:00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 01 prefmem
[DEBUG] PCI: 00:00:1c.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 01 mem
[DEBUG] PCI: 00:00:1c.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 02 io
[DEBUG] PCI: 00:00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 02 prefmem
[DEBUG] PCI: 00:00:1c.1 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 02 mem
[DEBUG] PCI: 00:00:1c.3 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 03 io
[DEBUG] PCI: 00:00:1c.3 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 03 prefmem
[DEBUG] PCI: 00:00:1c.3 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 03 mem
[DEBUG] PCI: 00:00:1c.4 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 04 io
[DEBUG] PCI: 00:00:1c.4 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 04 prefmem
[DEBUG] PCI: 00:00:1c.4 20 <- [0x00000000fe700000 - 0x00000000fe7fffff] size 0x00100000 gran 0x14 seg 00 bus 04 mem
[DEBUG] PCI: 00:04:00.0 10 <- [0x00000000fe700000 - 0x00000000fe701fff] size 0x00002000 gran 0x0d mem64
[DEBUG] PCI: 00:00:1d.0 10 <- [0x00000000fe6d7000 - 0x00000000fe6d73ff] size 0x00000400 gran 0x0a mem
[DEBUG] PCI: 00:00:1e.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 05 io
[DEBUG] PCI: 00:00:1e.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 05 prefmem
[DEBUG] PCI: 00:00:1e.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 05 mem
[DEBUG] PNP: 164e.3 60 <- [0x0000000000000200 - 0x0000000000000207] size 0x00000008 gran 0x03 io
[DEBUG] PNP: 164e.3 29 <- [0x00000000000000b0 - 0x00000000000000af] size 0x00000000 gran 0x00 irq
[DEBUG] PNP: 164e.3 70 <- [0x0000000000000005 - 0x0000000000000005] size 0x00000001 gran 0x00 irq
[DEBUG] PNP: 164e.3 f0 <- [0x0000000000000082 - 0x0000000000000081] size 0x00000000 gran 0x00 irq
[DEBUG] PCI: 00:00:1f.2 10 <- [0x000000000000ffb0 - 0x000000000000ffb7] size 0x00000008 gran 0x03 io
[DEBUG] PCI: 00:00:1f.2 14 <- [0x000000000000ffa4 - 0x000000000000ffa7] size 0x00000004 gran 0x02 io
[DEBUG] PCI: 00:00:1f.2 18 <- [0x000000000000ffa8 - 0x000000000000ffaf] size 0x00000008 gran 0x03 io
[DEBUG] PCI: 00:00:1f.2 1c <- [0x000000000000ffa0 - 0x000000000000ffa3] size 0x00000004 gran 0x02 io
[DEBUG] PCI: 00:00:1f.2 20 <- [0x000000000000ffc0 - 0x000000000000ffdf] size 0x00000020 gran 0x05 io
[DEBUG] PCI: 00:00:1f.2 24 <- [0x00000000fe6d9000 - 0x00000000fe6d97ff] size 0x00000800 gran 0x0b mem
[DEBUG] PCI: 00:00:1f.3 10 <- [0x00000000fe6d6000 - 0x00000000fe6d60ff] size 0x00000100 gran 0x08 mem64
[DEBUG] PCI: 00:00:1f.6 10 <- [0x00000000fe6da000 - 0x00000000fe6dafff] size 0x00001000 gran 0x0c mem64
[INFO ] Done setting resources.
[INFO ] Done allocating resources.
[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 2 / 0 ms
[INFO ] POST: 0x74
[INFO ] Enabling resources...
[DEBUG] PCI: 00:00:00.0 subsystem <- 17aa/2193
[DEBUG] PCI: 00:00:00.0 cmd <- 06
[DEBUG] PCI: 00:00:02.0 subsystem <- 17aa/215a
[DEBUG] PCI: 00:00:02.0 cmd <- 03
[DEBUG] PCI: 00:00:16.0 subsystem <- 8086/3b64
[DEBUG] PCI: 00:00:16.0 cmd <- 02
[DEBUG] PCI: 00:00:19.0 subsystem <- 17aa/2153
[DEBUG] PCI: 00:00:19.0 cmd <- 103
[DEBUG] PCI: 00:00:1a.0 subsystem <- 17aa/2163
[DEBUG] PCI: 00:00:1a.0 cmd <- 102
[DEBUG] PCI: 00:00:1b.0 subsystem <- 17aa/215e
[DEBUG] PCI: 00:00:1b.0 cmd <- 102
[DEBUG] PCI: 00:00:1c.0 bridge ctrl <- 0013
[DEBUG] PCI: 00:00:1c.0 cmd <- 100
[DEBUG] PCI: 00:00:1c.1 bridge ctrl <- 0013
[DEBUG] PCI: 00:00:1c.1 cmd <- 100
[DEBUG] PCI: 00:00:1c.3 bridge ctrl <- 0013
[DEBUG] PCI: 00:00:1c.3 cmd <- 100
[DEBUG] PCI: 00:00:1c.4 bridge ctrl <- 0013
[DEBUG] PCI: 00:00:1c.4 cmd <- 106
[DEBUG] PCI: 00:00:1d.0 subsystem <- 17aa/2163
[DEBUG] PCI: 00:00:1d.0 cmd <- 102
[DEBUG] PCI: 00:00:1e.0 bridge ctrl <- 0013
[DEBUG] PCI: 00:00:1e.0 cmd <- 100
[DEBUG] PCI: 00:00:1f.0 subsystem <- 17aa/2166
[DEBUG] PCI: 00:00:1f.0 cmd <- 107
[DEBUG] PCI: 00:00:1f.2 subsystem <- 17aa/2168
[DEBUG] PCI: 00:00:1f.2 cmd <- 03
[DEBUG] PCI: 00:00:1f.3 subsystem <- 17aa/2167
[DEBUG] PCI: 00:00:1f.3 cmd <- 103
[DEBUG] PCI: 00:00:1f.6 subsystem <- 8086/3b32
[DEBUG] PCI: 00:00:1f.6 cmd <- 02
[DEBUG] PCI: 00:04:00.0 cmd <- 02
[INFO ] done.
[INFO ] POST: 0x75
[INFO ] Initializing devices...
[INFO ] POST: 0x75
[DEBUG] CPU_CLUSTER: 0 init
[DEBUG] microcode: sig=0x20655 pf=0x10 revision=0x7
[DEBUG] Starting cbfs_boot_device
[INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x80 size 0x3400 in mcache @0x7f7dd02c
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] LAPIC 0x0 in XAPIC mode.
[DEBUG] MTRR: Physical address space:
[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
[DEBUG] 0x00000000000c0000 - 0x000000007f7fffff size 0x7f740000 type 6
[DEBUG] 0x000000007f800000 - 0x00000000cfffffff size 0x50800000 type 0
[DEBUG] 0x00000000d0000000 - 0x00000000dfffffff size 0x10000000 type 1
[DEBUG] 0x00000000e0000000 - 0x00000000ffffffff size 0x20000000 type 0
[DEBUG] 0x0000000100000000 - 0x000000026fffffff size 0x170000000 type 6
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
[DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 36 bits
[DEBUG] MTRR: default type WB/UC MTRR counts: 5/5.
[DEBUG] MTRR: UC selected as default type.
[DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
[DEBUG] MTRR: 1 base 0x000000007f800000 mask 0x0000000fff800000 type 0
[DEBUG] MTRR: 2 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
[DEBUG] MTRR: 3 base 0x0000000100000000 mask 0x0000000f00000000 type 6
[DEBUG] MTRR: 4 base 0x0000000200000000 mask 0x0000000f80000000 type 6

[DEBUG] MTRR check
[DEBUG] Fixed MTRRs : Enabled
[DEBUG] Variable MTRRs: Enabled

[INFO ] POST: 0x93
[DEBUG] CPU has 2 cores, 4 threads enabled.
[DEBUG] Setting up SMI for CPU
[INFO ] Will perform SMM setup.
[INFO ] CPU: Intel(R) Core(TM) i7 CPU L 640 @ 2.13GHz.
[INFO ] LAPIC 0x0 in XAPIC mode.
[DEBUG] CPU: APIC: 00 enabled
[DEBUG] CPU: APIC: 01 enabled
[DEBUG] CPU: APIC: 02 enabled
[DEBUG] CPU: APIC: 03 enabled
[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
[DEBUG] Processing 16 relocs. Offset value of 0x00030000
[DEBUG] Attempting to start 3 APs
[DEBUG] Waiting for 10ms after sending INIT.
[DEBUG] Waiting for SIPI to complete...
[DEBUG] done.
[DEBUG] Waiting for SIPI to complete...
[INFO ] LAPIC 0x1 in XAPIC mode.
[DEBUG] done.
[INFO ] AP: slot 1 apic_id 1, MCU rev: 0x00000007
[INFO ] LAPIC 0x5 in XAPIC mode.
[INFO ] LAPIC 0x4 in XAPIC mode.
[INFO ] AP: slot 2 apic_id 5, MCU rev: 0x00000007
[INFO ] AP: slot 3 apic_id 4, MCU rev: 0x00000007
[DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x198 memsize: 0x198
[DEBUG] Processing 9 relocs. Offset value of 0x00038000
[DEBUG] smm_module_setup_stub: stack_top = 0x7f801000
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000
[DEBUG] SMM Module: stub loaded at 38000. Will call 0x7f6a46f2
[DEBUG] Installing permanent SMM handler to 0x7f800000
[DEBUG] HANDLER [0x7fefe000-0x7feffa9f]

[DEBUG] CPU 0
[DEBUG] ss0 [0x7fefdc00-0x7fefdfff]
[DEBUG] stub0 [0x7fef6000-0x7fef6197]

[DEBUG] CPU 1
[DEBUG] ss1 [0x7fefd800-0x7fefdbff]
[DEBUG] stub1 [0x7fef5c00-0x7fef5d97]

[DEBUG] CPU 2
[DEBUG] ss2 [0x7fefd400-0x7fefd7ff]
[DEBUG] stub2 [0x7fef5800-0x7fef5997]

[DEBUG] CPU 3
[DEBUG] ss3 [0x7fefd000-0x7fefd3ff]
[DEBUG] stub3 [0x7fef5400-0x7fef5597]

[DEBUG] stacks [0x7f800000-0x7f800fff]
[DEBUG] Loading module at 0x7fefe000 with entry 0x7fefe720. filesize: 0x1a48 memsize: 0x1aa0
[DEBUG] Processing 71 relocs. Offset value of 0x7fefe000
[DEBUG] Loading module at 0x7fef6000 with entry 0x7fef6000. filesize: 0x198 memsize: 0x198
[DEBUG] Processing 9 relocs. Offset value of 0x7fef6000
[DEBUG] smm_module_setup_stub: stack_top = 0x7f801000
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x700000
[DEBUG] SMM Module: placing smm entry code at 7fef5c00, cpu # 0x1
[DEBUG] SMM Module: placing smm entry code at 7fef5800, cpu # 0x2
[DEBUG] SMM Module: placing smm entry code at 7fef5400, cpu # 0x3
[DEBUG] SMM Module: stub loaded at 7fef6000. Will call 0x7fefe720
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feee000, cpu = 0
[DEBUG] In relocation handler: cpu 0
[DEBUG] New SMBASE=0x7feee000
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feedc00, cpu = 1
[DEBUG] In relocation handler: cpu 1
[DEBUG] New SMBASE=0x7feedc00
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feed800, cpu = 2
[DEBUG] In relocation handler: cpu 2
[DEBUG] New SMBASE=0x7feed800
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feed400, cpu = 3
[INFO ] microcode: Update skipped, already up-to-date
[DEBUG] In relocation handler: cpu 3
[DEBUG] New SMBASE=0x7feed400
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] Initializing CPU #0
[DEBUG] CPU: vendor Intel device 20655
[DEBUG] CPU: family 06, model 25, stepping 05
[INFO ] CPU: Intel(R) Core(TM) i7 CPU L 640 @ 2.13GHz.
[INFO ] CPU:lapic=0, boot_cpu=1
[DEBUG] VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] model_x065x: frequency set to 2128
[INFO ] Turbo is available and visible
[INFO ] CPU #0 initialized
[INFO ] Initializing CPU #1
[INFO ] Initializing CPU #3
[DEBUG] CPU: vendor Intel device 20655
[DEBUG] CPU: family 06, model 25, stepping 05
[INFO ] Initializing CPU #2
[DEBUG] CPU: vendor Intel device 20655
[DEBUG] CPU: vendor Intel device 20655
[DEBUG] CPU: family 06, model 25, stepping 05
[INFO ] CPU: Intel(R) Core(TM) i7 CPU L 640 @ 2.13GHz.
[INFO ] CPU:lapic=1, boot_cpu=0
[DEBUG] CPU: family 06, model 25, stepping 05
[DEBUG] VMX status: enabled
[INFO ] CPU: Intel(R) Core(TM) i7 CPU L 640 @ 2.13GHz.
[DEBUG] IA32_FEATURE_CONTROL status: locked
[INFO ] CPU:lapic=5, boot_cpu=0
[INFO ] CPU: Intel(R) Core(TM) i7 CPU L 640 @ 2.13GHz.
[DEBUG] VMX status: enabled
[DEBUG] model_x065x: frequency set to 2128
[DEBUG] IA32_FEATURE_CONTROL status: locked
[INFO ] CPU #1 initialized
[INFO ] CPU:lapic=4, boot_cpu=0
[DEBUG] model_x065x: frequency set to 2128
[DEBUG] VMX status: enabled
[INFO ] CPU #2 initialized
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] model_x065x: frequency set to 2128
[INFO ] CPU #3 initialized
[INFO ] bsp_do_flight_plan done after 4 msecs.
[DEBUG] SMI_STS:
[DEBUG] GPE0_STS: GPIO14 GPIO11 GPIO9 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO0
[DEBUG] ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0
[DEBUG] TCO_STS:
[DEBUG] Locking SMM.
[DEBUG] MTRR: TEMPORARY Physical address space:
[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
[DEBUG] 0x00000000000c0000 - 0x000000007f7fffff size 0x7f740000 type 6
[DEBUG] 0x000000007f800000 - 0x00000000ff7fffff size 0x80000000 type 0
[DEBUG] 0x00000000ff800000 - 0x00000000ffffffff size 0x00800000 type 5
[DEBUG] 0x0000000100000000 - 0x000000026fffffff size 0x170000000 type 6
[DEBUG] MTRR: default type WB/UC MTRR counts: 10/5.
[DEBUG] MTRR: UC selected as default type.
[DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
[DEBUG] MTRR: 1 base 0x000000007f800000 mask 0x0000000fff800000 type 0
[DEBUG] MTRR: 2 base 0x00000000ff800000 mask 0x0000000fff800000 type 5
[DEBUG] MTRR: 3 base 0x0000000100000000 mask 0x0000000f00000000 type 6
[DEBUG] MTRR: 4 base 0x0000000200000000 mask 0x0000000f80000000 type 6
[DEBUG] CPU_CLUSTER: 0 init finished in 15 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:00.0 init
[DEBUG] PCI: 00:00:00.0 init finished in 0 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:02.0 init
[DEBUG] Starting cbfs_boot_device
[INFO ] CBFS: Found 'vbt.bin' @0x45080 size 0x632 in mcache @0x7f7dd1e4
[INFO ] Found a VBT of 4309 bytes
[INFO ] GMA: Found VBT in CBFS
[INFO ] GMA: Found valid VBT in CBFS
[INFO ] framebuffer_info: bytes_per_line: 5120, bits_per_pixel: 32
[INFO ] x_res x y_res: 1280 x 800, size: 4096000 at 0xd0000000
[DEBUG] GT Power Management Init (post VBIOS)
[DEBUG] PCI: 00:00:02.0 init finished in 412 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:16.0 init
[DEBUG] ME: FW Partition Table : OK
[DEBUG] ME: Bringup Loader Failure : NO
[DEBUG] ME: Firmware Init Complete : NO
[DEBUG] ME: Manufacturing Mode : YES
[DEBUG] ME: Boot Options Present : NO
[DEBUG] ME: Update In Progress : NO
[DEBUG] ME: Current Working State : Normal
[DEBUG] ME: Current Operation State : M0 with UMA
[DEBUG] ME: Current Operation Mode : Normal
[DEBUG] ME: Error Code : No Error
[DEBUG] ME: Progress Phase : Host Communication
[DEBUG] ME: Power Management Event : Clean Moff->Mx wake
[DEBUG] ME: Progress Phase State : Host communication established
[NOTE ] ME: BIOS path: Normal
[DEBUG] ME: Extend SHA-256: d0d3eacdf232e0887f64691c56feb9351f81dbf99033a16922d9407e1049d1e1
[DEBUG] PCI: 00:00:16.0 init finished in 0 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:19.0 init
[DEBUG] PCI: 00:00:19.0 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1a.0 init
[DEBUG] EHCI: Setting up controller.. done.
[DEBUG] PCI: 00:00:1a.0 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1b.0 init
[DEBUG] Azalia: base = 0xfe6dc000
[DEBUG] Azalia: V1CTL disabled.
[DEBUG] Azalia: codec_mask = 09
[DEBUG] azalia_audio: initializing codec #3...
[DEBUG] azalia_audio: - vendor/device id: 0x80862804
[DEBUG] azalia_audio: - verb size: 16
[DEBUG] azalia_audio: - verb loaded
[DEBUG] azalia_audio: initializing codec #0...
[DEBUG] azalia_audio: - vendor/device id: 0x14f15069
[DEBUG] azalia_audio: - verb size: 44
[DEBUG] azalia_audio: - verb loaded
[DEBUG] PCI: 00:00:1b.0 init finished in 4 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1d.0 init
[DEBUG] EHCI: Setting up controller.. done.
[DEBUG] PCI: 00:00:1d.0 init finished in 0 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1f.0 init
[DEBUG] pch: lpc_init
[DEBUG] IOAPIC: Initializing IOAPIC at fec00000
[DEBUG] IOAPIC: ID = 0x00
[DEBUG] IOAPIC: 24 interrupts
[DEBUG] IOAPIC: Clearing IOAPIC at fec00000
[DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00
[INFO ] Set power off after power failure.
[INFO ] NMI sources enabled.
[DEBUG] Mobile 5 PM init
[DEBUG] rtc_failed = 0x0
[DEBUG] RTC Init
[DEBUG] apm_control: Disabling ACPI.
[DEBUG] APMC done.
[DEBUG] PCI: 00:00:1f.0 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1f.2 init
[DEBUG] SATA: Initializing...
[DEBUG] SATA: Controller in AHCI mode.
[DEBUG] ABAR: 0xfe6d9000
[DEBUG] PCI: 00:00:1f.2 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1f.3 init
[DEBUG] PCI: 00:00:1f.3 init finished in 0 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1f.6 init
[DEBUG] Thermal init start.
[DEBUG] Thermal init done.
[DEBUG] PCI: 00:00:1f.6 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:04:00.0 init
[DEBUG] PCI: 00:04:00.0 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] PNP: 164e.3 init
[DEBUG] PNP: 164e.3 init finished in 0 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PNP: 00ff.2 init
[DEBUG] Keyboard init...
[INFO ] Keyboard controller output buffer result timeout
[INFO ] Keyboard controller output buffer result timeout
[INFO ] Keyboard controller output buffer result timeout
[INFO ] Keyboard controller output buffer result timeout
[ERROR] Keyboard reset failed ACK: 0xaa
[DEBUG] PNP: 00ff.2 init finished in 1749 msecs
[INFO ] POST: 0x75
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:54 init
[DEBUG] I2C: 01:54 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:55 init
[DEBUG] I2C: 01:55 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:56 init
[DEBUG] I2C: 01:56 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:57 init
[DEBUG] I2C: 01:57 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:5c init
[DEBUG] Locking EEPROM RFID
[DEBUG] init EEPROM done
[DEBUG] I2C: 01:5c init finished in 24 msecs
[INFO ] POST: 0x75
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:5d init
[DEBUG] I2C: 01:5d init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:5e init
[DEBUG] I2C: 01:5e init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:5f init
[DEBUG] I2C: 01:5f init finished in 0 msecs
[INFO ] Devices initialized
[DEBUG] BS: BS_DEV_INIT run times (exec / console): 2207 / 1 ms
[DEBUG] TPM: Startup
[DEBUG] TPM: command 0x99 returned 0x0
[DEBUG] TPM: Asserting physical presence
[DEBUG] TPM: command 0x4000000a returned 0x0
[DEBUG] TPM: command 0x65 returned 0x0
[DEBUG] TPM: flags disable=0, deactivated=0, nvlocked=1
[INFO ] TPM: setup succeeded
[DEBUG] BS: BS_DEV_INIT exit times (exec / console): 11 / 0 ms
[INFO ] POST: 0x76
[INFO ] Finalize devices...
[DEBUG] PCI: 00:00:1f.0 final
[INFO ] Manufacturer: c2
[INFO ] SF: Detected c2 2017 with sector size 0x1000, total 0x800000
[DEBUG] apm_control: Finalizing SMM.
[DEBUG] APMC done.
[INFO ] Devices finalized
[INFO ] POST: 0x77
[INFO ] POST: 0x79
[INFO ] POST: 0x9c
[DEBUG] Starting cbfs_boot_device
[INFO ] CBFS: Found 'fallback/dsdt.aml' @0x41640 size 0x39d5 in mcache @0x7f7dd1b8
[DEBUG] Starting cbfs_boot_device
[WARN ] CBFS: 'fallback/slic' not found.
[INFO ] ACPI: Writing ACPI tables at 7f639000.
[DEBUG] ACPI: * FACS
[DEBUG] ACPI: * FACP
[DEBUG] ACPI: added table 1/32, length now 44
[DEBUG] Lenovo P/N is 30933DK
[DEBUG] Lenovo P/N 30933DK is a tablet
[DEBUG] Found 1 CPU(s) with 4 core(s) each.
[DEBUG] PSS: 2134MHz power 25000 control 0x16 status 0x16
[DEBUG] PSS: 2133MHz power 25000 control 0x10 status 0x10
[DEBUG] PSS: 2000MHz power 23143 control 0xf status 0xf
[DEBUG] PSS: 1866MHz power 21371 control 0xe status 0xe
[DEBUG] PSS: 1733MHz power 19609 control 0xd status 0xd
[DEBUG] PSS: 1600MHz power 17887 control 0xc status 0xc
[DEBUG] PSS: 1466MHz power 16196 control 0xb status 0xb
[DEBUG] PSS: 1333MHz power 14562 control 0xa status 0xa
[DEBUG] PSS: 1200MHz power 12940 control 0x9 status 0x9
[DEBUG] PSS: 2134MHz power 25000 control 0x16 status 0x16
[DEBUG] PSS: 2133MHz power 25000 control 0x10 status 0x10
[DEBUG] PSS: 2000MHz power 23143 control 0xf status 0xf
[DEBUG] PSS: 1866MHz power 21371 control 0xe status 0xe
[DEBUG] PSS: 1733MHz power 19609 control 0xd status 0xd
[DEBUG] PSS: 1600MHz power 17887 control 0xc status 0xc
[DEBUG] PSS: 1466MHz power 16196 control 0xb status 0xb
[DEBUG] PSS: 1333MHz power 14562 control 0xa status 0xa
[DEBUG] PSS: 1200MHz power 12940 control 0x9 status 0x9
[DEBUG] PSS: 2134MHz power 25000 control 0x16 status 0x16
[DEBUG] PSS: 2133MHz power 25000 control 0x10 status 0x10
[DEBUG] PSS: 2000MHz power 23143 control 0xf status 0xf
[DEBUG] PSS: 1866MHz power 21371 control 0xe status 0xe
[DEBUG] PSS: 1733MHz power 19609 control 0xd status 0xd
[DEBUG] PSS: 1600MHz power 17887 control 0xc status 0xc
[DEBUG] PSS: 1466MHz power 16196 control 0xb status 0xb
[DEBUG] PSS: 1333MHz power 14562 control 0xa status 0xa
[DEBUG] PSS: 1200MHz power 12940 control 0x9 status 0x9
[DEBUG] PSS: 2134MHz power 25000 control 0x16 status 0x16
[DEBUG] PSS: 2133MHz power 25000 control 0x10 status 0x10
[DEBUG] PSS: 2000MHz power 23143 control 0xf status 0xf
[DEBUG] PSS: 1866MHz power 21371 control 0xe status 0xe
[DEBUG] PSS: 1733MHz power 19609 control 0xd status 0xd
[DEBUG] PSS: 1600MHz power 17887 control 0xc status 0xc
[DEBUG] PSS: 1466MHz power 16196 control 0xb status 0xb
[DEBUG] PSS: 1333MHz power 14562 control 0xa status 0xa
[DEBUG] PSS: 1200MHz power 12940 control 0x9 status 0x9
[DEBUG] Generating ACPI PIRQ entries
[INFO ] _SB_.PCI0.TPM: LPC TPM PNP: 0c31.0
[INFO ] ACPI: * H8
[INFO ] H8: BDC installed
[INFO ] H8: WWAN detection not implemented. Assuming WWAN installed
[DEBUG] ACPI: * SSDT
[DEBUG] ACPI: added table 2/32, length now 52
[DEBUG] ACPI: * MCFG
[DEBUG] ACPI: added table 3/32, length now 60
[DEBUG] TCPA log created at 0x7f629000
[DEBUG] ACPI: * TCPA
[DEBUG] ACPI: added table 4/32, length now 68
[DEBUG] IOAPIC: 24 interrupts
[DEBUG] ACPI: * APIC
[DEBUG] ACPI: added table 5/32, length now 76
[DEBUG] current = 7f63e120
[DEBUG] ACPI: * HPET
[DEBUG] ACPI: added table 6/32, length now 84
[INFO ] ACPI: done.
[DEBUG] ACPI tables: 20832 bytes.
[DEBUG] smbios_write_tables: 7f621000
[INFO ] PCI: 00:04:00.0 (unknown)
[DEBUG] SMBIOS tables: 782 bytes.
[DEBUG] Writing table forward entry at 0x00000500
[DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum b078
[DEBUG] Writing coreboot table at 0x7f65d000
[DEBUG] Starting cbfs_boot_device
[INFO ] CBFS: Found 'cmos_layout.bin' @0x45840 size 0x64c in mcache @0x7f7dd23c
[DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
[DEBUG] 1. 0000000000001000-000000000009ffff: RAM
[DEBUG] 2. 00000000000a0000-00000000000f5fff: RESERVED
[DEBUG] 3. 00000000000f6000-00000000000f6fff: CONFIGURATION TABLES
[DEBUG] 4. 00000000000f7000-00000000000fffff: RESERVED
[DEBUG] 5. 0000000000100000-000000007f620fff: RAM
[DEBUG] 6. 000000007f621000-000000007f679fff: CONFIGURATION TABLES
[DEBUG] 7. 000000007f67a000-000000007f7cefff: RAMSTAGE
[DEBUG] 8. 000000007f7cf000-000000007f7fffff: CONFIGURATION TABLES
[DEBUG] 9. 000000007f800000-000000008bffffff: RESERVED
[DEBUG] 10. 00000000d0000000-00000000efffffff: RESERVED
[DEBUG] 11. 00000000fed00000-00000000fedfffff: RESERVED
[DEBUG] 12. 0000000100000000-00000001fbffffff: RAM
[DEBUG] 13. 00000001fc000000-00000001ffffffff: RESERVED
[DEBUG] 14. 0000000200000000-000000026fffffff: RAM
[INFO ] Setting up bootsplash in 1280x800@32
[DEBUG] Starting cbfs_boot_device
[WARN ] CBFS: 'bootsplash.jpg' not found.
[ERROR] Could not find bootsplash.jpg
[DEBUG] Starting cbfs_boot_device
[DEBUG] Wrote coreboot table at: 0x7f65d000, 0xa34 bytes, checksum cb6a
[DEBUG] coreboot table: 2636 bytes.
[DEBUG] IMD ROOT 0. 0x7f7ff000 0x00001000
[DEBUG] IMD SMALL 1. 0x7f7fe000 0x00001000
[DEBUG] CONSOLE 2. 0x7f7de000 0x00020000
[DEBUG] RO MCACHE 3. 0x7f7dd000 0x00000428
[DEBUG] TIME STAMP 4. 0x7f7dc000 0x00000910
[DEBUG] AFTER CAR 5. 0x7f7cf000 0x0000d000
[DEBUG] RAMSTAGE 6. 0x7f679000 0x00156000
[DEBUG] SMM BACKUP 7. 0x7f669000 0x00010000
[DEBUG] IGD OPREGION 8. 0x7f665000 0x00003200
[DEBUG] COREBOOT 9. 0x7f65d000 0x00008000
[DEBUG] ACPI 10. 0x7f639000 0x00024000
[DEBUG] TCPA TCGLOG11. 0x7f629000 0x00010000
[DEBUG] SMBIOS 12. 0x7f621000 0x00008000
[DEBUG] IMD small region:
[DEBUG] IMD ROOT 0. 0x7f7fec00 0x00000400
[DEBUG] FMAP 1. 0x7f7feb20 0x000000e0
[DEBUG] ROMSTAGE 2. 0x7f7feb00 0x00000004
[DEBUG] ROMSTG STCK 3. 0x7f7fea60 0x00000088
[DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 10 / 0 ms
[INFO ] POST: 0x7a
[DEBUG] Starting cbfs_boot_device
[INFO ] CBFS: Found 'fallback/payload' @0x58040 size 0x11870 in mcache @0x7f7dd2d0
[DEBUG] Checking segment from ROM address 0xfff6906c
[DEBUG] Payload being loaded at below 1MiB without region being marked as RAM usable.
[DEBUG] Checking segment from ROM address 0xfff69088
[DEBUG] Loading segment from ROM address 0xfff6906c
[DEBUG] code (compression=1)
[DEBUG] New segment dstaddr 0x000de740 memsize 0x218c0 srcaddr 0xfff690a4 filesize 0x11838
[DEBUG] Loading Segment: addr: 0x000de740 memsz: 0x00000000000218c0 filesz: 0x0000000000011838
[DEBUG] using LZMA
[DEBUG] Loading segment from ROM address 0xfff69088
[DEBUG] Entry Point 0x000fd259
[DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 14 / 0 ms
[INFO ] POST: 0x7b
[DEBUG] ICH-NM10-PCH: watchdog disabled
[DEBUG] Jumping to boot code at 0x000fd259(0x7f65d000)
[INFO ] POST: 0xf8
SeaBIOS (version rel-1.17.0-10-g8fcd351a)
BUILD: gcc: (coreboot toolchain v2026-04-09_5267cae13a) 15.2.0 binutils: (GNU Binutils) 2.45.1
Found coreboot cbmem console @ 7f7de000
Found mainboard LENOVO ThinkPad X201
Relocating init from 0x000dfec0 to 0x7e613b40 (size 54304)
Found CBFS header at 0xfff1102c
multiboot: eax=7f6bcedc, ebx=7f6bcea4
boot order:
1: /rom@img/grub2
2:
Found 17 PCI devices (max PCI bus is 05)
Copying SMBIOS from 0x7f621000 to 0x000f60c0
Copying SMBIOS 3.0 from 0x7f621020 to 0x000f60a0
Copying ACPI RSDP from 0x7f639000 to 0x000f6070
table(50434146)=0x7f63cc60 (via xsdt)
Using pmtimer, ioport 0x508
table(41504354)=0x7f63e060 (via xsdt)
EHCI init on dev 00:1a.0 (regs=0xfe6d8020)
EHCI init on dev 00:1d.0 (regs=0xfe6d7020)
AHCI controller at 00:1f.2, iobase 0xfe6d9000, irq 11
Searching bootorder for: HALT
Found 0 lpt ports
Found 0 serial ports
Searching bootorder for: /rom@img/grub2
Searching bootorder for: /rom@img/nvramcui
Scan for VGA option rom
Running option rom at c000:0003
pmm call arg1=0
Turning on vga text mode console
SeaBIOS (version rel-1.17.0-10-g8fcd351a)
Machine UUID f50517e0-806a-11df-b054-b78fa8ac77a2
Scan for option roms

Press ESC for boot menu.

Searching bootorder for: /pci@i0cf8/@1f,2/drive@0/disk@0
AHCI/0: Set transfer mode to UDMA-6
Searching bios-geometry for: /pci@i0cf8/@1f,2/drive@0/disk@0
AHCI/0: registering: "AHCI/0: KINGSTON SV300S37A480G ATA-8 Hard-Disk (447 GiBytes)"
Initialized USB HUB (0 ports used)
PS2 keyboard initialized
Select boot device:

WARNING - Timeout at ehci_wait_td:517!
ehci pipe=0x7e60f280 cur=7e5fed80 tok=80080d80 next=7e5fedc0 td=0x7e5fed80 status=80080d80
Initialized USB HUB (0 ports used)
All threads complete.

1. Payload [grub2]
2. AHCI/0: KINGSTON SV300S37A480G ATA-8 Hard-Disk (447 GiBytes)
3. Payload [nvramcui]

t. TPM Configuration

Searching bootorder for: HALT
drive 0x000f6000: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=937703088
Space available for UMB: c7000-ec000, f58e0-f6000
Returned 16769024 bytes of ZoneHigh
e820 map has 10 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 000000007f61f000 = 1 RAM
4: 000000007f61f000 - 000000008c000000 = 2 RESERVED
5: 00000000d0000000 - 00000000f0000000 = 2 RESERVED
6: 00000000fed00000 - 00000000fee00000 = 2 RESERVED
7: 0000000100000000 - 00000001fc000000 = 1 RAM
8: 00000001fc000000 - 0000000200000000 = 2 RESERVED
9: 0000000200000000 - 0000000270000000 = 1 RAM
enter handle_19:
NULL
Booting from Hard Disk...
Booting from 0000:7c00

[NOTE ] coreboot-26.03-571-gef31bd6e9230 Tue May 05 08:16:48 UTC 2026 x86_32 bootblock starting (log level: 7)...
[DEBUG] Starting cbfs_boot_device
[DEBUG] Starting cbfs_boot_device
[DEBUG] FMAP: Found "FLASH" version 1.1 at 0x710000.
[DEBUG] FMAP: base = 0x0 size = 0x800000 #areas = 4
[DEBUG] FMAP: area COREBOOT found @ 711000 (978944 bytes)
[INFO ] Booting from COREBOOT region
[INFO ] CBFS: mcache @0xfefc2e00 built for 22 files, used 0x428 of 0x4000 bytes
[INFO ] CBFS: Found 'fallback/romstage' @0x34c0 size 0x140f8 in mcache @0xfefc2e5c
[DEBUG] BS: bootblock times (exec / console): total (unknown) / 1 ms

[NOTE ] coreboot-26.03-571-gef31bd6e9230 Tue May 05 08:16:48 UTC 2026 x86_32 romstage starting (log level: 7)...
[DEBUG] Setting up static southbridge registers... done.
[DEBUG] Disabling Watchdog reboot... done.
[DEBUG] Setting up static northbridge registers... done.
[DEBUG] SMBus controller enabled
[DEBUG] Setting up Chipset Initialization Registers (CIR)
[INFO ] Intel ME early init
[INFO ] Intel ME firmware is ready
[DEBUG] ME: Requested 32MB UMA
[DEBUG] CAPID0[0] = 0x010c0009
[DEBUG] CAPID0[1] = 0x00316126
[DEBUG] CAPID0[2] = 0x00040088
[DEBUG] Revision ID: 0x18
[DEBUG] Device ID: 0x44
[DEBUG] FMAP: area RW_MRC_CACHE found @ 700000 (65536 bytes)
[NOTE ] MRC: no data in 'RW_MRC_CACHE'
[DEBUG] CBMEM:
[DEBUG] IMD: root @ 0x7f7ff000 254 entries.
[DEBUG] IMD: root @ 0x7f7fec00 62 entries.
[DEBUG] Starting cbfs_boot_device
[DEBUG] External stage cache:
[DEBUG] IMD: root @ 0x7ffff000 254 entries.
[DEBUG] IMD: root @ 0x7fffec00 62 entries.
[DEBUG] FMAP: area RW_MRC_CACHE found @ 700000 (65536 bytes)
[DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'.
[INFO ] Manufacturer: c2
[INFO ] SF: Detected c2 2017 with sector size 0x1000, total 0x800000
[NOTE ] MRC: no data in 'RW_MRC_CACHE'
[DEBUG] MRC: cache data 'RW_MRC_CACHE' needs update.
[DEBUG] MRC: updated 'RW_MRC_CACHE'.
[DEBUG] ME: FW Partition Table : OK
[DEBUG] ME: Bringup Loader Failure : NO
[DEBUG] ME: Firmware Init Complete : NO
[DEBUG] ME: Manufacturing Mode : YES
[DEBUG] ME: Boot Options Present : NO
[DEBUG] ME: Update In Progress : NO
[DEBUG] ME: Current Working State : Normal
[DEBUG] ME: Current Operation State : M0 without UMA
[DEBUG] ME: Current Operation Mode : Normal
[DEBUG] ME: Error Code : No Error
[DEBUG] ME: Progress Phase : Policy Module
[DEBUG] ME: Power Management Event : Non-power cycle reset
[DEBUG] ME: Progress Phase State : Entry into Policy Module
[DEBUG] SMM Memory Map
[DEBUG] SMRAM : 0x7f800000 0x800000
[DEBUG] Subregion 0: 0x7f800000 0x700000
[DEBUG] Subregion 2: 0x7ff00000 0x100000
[DEBUG] Subregion 3: 0x80000000 0x0
[DEBUG] Normal boot
[DEBUG] Starting cbfs_boot_device
[INFO ] CBFS: Found 'fallback/postcar' @0x46100 size 0x59b0 in mcache @0xfefc3064
[DEBUG] Loading module at 0x7f7d0000 with entry 0x7f7d0031. filesize: 0x55c8 memsize: 0xb918
[DEBUG] Processing 234 relocs. Offset value of 0x7d7d0000
[DEBUG] BS: romstage times (exec / console): total (unknown) / 3 ms

[NOTE ] coreboot-26.03-571-gef31bd6e9230 Tue May 05 08:16:48 UTC 2026 x86_32 postcar starting (log level: 7)...
[DEBUG] Normal boot
[DEBUG] Starting cbfs_boot_device
[INFO ] CBFS: Found 'fallback/ramstage' @0x17640 size 0x22173 in mcache @0x7f7dd0bc
[DEBUG] Loading module at 0x7f67a000 with entry 0x7f67a000. filesize: 0x43d50 memsize: 0x154d88
[DEBUG] Processing 4325 relocs. Offset value of 0x7b67a000
[DEBUG] BS: postcar times (exec / console): total (unknown) / 0 ms

[NOTE ] coreboot-26.03-571-gef31bd6e9230 Tue May 05 08:16:48 UTC 2026 x86_32 ramstage starting (log level: 7)...
[INFO ] POST: 0x39
[INFO ] POST: 0x6f
[DEBUG] Normal boot
[INFO ] POST: 0x70
[INFO ] POST: 0x71
[DEBUG] Disabling PEG10.
[INFO ] POST: 0x72
[INFO ] Enumerating buses...
[DEBUG] Root Device scanning...
[DEBUG] CPU_CLUSTER: 0 enabled
[DEBUG] DOMAIN: 00000000 enabled
[DEBUG] DOMAIN: 00000000 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 00
[INFO ] POST: 0x24
[DEBUG] PCI: 00:00:00.0 [8086/0044] enabled
[DEBUG] PCI: 00:00:02.0 [8086/0046] enabled
[DEBUG] PCI: 00:00:16.0 [8086/3b64] enabled
[DEBUG] PCI: 00:00:16.1: Disabling device
[DEBUG] PCI: 00:00:16.2: Disabling device
[DEBUG] PCI: 00:00:16.3: Disabling device
[DEBUG] PCI: 00:00:19.0 [8086/10ea] enabled
[DEBUG] PCI: 00:00:1a.0 [8086/3b3c] enabled
[DEBUG] PCI: 00:00:1b.0 [8086/3b56] enabled
[DEBUG] PCI: 00:00:1c.0 subordinate bus PCI Express
[DEBUG] PCI: 00:00:1c.0 [8086/3b42] enabled
[DEBUG] PCI: 00:00:1c.1 subordinate bus PCI Express
[DEBUG] PCI: 00:00:1c.1 [8086/3b44] enabled
[DEBUG] PCI: 00:00:1c.2: Disabling device
[DEBUG] PCI: 00:00:1c.2 [8086/3b46] disabled No operations
[DEBUG] PCI: 00:00:1c.3 subordinate bus PCI Express
[DEBUG] PCI: 00:00:1c.3 [8086/3b48] enabled
[DEBUG] PCI: 00:00:1c.4 subordinate bus PCI Express
[DEBUG] PCI: 00:00:1c.4 [8086/3b4a] enabled
[DEBUG] PCI: 00:00:1c.5: Disabling device
[DEBUG] PCI: 00:00:1c.5 [8086/3b4c] disabled No operations
[DEBUG] PCI: 00:00:1c.6: Disabling device
[DEBUG] PCI: 00:00:1c.6 [8086/3b4e] disabled No operations
[DEBUG] PCI: 00:00:1c.7: Disabling device
[DEBUG] PCI: 00:00:1c.7 [8086/3b50] disabled No operations
[DEBUG] PCI: 00:00:1d.0 [8086/3b34] enabled
[DEBUG] PCI: 00:00:1e.0 [8086/2448] enabled
[DEBUG] PCI: 00:00:1f.0 [8086/3b07] enabled
[DEBUG] PCI: 00:00:1f.2 [8086/3b2e] enabled
[DEBUG] PCI: 00:00:1f.3 [8086/3b30] enabled
[DEBUG] PCI: 00:00:1f.4: Disabling device
[DEBUG] PCI: 00:00:1f.5: Disabling device
[DEBUG] PCI: 00:00:1f.5 [8086/3b2d] disabled No operations
[DEBUG] PCI: 00:00:1f.6 [8086/3b32] enabled
[DEBUG] PCI: 00:00:1c.0 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 01
[INFO ] POST: 0x24
[INFO ] POST: 0x25
[INFO ] PCI: 00:00:1c.0: ASPM enabled L0s and L1 (no endpoint)
[INFO ] PCI: 00:00:1c.0: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG] scan_bus: bus PCI: 00:00:1c.0 finished in 0 msecs
[DEBUG] PCI: 00:00:1c.1 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 02
[INFO ] POST: 0x24
[INFO ] POST: 0x25
[INFO ] PCI: 00:00:1c.1: ASPM enabled L0s and L1 (no endpoint)
[INFO ] PCI: 00:00:1c.1: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG] scan_bus: bus PCI: 00:00:1c.1 finished in 0 msecs
[DEBUG] PCI: 00:00:1c.3 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 03
[INFO ] POST: 0x24
[INFO ] POST: 0x25
[INFO ] PCI: 00:00:1c.3: ASPM enabled L0s and L1 (no endpoint)
[INFO ] PCI: 00:00:1c.3: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG] scan_bus: bus PCI: 00:00:1c.3 finished in 0 msecs
[DEBUG] PCI: 00:00:1c.4 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 04
[INFO ] POST: 0x24
[DEBUG] PCI: 00:04:00.0 [8086/4238] enabled
[INFO ] POST: 0x25
[INFO ] Enabling Common Clock Configuration
[INFO ] ASPM: Enabled L0s and L1
[DEBUG] PCI: 00:04:00.0: No LTR support
[INFO ] PCI: 00:00:1c.4: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG] scan_bus: bus PCI: 00:00:1c.4 finished in 0 msecs
[DEBUG] PCI: 00:00:1e.0 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 05
[INFO ] POST: 0x24
[INFO ] POST: 0x25
[DEBUG] scan_bus: bus PCI: 00:00:1e.0 finished in 0 msecs
[DEBUG] PCI: 00:00:1f.0 scanning...
[DEBUG] PNP: 164e.3 enabled
[DEBUG] PNP: 164e.2 disabled
[DEBUG] PNP: 164e.7 disabled
[DEBUG] PNP: 164e.19 disabled
[INFO ] Found TPM 1.2 ST33ZP24 (0x0000) by ST Microelectronics (0x104a)
[DEBUG] PNP: 0c31.0 enabled
[INFO ] PMH7: ID 04 Revision 20
[DEBUG] PNP: 00ff.1 enabled
[INFO ] H8: EC Firmware ID 6SHT34WW-3.18, Version 5.01B
[INFO ] H8: WWAN detection not implemented. Assuming WWAN installed
[DEBUG] dock is not connected
[DEBUG] PNP: 00ff.2 enabled
[DEBUG] scan_bus: bus PCI: 00:00:1f.0 finished in 7 msecs
[DEBUG] PCI: 00:00:1f.3 scanning...
[DEBUG] I2C: 01:54 enabled
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:55 enabled
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:56 enabled
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:57 enabled
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:5c enabled
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:5d enabled
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:5e enabled
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:5f enabled
[DEBUG] bus: PCI: 00:00:1f.3->scan_bus: bus PCI: 00:00:1f.3 finished in 0 msecs
[INFO ] POST: 0x25
[DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 7 msecs
[DEBUG] scan_bus: bus Root Device finished in 7 msecs
[INFO ] done
[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 8 / 0 ms
[INFO ] POST: 0x73
[DEBUG] found VGA at PCI: 00:00:02.0
[DEBUG] Setting up VGA for PCI: 00:00:02.0
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
[INFO ] Allocating resources...
[INFO ] Reading resources...
[DEBUG] Adding PCIe enhanced config space BAR 0xe0000000-0xf0000000.
[DEBUG] ram_before_4g_top: 0x7f800000
[DEBUG] TOUUD: 0x2700
[INFO ] Available memory above 4GB: 5888M
[INFO ] Done reading resources.
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) ===
[DEBUG] PCI: 00:00:1c.4 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG] PCI: 00:00:1c.4 io: size: 0 align: 12 gran: 12 limit: ffff done
[DEBUG] PCI: 00:00:1c.4 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG] PCI: 00:04:00.0 10 * [0x0 - 0x1fff] mem
[DEBUG] PCI: 00:00:1c.4 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG] PCI: 00:00:1c.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG] PCI: 00:00:1c.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) ===
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000200 base 00001600 limit 0000167b io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000300 base 000015e0 limit 000015eb io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000400 base 00001680 limit 0000169b io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 164e.3 60 base 00000200 limit 00000207 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.1 15e0 base 000015e0 limit 000015ef io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 60 base 00000060 limit 00000060 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 62 base 00000062 limit 00000062 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 64 base 00000064 limit 00000064 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 66 base 00000066 limit 00000066 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 1600 base 00001600 limit 00001600 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 1604 base 00001604 limit 00001604 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 1602 base 00001602 limit 00001602 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 1606 base 00001606 limit 00001606 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.2 1610 base 00001610 limit 0000161f io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.3 20 base 00000400 limit 0000041f io (fixed)
[INFO ] DOMAIN: 00000000: Resource ranges:
[INFO ] * Base: 1000, Size: 5e0, Tag: 100
[INFO ] * Base: 15f0, Size: 10, Tag: 100
[INFO ] * Base: 167c, Size: 4, Tag: 100
[INFO ] * Base: 169c, Size: e964, Tag: 100
[DEBUG] PCI: 00:00:19.0 18 * [0xffe0 - 0xffff] limit: ffff io
[DEBUG] PCI: 00:00:1f.2 20 * [0xffc0 - 0xffdf] limit: ffdf io
[DEBUG] PCI: 00:00:02.0 20 * [0xffb8 - 0xffbf] limit: ffbf io
[DEBUG] PCI: 00:00:1f.2 10 * [0xffb0 - 0xffb7] limit: ffb7 io
[DEBUG] PCI: 00:00:1f.2 18 * [0xffa8 - 0xffaf] limit: ffaf io
[DEBUG] PCI: 00:00:1f.2 14 * [0xffa4 - 0xffa7] limit: ffa7 io
[DEBUG] PCI: 00:00:1f.2 1c * [0xffa0 - 0xffa3] limit: ffa3 io
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
[DEBUG] DOMAIN: 00000000 mem: base: 7f800000 size: 0 align: 0 gran: 0 limit: febfffff
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: fffffffff
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 50 base e0000000 limit efffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 03 base 00000000 limit 0009ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 04 base 00100000 limit 7f7fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 05 base 7f800000 limit 7fffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 06 base 80000000 limit 81bfffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 07 base 81c00000 limit 81ffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 08 base 82000000 limit 8bffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 09 base 100000000 limit 26fffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0a base 1fc000000 limit 1ffffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0b base fed00000 limit fedfffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0c base 000a0000 limit 000bffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0d base 000c0000 limit 000fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:02.0 18 base d0000000 limit dfffffff prefmem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000100 base ff800000 limit ffffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 03 base fec00000 limit fec00fff mem (fixed)
[DEBUG] avoid_fixed_resources: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
[INFO ] DOMAIN: 00000000: Resource ranges:
[INFO ] * Base: 8c000000, Size: 44000000, Tag: 200
[INFO ] * Base: f0000000, Size: ec00000, Tag: 200
[INFO ] * Base: 270000000, Size: d90000000, Tag: 200
[DEBUG] PCI: 00:00:02.0 10 * [0xfe800000 - 0xfebfffff] limit: febfffff mem
[DEBUG] PCI: 00:00:1c.4 20 * [0xfe700000 - 0xfe7fffff] limit: fe7fffff mem
[DEBUG] PCI: 00:00:19.0 10 * [0xfe6e0000 - 0xfe6fffff] limit: fe6fffff mem
[DEBUG] PCI: 00:00:1b.0 10 * [0xfe6dc000 - 0xfe6dffff] limit: fe6dffff mem
[DEBUG] PCI: 00:00:19.0 14 * [0xfe6db000 - 0xfe6dbfff] limit: fe6dbfff mem
[DEBUG] PCI: 00:00:1f.6 10 * [0xfe6da000 - 0xfe6dafff] limit: fe6dafff mem
[DEBUG] PCI: 00:00:1f.2 24 * [0xfe6d9000 - 0xfe6d97ff] limit: fe6d97ff mem
[DEBUG] PCI: 00:00:1a.0 10 * [0xfe6d8000 - 0xfe6d83ff] limit: fe6d83ff mem
[DEBUG] PCI: 00:00:1d.0 10 * [0xfe6d7000 - 0xfe6d73ff] limit: fe6d73ff mem
[DEBUG] PCI: 00:00:1f.3 10 * [0xfe6d6000 - 0xfe6d60ff] limit: fe6d60ff mem
[DEBUG] PCI: 00:00:16.0 10 * [0xfe6d5000 - 0xfe6d500f] limit: fe6d500f mem
[DEBUG] DOMAIN: 00000000 mem: base: 7f800000 size: 0 align: 0 gran: 0 limit: febfffff done
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: fffffffff done
[DEBUG] PCI: 00:04:00.0 10 * [0xfe700000 - 0xfe701fff] limit: fe701fff mem
[INFO ] === Resource allocator: DOMAIN: 00000000 - resource allocation complete ===
[DEBUG] PCI: 00:00:02.0 10 <- [0x00000000fe800000 - 0x00000000febfffff] size 0x00400000 gran 0x16 mem64
[DEBUG] PCI: 00:00:02.0 20 <- [0x000000000000ffb8 - 0x000000000000ffbf] size 0x00000008 gran 0x03 io
[DEBUG] PCI: 00:00:16.0 10 <- [0x00000000fe6d5000 - 0x00000000fe6d500f] size 0x00000010 gran 0x04 mem64
[DEBUG] PCI: 00:00:19.0 10 <- [0x00000000fe6e0000 - 0x00000000fe6fffff] size 0x00020000 gran 0x11 mem
[DEBUG] PCI: 00:00:19.0 14 <- [0x00000000fe6db000 - 0x00000000fe6dbfff] size 0x00001000 gran 0x0c mem
[DEBUG] PCI: 00:00:19.0 18 <- [0x000000000000ffe0 - 0x000000000000ffff] size 0x00000020 gran 0x05 io
[DEBUG] PCI: 00:00:1a.0 10 <- [0x00000000fe6d8000 - 0x00000000fe6d83ff] size 0x00000400 gran 0x0a mem
[DEBUG] PCI: 00:00:1b.0 10 <- [0x00000000fe6dc000 - 0x00000000fe6dffff] size 0x00004000 gran 0x0e mem64
[DEBUG] PCI: 00:00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 01 io
[DEBUG] PCI: 00:00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 01 prefmem
[DEBUG] PCI: 00:00:1c.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 01 mem
[DEBUG] PCI: 00:00:1c.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 02 io
[DEBUG] PCI: 00:00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 02 prefmem
[DEBUG] PCI: 00:00:1c.1 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 02 mem
[DEBUG] PCI: 00:00:1c.3 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 03 io
[DEBUG] PCI: 00:00:1c.3 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 03 prefmem
[DEBUG] PCI: 00:00:1c.3 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 03 mem
[DEBUG] PCI: 00:00:1c.4 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 04 io
[DEBUG] PCI: 00:00:1c.4 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 04 prefmem
[DEBUG] PCI: 00:00:1c.4 20 <- [0x00000000fe700000 - 0x00000000fe7fffff] size 0x00100000 gran 0x14 seg 00 bus 04 mem
[DEBUG] PCI: 00:04:00.0 10 <- [0x00000000fe700000 - 0x00000000fe701fff] size 0x00002000 gran 0x0d mem64
[DEBUG] PCI: 00:00:1d.0 10 <- [0x00000000fe6d7000 - 0x00000000fe6d73ff] size 0x00000400 gran 0x0a mem
[DEBUG] PCI: 00:00:1e.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 05 io
[DEBUG] PCI: 00:00:1e.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 05 prefmem
[DEBUG] PCI: 00:00:1e.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 05 mem
[DEBUG] PNP: 164e.3 60 <- [0x0000000000000200 - 0x0000000000000207] size 0x00000008 gran 0x03 io
[DEBUG] PNP: 164e.3 29 <- [0x00000000000000b0 - 0x00000000000000af] size 0x00000000 gran 0x00 irq
[DEBUG] PNP: 164e.3 70 <- [0x0000000000000005 - 0x0000000000000005] size 0x00000001 gran 0x00 irq
[DEBUG] PNP: 164e.3 f0 <- [0x0000000000000082 - 0x0000000000000081] size 0x00000000 gran 0x00 irq
[DEBUG] PCI: 00:00:1f.2 10 <- [0x000000000000ffb0 - 0x000000000000ffb7] size 0x00000008 gran 0x03 io
[DEBUG] PCI: 00:00:1f.2 14 <- [0x000000000000ffa4 - 0x000000000000ffa7] size 0x00000004 gran 0x02 io
[DEBUG] PCI: 00:00:1f.2 18 <- [0x000000000000ffa8 - 0x000000000000ffaf] size 0x00000008 gran 0x03 io
[DEBUG] PCI: 00:00:1f.2 1c <- [0x000000000000ffa0 - 0x000000000000ffa3] size 0x00000004 gran 0x02 io
[DEBUG] PCI: 00:00:1f.2 20 <- [0x000000000000ffc0 - 0x000000000000ffdf] size 0x00000020 gran 0x05 io
[DEBUG] PCI: 00:00:1f.2 24 <- [0x00000000fe6d9000 - 0x00000000fe6d97ff] size 0x00000800 gran 0x0b mem
[DEBUG] PCI: 00:00:1f.3 10 <- [0x00000000fe6d6000 - 0x00000000fe6d60ff] size 0x00000100 gran 0x08 mem64
[DEBUG] PCI: 00:00:1f.6 10 <- [0x00000000fe6da000 - 0x00000000fe6dafff] size 0x00001000 gran 0x0c mem64
[INFO ] Done setting resources.
[INFO ] Done allocating resources.
[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 2 / 0 ms
[INFO ] POST: 0x74
[INFO ] Enabling resources...
[DEBUG] PCI: 00:00:00.0 subsystem <- 17aa/2193
[DEBUG] PCI: 00:00:00.0 cmd <- 06
[DEBUG] PCI: 00:00:02.0 subsystem <- 17aa/215a
[DEBUG] PCI: 00:00:02.0 cmd <- 03
[DEBUG] PCI: 00:00:16.0 subsystem <- 8086/3b64
[DEBUG] PCI: 00:00:16.0 cmd <- 02
[DEBUG] PCI: 00:00:19.0 subsystem <- 17aa/2153
[DEBUG] PCI: 00:00:19.0 cmd <- 103
[DEBUG] PCI: 00:00:1a.0 subsystem <- 17aa/2163
[DEBUG] PCI: 00:00:1a.0 cmd <- 102
[DEBUG] PCI: 00:00:1b.0 subsystem <- 17aa/215e
[DEBUG] PCI: 00:00:1b.0 cmd <- 102
[DEBUG] PCI: 00:00:1c.0 bridge ctrl <- 0013
[DEBUG] PCI: 00:00:1c.0 cmd <- 100
[DEBUG] PCI: 00:00:1c.1 bridge ctrl <- 0013
[DEBUG] PCI: 00:00:1c.1 cmd <- 100
[DEBUG] PCI: 00:00:1c.3 bridge ctrl <- 0013
[DEBUG] PCI: 00:00:1c.3 cmd <- 100
[DEBUG] PCI: 00:00:1c.4 bridge ctrl <- 0013
[DEBUG] PCI: 00:00:1c.4 cmd <- 106
[DEBUG] PCI: 00:00:1d.0 subsystem <- 17aa/2163
[DEBUG] PCI: 00:00:1d.0 cmd <- 102
[DEBUG] PCI: 00:00:1e.0 bridge ctrl <- 0013
[DEBUG] PCI: 00:00:1e.0 cmd <- 100
[DEBUG] PCI: 00:00:1f.0 subsystem <- 17aa/2166
[DEBUG] PCI: 00:00:1f.0 cmd <- 107
[DEBUG] PCI: 00:00:1f.2 subsystem <- 17aa/2168
[DEBUG] PCI: 00:00:1f.2 cmd <- 03
[DEBUG] PCI: 00:00:1f.3 subsystem <- 17aa/2167
[DEBUG] PCI: 00:00:1f.3 cmd <- 103
[DEBUG] PCI: 00:00:1f.6 subsystem <- 8086/3b32
[DEBUG] PCI: 00:00:1f.6 cmd <- 02
[DEBUG] PCI: 00:04:00.0 cmd <- 02
[INFO ] done.
[INFO ] POST: 0x75
[INFO ] Initializing devices...
[INFO ] POST: 0x75
[DEBUG] CPU_CLUSTER: 0 init
[DEBUG] microcode: sig=0x20655 pf=0x10 revision=0x7
[DEBUG] Starting cbfs_boot_device
[INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x80 size 0x3400 in mcache @0x7f7dd02c
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] LAPIC 0x0 in XAPIC mode.
[DEBUG] MTRR: Physical address space:
[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
[DEBUG] 0x00000000000c0000 - 0x000000007f7fffff size 0x7f740000 type 6
[DEBUG] 0x000000007f800000 - 0x00000000cfffffff size 0x50800000 type 0
[DEBUG] 0x00000000d0000000 - 0x00000000dfffffff size 0x10000000 type 1
[DEBUG] 0x00000000e0000000 - 0x00000000ffffffff size 0x20000000 type 0
[DEBUG] 0x0000000100000000 - 0x000000026fffffff size 0x170000000 type 6
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
[DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 36 bits
[DEBUG] MTRR: default type WB/UC MTRR counts: 5/5.
[DEBUG] MTRR: UC selected as default type.
[DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
[DEBUG] MTRR: 1 base 0x000000007f800000 mask 0x0000000fff800000 type 0
[DEBUG] MTRR: 2 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
[DEBUG] MTRR: 3 base 0x0000000100000000 mask 0x0000000f00000000 type 6
[DEBUG] MTRR: 4 base 0x0000000200000000 mask 0x0000000f80000000 type 6

[DEBUG] MTRR check
[DEBUG] Fixed MTRRs : Enabled
[DEBUG] Variable MTRRs: Enabled

[INFO ] POST: 0x93
[DEBUG] CPU has 2 cores, 4 threads enabled.
[DEBUG] Setting up SMI for CPU
[INFO ] Will perform SMM setup.
[INFO ] CPU: Intel(R) Core(TM) i7 CPU L 640 @ 2.13GHz.
[INFO ] LAPIC 0x0 in XAPIC mode.
[DEBUG] CPU: APIC: 00 enabled
[DEBUG] CPU: APIC: 01 enabled
[DEBUG] CPU: APIC: 02 enabled
[DEBUG] CPU: APIC: 03 enabled
[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
[DEBUG] Processing 16 relocs. Offset value of 0x00030000
[DEBUG] Attempting to start 3 APs
[DEBUG] Waiting for ICR not to be busy...
[DEBUG] done.
[DEBUG] Waiting for SIPI to complete...
[DEBUG] done.
[INFO ] LAPIC 0x1 in XAPIC mode.
[INFO ] AP: slot 1 apic_id 1, MCU rev: 0x00000007
[INFO ] LAPIC 0x5 in XAPIC mode.
[INFO ] LAPIC 0x4 in XAPIC mode.
[INFO ] AP: slot 2 apic_id 5, MCU rev: 0x00000007
[INFO ] AP: slot 3 apic_id 4, MCU rev: 0x00000007
[DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x198 memsize: 0x198
[DEBUG] Processing 9 relocs. Offset value of 0x00038000
[DEBUG] smm_module_setup_stub: stack_top = 0x7f801000
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000
[DEBUG] SMM Module: stub loaded at 38000. Will call 0x7f6a46ac
[DEBUG] Installing permanent SMM handler to 0x7f800000
[DEBUG] HANDLER [0x7fefe000-0x7feffa9f]

[DEBUG] CPU 0
[DEBUG] ss0 [0x7fefdc00-0x7fefdfff]
[DEBUG] stub0 [0x7fef6000-0x7fef6197]

[DEBUG] CPU 1
[DEBUG] ss1 [0x7fefd800-0x7fefdbff]
[DEBUG] stub1 [0x7fef5c00-0x7fef5d97]

[DEBUG] CPU 2
[DEBUG] ss2 [0x7fefd400-0x7fefd7ff]
[DEBUG] stub2 [0x7fef5800-0x7fef5997]

[DEBUG] CPU 3
[DEBUG] ss3 [0x7fefd000-0x7fefd3ff]
[DEBUG] stub3 [0x7fef5400-0x7fef5597]

[DEBUG] stacks [0x7f800000-0x7f800fff]
[DEBUG] Loading module at 0x7fefe000 with entry 0x7fefe720. filesize: 0x1a48 memsize: 0x1aa0
[DEBUG] Processing 71 relocs. Offset value of 0x7fefe000
[DEBUG] Loading module at 0x7fef6000 with entry 0x7fef6000. filesize: 0x198 memsize: 0x198
[DEBUG] Processing 9 relocs. Offset value of 0x7fef6000
[DEBUG] smm_module_setup_stub: stack_top = 0x7f801000
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x700000
[DEBUG] SMM Module: placing smm entry code at 7fef5c00, cpu # 0x1
[DEBUG] SMM Module: placing smm entry code at 7fef5800, cpu # 0x2
[DEBUG] SMM Module: placing smm entry code at 7fef5400, cpu # 0x3
[DEBUG] SMM Module: stub loaded at 7fef6000. Will call 0x7fefe720
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feee000, cpu = 0
[DEBUG] In relocation handler: cpu 0
[DEBUG] New SMBASE=0x7feee000
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feed400, cpu = 3
[DEBUG] In relocation handler: cpu 3
[DEBUG] New SMBASE=0x7feed400
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feed800, cpu = 2
[DEBUG] In relocation handler: cpu 2
[DEBUG] New SMBASE=0x7feed800
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feedc00, cpu = 1
[DEBUG] In relocation handler: cpu 1
[DEBUG] New SMBASE=0x7feedc00
[INFO ] microcode: Update skipped, already up-to-date
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] Initializing CPU #0
[DEBUG] CPU: vendor Intel device 20655
[DEBUG] CPU: family 06, model 25, stepping 05
[DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL already locked
[INFO ] Turbo is available and visible
[INFO ] CPU #0 initialized
[INFO ] Initializing CPU #2
[INFO ] Initializing CPU #3
[DEBUG] CPU: vendor Intel device 20655
[DEBUG] CPU: family 06, model 25, stepping 05
[DEBUG] CPU: vendor Intel device 20655
[INFO ] Initializing CPU #1
[DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled
[DEBUG] CPU: family 06, model 25, stepping 05
[DEBUG] IA32_FEATURE_CONTROL already locked
[DEBUG] CPU: vendor Intel device 20655
[DEBUG] CPU: family 06, model 25, stepping 05
[DEBUG] IA32_FEATURE_CONTROL already locked; CPU #2 initialized
[DEBUG] VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL already locked
[DEBUG] IA32_FEATURE_CONTROL already locked
[INFO ] CPU #3 initialized
[INFO ] CPU #1 initialized
[INFO ] bsp_do_flight_plan done after 3 msecs.
[DEBUG] model_x065x: frequency set to 2926
[DEBUG] SMI_STS:
[DEBUG] GPE0_STS: GPIO14 GPIO11 GPIO9 GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO0
[DEBUG] ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0
[DEBUG] TCO_STS:
[DEBUG] Locking SMM.
[DEBUG] MTRR: TEMPORARY Physical address space:
[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
[DEBUG] 0x00000000000c0000 - 0x000000007f7fffff size 0x7f740000 type 6
[DEBUG] 0x000000007f800000 - 0x00000000ff7fffff size 0x80000000 type 0
[DEBUG] 0x00000000ff800000 - 0x00000000ffffffff size 0x00800000 type 5
[DEBUG] 0x0000000100000000 - 0x000000026fffffff size 0x170000000 type 6
[DEBUG] MTRR: default type WB/UC MTRR counts: 10/5.
[DEBUG] MTRR: UC selected as default type.
[DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
[DEBUG] MTRR: 1 base 0x000000007f800000 mask 0x0000000fff800000 type 0
[DEBUG] MTRR: 2 base 0x00000000ff800000 mask 0x0000000fff800000 type 5
[DEBUG] MTRR: 3 base 0x0000000100000000 mask 0x0000000f00000000 type 6
[DEBUG] MTRR: 4 base 0x0000000200000000 mask 0x0000000f80000000 type 6
[DEBUG] CPU_CLUSTER: 0 init finished in 4 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:00.0 init
[DEBUG] PCI: 00:00:00.0 init finished in 0 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:02.0 init
[DEBUG] Starting cbfs_boot_device
[INFO ] CBFS: Found 'vbt.bin' @0x452c0 size 0x632 in mcache @0x7f7dd1e4
[INFO ] Found a VBT of 4309 bytes
[INFO ] GMA: Found VBT in CBFS
[INFO ] GMA: Found valid VBT in CBFS
[INFO ] framebuffer_info: bytes_per_line: 5120, bits_per_pixel: 32
[INFO ] x_res x y_res: 1280 x 800, size: 4096000 at 0xd0000000
[DEBUG] GT Power Management Init (post VBIOS)
[DEBUG] PCI: 00:00:02.0 init finished in 389 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:16.0 init
[DEBUG] ME: FW Partition Table : OK
[DEBUG] ME: Bringup Loader Failure : NO
[DEBUG] ME: Firmware Init Complete : NO
[DEBUG] ME: Manufacturing Mode : NO
[DEBUG] ME: Boot Options Present : NO
[DEBUG] ME: Update In Progress : NO
[DEBUG] ME: Current Working State : Reset
[DEBUG] ME: Current Operation State : Preboot
[DEBUG] ME: Current Operation Mode : Normal
[DEBUG] ME: Error Code : No Error
[DEBUG] ME: Progress Phase : ROM Phase
[DEBUG] ME: Power Management Event : Clean Moff->Mx wake
[DEBUG] ME: Progress Phase State : BEGIN
[NOTE ] ME: BIOS path: Disable
[DEBUG] PCI: 00:00:16.0: Disabling device
[DEBUG] PCI: 00:00:16.0 init finished in 0 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:19.0 init
[DEBUG] PCI: 00:00:19.0 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1a.0 init
[DEBUG] EHCI: Setting up controller.. done.
[DEBUG] PCI: 00:00:1a.0 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1b.0 init
[DEBUG] Azalia: base = 0xfe6dc000
[DEBUG] Azalia: V1CTL disabled.
[DEBUG] Azalia: codec_mask = 09
[DEBUG] azalia_audio: initializing codec #3...
[DEBUG] azalia_audio: - vendor/device id: 0x80862804
[DEBUG] azalia_audio: - verb size: 16
[DEBUG] azalia_audio: - verb loaded
[DEBUG] azalia_audio: initializing codec #0...
[DEBUG] azalia_audio: - vendor/device id: 0x14f15069
[DEBUG] azalia_audio: - verb size: 44
[DEBUG] azalia_audio: - verb loaded
[DEBUG] PCI: 00:00:1b.0 init finished in 4 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1d.0 init
[DEBUG] EHCI: Setting up controller.. done.
[DEBUG] PCI: 00:00:1d.0 init finished in 0 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1f.0 init
[DEBUG] pch: lpc_init
[DEBUG] IOAPIC: Initializing IOAPIC at fec00000
[DEBUG] IOAPIC: ID = 0x00
[DEBUG] IOAPIC: 24 interrupts
[DEBUG] IOAPIC: Clearing IOAPIC at fec00000
[DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00
[INFO ] Set power off after power failure.
[INFO ] NMI sources enabled.
[DEBUG] Mobile 5 PM init
[DEBUG] rtc_failed = 0x0
[DEBUG] RTC Init
[DEBUG] apm_control: Disabling ACPI.
[DEBUG] APMC done.
[DEBUG] PCI: 00:00:1f.0 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1f.2 init
[DEBUG] SATA: Initializing...
[DEBUG] SATA: Controller in AHCI mode.
[DEBUG] ABAR: 0xfe6d9000
[DEBUG] PCI: 00:00:1f.2 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1f.3 init
[DEBUG] PCI: 00:00:1f.3 init finished in 0 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1f.6 init
[DEBUG] Thermal init start.
[DEBUG] Thermal init done.
[DEBUG] PCI: 00:00:1f.6 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:04:00.0 init
[DEBUG] PCI: 00:04:00.0 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] PNP: 164e.3 init
[DEBUG] PNP: 164e.3 init finished in 0 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PNP: 00ff.2 init
[DEBUG] Keyboard init...
[INFO ] Keyboard controller output buffer result timeout
[DEBUG] PS/2 keyboard initialized on primary channel
[DEBUG] PNP: 00ff.2 init finished in 517 msecs
[INFO ] POST: 0x75
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:54 init
[DEBUG] I2C: 01:54 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:55 init
[DEBUG] I2C: 01:55 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:56 init
[DEBUG] I2C: 01:56 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:57 init
[DEBUG] I2C: 01:57 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:5c init
[DEBUG] Locking EEPROM RFID
[DEBUG] init EEPROM done
[DEBUG] I2C: 01:5c init finished in 24 msecs
[INFO ] POST: 0x75
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:5d init
[DEBUG] I2C: 01:5d init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:5e init
[DEBUG] I2C: 01:5e init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:5f init
[DEBUG] I2C: 01:5f init finished in 0 msecs
[INFO ] Devices initialized
[DEBUG] BS: BS_DEV_INIT run times (exec / console): 941 / 1 ms
[DEBUG] TPM: Startup
[DEBUG] TPM: command 0x99 returned 0x0
[DEBUG] TPM: Asserting physical presence
[DEBUG] TPM: command 0x4000000a returned 0x0
[DEBUG] TPM: command 0x65 returned 0x0
[DEBUG] TPM: flags disable=0, deactivated=0, nvlocked=1
[INFO ] TPM: setup succeeded
[DEBUG] BS: BS_DEV_INIT exit times (exec / console): 11 / 0 ms
[INFO ] POST: 0x76
[INFO ] Finalize devices...
[DEBUG] PCI: 00:00:1f.0 final
[INFO ] Manufacturer: c2
[INFO ] SF: Detected c2 2017 with sector size 0x1000, total 0x800000
[DEBUG] apm_control: Finalizing SMM.
[DEBUG] APMC done.
[INFO ] Devices finalized
[INFO ] POST: 0x77
[INFO ] POST: 0x79
[INFO ] POST: 0x9c
[DEBUG] Starting cbfs_boot_device
[INFO ] CBFS: Found 'fallback/dsdt.aml' @0x41880 size 0x39d5 in mcache @0x7f7dd1b8
[DEBUG] Starting cbfs_boot_device
[WARN ] CBFS: 'fallback/slic' not found.
[INFO ] ACPI: Writing ACPI tables at 7f639000.
[DEBUG] ACPI: * FACS
[DEBUG] ACPI: * FACP
[DEBUG] ACPI: added table 1/32, length now 44
[DEBUG] Lenovo P/N is 30933DK
[DEBUG] Lenovo P/N 30933DK is a tablet
[DEBUG] Found 1 CPU(s) with 4 core(s) each.
[DEBUG] Supported C-states: C0 C1 C1E C3 C6
[DEBUG] PSS: 2134MHz power 25000 control 0x16 status 0x16
[DEBUG] PSS: 2133MHz power 25000 control 0x10 status 0x10
[DEBUG] PSS: 2000MHz power 23143 control 0xf status 0xf
[DEBUG] PSS: 1866MHz power 21371 control 0xe status 0xe
[DEBUG] PSS: 1733MHz power 19609 control 0xd status 0xd
[DEBUG] PSS: 1600MHz power 17887 control 0xc status 0xc
[DEBUG] PSS: 1466MHz power 16196 control 0xb status 0xb
[DEBUG] PSS: 1333MHz power 14562 control 0xa status 0xa
[DEBUG] PSS: 1200MHz power 12940 control 0x9 status 0x9
[DEBUG] Advertising ACPI C State type C1 as CPU C1E
[DEBUG] Advertising ACPI C State type C2 as CPU C3
[DEBUG] Advertising ACPI C State type C3 as CPU C6
[DEBUG] PSS: 2134MHz power 25000 control 0x16 status 0x16
[DEBUG] PSS: 2133MHz power 25000 control 0x10 status 0x10
[DEBUG] PSS: 2000MHz power 23143 control 0xf status 0xf
[DEBUG] PSS: 1866MHz power 21371 control 0xe status 0xe
[DEBUG] PSS: 1733MHz power 19609 control 0xd status 0xd
[DEBUG] PSS: 1600MHz power 17887 control 0xc status 0xc
[DEBUG] PSS: 1466MHz power 16196 control 0xb status 0xb
[DEBUG] PSS: 1333MHz power 14562 control 0xa status 0xa
[DEBUG] PSS: 1200MHz power 12940 control 0x9 status 0x9
[DEBUG] Advertising ACPI C State type C1 as CPU C1E
[DEBUG] Advertising ACPI C State type C2 as CPU C3
[DEBUG] Advertising ACPI C State type C3 as CPU C6
[DEBUG] PSS: 2134MHz power 25000 control 0x16 status 0x16
[DEBUG] PSS: 2133MHz power 25000 control 0x10 status 0x10
[DEBUG] PSS: 2000MHz power 23143 control 0xf status 0xf
[DEBUG] PSS: 1866MHz power 21371 control 0xe status 0xe
[DEBUG] PSS: 1733MHz power 19609 control 0xd status 0xd
[DEBUG] PSS: 1600MHz power 17887 control 0xc status 0xc
[DEBUG] PSS: 1466MHz power 16196 control 0xb status 0xb
[DEBUG] PSS: 1333MHz power 14562 control 0xa status 0xa
[DEBUG] PSS: 1200MHz power 12940 control 0x9 status 0x9
[DEBUG] Advertising ACPI C State type C1 as CPU C1E
[DEBUG] Advertising ACPI C State type C2 as CPU C3
[DEBUG] Advertising ACPI C State type C3 as CPU C6
[DEBUG] PSS: 2134MHz power 25000 control 0x16 status 0x16
[DEBUG] PSS: 2133MHz power 25000 control 0x10 status 0x10
[DEBUG] PSS: 2000MHz power 23143 control 0xf status 0xf
[DEBUG] PSS: 1866MHz power 21371 control 0xe status 0xe
[DEBUG] PSS: 1733MHz power 19609 control 0xd status 0xd
[DEBUG] PSS: 1600MHz power 17887 control 0xc status 0xc
[DEBUG] PSS: 1466MHz power 16196 control 0xb status 0xb
[DEBUG] PSS: 1333MHz power 14562 control 0xa status 0xa
[DEBUG] PSS: 1200MHz power 12940 control 0x9 status 0x9
[DEBUG] Advertising ACPI C State type C1 as CPU C1E
[DEBUG] Advertising ACPI C State type C2 as CPU C3
[DEBUG] Advertising ACPI C State type C3 as CPU C6
[DEBUG] Generating ACPI PIRQ entries
[INFO ] _SB_.PCI0.TPM: LPC TPM PNP: 0c31.0
[INFO ] ACPI: * H8
[INFO ] H8: BDC installed
[INFO ] H8: WWAN detection not implemented. Assuming WWAN installed
[DEBUG] ACPI: * SSDT
[DEBUG] ACPI: added table 2/32, length now 52
[DEBUG] ACPI: * MCFG
[DEBUG] ACPI: added table 3/32, length now 60
[DEBUG] TCPA log created at 0x7f629000
[DEBUG] ACPI: * TCPA
[DEBUG] ACPI: added table 4/32, length now 68
[DEBUG] IOAPIC: 24 interrupts
[DEBUG] ACPI: * APIC
[DEBUG] ACPI: added table 5/32, length now 76
[DEBUG] current = 7f63e2c0
[DEBUG] ACPI: * HPET
[DEBUG] ACPI: added table 6/32, length now 84
[INFO ] ACPI: done.
[DEBUG] ACPI tables: 21248 bytes.
[DEBUG] smbios_write_tables: 7f621000
[INFO ] PCI: 00:04:00.0 (unknown)
[DEBUG] SMBIOS tables: 782 bytes.
[DEBUG] Writing table forward entry at 0x00000500
[DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum b078
[DEBUG] Writing coreboot table at 0x7f65d000
[DEBUG] Starting cbfs_boot_device
[INFO ] CBFS: Found 'cmos_layout.bin' @0x45a80 size 0x64c in mcache @0x7f7dd23c
[DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
[DEBUG] 1. 0000000000001000-000000000009ffff: RAM
[DEBUG] 2. 00000000000a0000-00000000000f5fff: RESERVED
[DEBUG] 3. 00000000000f6000-00000000000f6fff: CONFIGURATION TABLES
[DEBUG] 4. 00000000000f7000-00000000000fffff: RESERVED
[DEBUG] 5. 0000000000100000-000000007f620fff: RAM
[DEBUG] 6. 000000007f621000-000000007f679fff: CONFIGURATION TABLES
[DEBUG] 7. 000000007f67a000-000000007f7cefff: RAMSTAGE
[DEBUG] 8. 000000007f7cf000-000000007f7fffff: CONFIGURATION TABLES
[DEBUG] 9. 000000007f800000-000000008bffffff: RESERVED
[DEBUG] 10. 00000000d0000000-00000000efffffff: RESERVED
[DEBUG] 11. 00000000fed00000-00000000fedfffff: RESERVED
[DEBUG] 12. 0000000100000000-00000001fbffffff: RAM
[DEBUG] 13. 00000001fc000000-00000001ffffffff: RESERVED
[DEBUG] 14. 0000000200000000-000000026fffffff: RAM
[INFO ] Setting up bootsplash in 1280x800@32
[DEBUG] Starting cbfs_boot_device
[WARN ] CBFS: 'bootsplash.jpg' not found.
[ERROR] Could not find bootsplash.jpg
[DEBUG] Starting cbfs_boot_device
[DEBUG] Wrote coreboot table at: 0x7f65d000, 0xa34 bytes, checksum 3cfd
[DEBUG] coreboot table: 2636 bytes.
[DEBUG] IMD ROOT 0. 0x7f7ff000 0x00001000
[DEBUG] IMD SMALL 1. 0x7f7fe000 0x00001000
[DEBUG] CONSOLE 2. 0x7f7de000 0x00020000
[DEBUG] RO MCACHE 3. 0x7f7dd000 0x00000428
[DEBUG] TIME STAMP 4. 0x7f7dc000 0x00000910
[DEBUG] AFTER CAR 5. 0x7f7cf000 0x0000d000
[DEBUG] RAMSTAGE 6. 0x7f679000 0x00156000
[DEBUG] SMM BACKUP 7. 0x7f669000 0x00010000
[DEBUG] IGD OPREGION 8. 0x7f665000 0x00003200
[DEBUG] COREBOOT 9. 0x7f65d000 0x00008000
[DEBUG] ACPI 10. 0x7f639000 0x00024000
[DEBUG] TCPA TCGLOG11. 0x7f629000 0x00010000
[DEBUG] SMBIOS 12. 0x7f621000 0x00008000
[DEBUG] IMD small region:
[DEBUG] IMD ROOT 0. 0x7f7fec00 0x00000400
[DEBUG] FMAP 1. 0x7f7feb20 0x000000e0
[DEBUG] ROMSTAGE 2. 0x7f7feb00 0x00000004
[DEBUG] ROMSTG STCK 3. 0x7f7fea60 0x00000088
[DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 19 / 0 ms
[INFO ] POST: 0x7a
[DEBUG] Starting cbfs_boot_device
[INFO ] CBFS: Found 'fallback/payload' @0x58280 size 0x11883 in mcache @0x7f7dd2d0
[DEBUG] Checking segment from ROM address 0xfff692ac
[DEBUG] Payload being loaded at below 1MiB without region being marked as RAM usable.
[DEBUG] Checking segment from ROM address 0xfff692c8
[DEBUG] Loading segment from ROM address 0xfff692ac
[DEBUG] code (compression=1)
[DEBUG] New segment dstaddr 0x000de740 memsize 0x218c0 srcaddr 0xfff692e4 filesize 0x1184b
[DEBUG] Loading Segment: addr: 0x000de740 memsz: 0x00000000000218c0 filesz: 0x000000000001184b
[DEBUG] using LZMA
[DEBUG] Loading segment from ROM address 0xfff692c8
[DEBUG] Entry Point 0x000fd259
[DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 14 / 0 ms
[INFO ] POST: 0x7b
[DEBUG] ICH-NM10-PCH: watchdog disabled
[DEBUG] Jumping to boot code at 0x000fd259(0x7f65d000)
[INFO ] POST: 0xf8
SeaBIOS (version rel-1.17.0-10-g8fcd351a)
BUILD: gcc: (coreboot toolchain v2026-05-01_ced4028bff) 15.2.0 binutils: (GNU Binutils) 2.45.1
Found coreboot cbmem console @ 7f7de000
Found mainboard LENOVO ThinkPad X201
Relocating init from 0x000dfec0 to 0x7e613b40 (size 54304)
Found CBFS header at 0xfff1102c
multiboot: eax=7f6bd29c, ebx=7f6bd264
boot order:
1: /rom@img/grub2
2:
Found 16 PCI devices (max PCI bus is 05)
Copying SMBIOS from 0x7f621000 to 0x000f60c0
Copying SMBIOS 3.0 from 0x7f621020 to 0x000f60a0
Copying ACPI RSDP from 0x7f639000 to 0x000f6070
table(50434146)=0x7f63cc60 (via xsdt)
Using pmtimer, ioport 0x508
table(41504354)=0x7f63e200 (via xsdt)
EHCI init on dev 00:1a.0 (regs=0xfe6d8020)
EHCI init on dev 00:1d.0 (regs=0xfe6d7020)
AHCI controller at 00:1f.2, iobase 0xfe6d9000, irq 11
Searching bootorder for: HALT
Found 0 lpt ports
Found 0 serial ports
Searching bootorder for: /rom@img/grub2
Searching bootorder for: /rom@img/nvramcui
Scan for VGA option rom
Running option rom at c000:0003
pmm call arg1=0
Turning on vga text mode console
SeaBIOS (version rel-1.17.0-10-g8fcd351a)
Machine UUID f50517e0-806a-11df-b054-b78fa8ac77a2
Scan for option roms

Press ESC for boot menu.

Searching bootorder for: /pci@i0cf8/@1f,2/drive@0/disk@0
AHCI/0: Set transfer mode to UDMA-6
Searching bios-geometry for: /pci@i0cf8/@1f,2/drive@0/disk@0
AHCI/0: registering: "AHCI/0: KINGSTON SV300S37A480G ATA-8 Hard-Disk (447 GiBytes)"
Initialized USB HUB (0 ports used)
Initialized USB HUB (0 ports used)
PS2 keyboard initialized
All threads complete.
Select boot device:

1. Payload [grub2]
2. AHCI/0: KINGSTON SV300S37A480G ATA-8 Hard-Disk (447 GiBytes)
3. Payload [nvramcui]

t. TPM Configuration

Searching bootorder for: HALT
drive 0x000f6000: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=937703088
Space available for UMB: c7000-ec000, f58e0-f6000
Returned 16769024 bytes of ZoneHigh
e820 map has 10 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 000000007f61f000 = 1 RAM
4: 000000007f61f000 - 000000008c000000 = 2 RESERVED
5: 00000000d0000000 - 00000000f0000000 = 2 RESERVED
6: 00000000fed00000 - 00000000fee00000 = 2 RESERVED
7: 0000000100000000 - 00000001fc000000 = 1 RAM
8: 00000001fc000000 - 0000000200000000 = 2 RESERVED
9: 0000000200000000 - 0000000270000000 = 1 RAM
enter handle_19:
NULL
Booting from Hard Disk...
Booting from 0000:7c00