coreboot

-- 0:ttyAMA0 -- time-stamp -- Jän/29/26 9:48:36 --

-- 0:ttyAMA0 -- time-stamp -- Jän/29/26 9:48:45 --

USB





[NOTE ] coreboot-25.12 Thu Dec 18 17:36:57 UTC 2025 x86_32 bootblock starting (log level: 7)...

[DEBUG] Starting cbfs_boot_device

[DEBUG] Starting cbfs_boot_device

[DEBUG] FMAP: Found "FLASH" version 1.1 at 0x890000.

[DEBUG] FMAP: base = 0x0 size = 0xc00000 #areas = 5

[DEBUG] FMAP: area COREBOOT found @ 891000 (3600384 bytes)

[INFO ] Booting from COREBOOT region

[INFO ] CBFS: mcache @0xff7e0e00 built for 15 files, used 0x318 of 0x4000 bytes

[INFO ] CBFS: Found 'fallback/romstage' @0xf980 size 0x1ba48 in mcache @0xff7e0e8c

[DEBUG] BS: bootblock times (exec / console): total (unknown) / 54 ms





[NOTE ] coreboot-25.12 Thu Dec 18 17:36:57 UTC 2025 x86_32 romstage starting (log level: 7)...

[DEBUG] Disabling Watchdog reboot... done.

[DEBUG] SMBus controller enabled

[DEBUG] Setting up static northbridge registers... done.

[DEBUG] Started PEG11 link training.

[DEBUG] Started PEG10 link training.

[DEBUG] Initializing IGD...

[DEBUG] Back from haswell_early_initialization()

[DEBUG] CPU id(306c3) ucode:00000028 Intel(R) Core(TM) i5-4300M CPU @ 2.60GHz

[DEBUG] AES supported, TXT supported, VT supported

[DEBUG] PCH type: QM87, device id: 8c4f, rev id 5

[DEBUG] Starting native platform initialisation

[INFO ] Intel ME early init

[INFO ] Intel ME firmware is ready

[DEBUG] ME: Checking whether CPU was replaced... not replaced

[DEBUG] HSIO lane owner: 0x05

[DEBUG] SATA port enables: 0x3f

[DEBUG] USB2 port 0 => mapped to OC pin 0

[DEBUG] USB2 port 1 => mapped to OC pin 0

[DEBUG] USB2 port 2 => mapped to OC pin 1

[DEBUG] USB2 port 3 => not mapped to OC pin

[DEBUG] USB2 port 4 => not mapped to OC pin

[DEBUG] USB2 port 5 => mapped to OC pin 2

[DEBUG] USB2 port 6 => mapped to OC pin 3

[DEBUG] USB2 port 7 => mapped to OC pin 3

[DEBUG] USB2 port 8 => mapped to OC pin 4

[DEBUG] USB2 port 9 => mapped to OC pin 4

[DEBUG] USB2 port 10 => mapped to OC pin 5

[DEBUG] USB2 port 11 => mapped to OC pin 5

[DEBUG] USB2 port 12 => mapped to OC pin 6

[DEBUG] USB2 port 13 => mapped to OC pin 6



[DEBUG] USB3 port 0 => mapped to OC pin 0

[DEBUG] USB3 port 1 => mapped to OC pin 0

[DEBUG] USB3 port 2 => not mapped to OC pin

[DEBUG] USB3 port 3 => not mapped to OC pin

[DEBUG] USB3 port 4 => mapped to OC pin 1

[DEBUG] USB3 port 5 => mapped to OC pin 1



[DEBUG] Retraining DMI at Gen2 speeds...

[DEBUG] DMI: Running at Gen1 x4

[DEBUG] DMI: Running at Gen1 x4

[INFO ] DMI: Running at Gen2 x4

[DEBUG] Programming SA DMI VC/TC mappings...

[DEBUG] Programming PCH DMI VC/TC mappings...

[DEBUG] Waiting for PCH DMI VC negotiation... done!

[DEBUG] Waiting for SA DMI VC negotiation... done!

[DEBUG] FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes)

[INFO ] Using cached memory parameters

[DEBUG] Initial bootmode: BOOTMODE_COLD

[DEBUG] Current bootmode: BOOTMODE_FAST



[DEBUG] Starting native raminit



[DEBUG] Executing raminit task PROCSPD

[DEBUG] CH0S0 is slotted and DDR3

[DEBUG] CH1S0 is slotted and not DDR3, ignoring



[DEBUG] CH0S0 SPD:

[DEBUG] Revision : 10

[DEBUG] Type : b

[DEBUG] Key : 3

[DEBUG] Banks : 8

[DEBUG] Capacity : 2 Gb

[DEBUG] Supported voltages : 1.5V

[DEBUG] SDRAM width : 8

[DEBUG] Bus extension : 0 bits

[DEBUG] Bus width : 64

[DEBUG] FTB timings : no

[DEBUG] Optional features : DLL-Off_mode RZQ/7 RZQ/6

[DEBUG] Thermal features : ext_temp_range

[DEBUG] Thermal sensor : no

[DEBUG] Standard SDRAM : yes

[DEBUG] Rank1 Address bits : normal

[DEBUG] DIMM Reference card: B

[DEBUG] Manufacturer ID : ce80

[DEBUG] Part number : M471B5773CHS-CK0

[INFO ] Row addr bits : 15

[INFO ] Column addr bits : 10

[INFO ] Number of ranks : 1

[INFO ] DIMM Capacity : 2048 MB

[INFO ] Vdd Min : 1500 mV

[INFO ] Vdd Max : 1500 mV

[INFO ] CAS latencies : 5 6 7 8 9 10 11

[INFO ] tCKmin : 1.250 ns

[INFO ] tAAmin : 13.125 ns

[INFO ] tWRmin : 15.000 ns

[INFO ] tRCDmin : 13.125 ns

[INFO ] tRRDmin : 6.000 ns

[INFO ] tRPmin : 13.125 ns

[INFO ] tRASmin : 35.000 ns

[INFO ] tRCmin : 48.125 ns

[INFO ] tRFCmin : 160.000 ns

[INFO ] tWTRmin : 7.500 ns

[INFO ] tRTPmin : 7.500 ns

[INFO ] tFAWmin : 30.000 ns





[DEBUG] Executing raminit task RST_NONT





[DEBUG] Executing raminit task INITMPLL

[DEBUG] MC_BIOS_REQ = 0x80000006

[DEBUG] MPLL busy... done in 9 us

[DEBUG] MC_BIOS_DATA = 0x00000006

[DEBUG] MPLL frequency is set to: 800 MHz (period: 1250000 femtoseconds)

[DEBUG] Quadrature clock period: 625 picoseconds





[DEBUG] Executing raminit task CONFMC





[DEBUG] Executing raminit task MEMMAP

[DEBUG] ME: Requested 0MB UMA

[DEBUG] ============ MEMORY MAP ============



[DEBUG] dpr_size = 0 MiB

[DEBUG] tseg_size = 8 MiB

[DEBUG] gtt_size = 2 MiB

[DEBUG] gms_size = 64 MiB

[DEBUG] me_stolen_size = 0 MiB



[DEBUG] touud = 5054 MiB

[DEBUG] remaplimit = 5053 MiB

[DEBUG] remapbase = 4096 MiB

[DEBUG] tom = 2048 MiB

[DEBUG] tom_minus_me = 2048 MiB

[DEBUG] tolud = 1090 MiB

[DEBUG] bdsm_base = 1026 MiB

[DEBUG] gtt_base = 1024 MiB

[DEBUG] tseg_base = 1016 MiB



[DEBUG] reclaim_possible = Yes





[DEBUG] Executing raminit task JEDECINIT





[DEBUG] Executing raminit task PRETRAIN

[DEBUG] C0S0:

[DEBUG] MR0: 0x0d70

[DEBUG] MR1: 0x0002

[DEBUG] MR2: 0x0298

[DEBUG] MR3: 0x0000







[DEBUG] Executing raminit task RST_TRAIN





[DEBUG] Executing raminit task EXIT_SR





[DEBUG] Executing raminit task NORMALMODE





[DEBUG] Executing raminit task RAMINITEND

[DEBUG] Waiting for mc_init_done acknowledgement... DONE!



[DEBUG] +------------------+------------+

[DEBUG] | Task | msecs |

[DEBUG] +------------------+------------+

[DEBUG] | PROCSPD | 193 |

[DEBUG] | RST_NONT | 0 |

[DEBUG] | INITMPLL | 24 |

[DEBUG] | CONFMC | 0 |

[DEBUG] | MEMMAP | 65 |

[DEBUG] | JEDECINIT | 0 |

[DEBUG] | PRETRAIN | 14 |

[DEBUG] | RST_TRAIN | 0 |

[DEBUG] | EXIT_SR | 0 |

[DEBUG] | NORMALMODE | 0 |

[DEBUG] | RAMINITEND | 5 |

[DEBUG] +------------------+------------+

[DEBUG] | Total | 305 |

[DEBUG] +------------------+------------+

[DEBUG] memcfg DDR3 clock 1600 MHz

[DEBUG] memcfg channel assignment: A: 0, B 1, C 2

[DEBUG] memcfg channel[0] config (00600008):

[DEBUG] ECC inactive

[DEBUG] enhanced interleave mode on

[DEBUG] rank interleave on

[DEBUG] DIMMA 2048 MB width x8 or x32 single rank, selected

[DEBUG] DIMMB 0 MB width x8 or x32 single rank

[DEBUG] memcfg channel[1] config (00600000):

[DEBUG] ECC inactive

[DEBUG] enhanced interleave mode on

[DEBUG] rank interleave on

[DEBUG] DIMMA 0 MB width x8 or x32 single rank, selected

[DEBUG] DIMMB 0 MB width x8 or x32 single rank

[DEBUG] ME: Requested 0MB UMA

[DEBUG] ME: FW Partition Table : OK

[DEBUG] ME: Bringup Loader Failure : NO

[DEBUG] ME: Firmware Init Complete : NO

[DEBUG] ME: Manufacturing Mode : YES

[DEBUG] ME: Boot Options Present : NO

[DEBUG] ME: Update In Progress : NO

[DEBUG] ME: Current Working State : Initializing

[DEBUG] ME: Current Operation State : Bring up

[DEBUG] ME: Current Operation Mode : Debug

[DEBUG] ME: Error Code : No Error

[DEBUG] ME: Progress Phase : BUP Phase

[DEBUG] ME: Power Management Event : Clean Moff->Mx wake

[DEBUG] ME: Progress Phase State : 0x4d

[DEBUG] CBMEM:

[DEBUG] IMD: root @ 0x3f7ff000 254 entries.

[DEBUG] IMD: root @ 0x3f7fec00 62 entries.

[DEBUG] Starting cbfs_boot_device

[DEBUG] External stage cache:

[DEBUG] IMD: root @ 0x3fbff000 254 entries.

[DEBUG] IMD: root @ 0x3fbfec00 62 entries.

[DEBUG] FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes)

[DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'.

[DEBUG] flash size 0x2800000 bytes

[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x2800000

[ERROR] SF size 0x2800000 does not correspond to CONFIG_ROM_SIZE 0xc00000!!

[DEBUG] MRC: 'RW_MRC_CACHE' does not need update.

[DEBUG] SMM Memory Map

[DEBUG] SMRAM : 0x3f800000 0x800000

[DEBUG] Subregion 0: 0x3f800000 0x300000

[DEBUG] Subregion 1: 0x3fb00000 0x100000

[DEBUG] Subregion 2: 0x3fc00000 0x400000

[DEBUG] Normal boot

[DEBUG] Starting cbfs_boot_device

[INFO ] CBFS: Found 'fallback/postcar' @0x500c0 size 0x6678 in mcache @0xff7e1064

[DEBUG] Loading module at 0x3f7cd000 with entry 0x3f7cd031. filesize: 0x6248 memsize: 0xc5f8

[DEBUG] Processing 252 relocs. Offset value of 0x3d7cd000

[DEBUG] BS: romstage times (exec / console): total (unknown) / 877 ms

[DEBUG] usbdebug: postcar starting...

[DEBUG] Normal boot

[DEBUG] Starting cbfs_boot_device

[INFO ] CBFS: Found 'fallback/ramstage' @0x2b440 size 0x1f537 in mcache @0x3f7dd0ec

[DEBUG] Loading module at 0x3f67e000 with entry 0x3f67e000. filesize: 0x3e0a0 memsize: 0x14d390

[DEBUG] Processing 4269 relocs. Offset value of 0x3b67e000

[DEBUG] BS: postcar times (exec / console): total (unknown) / 32 ms

[DEBUG] usbdebug: ramstage starting...

[DEBUG] Normal boot

[INFO ] Enumerating buses...

[DEBUG] Root Device scanning...

[DEBUG] CPU_CLUSTER: 0 enabled

[DEBUG] DOMAIN: 00000000 enabled

[DEBUG] DOMAIN: 00000000 scanning...

[DEBUG] PCI: pci_scan_bus for segment group 00 bus 00

[DEBUG] PCI: 00:00:00.0 [8086/0c04] enabled

[INFO ] PCI: Static device PCI: 00:00:01.0 not found, disabling it.

[DEBUG] PCI: 00:00:01.1 [8086/0c05] enabled

[DEBUG] PCI: 00:00:02.0 [8086/0416] enabled

[DEBUG] PCI: 00:00:03.0 [8086/0c0c] enabled

[DEBUG] PCI: 00:00:04.0 [8086/0c03] enabled

[DEBUG] PCI: 00:00:14.0 [8086/8c31] enabled

[DEBUG] PCI: 00:00:16.0 [8086/8c3a] enabled

[DEBUG] PCI: 00:00:16.1: Disabling device

[DEBUG] PCI: 00:00:16.2: Disabling device

[DEBUG] PCI: 00:00:16.3: Disabling device

[DEBUG] PCI: 00:00:19.0 [8086/153a] enabled

[DEBUG] PCI: 00:00:1a.0 [8086/8c2d] enabled

[DEBUG] PCI: 00:00:1b.0 [8086/8c20] enabled

[DEBUG] PCIe Root Port 1 ASPM is disabled

[DEBUG] PCI: 00:00:1c.0 [8086/8c10] enabled

[DEBUG] PCIe Root Port 2 ASPM is disabled

[DEBUG] PCI: 00:00:1c.1 [8086/8c12] enabled

[DEBUG] PCI: 00:00:1c.2 [8086/8c14] disabled

[DEBUG] PCI: 00:00:1c.3 [8086/8c16] disabled

[DEBUG] Adjusted number of PCIe root ports to 5 as per strpfusecfg2

[DEBUG] PCI: 00:00:1c.2: Disabling device

[DEBUG] PCI: 00:00:1c.3: Disabling device

[DEBUG] PCI: 00:00:1c.4: Disabling device

[DEBUG] PCI: 00:00:1c.4 [8086/8c18] disabled

[DEBUG] PCI: 00:00:1d.0 [8086/8c26] enabled

[DEBUG] PCI: 00:00:1f.0 [8086/8c4f] enabled

[DEBUG] PCI: 00:00:1f.2 [8086/8c01] enabled

[DEBUG] PCI: 00:00:1f.3 [8086/8c22] enabled

[DEBUG] PCI: 00:00:1f.5: Disabling device

[DEBUG] PCI: 00:00:1f.5 [8086/8c09] disabled

[DEBUG] PCI: 00:00:1f.6: Disabling device

[WARN ] PCI: Leftover static devices:

[WARN ] PCI: 00:00:01.0

[WARN ] PCI: 00:00:16.1

[WARN ] PCI: 00:00:16.2

[WARN ] PCI: 00:00:16.3

[WARN ] PCI: 00:00:1c.5

[WARN ] PCI: 00:00:1c.6

[WARN ] PCI: 00:00:1c.7

[WARN ] PCI: 00:00:1f.6

[WARN ] PCI: Check your devicetree.cb.

[DEBUG] PCI: 00:00:01.1 scanning...

[DEBUG] PCI: pci_scan_bus for segment group 00 bus 01

[INFO ] PCI: 00:00:01.1: Setting Max_Payload_Size to 128 for devices under this root port

[DEBUG] scan_bus: bus PCI: 00:00:01.1 finished in 14 msecs

[DEBUG] PCI: 00:00:1c.0 scanning...

[DEBUG] PCI: pci_scan_bus for segment group 00 bus 02

[DEBUG] PCI: 00:02:00.0 [10ec/5227] enabled

[INFO ] Enabling Common Clock Configuration

[INFO ] ASPM: Enabled L0s and L1

[INFO ] PCI: 00:02:00.0: Enabled LTR

[INFO ] PCI: 00:00:1c.0: Setting Max_Payload_Size to 128 for devices under this root port

[DEBUG] scan_bus: bus P-- 0:ttyAMA0 -- time-stamp -- Jän/29/26 9:48:46 --

-- 0:ttyAMA0 -- time-stamp -- Jän/29/26 9:48:46 --

CI: 00:00:1c.0 finished in 31 msecs

[DEBUG] PCI: 00:00:1c.1 scanning...

[DEBUG] PCI: pci_scan_bus for segment group 00 bus 03

[INFO ] PCI: 00:00:1c.1: Setting Max_Payload_Size to 128 for devices under this root port

[DEBUG] scan_bus: bus PCI: 00:00:1c.1 finished in 14 msecs

[DEBUG] PCI: 00:00:1f.0 scanning...

[DEBUG] No CMOS option 'touchpad'.

[INFO ] PMH7: ID 05 Revision 01

[DEBUG] PNP: 00ff.1 enabled

[INFO ] H8: EC Firmware ID GLHT30WW-3.23, Version 3.01B

[DEBUG] No CMOS option 'bluetooth'.

[INFO ] H8: WWAN detection not implemented. Assuming WWAN installed

[DEBUG] No CMOS option 'wwan'.

[DEBUG] PNP: 00ff.2 enabled

[INFO ] Found TPM 1.2 ST33ZP24 (0x0000) by ST Microelectronics (0x104a)

[DEBUG] PNP: 0c31.0 enabled

[DEBUG] scan_bus: bus PCI: 00:00:1f.0 finished in 45 msecs

[DEBUG] PCI: 00:00:1f.3 scanning...

[DEBUG] scan_bus: bus PCI: 00:00:1f.3 finished in 0 msecs

[DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 346 msecs

[DEBUG] scan_bus: bus Root Device finished in 363 msecs

[INFO ] done

[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 375 ms

[DEBUG] found VGA at PCI: 00:00:02.0

[DEBUG] Setting up VGA for PCI: 00:00:02.0

[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000

[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

[INFO ] Allocating resources...

[INFO ] Reading resources...

[DEBUG] mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff.

[DEBUG] mc_add_fixed_mmio_resources: Adding DMIBAR @ 68 0xfed18000-0xfed18fff.

[DEBUG] mc_add_fixed_mmio_resources: Adding EPBAR @ 40 0xfed19000-0xfed19fff.

[DEBUG] mc_add_fixed_mmio_resources: Adding GDXCBAR @ 5420 0xfed84000-0xfed84fff.

[DEBUG] mc_add_fixed_mmio_resources: Adding EDRAMBAR @ 5408 0xfed80000-0xfed83fff.

[DEBUG] Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.

[DEBUG] MC MAP: TOM: 0x80000000

[DEBUG] MC MAP: TOUUD: 0x13be00000

[DEBUG] MC MAP: MESEG_BASE: 0x7ffff00000

[DEBUG] MC MAP: MESEG_LIMIT: 0xfffff

[DEBUG] MC MAP: REMAP_BASE: 0x100000000

[DEBUG] MC MAP: REMAP_LIMIT: 0x13bdfffff

[DEBUG] MC MAP: TOLUD: 0x44200000

[DEBUG] MC MAP: BGSM: 0x40000000

[DEBUG] MC MAP: BDSM: 0x40200000

[DEBUG] MC MAP: TSEGMB: 0x3f800000

[DEBUG] MC MAP: GGC: 0x211

[DEBUG] MC MAP: DPR: 0x3f800001

[INFO ] Available memory above 4GB: 958M

[DEBUG] PCI: 00:00:1a.0 EHCI BAR hook registered

[DEBUG] More than one caller of pci_ehci_read_resources from PCI: 00:00:1d.0

[ERROR] PNP: 00ff.1 missing read_resources

[ERROR] PNP: 00ff.2 missing read_resources

[INFO ] Done reading resources.

[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) ===

[DEBUG] PCI: 00:00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff

[DEBUG] PCI: 00:00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done

[DEBUG] PCI: 00:00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

[DEBUG] PCI: 00:02:00.0 10 * [0x0 - 0xfff] mem

[DEBUG] PCI: 00:00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

[DEBUG] PCI: 00:00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

[DEBUG] PCI: 00:00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) ===

[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 00 base 00000000 limit 00000fff io (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 84 base 00001600 limit 0000167f io (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 88 base 000015e0 limit 000015ef io (fixed)

[DEBUG] avoid_fixed_resources: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.3 20 base 00000400 limit 0000041f io (fixed)

[INFO ] DOMAIN: 00000000: Resource ranges:

[INFO ] * Base: 1000, Size: 5e0, Tag: 100

[INFO ] * Base: 15f0, Size: 10, Tag: 100

[INFO ] * Base: 1680, Size: e980, Tag: 100

[DEBUG] PCI: 00:00:02.0 20 * [0xffc0 - 0xffff] limit: ffff io

[DEBUG] PCI: 00:00:19.0 18 * [0xffa0 - 0xffbf] limit: ffbf io

[DEBUG] PCI: 00:00:1f.2 20 * [0xff80 - 0xff9f] limit: ff9f io

[DEBUG] PCI: 00:00:1f.2 10 * [0xff78 - 0xff7f] limit: ff7f io

[DEBUG] PCI: 00:00:1f.2 18 * [0xff70 - 0xff77] limit: ff77 io

[DEBUG] PCI: 00:00:1f.2 14 * [0xff6c - 0xff6f] limit: ff6f io

[DEBUG] PCI: 00:00:1f.2 1c * [0xff68 - 0xff6b] limit: ff6b io

[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

[DEBUG] DOMAIN: 00000000 mem: base: 3f800000 size: 0 align: 0 gran: 0 limit: efffffff

[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 48 base fed10000 limit fed17fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 68 base fed18000 limit fed18fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 40 base fed19000 limit fed19fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 5420 base fed84000 limit fed84fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 5408 base fed80000 limit fed83fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 60 base f0000000 limit f3ffffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 00 base fed90000 limit fed90fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 01 base fed91000 limit fed91fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 02 base 00000000 limit 0009ffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 03 base 000a0000 limit 000bffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 04 base 000c0000 limit 000fffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 05 base 00100000 limit 3f7fffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 06 base 3f800000 limit 3fffffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 07 base 40000000 limit 441fffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 08 base 100000000 limit 13bdfffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 31fe base fec00000 limit ffffffff mem (fixed)

[DEBUG] avoid_fixed_resources: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)

[INFO ] DOMAIN: 00000000: Resource ranges:

[INFO ] * Base: 44200000, Size: abe00000, Tag: 200

[INFO ] * Base: 13be00000, Size: 7ec4200000, Tag: 200

[DEBUG] PCI: 00:00:02.0 18 * [0xe0000000 - 0xefffffff] limit: efffffff prefmem

[DEBUG] PCI: 00:00:02.0 10 * [0xdfc00000 - 0xdfffffff] limit: dfffffff mem

[DEBUG] PCI: 00:00:1c.0 20 * [0xdfb00000 - 0xdfbfffff] limit: dfbfffff mem

[DEBUG] PCI: 00:00:19.0 10 * [0xdfae0000 - 0xdfafffff] limit: dfafffff mem

[DEBUG] PCI: 00:00:14.0 10 * [0xdfad0000 - 0xdfadffff] limit: dfadffff mem

[DEBUG] PCI: 00:00:04.0 10 * [0xdfac8000 - 0xdfacffff] limit: dfacffff mem

[DEBUG] PCI: 00:00:03.0 10 * [0xdfac4000 - 0xdfac7fff] limit: dfac7fff mem

[DEBUG] PCI: 00:00:1b.0 10 * [0xdfac0000 - 0xdfac3fff] limit: dfac3fff mem

[DEBUG] PCI: 00:00:19.0 14 * [0xdfabf000 - 0xdfabffff] limit: dfabffff mem

[DEBUG] PCI: 00:00:1f.2 24 * [0xdfabe000 - 0xdfabe7ff] limit: dfabe7ff mem

[DEBUG] PCI: 00:00:1a.0 10 * [0xdfabd000 - 0xdfabd3ff] limit: dfabd3ff mem

[DEBUG] PCI: 00:00:1d.0 10 * [0xdfabc000 - 0xdfabc3ff] limit: dfabc3ff mem

[DEBUG] PCI: 00:00:1f.3 10 * [0xdfabb000 - 0xdfabb0ff] limit: dfabb0ff mem

[DEBUG] PCI: 00:00:16.0 10 * [0xdfaba000 - 0xdfaba00f] limit: dfaba00f mem

[DEBUG] DOMAIN: 00000000 mem: base: 3f800000 size: 0 align: 0 gran: 0 limit: efffffff done

[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff done

[DEBUG] PCI: 00:02:00.0 10 * [0xdfb00000 - 0xdfb00fff] limit: dfb00fff mem

[INFO ] === Resource allocator: DOMAIN: 00000000 - resource allocation complete ===

[DEBUG] PCI: 00:00:01.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 01 io

[DEBUG] PCI: 00:00:01.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 01 prefmem

[DEBUG] PCI: 00:00:01.1 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 01 mem

[DEBUG] PCI: 00:00:02.0 10 <- [0x00000000dfc00000 - 0x00000000dfffffff] size 0x00400000 gran 0x16 mem64

[DEBUG] PCI: 00:00:02.0 18 <- [0x00000000e0000000 - 0x00000000efffffff] size 0x10000000 gran 0x1c prefmem64

[DEBUG] PCI: 00:00:02.0 20 <- [0x000000000000ffc0 - 0x000000000000ffff] size 0x00000040 gran 0x06 io

[DEBUG] PCI: 00:00:03.0 10 <- [0x00000000dfac4000 - 0x00000000dfac7fff] size 0x00004000 gran 0x0e mem64

[DEBUG] PCI: 00:00:04.0 10 <- [0x00000000dfac8000 - 0x00000000dfacffff] size 0x00008000 gran 0x0f mem64

[DEBUG] PCI: 00:00:14.0 10 <- [0x00000000dfad0000 - 0x00000000dfadffff] size 0x00010000 gran 0x10 mem64

[DEBUG] PCI: 00:00:16.0 10 <- [0x00000000dfaba000 - 0x00000000dfaba00f] size 0x00000010 gran 0x04 mem64

[DEBUG] PCI: 00:00:19.0 10 <- [0x00000000dfae0000 - 0x00000000dfafffff] size 0x00020000 gran 0x11 mem

[DEBUG] PCI: 00:00:19.0 14 <- [0x00000000dfabf000 - 0x00000000dfabffff] size 0x00001000 gran 0x0c mem

[DEBUG] PCI: 00:00:19.0 18 <- [0x000000000000ffa0 - 0x000000000000ffbf] size 0x00000020 gran 0x05 io

[DEBUG] PCI: 00:00:1a.0 EHCI Debug Port hook triggered

[DEBUG] PCI: 00:00:1a.0 10 <- [0x00000000dfabd000 - 0x00000000dfabd3ff] size 0x00000400 gran 0x0a mem

[DEBUG] PCI: 00:00:1a.0 EHCI Debug Port relocated

[DEBUG] PCI: 00:00:1b.0 10 <- [0x00000000dfac0000 - 0x00000000dfac3fff] size 0x00004000 gran 0x0e mem64

[DEBUG] PCI: 00:00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 02 io

[DEBUG] PCI: 00:00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 02 prefmem

[DEBUG] PCI: 00:00:1c.0 20 <- [0x00000000dfb00000 - 0x00000000dfbfffff] size 0x00100000 gran 0x14 seg 00 bus 02 mem

[DEBUG] PCI: 00:02:00.0 10 <- [0x00000000dfb00000 - 0x00000000dfb00fff] size 0x00001000 gran 0x0c mem

[DEBUG] PCI: 00:00:1c.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 03 io

[DEBUG] PCI: 00:00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 03 prefmem

[DEBUG] PCI: 00:00:1c.1 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 03 mem

[DEBUG] PCI: 00:00:1d.0 10 <- [0x00000000dfabc000 - 0x00000000dfabc3ff] size 0x00000400 gran 0x0a mem

[ERROR] PNP: 00ff.1 missing set_resources

[ERROR] PNP: 00ff.2 missing set_resources

[DEBUG] PCI: 00:00:1f.2 10 <- [0x000000000000ff78 - 0x000000000000ff7f] size 0x00000008 gran 0x03 io

[DEBUG] PCI: 00:00:1f.2 14 <- [0x000000000000ff6c - 0x000000000000ff6f] size 0x00000004 gran 0x02 io

[DEBUG] PCI: 00:00:1f.2 18 <- [0x000000000000ff70 - 0x000000000000ff77] size 0x00000008 gran 0x03 io

[DEBUG] PCI: 00:00:1f.2 1c <- [0x000000000000ff68 - 0x000000000000ff6b] size 0x00000004 gran 0x02 io

[DEBUG] PCI: 00:00:1f.2 20 <- [0x000000000000ff80 - 0x000000000000ff9f] size 0x00000020 gran 0x05 io

[DEBUG] PCI: 00:00:1f.2 24 <- [0x00000000dfabe000 - 0x00000000dfabe7ff] size 0x00000800 gran 0x0b mem

[DEBUG] PCI: 00:00:1f.3 10 <- [0x00000000dfabb000 - 0x00000000dfabb0ff] size 0x00000100 gran 0x08 mem64

[INFO ] Done setting resources.

[INFO ] Done allocating resources.

[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 2 / 993 ms

[INFO ] Enabling resources...

[DEBUG] PCI: 00:00:00.0 subsystem <- 17aa/220e

[DEBUG] PCI: 00:00:00.0 cmd <- 06

[DEBUG] PCI: 00:00:01.1 bridge ctrl <- 0013

[DEBUG] PCI: 00:00:01.1 subsystem <- 17aa/220e

[DEBUG] PCI: 00:00:01.1 cmd <- 00

[DEBUG] PCI: 00:00:02.0 subsystem <- 17aa/220e

[DEBUG] PCI: 00:00:02.0 cmd <- 03

[DEBUG] PCI: 00:00:03.0 subsystem <- 17aa/220e

[DEBUG] PCI: 00:00:03.0 cmd <- 02

[DEBUG] PCI: 00:00:04.0 cmd <- 02

[DEBUG] PCI: 00:00:14.0 subsystem <- 17aa/220e

[DEBUG] PCI: 00:00:14.0 cmd <- 102

[DEBUG] PCI: 00:00:16.0 subsystem <- 17aa/220e

[DEBUG] PCI: 00:00:16.0 cmd <- 02

[DEBUG] PCI: 00:00:19.0 subsystem <- 17aa/220e

[DEBUG] PCI: 00:00:19.0 cmd <- 103

[DEBUG] PCI: 00:00:1a.0 subsystem <- 17aa/220e

[DEBUG] PCI: 00:00:1a.0 cmd <- 106

[DEBUG] PCI: 00:00:1b.0 subsystem <- 17aa/220e

[DEBUG] PCI: 00:00:1b.0 cmd <- 102

[DEBUG] PCI: 00:00:1c.0 bridge ctrl <- 0013

[DEBUG] PCI: 00:00:1c.0 subsystem <- 17aa/220e

[DEBUG] PCI: 00:00:1c.0 cmd <- 06

[DEBUG] PCI: 00:00:1c.1 bridge ctrl <- 0013

[DEBUG] PCI: 00:00:1c.1 subsystem <- 17aa/220e

[DEBUG] PCI: 00:00:1c.1 cmd <- 00

[DEBUG] PCI: 00:00:1d.0 subsystem <- 17aa/220e

[DEBUG] PCI: 00:00:1d.0 cmd <- 106

[DEBUG] PCI: 00:00:1f.0 subsystem <- 17aa/220e

[DEBUG] PCI: 00:00:1f.0 cmd <- 107

[DEBUG] PCI: 00:00:1f.2 subsystem <- 17aa/220e

[DEBUG] PCI: 00:00:1f.2 cmd <- 103

[DEBUG] PCI: 00:00:1f.3 subsystem <- 17aa/220e

[DEBUG] PCI: 00:00:1f.3 cmd <- 103

[DEBUG] PCI: 00:02:00.0 cmd <- 02

[INFO ] done.

[DEBUG] BS: BS_DEV_ENABLE run times (exec / console): 0 / 159 ms

[INFO ] Initializing devices...

[DEBUG] CPU_CLUSTER: 0 init

[INFO ] LAPIC 0x0 in XAPIC mode.

[DEBUG] MTRR: Physical address space:

[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6

[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0

[DEBUG] 0x00000000000c0000 - 0x000000003fffffff size 0x3ff40000 type 6

[DEBUG] 0x0000000040000000 - 0x00000000dfffffff size 0xa0000000 type 0

[DEBUG] 0x00000000e0000000 - 0x00000000efffffff size 0x10000000 type 1

[DEBUG] 0x00000000f0000000 - 0x00000000ffffffff size 0x10000000 type 0

[DEBUG] 0x0000000100000000 - 0x000000013bdfffff size 0x3be00000 type 6

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 39 bits

[DEBUG] MTRR: default type WB/UC MTRR counts: 5/3.

[DEBUG] MTRR: UC selected as default type.

[DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000007fc0000000 type 6

[DEBUG] MTRR: 1 base 0x00000000e0000000 mask 0x0000007ff0000000 type 1

[DEBUG] MTRR: 2 base 0x0000000100000000 mask 0x0000007fc0000000 type 6



[DEBUG] MTRR check

[DEBUG] Fixed MTRRs : Enabled

[DEBUG] Variable MTRRs: Enabled



[DEBUG] Initializing VR config.

[DEBUG] CPU has 2 cores, 4 threads enabled.

[DEBUG] Setting up SMI for CPU

[INFO ] Will perform SMM setup.

[DEBUG] microcode: sig=0x306c3 pf=0x10 revision=0x28

[DEBUG] Starting cbfs_boot_device

[INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x80 size 0xf800 in mcache @0x3f7dd02c

[INFO ] CPU: Intel(R) Core(TM) i5-4300M CPU @ 2.60GHz.

[INFO ] LAPIC 0x0 in XAPIC mode.

[DEBUG] CPU: APIC: 00 enabled

[DEBUG] CPU: APIC: 01 enabled

[DEBUG] CPU: APIC: 02 enabled

[DEBUG] CPU: APIC: 03 enabled

[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

[DEBUG] Processing 16 relocs. Offset value of 0x00030000

[DEBUG] Attempting to start 3 APs

[DEBUG] Waiting for 10ms after sending INIT.

[DEBUG] Waiting for SIPI to complete...

[INFO ] LAPIC 0x1 in XAPIC mode.

[DEBUG] done.

[INFO ] AP: slot 1 apic_id 1, MCU rev: 0x00000028

[DEBUG] Waiting for SIPI to complete...

[DEBUG] done.

[INFO ] LAPIC 0x3 in XAPIC mode.

[INFO ] LAPIC 0x2 in XAPIC mode.

[INFO ] AP: slot 3 apic_id 3, MCU rev: 0x00000028

[INFO ] AP: slot 2 apic_id 2, MCU rev: 0x00000028

[DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1a0 memsize: 0x1a0

[DEBUG] Processing 9 relocs. Offset value of 0x00038000

[DEBUG] smm_module_setup_stub: stack_top = 0x3f801000

[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400

[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000

[DEBUG] SMM Module: stub loaded at 38000. Will call 0x3f6a002d

[DEBUG] Installing permanent SMM handler to 0x3f800000

[DEBUG] HANDLER [0x3fafb000-0x3faff46f]



[DEBUG] CPU 0

[DEBUG] ss0 [0x3fafac00-0x3fafafff]

[DEBUG] stub0 [0x3faf3000-0x3faf319f]



[DEBUG] CPU 1

[DEBUG] ss1 [0x3fafa800-0x3fafabff]

[DEBUG] stub1 [0x3faf2c00-0x3faf2d9f]



[DEBUG] CPU 2

[DEBUG] ss2 [0x3fafa400-0x3fafa7ff]

[DEBUG] stub2 [0x3faf2800-0x3faf299f]



[DEBUG] CPU 3

[DEBUG] ss3 [0x3fafa000-0x3fafa3ff]

[DEBUG] stub3 [0x3faf2400-0x3faf259f]



[DEBUG] stacks [0x3f800000-0x3f800fff]

[DEBUG] Loading module at 0x3fafb000 with entry 0x3fafbaba. filesize: 0x4318 memsize: 0x4470

[DEBUG] Processing 270 relocs. Offset value of 0x3fafb000

[DEBUG] FMAP: area SMMSTORE found @ 810000 (524288 bytes)

[DEBUG] flash size 0x2800000 bytes

[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x2800000

[ERROR] SF size 0x2800000 does not correspond to CONFIG_ROM_SIZE 0xc00000!!

[DEBUG] smm store: 8 # blocks with size 0x10000

[DEBUG] Loading module at 0x3faf3000 with entry 0x3faf3000. filesize: 0x1a0 memsize: 0x1a0

[DEBUG] Processing 9 relocs. Offset value of 0x3faf3000

[DEBUG] smm_module_setup_stub: stack_top = 0x3f801000

[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400

[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x300000

[DEBUG] SMM Module: placing smm entry code at 3faf2c00, cpu # 0x1

[DEBUG] SMM Module: placing smm entry code at 3faf2800, cpu # 0x2

[DEBUG] SMM Module: placing smm entry code at 3faf2400, cpu # 0x3

[DEBUG] SMM Module: stub loaded at 3faf3000. Will call 0x3fafbaba

[DEBUG] SMI_STS: MCSMI PM1 

[DEBUG] BM TMROF TCO_STS: INTRD_DET 

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x3faeb000, cpu = 0

[DEBUG] In relocation handler: CPU 0

[DEBUG] New SMBASE=0x3faeb000 IEDBASE=0x3fc00000

[DEBUG] Writing SMRR. base = 0x3f800006, mask=0xff800800

[DEBUG] Relocation complete.

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x3faeac00, cpu = 1

[DEBUG] In relocation handler: CPU 1

[DEBUG] New SMBASE=0x3faeac00 IEDBASE=0x3fc00000

[DEBUG] Writing SMRR. base = 0x3f800006, mask=0xff800800

[DEBUG] Relocation complete.

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x3faea800, cpu = 2

[DEBUG] In relocation handler: CPU 2

[DEBUG] New SMBASE=0x3faea800 IEDBASE=0x3fc00000

[DEBUG] Writing SMRR. base = 0x3f800006, mask=0xff800800

[DEBUG] Relocation complete.

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x3faea400, cpu = 3

[DEBUG] In relocation handler: CPU 3

[DEBUG] New SMBASE=0x3faea400 IEDBASE=0x3fc00000

[DEBUG] Writing SMRR. base = 0x3f800006, mask=0xff800800

[DEBUG] Relocation complete.

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] Initializing CPU #0

[DEBUG] CPU: vendor Intel device 306c3

[DEBUG] CPU: family 06, model 3c, stepping 03

[DEBUG] VMX status: enabled

[DEBUG] IA32_FEATURE_CONTROL status: locked

[DEBUG] cpu: energy policy set to 6

[INFO ] Turbo is available but hidden

[INFO ] Turbo is available and visible

[INFO ] CPU #0 initialized

[INFO ] Initializing CPU #1

[INFO ] Initializing CPU #3

[INFO ] Initializing CPU #2

[DEBUG] CPU: vendor Intel device 306c3

[DEBUG] CPU: family 06, model 3c, stepping 03

[DEBUG] CPU: vendor Intel device 306c3

[DEBUG] CPU: family 06, model 3c, stepping 03

[DEBUG] VMX status: enabled

[DEBUG] VMX status: enabled

[DEBUG] IA32_FEATURE_CONTROL status: locked

[DEBUG] IA32_FEATURE_CONTROL status: locked

[DEBUG] cpu: energy policy set to 6

[INFO ] CPU #3 initialized

[DEBUG] cpu: energy policy set to 6

[INFO ] CPU #2 initialized

[DEBUG] CPU: vendor Intel device 306c3

[DEBUG] CPU: family 06, model 3c, stepping 03

[DEBUG] VMX status: enabled

[DEBUG] IA32_FEATURE_CONTROL status: locked

[DEBUG] cpu: energy policy set to 6

[INFO ] CPU #1 initialized

[INFO ] bsp_do_flight_plan done after 475 msecs.

[DEBUG] CPU: frequency set to 3300

[DEBUG] Enabling SMIs.

[DEBUG] Locking SMM.

[DEBUG] MTRR: TEMPORARY Physical address space:

[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6

[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0

[DEBUG] 0x00000000000c0000 - 0x000000003fffffff size 0x3ff40000 type 6

[DEBUG] 0x0000000040000000 - 0x00000000ff7fffff size 0xbf800000 type 0

[DEBUG] 0x00000000ff800000 - 0x00000000ffffffff size 0x00800000 type 5

[DEBUG] 0x0000000100000000 - 0x000000013bdfffff size 0x3be00000 type 6

[DEBUG] MTRR: default type WB/UC MTRR counts: 10/3.

[DEBUG] MTRR: UC selected as default type.

[DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000007fc0000000 type 6

[DEBUG] MTRR: 1 base 0x00000000ff800000 mask 0x0000007fff800000 type 5

[DEBUG] MTRR: 2 base 0x0000000100000000 mask 0x0000007fc0000000 type 6

[DEBUG] CPU_CLUSTER: 0 init finished in 852 msecs

[DEBUG] PCI: 00:00:00.0 init

[DEBUG] Disabling PEG12.

[DEBUG] Disabling PEG10.

[DEBUG] Disabling "device 7".

[DEBUG] Set BIOS_RESET_CPL

[DEBUG] CPU TDP: 37 Watts

[DEBUG] PCI: 00:00:00.0 init finished in 16 msecs

[DEBUG] PCI: 00:00:01.1 init

[DEBUG] PCI: 00:00:01.1 init finished in 0 msecs

[DEBUG] PCI: 00:00:02.0 init

[DEBUG] Starting cbfs_boot_device

[INFO ] CBFS: Found 'vbt.bin' @0x4f480 size 0x582 in mcache @0x3f7dd1e4

[INFO ] Found a VBT of 4608 bytes

[INFO ] GMA: Found VBT in CBFS

[INFO ] GMA: Found valid VBT in CBFS

[DEBUG] GT Power Management Init

[INFO ] GMA: Setting backlight PWM frequency to 135MHz / 128 / 4794 = 220Hz

[INFO ] framebuffer_info: bytes_per_line: 5504, bits_per_pixel: 32

[INFO ] x_res x y_res: 1366 x 768, size: 4227072 at 0xe0000000

[DEBUG] GT Power Management Init (post VBIOS)

[DEBUG] PCI: 00:00:02.0 init finished in 368 msecs

[DEBUG] PCI: 00:00:03.0 init

[DEBUG] Mini-HD: base = 0xdfac4000

[DEBUG] azalia_audio: initializing codec #0...

[DEBUG] azalia_audio: - vendor/device id: 0x80862807

[DEBUG] azalia_audio: - verb size: 16

[DEBUG] azalia_audio: - verb loaded

[DEBUG] PCI: 00:00:03.0 init finished in 25 msecs

[DEBUG] PCI: 00:00:04.0 init

[DEBUG] PCI: 00:00:04.0 init finished in 0 msecs

[DEBUG] PCI: 00:00:14.0 init

[DEBUG] PCI: 00:00:14.0 init finished in 0 msecs

[DEBUG] PCI: 00:00:16.0 init

[DEBUG] ME: FW Partition Table : OK

[DEBUG] ME: Bringup Loader Failure : NO

[DEBUG] ME: Firmware Init Complete : NO

[DEBUG] ME: Manufacturing Mode : YES

[DEBUG] ME: Boot Options Present : NO

[DEBUG] ME: Update In Progress : NO

[DEBUG] ME: Current Working State : Initializing

[DEBUG] ME: Current Operation State : Bring up

[DEBUG] ME: Current Operation Mode : Debug

[DEBUG] ME: Error Code : No Error

[DEBUG] ME: Progress Phase : BUP Phase

[DEBUG] ME: Power Management Event : Clean Moff->Mx wake

[DEBUG] ME: Progress Phase State : 0x4d

[CRIT ] intel_me_path: mbp is not ready!

[NOTE ] ME: BIOS path: Error

[ERROR] ME: MBP not ready

[DEBUG] PCI: 00:00:16.0 init finished in 73 msecs

[DEBUG] PCI: 00:00:19.0 init

[DEBUG] PCI: 00:00:19.0 init finished in 0 msecs

[DEBUG] PCI: 00:00:1a.0 init

[DEBUG] EHCI: Setting up controller.. done.

[DEBUG] PCI: 00:00:1a.0 init finished in 4 msecs

[DEBUG] PCI: 00:00:1b.0 init

[DEBUG] Azalia: base = 0xdfac0000

[DEBUG] Azalia: codec_mask = 01

[DEBUG] azalia_audio: initializing codec #0...

[DEBUG] azalia_audio: - vendor/device id: 0x10ec0292

[DEBUG] azalia_audio: - verb size: 128

[DEBUG] azalia_audio: - verb loaded

[DEBUG] PCI: 00:00:1b.0 init finished in 33 msecs

[DEBUG] PCI: 00:00:1c.0 init

[DEBUG] Initializing PCH PCIe bridge.

[DEBUG] PCI: 00:00:1c.0 init finished in 4 msecs

[DEBUG] PCI: 00:00:1c.1 init

[DEBUG] Initializing PCH PCIe bridge.

[DEBUG] PCI: 00:00:1c.1 init finished in 4 msecs

[DEBUG] PCI: 00:00:1d.0 init

[DEBUG] EHCI: Setting up controller.. done.

[DEBUG] PCI: 00:00:1d.0 init finished in 4 msecs

[DEBUG] PCI: 00:00:1f.0 init

[DEBUG] pch: lpc_init

[DEBUG] IOAPIC: Initializing IOAPIC at fec00000

[DEBUG] IOAPIC: ID = 0x00

[DEBUG] IOAPIC: 24 interrupts

[DEBUG] IOAPIC: Clearing IOAPIC at fec00000

[DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00

[INFO ] Set power on after power failure.

[INFO ] NMI sources enabled.

[DEBUG] LynxPoint H PM init

[DEBUG] RTC: failed = 0x0

[DEBUG] RTC Init

[DEBUG] apm_control: Disabling ACPI.

[DEBUG] APMC done.

[DEBUG] PCI: 00:00:1f.0 init finished in 48 msecs

[DEBUG] PCI: 00:00:1f.2 init

[DEBUG] SATA: Initializing...

[DEBUG] SATA: Controller in AHCI mode.

[DEBUG] ABAR: 0xdfabe000

[DEBUG] PCI: 00:00:1f.2 init finished in 11 msecs

[DEBUG] PCI: 00:00:1f.3 init

[DEBUG] PCI: 00:00:1f.3 init finished in 0 msecs

[DEBUG] PCI: 00:02:00.0 init

[DEBUG] PCI: 00:02:00.0 init finished in 0 msecs

[DEBUG] PNP: 00ff.2 init

[DEBUG] PNP: 00ff.2 init finished in 0 msecs

[INFO ] Devices initialized

[DEBUG] BS: BS_DEV_INIT run times (exec / console): 548 / 1064 ms

[DEBUG] TPM: Startup

[DEBUG] TPM: command 0x99 returned 0x0

[DEBUG] TPM: Asserting physical presence

[DEBUG] TPM: command 0x4000000a returned 0x0

[DEBUG] TPM: command 0x65 returned 0x0

[DEBUG] TPM: flags disable=0, deactivated=0, nvlocked=1

[INFO ] TPM: setup succeeded

[DEBUG] BS: BS_DEV_INIT exit times (exec / console): 54 / 26 ms

[INFO ] Finalize devices...

[DEBUG] PCI: 00:00:00.0 final

[DEBUG] PCI: 00:00:16.0 final

[INFO ] ME: MBP cleared

[DEBUG] PCI: 00:00:1b.0 final

[DEBUG] PCI: 00:00:1f.0 final

[DEBUG] apm_control: Finalizing SMM.

[DEBUG] APMC done.

[INFO ] Devices finalized

[DEBUG] BS: BS_POST_DEVICE run times (exec / console): 1 / 29 ms

[DEBUG] Starting cbfs_boot_device

[INFO ] CBFS: Found 'fallback/dsdt.aml' @0x4bc00 size 0x3820 in mcache @0x3f7dd1b8

[DEBUG] Starting cbfs_boot_device

[WARN ] CBFS: 'fallback/slic' not found.

[INFO ] ACPI: Writing ACPI tables at 3f62d000.

[DEBUG] ACPI: * FACS

[DEBUG] ACPI: * FACP

[DEBUG] ACPI: added table 1/32, length now 44

[DEBUG] Found 1 CPU(s) with 4 core(s) each.

[DEBUG] PSS: 2601MHz power 37000 control 0x2100 status 0x2100

[DEBUG] PSS: 2600MHz power 37000 control 0x1a00 status 0x1a00

[DEBUG] PSS: 2000MHz power 26518 control 0x1400 status 0x1400

[DEBUG] PSS: 1600MHz power 20229 control 0x1000 status 0x1000

[DEBUG] PSS: 1200MHz power 14447 control 0xc00 status 0xc00

[DEBUG] PSS: 800MHz power 9143 control 0x800 status 0x800

[DEBUG] PSS: 2601MHz power 37000 control 0x2100 status 0x2100

[DEBUG] PSS: 2600MHz power 37000 control 0x1a00 status 0x1a00

[DEBUG] PSS: 2000MHz power 26518 control 0x1400 status 0x1400

[DEBUG] PSS: 1600MHz power 20229 control 0x1000 status 0x1000

[DEBUG] PSS: 1200MHz power 14447 control 0xc00 status 0xc00

[DEBUG] PSS: 800MHz power 9143 control 0x800 status 0x800

[DEBUG] PSS: 2601MHz power 37000 control 0x2100 status 0x2100

[DEBUG] PSS: 2600MHz power 37000 control 0x1a00 status 0x1a00

[DEBUG] PSS: 2000MHz power 26518 control 0x1400 status 0x1400

[DEBUG] PSS: 1600MHz power 20229 control 0x1000 status 0x1000

[DEBUG] PSS: 1200MHz power 14447 control 0xc00 status 0xc00

[DEBUG] PSS: 800MHz power 9143 control 0x800 status 0x800

[DEBUG] PSS: 2601MHz power 37000 control 0x2100 status 0x2100

[DEBUG] PSS: 2600MHz power 37000 control 0x1a00 status 0x1a00

[DEBUG] PSS: 2000MHz power 26518 control 0x1400 status 0x1400

[DEBUG] PSS: 1600MHz power 20229 control 0x1000 status 0x1000

[DEBUG] PSS: 1200MHz power 14447 control 0xc00 status 0xc00

[DEBUG] PSS: 800MHz power 9143 control 0x800 status 0x800

[DEBUG] Generating ACPI PIRQ entries

[INFO ] ACPI: * H8

[INFO ] H8: BDC detection not implemented. Assuming BDC installed

[INFO ] H8: WWAN detection not implemented. Assuming WWAN installed

[DEBUG] PPI: Pending OS request: 0xac2cfeb8 (0xdbc38566)

[DEBUG] PPI: OS response: CMD 0xb8f1662f = 0x5bfe9c63

[INFO ] \_SB_.PCI0.TPM: LPC TPM PNP: 0c31.0

[DEBUG] ACPI: * SSDT

[DEBUG] ACPI: added table 2/32, length now 52

[DEBUG] ACPI: * MCFG

[DEBUG] ACPI: added table 3/32, length now 60

[DEBUG] TCPA log created at 0x3f61d000

[DEBUG] ACPI: * TCPA

[DEBUG] ACPI: added table 4/32, length now 68

[DEBUG] IOAPIC: 24 interrupts

[DEBUG] ACPI: * APIC

[DEBUG] ACPI: added table 5/32, length now 76

[DEBUG] current = 3f632610

[DEBUG] ACPI: * DMAR

[DEBUG] ACPI: added table 6/32, length now 84

[DEBUG] ACPI: * HPET

[DEBUG] ACPI: added table 7/32, length now 92

[DEBUG] current = 3f632710

[INFO ] ACPI: done.

[DEBUG] ACPI tables: 22288 bytes.

[DEBUG] smbios_write_tables: 3f615000

[DEBUG] SMBIOS firmware version is set to coreboot_version: '25.12'

[INFO ] Create SMBIOS type 16

[INFO ] Create SMBIOS type 17

[INFO ] Create SMBIOS type 20

[DEBUG] SMBIOS tables: 909 bytes.

[DEBUG] Writing table forward entry at 0x00000500

[DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum b079

[DEBUG] Writing coreboot table at 0x3f651000

[DEBUG] Starting cbfs_boot_device

[INFO ] CBFS: Found 'cmos_layout.bin' @0x4fb80 size 0x510 in mcache @0x3f7dd23c

[DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

[DEBUG] 1. 0000000000001000-000000000009ffff: RAM

[DEBUG] 2. 00000000000a0000-00000000000f5fff: RESERVED

[DEBUG] 3. 00000000000f6000-00000000000f6fff: CONFIGURATION TABLES

[DEBUG] 4. 00000000000f7000-00000000000fffff: RESERVED

[DEBUG] 5. 0000000000100000-000000003f614fff: RAM

[DEBUG] 6. 000000003f615000-000000003f67dfff: CONFIGURATION TABLES

[DEBUG] 7. 000000003f67e000-000000003f7cbfff: RAMSTAGE

[DEBUG] 8. 000000003f7cc000-000000003f7fffff: CONFIGURATION TABLES

[DEBUG] 9. 000000003f800000-00000000441fffff: RESERVED

[DEBUG] 10. 00000000f0000000-00000000f3ffffff: RESERVED

[DEBUG] 11. 00000000fed10000-00000000fed19fff: RESERVED

[DEBUG] 12. 00000000fed40000-00000000fed44fff: RESERVED

[DEBUG] 13. 00000000fed80000-00000000fed84fff: RESERVED

[DEBUG] 14. 00000000fed90000-00000000fed91fff: RESERVED

[DEBUG] 15. 0000000100000000-000000013bdfffff: RAM

[DEBUG] FMAP: area SMMSTORE found @ 810000 (524288 bytes)

[DEBUG] smm store: 8 # blocks with size 0x10000

[DEBUG] Starting cbfs_boot_device

[DEBUG] Wrote coreboot table at: 0x3f651000, 0x9c8 bytes, checksum 8f58

[DEBUG] coreboot table: 2528 bytes.

[DEBUG] IMD ROOT 0. 0x3f7ff000 0x00001000

[DEBUG] IMD SMALL 1. 0x3f7fe000 0x00001000

[DEBUG] CONSOLE 2. 0x3f7de000 0x00020000

[DEBUG] RO MCACHE 3. 0x3f7dd000 0x00000318

[DEBUG] TIME STAMP 4. 0x3f7dc000 0x00000910

[DEBUG] MEM INFO 5. 0x3f7da000 0x000010c8

[DEBUG] AFTER CAR 6. 0x3f7cc000 0x0000e000

[DEBUG] RAMSTAGE 7. 0x3f67d000 0x0014f000

[DEBUG] SMM BACKUP 8. 0x3f66d000 0x00010000

[DEBUG] SMM COMBUFFER 9. 0x3f65d000 0x00010000

[DEBUG] IGD OPREGION10. 0x3f659000 0x00003200

[DEBUG] COREBOOT 11. 0x3f651000 0x00008000

[DEBUG] ACPI 12. 0x3f62d000 0x00024000

[DEBUG] TCPA TCGLOG13. 0x3f61d000 0x00010000

[DEBUG] SMBIOS 14. 0x3f615000 0x00008000

[DEBUG] IMD small region:

[DEBUG] IMD ROOT 0. 0x3f7fec00 0x00000400

[DEBUG] USBDEBUG 1. 0x3f7feba0 0x00000050

[DEBUG] FMAP 2. 0x3f7fea80 0x0000010a

[DEBUG] ROMSTAGE 3. 0x3f7fea60 0x00000004

[DEBUG] ROMSTG STCK 4. 0x3f7fe9a0 0x000000a8

[DEBUG] ACPI GNVS 5. 0x3f7fe8e0 0x000000b0

[DEBUG] TPM PPI 6. 0x3f7fe780 0x0000015a

[DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 1 / 573 ms

[DEBUG] Starting cbfs_boot_device

[INFO ] CBFS: Found 'fallback/payload' @0x56780 size 0x169919 in mcache @0x3f7dd2a8

[DEBUG] Checking segment from ROM address 0xffce77ac

[DEBUG] Checking segment from ROM address 0xffce77c8

[DEBUG] Loading segment from ROM address 0xffce77ac

[DEBUG] code (compression=1)

[DEBUG] New segment dstaddr 0x00800000 memsize 0x800000 srcaddr 0xffce77e4 filesize 0x1698e1

[DEBUG] Loading Segment: addr: 0x00800000 memsz: 0x0000000000800000 filesz: 0x00000000001698e1

[DEBUG] using LZMA

[DEBUG] Loading segment from ROM address 0xffce77c8

[DEBUG] Entry Point 0x00802677

[DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 132 / 61 ms

[DEBUG] ICH-NM10-PCH: watchdog disabled

[DEBUG] Jumping to boot code at 0x00802677(0x3f651000)

-- 0:ttyAMA0 -- time-stamp -- Jän/29/26 9:48:56 --