coreboot

[DEBUG] FMAP: Found "FLASH" version 1.1 at 0x1090000.

[DEBUG] FMAP: base = 0x0 size = 0x2000000 #areas = 10

[DEBUG] FMAP: area COREBOOT found @ 1091000 (16183296 bytes)

[INFO ] CBFS: mcache @0xfef96e00 built for 16 files, used 0x384 of 0x4000 bytes

[INFO ] CBFS: Found 'fallback/romstage' @0x80 size 0x14fd0 in mcache @0xfef96e2c

[INFO ] VB2:vb2_digest_init() 85968 bytes, hash algo 2, HW acceleration unsupported

[INFO ] TPM LOG: clearing the log

[DEBUG] FMAP: area FMAP found @ 1090000 (4096 bytes)

[INFO ] VB2:vb2_digest_init() 4096 bytes, hash algo 2, HW acceleration unsupported

[DEBUG] TPM: Digest of `FMAP: FMAP` to PCR 2 logged

[INFO ] CBFS: Found 'bootblock' @0xf66680 size 0x8940 in mcache @0xfef97140

[INFO ] VB2:vb2_digest_init() 35136 bytes, hash algo 2, HW acceleration unsupported

[DEBUG] TPM: Digest of `CBFS: bootblock` to PCR 2 logged

[DEBUG] CRTM initialized.

[DEBUG] TPM: Digest of `CBFS: fallback/romstage` to PCR 2 logged

[DEBUG] BS: bootblock times (exec / console): total (unknown) / 170 ms





[NOTE ] coreboot-4.20-588-g5515fb2e181-dirty-8.60 Tue Jul 04 08:08:51 UTC 2023 x86_32 romstage starting (log level: 7)...

[DEBUG] pm1_sts: 0000 pm1_en: 0000 pm1_cnt: 00000000

[DEBUG] gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

[DEBUG] gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

[DEBUG] gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

[DEBUG] gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

[DEBUG] TCO_STS: 0000 0000

[DEBUG] GEN_PMCON: a0014000 00000204

[DEBUG] GBLRST_CAUSE: 00000000 00000000

[DEBUG] HPR_CAUSE0: 00000000

[DEBUG] prev_sleep_state 5

[INFO ] TXT disabled successfully - Unlocked memory

[DEBUG] FMAP: area COREBOOT found @ 1091000 (16183296 bytes)

[INFO ] MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

[INFO ] CBFS: Found 'fspm.bin' @0xf8fc0 size 0xc0000 in mcache @0xfef97034

[INFO ] VB2:vb2_digest_init() 786432 bytes, hash algo 2, HW acceleration unsupported

[DEBUG] TPM: Digest of `CBFS: fspm.bin` to PCR 2 logged

[DEBUG] FMAP: area RW_MRC_CACHE found @ 1020000 (65536 bytes)

[NOTE ] MRC: no data in 'RW_MRC_CACHE'

[WARN ] EFIVARS: No Firmware Volume header present

[WARN ] EFIVARS: Failed to validate firmware header

[INFO ] SPD: module type is DDR4

[INFO ] SPD: module part number is F4-3200C22-32GRS

[INFO ] SPD: banks 16, ranks 2, rows 17, columns 10, density 16384 Mb

[INFO ] SPD: device width 8 bits, bus width 64 bits

[INFO ] SPD: module size is 32768 MB (per channel)

[INFO ] SPD: module type is DDR4

[INFO ] SPD: module part number is F4-3200C22-32GRS

[INFO ] SPD: banks 16, ranks 2, rows 17, columns 10, density 16384 Mb

[INFO ] SPD: device width 8 bits, bus width 64 bits

[INFO ] SPD: module size is 32768 MB (per channel)

[WARN ] EFIVARS: No Firmware Volume header present

[WARN ] EFIVARS: Failed to validate firmware header

[WARN ] EFIVARS: No Firmware Volume header present

[WARN ] EFIVARS: Failed to validate firmware header

[DEBUG] CBMEM:

[DEBUG] IMD: root @ 0x76fff000 254 entries.

[DEBUG] IMD: root @ 0x76ffec00 62 entries.

[DEBUG] External stage cache:

[DEBUG] IMD: root @ 0x7bbff000 254 entries.

[DEBUG] IMD: root @ 0x7bbfec00 62 entries.

[DEBUG] 2 DIMMs found

[DEBUG] SMM Memory Map

[DEBUG] SMRAM : 0x7b800000 0x800000

[DEBUG] Subregion 0: 0x7b800000 0x200000

[DEBUG] Subregion 1: 0x7ba00000 0x200000

[DEBUG] Subregion 2: 0x7bc00000 0x400000

[DEBUG] top_of_ram = 0x77000000

[DEBUG] ramtop_table invalid signature

[DEBUG] Updated the RAMTOP address into CMOS 0x77000000

[DEBUG] Normal boot

[INFO ] CBFS: Found 'fallback/postcar' @0x201700 size 0x10dd8 in mcache @0xfef970d0

[INFO ] VB2:vb2_digest_init() 69080 bytes, hash algo 2, HW acceleration unsupported

[DEBUG] TPM: Digest of `CBFS: fallback/postcar` to PCR 2 logged

[DEBUG] Loading module at 0x769e2000 with entry 0x769e2031. filesize: 0xfe20 memsize: 0x16240

[DEBUG] Processing 990 relocs. Offset value of 0x749e2000

[DEBUG] BS: romstage times (exec / console): total (unknown) / 332 ms





[NOTE ] coreboot-4.20-588-g5515fb2e181-dirty-8.60 Tue Jul 04 08:08:51 UTC 2023 x86_32 postcar starting (log level: 7)...

[DEBUG] Normal boot

[DEBUG] FMAP: area COREBOOT found @ 1091000 (16183296 bytes)

[INFO ] CBFS: Found 'fallback/ramstage' @0xcfdc0 size 0x23b6c in mcache @0x769fd10c

[INFO ] VB2:vb2_digest_init() 146284 bytes, hash algo 2, HW acceleration unsupported

[DEBUG] TPM: Digest of `CBFS: fallback/ramstage` to PCR 2 logged

[DEBUG] Loading module at 0x7696d000 with entry 0x7696d000. filesize: 0x4c990 memsize: 0x73850

[DEBUG] Processing 5408 relocs. Offset value of 0x7296d000

[DEBUG] BS: postcar times (exec / console): total (unknown) / 66 ms





[NOTE ] coreboot-4.20-588-g5515fb2e181-dirty-8.60 Tue Jul 04 08:08:51 UTC 2023 x86_32 ramstage starting (log level: 7)...

[DEBUG] Normal boot

[DEBUG] FMAP: area RW_MRC_CACHE found @ 1020000 (65536 bytes)

[DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'.

[NOTE ] MRC: no data in 'RW_MRC_CACHE'

[DEBUG] MRC: cache data 'RW_MRC_CACHE' needs update.

[DEBUG] MRC: updated 'RW_MRC_CACHE'.

[DEBUG] BS: BS_PRE_DEVICE entry times (exec / console): 108 / 29 ms

[DEBUG] FMAP: area COREBOOT found @ 1091000 (16183296 bytes)

[INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x15100 size 0xbac00 in mcache @0x769fd0ac

[INFO ] VB2:vb2_digest_init() 764928 bytes, hash algo 2, HW acceleration unsupported

[DEBUG] TPM: Digest of `CBFS: cpu_microcode_blob.bin` to PCR 2 logged

[DEBUG] microcode: sig=0x906a3 pf=0x80 revision=0x42a

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] CBFS: Found 'fsps.bin' @0x1b9000 size 0x4848d in mcache @0x769fd274

[INFO ] VB2:vb2_digest_init() 296077 bytes, hash algo 2, HW acceleration unsupported

[DEBUG] TPM: Digest of `CBFS: fsps.bin` to PCR 2 logged

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Setting up SMI for CPU

[DEBUG] IED base = 0x7bc00000

[DEBUG] IED size = 0x00400000

[INFO ] Will perform SMM setup.

[INFO ] CPU: 12th Gen Intel(R) Core(TM) i5-1240P.

[INFO ] LAPIC 0x0 in XAPIC mode.

[DEBUG] CPU: APIC: 00 enabled

[DEBUG] CPU: APIC: 01 enabled

[DEBUG] CPU: APIC: 02 enabled

[DEBUG] CPU: APIC: 03 enabled

[DEBUG] CPU: APIC: 04 enabled

[DEBUG] CPU: APIC: 05 enabled

[DEBUG] CPU: APIC: 06 enabled

[DEBUG] CPU: APIC: 07 enabled

[DEBUG] CPU: APIC: 08 enabled

[DEBUG] CPU: APIC: 09 enabled

[DEBUG] CPU: APIC: 0a enabled

[DEBUG] CPU: APIC: 0b enabled

[DEBUG] CPU: APIC: 0c enabled

[DEBUG] CPU: APIC: 0d enabled

[DEBUG] CPU: APIC: 0e enabled

[DEBUG] CPU: APIC: 0f enabled

[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

[DEBUG] Processing 16 relocs. Offset value of 0x00030000

[DEBUG] Attempting to start 15 APs

[DEBUG] Waiting for 10ms after sending INIT.

[DEBUG] Waiting for SIPI to complete...

[INFO ] LAPIC 0x26 in XAPIC mode.

[INFO ] LAPIC 0x2c in XAPIC mode.

[INFO ] LAPIC 0x22 in XAPIC mode.

[INFO ] LAPIC 0x19 in XAPIC mode.

[DEBUG] done.

[INFO ] LAPIC 0x1 in XAPIC mode.

[INFO ] AP: slot 1 apic_id 2c, MCU rev: 0x0000042a

[INFO ] AP: slot 15 apic_id 22, MCU rev: 0x0000042a

[INFO ] LAPIC 0x8 in XAPIC mode.

[INFO ] LAPIC 0x2e in XAPIC mode.

[INFO ] AP: slot 7 apic_id 1, MCU rev: 0x0000042a

[INFO ] LAPIC 0x10 in XAPIC mode.

[INFO ] LAPIC 0x11 in XAPIC mode.

[INFO ] AP: slot 11 apic_id 8, MCU rev: 0x0000042a

[DEBUG] Waiting for SIPI to complete...

[DEBUG] done.

[INFO ] LAPIC 0x28 in XAPIC mode.

[INFO ] AP: slot 5 apic_id 11, MCU rev: 0x0000042a

[INFO ] AP: slot 8 apic_id 10, MCU rev: 0x0000042a

[INFO ] AP: slot 4 apic_id 2e, MCU rev: 0x0000042a

[INFO ] AP: slot 13 apic_id 19, MCU rev: 0x0000042a

[INFO ] LAPIC 0x2a in XAPIC mode.

[INFO ] AP: slot 6 apic_id 28, MCU rev: 0x0000042a

[INFO ] AP: slot 9 apic_id 2a, MCU rev: 0x0000042a

[INFO ] LAPIC 0x9 in XAPIC mode.

[INFO ] LAPIC 0x18 in XAPIC mode.

[INFO ] LAPIC 0x24 in XAPIC mode.

[INFO ] AP: slot 2 apic_id 26, MCU rev: 0x0000042a

[INFO ] AP: slot 12 apic_id 18, MCU rev: 0x0000042a

[INFO ] LAPIC 0x20 in XAPIC mode.

[INFO ] AP: slot 10 apic_id 9, MCU rev: 0x0000042a

[INFO ] AP: slot 3 apic_id 20, MCU rev: 0x0000042a

[INFO ] AP: slot 14 apic_id 24, MCU rev: 0x0000042a

[DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1c0 memsize: 0x1c0

[DEBUG] Processing 9 relocs. Offset value of 0x00038000

[DEBUG] smm_module_setup_stub: stack_top = 0x7b808000

[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800

[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000

[DEBUG] SMM Module: stub loaded at 38000. Will call 0x76990bd5

[DEBUG] Installing permanent SMM handler to 0x7b800000

[DEBUG] HANDLER [0x7b9fc000-0x7b9ffb88]



[DEBUG] CPU 0

[DEBUG] ss0 [0x7b9fbc00-0x7b9fc000]

[DEBUG] stub0 [0x7b9f4000-0x7b9f41c0]



[DEBUG] CPU 1

[DEBUG] ss1 [0x7b9fb800-0x7b9fbc00]

[DEBUG] stub1 [0x7b9f3c00-0x7b9f3dc0]



[DEBUG] CPU 2

[DEBUG] ss2 [0x7b9fb400-0x7b9fb800]

[DEBUG] stub2 [0x7b9f3800-0x7b9f39c0]



[DEBUG] CPU 3

[DEBUG] ss3 [0x7b9fb000-0x7b9fb400]

[DEBUG] stub3 [0x7b9f3400-0x7b9f35c0]



[DEBUG] CPU 4

[DEBUG] ss4 [0x7b9fac00-0x7b9fb000]

[DEBUG] stub4 [0x7b9f3000-0x7b9f31c0]



[DEBUG] CPU 5

[DEBUG] ss5 [0x7b9fa800-0x7b9fac00]

[DEBUG] stub5 [0x7b9f2c00-0x7b9f2dc0]



[DEBUG] CPU 6

[DEBUG] ss6 [0x7b9fa400-0x7b9fa800]

[DEBUG] stub6 [0x7b9f2800-0x7b9f29c0]



[DEBUG] CPU 7

[DEBUG] ss7 [0x7b9fa000-0x7b9fa400]

[DEBUG] stub7 [0x7b9f2400-0x7b9f25c0]



[DEBUG] CPU 8

[DEBUG] ss8 [0x7b9f9c00-0x7b9fa000]

[DEBUG] stub8 [0x7b9f2000-0x7b9f21c0]



[DEBUG] CPU 9

[DEBUG] ss9 [0x7b9f9800-0x7b9f9c00]

[DEBUG] stub9 [0x7b9f1c00-0x7b9f1dc0]



[DEBUG] CPU 10

[DEBUG] ss10 [0x7b9f9400-0x7b9f9800]

[DEBUG] stub10 [0x7b9f1800-0x7b9f19c0]



[DEBUG] CPU 11

[DEBUG] ss11 [0x7b9f9000-0x7b9f9400]

[DEBUG] stub11 [0x7b9f1400-0x7b9f15c0]



[DEBUG] CPU 12

[DEBUG] ss12 [0x7b9f8c00-0x7b9f9000]

[DEBUG] stub12 [0x7b9f1000-0x7b9f11c0]



[DEBUG] CPU 13

[DEBUG] ss13 [0x7b9f8800-0x7b9f8c00]

[DEBUG] stub13 [0x7b9f0c00-0x7b9f0dc0]



[DEBUG] CPU 14

[DEBUG] ss14 [0x7b9f8400-0x7b9f8800]

[DEBUG] stub14 [0x7b9f0800-0x7b9f09c0]



[DEBUG] CPU 15

[DEBUG] ss15 [0x7b9f8000-0x7b9f8400]

[DEBUG] stub15 [0x7b9f0400-0x7b9f05c0]



[DEBUG] stacks [0x7b800000-0x7b808000]

[DEBUG] Loading module at 0x7b9fc000 with entry 0x7b9fcb0a. filesize: 0x3a48 memsize: 0x3b88

[DEBUG] Processing 228 relocs. Offset value of 0x7b9fc000

[DEBUG] Loading module at 0x7b9f4000 with entry 0x7b9f4000. filesize: 0x1c0 memsize: 0x1c0

[DEBUG] Processing 9 relocs. Offset value of 0x7b9f4000

[DEBUG] smm_module_setup_stub: stack_top = 0x7b808000

[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800

[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x200000

[DEBUG] SMM Module: placing smm entry code at 7b9f3c00, cpu # 0x1

[DEBUG] SMM Module: placing smm entry code at 7b9f3800, cpu # 0x2

[DEBUG] SMM Module: placing smm entry code at 7b9f3400, cpu # 0x3

[DEBUG] SMM Module: placing smm entry code at 7b9f3000, cpu # 0x4

[DEBUG] SMM Module: placing smm entry code at 7b9f2c00, cpu # 0x5

[DEBUG] SMM Module: placing smm entry code at 7b9f2800, cpu # 0x6

[DEBUG] SMM Module: placing smm entry code at 7b9f2400, cpu # 0x7

[DEBUG] SMM Module: placing smm entry code at 7b9f2000, cpu # 0x8

[DEBUG] SMM Module: placing smm entry code at 7b9f1c00, cpu # 0x9

[DEBUG] SMM Module: placing smm entry code at 7b9f1800, cpu # 0xa

[DEBUG] SMM Module: placing smm entry code at 7b9f1400, cpu # 0xb

[DEBUG] SMM Module: placing smm entry code at 7b9f1000, cpu # 0xc

[DEBUG] SMM Module: placing smm entry code at 7b9f0c00, cpu # 0xd

[DEBUG] SMM Module: placing smm entry code at 7b9f0800, cpu # 0xe

[DEBUG] SMM Module: placing smm entry code at 7b9f0400, cpu # 0xf

[DEBUG] SMM Module: stub loaded at 7b9f4000. Will call 0x7b9fcb0a

[DEBUG] Clearing SMI status registers

[DEBUG] SMI_STS: PM1 

[DEBUG] PM1_STS: TMROF 

[DEBUG] GPE0 STD STS: eSPI 

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ec000, cpu = 0

[DEBUG] In relocation handler: CPU 0

[DEBUG] New SMBASE=0x7b9ec000 IEDBASE=0x7bc00000

[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ea400, cpu = 7

[DEBUG] In relocation handler: CPU 7

[DEBUG] New SMBASE=0x7b9ea400 IEDBASE=0x7bc00000

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ebc00, cpu = 1

[DEBUG] In relocation handler: CPU 1

[DEBUG] New SMBASE=0x7b9ebc00 IEDBASE=0x7bc00000

[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e9000, cpu = 12

[DEBUG] In relocation handler: CPU 12

[DEBUG] New SMBASE=0x7b9e9000 IEDBASE=0x7bc00000

[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ea000, cpu = 8

[DEBUG] In relocation handler: CPU 8

[DEBUG] New SMBASE=0x7b9ea000 IEDBASE=0x7bc00000

[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9eb000, cpu = 4

[DEBUG] In relocation handler: CPU 4

[DEBUG] New SMBASE=0x7b9eb000 IEDBASE=0x7bc00000

[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9eac00, cpu = 5

[DEBUG] In relocation handler: CPU 5

[DEBUG] New SMBASE=0x7b9eac00 IEDBASE=0x7bc00000

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e9c00, cpu = 9

[DEBUG] In relocation handler: CPU 9

[DEBUG] New SMBASE=0x7b9e9c00 IEDBASE=0x7bc00000

[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ea800, cpu = 6

[DEBUG] In relocation handler: CPU 6

[DEBUG] New SMBASE=0x7b9ea800 IEDBASE=0x7bc00000

[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e9800, cpu = 10

[DEBUG] In relocation handler: CPU 10

[DEBUG] New SMBASE=0x7b9e9800 IEDBASE=0x7bc00000

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e9400, cpu = 11

[DEBUG] In relocation handler: CPU 11

[DEBUG] New SMBASE=0x7b9e9400 IEDBASE=0x7bc00000

[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e8c00, cpu = 13

[DEBUG] In relocation handler: CPU 13

[DEBUG] New SMBASE=0x7b9e8c00 IEDBASE=0x7bc00000

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9eb400, cpu = 3

[DEBUG] In relocation handler: CPU 3

[DEBUG] New SMBASE=0x7b9eb400 IEDBASE=0x7bc00000

[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e8400, cpu = 15

[DEBUG] In relocation handler: CPU 15

[DEBUG] New SMBASE=0x7b9e8400 IEDBASE=0x7bc00000

[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e8800, cpu = 14

[DEBUG] In relocation handler: CPU 14

[DEBUG] New SMBASE=0x7b9e8800 IEDBASE=0x7bc00000

[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9eb800, cpu = 2

[DEBUG] In relocation handler: CPU 2

[DEBUG] New SMBASE=0x7b9eb800 IEDBASE=0x7bc00000

[DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00

[DEBUG] Relocation complete.

[INFO ] Initializing CPU #0

[DEBUG] CPU: vendor Intel device 906a3

[DEBUG] CPU: family 06, model 9a, stepping 03

[DEBUG] Clearing out pending MCEs

[DEBUG] cpu: energy policy set to 7

[INFO ] Turbo is available but hidden

[INFO ] Turbo is available and visible

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] CPU #0 initialized

[INFO ] Initializing CPU #5

[INFO ] Initializing CPU #12

[INFO ] Initializing CPU #11

[INFO ] Initializing CPU #8

[INFO ] Initializing CPU #1

[INFO ] Initializing CPU #9

[INFO ] Initializing CPU #10

[INFO ] Initializing CPU #13

[DEBUG] CPU: vendor Intel device 906a3

[DEBUG] CPU: family 06, model 9a, stepping 03

[DEBUG] CPU: vendor Intel device 906a3

[DEBUG] CPU: family 06, model 9a, stepping 03

[INFO ] Initializing CPU #7

[DEBUG] CPU: vendor Intel device 906a3

[DEBUG] CPU: vendor Intel device 906a3

[DEBUG] CPU: family 06, model 9a, stepping 03

[INFO ] Initializing CPU #2

[DEBUG] Clearing out pending MCEs

[DEBUG] CPU: vendor Intel device 906a3

[DEBUG] CPU: family 06, model 9a, stepping 03

[DEBUG] CPU: vendor Intel device 906a3

[DEBUG] CPU: family 06, model 9a, stepping 03

[INFO ] Initializing CPU #14

[DEBUG] Clearing out pending MCEs

[INFO ] Initializing CPU #15

[DEBUG] CPU: vendor Intel device 906a3

[DEBUG] CPU: family 06, model 9a, stepping 03

[INFO ] Initializing CPU #4

[DEBUG] CPU: family 06, model 9a, stepping 03

[DEBUG] CPU: vendor Intel device 906a3

[DEBUG] CPU: family 06, model 9a, stepping 03

[DEBUG] Clearing out pending MCEs

[DEBUG] cpu: energy policy set to 7

[DEBUG] CPU: vendor Intel device 906a3

[DEBUG] CPU: family 06, model 9a, stepping 03

[DEBUG] Clearing out pending MCEs

[DEBUG] cpu: energy policy set to 7

[DEBUG] CPU: vendor Intel device 906a3

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] CPU #7 initialized

[DEBUG] Clearing out pending MCEs

[DEBUG] Clearing out pending MCEs

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] CPU #11 initialized

[INFO ] Initializing CPU #3

[DEBUG] cpu: energy policy set to 7

[DEBUG] Clearing out pending MCEs

[DEBUG] cpu: energy policy set to 7

[DEBUG] CPU: vendor Intel device 906a3

[DEBUG] CPU: family 06, model 9a, stepping 03

[DEBUG] cpu: energy policy set to 7

[DEBUG] Clearing out pending MCEs

[DEBUG] CPU: vendor Intel device 906a3

[DEBUG] CPU: family 06, model 9a, stepping 03

[DEBUG] Clearing out pending MCEs

[DEBUG] cpu: energy policy set to 7

[DEBUG] Clearing out pending MCEs

[DEBUG] cpu: energy policy set to 7

[INFO ] Initializing CPU #6

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] CPU #8 initialized

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] CPU #4 initialized

[DEBUG] cpu: energy policy set to 7

[DEBUG] cpu: energy policy set to 7

[DEBUG] cpu: energy policy set to 7

[DEBUG] Clearing out pending MCEs

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] CPU #13 initialized

[DEBUG] CPU: family 06, model 9a, stepping 03

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] CPU #5 initialized

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] CPU #9 initialized

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] CPU #1 initialized

[DEBUG] CPU: vendor Intel device 906a3

[DEBUG] CPU: family 06, model 9a, stepping 03

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] CPU #12 initialized

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] CPU #10 initialized

[DEBUG] Clearing out pending MCEs

[DEBUG] cpu: energy policy set to 7

[DEBUG] cpu: energy policy set to 7

[DEBUG] CPU: vendor Intel device 906a3

[DEBUG] CPU: family 06, model 9a, stepping 03

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] CPU #6 initialized

[DEBUG] Clearing out pending MCEs

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] CPU #14 initialized

[DEBUG] CPU: vendor Intel device 906a3

[DEBUG] CPU: family 06, model 9a, stepping 03

[DEBUG] Clearing out pending MCEs

[DEBUG] cpu: energy policy set to 7

[DEBUG] cpu: energy policy set to 7

[DEBUG] Clearing out pending MCEs

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] CPU #15 initialized

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] CPU #3 initialized

[DEBUG] cpu: energy policy set to 7

[INFO ] microcode: Update skipped, already up-to-date

[INFO ] CPU #2 initialized

[INFO ] bsp_do_flight_plan done after 1537 msecs.

[DEBUG] CPU: frequency set to 4400 MHz

[DEBUG] Enabling SMIs.

[DEBUG] BS: BS_DEV_INIT_CHIPS entry times (exec / console): 1176 / 754 ms

[ERROR] gpio_pad_reset_config_override: Logical to Chipset mapping not found

[WARN ] EFIVARS: No Firmware Volume header present

[WARN ] EFIVARS: Failed to validate firmware header

[INFO ] Turbo is available but hidden

[WARN ] EFIVARS: No Firmware Volume header present

[WARN ] EFIVARS: Failed to validate firmware header

[WARN ] EFIVARS: No Firmware Volume header present

[WARN ] EFIVARS: Failed to validate firmware header

[DEBUG] All HSPHY ports disabled, skipping HSPHY loading

[INFO ] CBFS: Found 'vbt.bin' @0xf8940 size 0x4fd in mcache @0x769fd204

[INFO ] VB2:vb2_digest_init() 1277 bytes, hash algo 2, HW acceleration unsupported

[DEBUG] TPM: Digest of `CBFS: vbt.bin` to PCR 2 logged

[INFO ] Found a VBT of 8704 bytes after decompression

[WARN ] EFIVARS: No Firmware Volume header present

[WARN ] EFIVARS: Failed to validate firmware header

[INFO ] PCI 1.0, PIN A, using IRQ #16

[INFO ] PCI 2.0, PIN A, using IRQ #17

[INFO ] PCI 4.0, PIN A, using IRQ #18

[INFO ] PCI 5.0, PIN A, using IRQ #16

[INFO ] PCI 6.0, PIN A, using IRQ #16

[INFO ] PCI 6.2, PIN C, using IRQ #18

[INFO ] PCI 7.0, PIN A, using IRQ #19

[INFO ] PCI 7.1, PIN B, using IRQ #20

[INFO ] PCI 7.2, PIN C, using IRQ #21

[INFO ] PCI 7.3, PIN D, using IRQ #22

[INFO ] PCI 8.0, PIN A, using IRQ #23

[INFO ] PCI D.0, PIN A, using IRQ #17

[INFO ] PCI D.1, PIN B, using IRQ #19

[INFO ] PCI 10.0, PIN A, using IRQ #24

[INFO ] PCI 10.1, PIN B, using IRQ #25

[INFO ] PCI 10.6, PIN C, using IRQ #20

[INFO ] PCI 10.7, PIN D, using IRQ #21

[INFO ] PCI 11.0, PIN A, using IRQ #26

[INFO ] PCI 11.1, PIN B, using IRQ #27

[INFO ] PCI 11.2, PIN C, using IRQ #28

[INFO ] PCI 11.3, PIN D, using IRQ #29

[INFO ] PCI 12.0, PIN A, using IRQ #30

[INFO ] PCI 12.6, PIN B, using IRQ #31

[INFO ] PCI 12.7, PIN C, using IRQ #22

[INFO ] PCI 13.0, PIN A, using IRQ #32

[INFO ] PCI 13.1, PIN B, using IRQ #33

[INFO ] PCI 13.2, PIN C, using IRQ #34

[INFO ] PCI 13.3, PIN D, using IRQ #35

[INFO ] PCI 14.0, PIN B, using IRQ #23

[INFO ] PCI 14.1, PIN A, using IRQ #36

[INFO ] PCI 14.3, PIN C, using IRQ #17

[INFO ] PCI 15.0, PIN A, using IRQ #37

[INFO ] PCI 15.1, PIN B, using IRQ #38

[INFO ] PCI 15.2, PIN C, using IRQ #39

[INFO ] PCI 15.3, PIN D, using IRQ #40

[INFO ] PCI 16.0, PIN A, using IRQ #18

[INFO ] PCI 16.1, PIN B, using IRQ #19

[INFO ] PCI 16.2, PIN C, using IRQ #20

[INFO ] PCI 16.3, PIN D, using IRQ #21

[INFO ] PCI 16.4, PIN A, using IRQ #18

[INFO ] PCI 16.5, PIN B, using IRQ #19

[INFO ] PCI 17.0, PIN A, using IRQ #22

[INFO ] PCI 19.0, PIN A, using IRQ #41

[INFO ] PCI 19.1, PIN B, using IRQ #42

[INFO ] PCI 19.2, PIN C, using IRQ #43

[INFO ] PCI 1C.0, PIN A, using IRQ #16

[INFO ] PCI 1C.1, PIN B, using IRQ #17

[INFO ] PCI 1C.2, PIN C, using IRQ #18

[INFO ] PCI 1C.3, PIN D, using IRQ #19

[INFO ] PCI 1C.4, PIN A, using IRQ #16

[INFO ] PCI 1C.5, PIN B, using IRQ #17

[INFO ] PCI 1C.6, PIN C, using IRQ #18

[INFO ] PCI 1C.7, PIN D, using IRQ #19

[INFO ] PCI 1D.0, PIN A, using IRQ #16

[INFO ] PCI 1D.1, PIN B, using IRQ #17

[INFO ] PCI 1D.2, PIN C, using IRQ #18

[INFO ] PCI 1D.3, PIN D, using IRQ #19

[INFO ] PCI 1E.0, PIN A, using IRQ #23

[INFO ] PCI 1E.1, PIN B, using IRQ #20

[INFO ] PCI 1E.2, PIN C, using IRQ #44

[INFO ] PCI 1E.3, PIN D, using IRQ #45

[INFO ] PCI 1F.3, PIN B, using IRQ #22

[INFO ] PCI 1F.4, PIN C, using IRQ #23

[INFO ] PCI 1F.6, PIN D, using IRQ #20

[INFO ] PCI 1F.7, PIN A, using IRQ #21

[INFO ] IRQ: Using dynamically assigned PCI IO-APIC IRQs

[WARN ] EFIVARS: No Firmware Volume header present

[WARN ] EFIVARS: Failed to validate firmware header

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[DEBUG] Detected 12 core, 16 thread CPU.

[INFO ] FSPS returned 0

[DEBUG] Display FSP Version Info HOB

[DEBUG] Reference Code - CPU = c.0.75.10

[DEBUG] uCode Version = 0.0.4.2a

[DEBUG] TXT ACM version = ff.ff.ff.ffff

[DEBUG] Reference Code - ME = c.0.75.10

[DEBUG] MEBx version = 0.0.0.0

[DEBUG] ME Firmware Version = Consumer SKU

[DEBUG] Reference Code - PCH = c.0.75.10

[DEBUG] PCH-CRID Status = Disabled

[DEBUG] PCH-CRID Original Value = ff.ff.ff.ffff

[DEBUG] PCH-CRID New Value = ff.ff.ff.ffff

[DEBUG] OPROM - RST - RAID = ff.ff.ff.ffff

[DEBUG] PCH Hsio Version = 4.0.0.0

[DEBUG] Reference Code - SA - System Agent = c.0.75.10

[DEBUG] Reference Code - MRC = 0.0.4.3c

[DEBUG] SA - PCIe Version = c.0.75.10

[DEBUG] SA-CRID Status = Disabled

[DEBUG] SA-CRID Original Value = 0.0.0.2

[DEBUG] SA-CRID New Value = 0.0.0.2

[DEBUG] OPROM - VBIOS = ff.ff.ff.ffff

[DEBUG] IO Manageability Engine FW Version = 22.0.c.0

[DEBUG] PHY Build Version = 0.0.0.0

[DEBUG] Thunderbolt(TM) FW Version = 0.0.0.0

[DEBUG] System Agent Manageability Engine FW Version = ff.ff.ff.ffff

[INFO ] Found PCIe Root Port #5 at PCI: 00:1c.0.

[INFO ] Remapping PCIe Root Port #5 from PCI: 00:1c.4 to new function number 0.

[NOTE ] pcie_rp_update_dev: Couldn't find PCIe Root Port #9 (originally PCI: 00:1d.0) which was enabled in devicetree, removing.

[DEBUG] BS: BS_DEV_INIT_CHIPS run times (exec / console): 214 / 944 ms

[INFO ] Enumerating buses...

[DEBUG] Root Device scanning...

[DEBUG] CPU_CLUSTER: 0 enabled

[DEBUG] DOMAIN: 0000 enabled

[DEBUG] DOMAIN: 0000 scanning...

[DEBUG] PCI: pci_scan_bus for bus 00

[DEBUG] PCI: 00:00.0 [8086/4621] enabled

[DEBUG] PCI: 00:02.0 [8086/46a6] enabled

[DEBUG] PCI: 00:08.0 [8086/464f] enabled

[DEBUG] PCI: 00:14.0 [8086/51ed] enabled

[DEBUG] PCI: 00:14.2 [8086/51ef] enabled

[DEBUG] PCI: 00:15.0 [8086/51e8] enabled

[WARN ] EFIVARS: No Firmware Volume header present

[WARN ] EFIVARS: Failed to validate firmware header

[DEBUG] PCI: 00:16.0 [8086/51e0] enabled

[INFO ] PCI: Static device PCI: 00:17.0 not found, disabling it.

[DEBUG] PCI: 00:1c.0 [8086/51bc] enabled

[DEBUG] PCI: 00:1e.0 [8086/51a8] enabled

[DEBUG] PCI: 00:1f.0 [8086/5182] enabled

[INFO ] PCI: Static device PCI: 00:1f.1 not found, disabling it.

[DEBUG] RTC Init

[WARN ] RTC: Clear requested zeroing cmos

[WARN ] EFIVARS: No Firmware Volume header present

[WARN ] EFIVARS: Failed to validate firmware header

[INFO ] Set power on after power failure.

[DEBUG] Disabling Deep S3

[DEBUG] Disabling Deep S3

[DEBUG] Disabling Deep S4

[DEBUG] Disabling Deep S4

[DEBUG] Disabling Deep S5

[DEBUG] Disabling Deep S5

[DEBUG] PCI: 00:1f.2 [0000/0000] hidden

[DEBUG] PCI: 00:1f.3 [8086/51c8] enabled

[DEBUG] PCI: 00:1f.4 [8086/51a3] enabled

[DEBUG] PCI: 00:1f.5 [8086/51a4] enabled

[DEBUG] GPIO: 0 enabled

[WARN ] PCI: Leftover static devices:

[WARN ] PCI: 00:01.0

[WARN ] PCI: 00:01.1

[WARN ] PCI: 00:04.0

[WARN ] PCI: 00:05.0

[WARN ] PCI: 00:06.0

[WARN ] PCI: 00:06.2

[WARN ] PCI: 00:09.0

[WARN ] PCI: 00:0a.0

[WARN ] PCI: 00:0d.0

[WARN ] PCI: 00:0d.1

[WARN ] PCI: 00:0d.2

[WARN ] PCI: 00:0d.3

[WARN ] PCI: 00:0e.0

[WARN ] PCI: 00:10.0

[WARN ] PCI: 00:10.1

[WARN ] PCI: 00:10.6

[WARN ] PCI: 00:10.7

[WARN ] PCI: 00:12.0

[WARN ] PCI: 00:12.6

[WARN ] PCI: 00:12.7

[WARN ] PCI: 00:13.0

[WARN ] PCI: 00:14.1

[WARN ] PCI: 00:14.3

[WARN ] PCI: 00:15.1

[WARN ] PCI: 00:15.2

[WARN ] PCI: 00:15.3

[WARN ] PCI: 00:16.1

[WARN ] PCI: 00:16.2

[WARN ] PCI: 00:16.3

[WARN ] PCI: 00:16.4

[WARN ] PCI: 00:16.5

[WARN ] PCI: 00:17.0

[WARN ] PCI: 00:19.0

[WARN ] PCI: 00:19.1

[WARN ] PCI: 00:19.2

[WARN ] PCI: 00:1a.0

[WARN ] PCI: 00:1e.1

[WARN ] PCI: 00:1e.2

[WARN ] PCI: 00:1e.3

[WARN ] PCI: 00:1f.1

[WARN ] PCI: 00:1f.6

[WARN ] PCI: 00:1f.7

[WARN ] PCI: Check your devicetree.cb.

[DEBUG] PCI: 00:02.0 scanning...

[DEBUG] scan_bus: bus PCI: 00:02.0 finished in 0 msecs

[DEBUG] PCI: 00:14.0 scanning...

[DEBUG] USB0 port 0 disabled

[DEBUG] scan_bus: bus PCI: 00:14.0 finished in 3 msecs

[DEBUG] PCI: 00:15.0 scanning...

[DEBUG] I2C: 00:2c enabled

[DEBUG] scan_bus: bus PCI: 00:15.0 finished in 3 msecs

[DEBUG] PCI: 00:1c.0 scanning...

[DEBUG] PCI: pci_scan_bus for bus 01

[DEBUG] PCI: 01:00.0 [8086/2725] enabled

[DEBUG] GENERIC: 0.0 enabled

[DEBUG] GENERIC: 0.0 enabled

[INFO ] PCIe: Common Clock Configuration already enabled

[INFO ] L1 Sub-State supported from root port 28

[INFO ] L1 Sub-State Support = 0xf

[INFO ] CommonModeRestoreTime = 0x28

[INFO ] Power On Value = 0x16, Power On Scale = 0x0

[INFO ] ASPM: Enabled L1

[INFO ] PCIe: Max_Payload_Size adjusted to 128

[INFO ] PCI: 01:00.0: Enabled LTR

[INFO ] PCI: 01:00.0: Programmed LTR max latencies

[DEBUG] scan_bus: bus PCI: 00:1c.0 finished in 63 msecs

[DEBUG] PCI: 00:1f.0 scanning...

[DEBUG] PNP: 0c31.0 enabled

[DEBUG] PNP: 004e.0 enabled

[DEBUG] PNP: 004e.1 disabled

[DEBUG] PNP: 004e.2 disabled

[DEBUG] PNP: 004e.4 disabled

[DEBUG] PNP: 004e.5 disabled

[DEBUG] PNP: 004e.6 enabled

[DEBUG] PNP: 004e.a disabled

[DEBUG] PNP: 004e.f disabled

[DEBUG] PNP: 004e.10 disabled

[DEBUG] PNP: 004e.11 disabled

[DEBUG] PNP: 004e.12 disabled

[DEBUG] PNP: 004e.13 disabled

[DEBUG] PNP: 004e.14 disabled

[DEBUG] PNP: 004e.17 disabled

[DEBUG] PNP: 004e.18 disabled

[DEBUG] PNP: 004e.19 disabled

[DEBUG] scan_bus: bus PCI: 00:1f.0 finished in 65 msecs

[DEBUG] PCI: 00:1f.2 scanning...

[DEBUG] scan_bus: bus PCI: 00:1f.2 finished in 0 msecs

[DEBUG] PCI: 00:1f.3 scanning...

[DEBUG] scan_bus: bus PCI: 00:1f.3 finished in 0 msecs

[DEBUG] PCI: 00:1f.4 scanning...

[DEBUG] scan_bus: bus PCI: 00:1f.4 finished in 0 msecs

[DEBUG] scan_bus: bus DOMAIN: 0000 finished in 523 msecs

[DEBUG] scan_bus: bus Root Device finished in 541 msecs

[INFO ] done

[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 9 / 549 ms

[INFO ] MRC: Could not find region 'UNIFIED_MRC_CACHE'

[DEBUG] FMAP: area RW_MRC_CACHE found @ 1020000 (65536 bytes)

[INFO ] MRC: NOT enabling PRR for 'RW_MRC_CACHE'.

[DEBUG] BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 19 ms

[DEBUG] found VGA at PCI: 00:02.0

[DEBUG] Setting up VGA for PCI: 00:02.0

[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

[INFO ] Allocating resources...

[INFO ] Reading resources...

[DEBUG] SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x00020000

[DEBUG] SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x00001000

[DEBUG] SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x00001000

[DEBUG] SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x00001000

[DEBUG] SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x00004000

[DEBUG] SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x00080000

[DEBUG] SA MMIO resource: TPM -> base = 0xfed40000, size = 0x00010000

[DEBUG] SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x00020000

[DEBUG] SA MMIO resource: APIC -> base = 0xfec00000, size = 0x00100000

[DEBUG] SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x02000000

[DEBUG] SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x00001000

[DEBUG] SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x00001000

[DEBUG] SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x00001000

[DEBUG] SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x00001000

[DEBUG] SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x00001000

[DEBUG] SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x00001000

[DEBUG] SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x00001000

[DEBUG] SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000

[DEBUG] SA MMIO resource: DSM -> base = 0x7c800000, size = 0x03c00000

[DEBUG] SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x00800000

[DEBUG] SA MMIO resource: GSM -> base = 0x7c000000, size = 0x00800000

[INFO ] Available memory above 4GB: 63484M

[ERROR] PNP: 004e.0 missing read_resources

[INFO ] Done reading resources.

[INFO ] === Resource allocator: DOMAIN: 0000 - Pass 1 (relative placement) ===

[DEBUG] PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff

[DEBUG] PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done

[DEBUG] PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

[DEBUG] PCI: 01:00.0 10 * [0x0 - 0x3fff] mem

[DEBUG] PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

[DEBUG] PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

[DEBUG] PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

[INFO ] === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

[DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 84 base 00000200 limit 000002ff io (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 88 base 00000380 limit 00000383 io (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 8c base 00000510 limit 00000513 io (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 90 base 00000080 limit 0000008f io (fixed)

[DEBUG] avoid_fixed_resources: PNP: 004e.6 60 base 00000060 limit 00000060 io (fixed)

[DEBUG] avoid_fixed_resources: PNP: 004e.6 62 base 00000064 limit 00000064 io (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

[INFO ] DOMAIN: 0000: Resource ranges:

[INFO ] * Base: 1000, Size: 800, Tag: 100

[INFO ] * Base: 1900, Size: d6a0, Tag: 100

[INFO ] * Base: efc0, Size: 1040, Tag: 100

[DEBUG] PCI: 00:02.0 20 * [0xffc0 - 0xffff] limit: ffff io

[DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

[DEBUG] DOMAIN: 0000 mem: base: 77000000 size: 0 align: 0 gran: 0 limit: dfffffff

[DEBUG] DOMAIN: 0000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 18 base 100000000 limit 107fbfffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 98 base fe0b0000 limit fe0bffff mem (fixed)

[DEBUG] avoid_fixed_resources: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:1f.2 10 base fe000000 limit fe00ffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:1f.5 00 base ff000000 limit ffffffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:1f.5 01 base f8000000 limit f9ffffff mem (fixed)

[INFO ] DOMAIN: 0000: Resource ranges:

[INFO ] * Base: 80400000, Size: 3fc00000, Tag: 200

[INFO ] * Base: d0000000, Size: 10000000, Tag: 200

[INFO ] * Base: 107fc00000, Size: 6f80400000, Tag: 200

[DEBUG] PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] limit: dfffffff prefmem

[DEBUG] PCI: 00:02.0 10 * [0xbf000000 - 0xbfffffff] limit: bfffffff mem

[DEBUG] PCI: 00:1c.0 20 * [0xbef00000 - 0xbeffffff] limit: beffffff mem

[DEBUG] PCI: 00:1f.3 20 * [0xbee00000 - 0xbeefffff] limit: beefffff mem

[DEBUG] PCI: 00:14.0 10 * [0xbedf0000 - 0xbedfffff] limit: bedfffff mem

[DEBUG] PCI: 00:14.2 10 * [0xbedec000 - 0xbedeffff] limit: bedeffff mem

[DEBUG] PCI: 00:1f.3 10 * [0xbede8000 - 0xbedebfff] limit: bedebfff mem

[DEBUG] PCI: 00:08.0 10 * [0xbede7000 - 0xbede7fff] limit: bede7fff mem

[DEBUG] PCI: 00:14.2 18 * [0xbede6000 - 0xbede6fff] limit: bede6fff mem

[DEBUG] PCI: 00:15.0 10 * [0xbede5000 - 0xbede5fff] limit: bede5fff mem

[DEBUG] PCI: 00:16.0 10 * [0xbede4000 - 0xbede4fff] limit: bede4fff mem

[DEBUG] PCI: 00:1e.0 18 * [0xbede3000 - 0xbede3fff] limit: bede3fff mem

[DEBUG] PCI: 00:1f.5 10 * [0xbede2000 - 0xbede2fff] limit: bede2fff mem

[DEBUG] PCI: 00:1f.4 10 * [0xbede1000 - 0xbede10ff] limit: bede10ff mem

[DEBUG] DOMAIN: 0000 mem: base: 77000000 size: 0 align: 0 gran: 0 limit: dfffffff done

[DEBUG] DOMAIN: 0000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff done

[DEBUG] PCI: 01:00.0 10 * [0xbef00000 - 0xbef03fff] limit: bef03fff mem

[INFO ] === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

[DEBUG] PCI: 00:02.0 10 <- [0x00000000bf000000 - 0x00000000bfffffff] size 0x01000000 gran 0x18 mem64

[DEBUG] PCI: 00:02.0 18 <- [0x00000000d0000000 - 0x00000000dfffffff] size 0x10000000 gran 0x1c prefmem64

[DEBUG] PCI: 00:02.0 20 <- [0x000000000000ffc0 - 0x000000000000ffff] size 0x00000040 gran 0x06 io

[DEBUG] PCI: 00:08.0 10 <- [0x00000000bede7000 - 0x00000000bede7fff] size 0x00001000 gran 0x0c mem64

[DEBUG] PCI: 00:14.0 10 <- [0x00000000bedf0000 - 0x00000000bedfffff] size 0x00010000 gran 0x10 mem64

[DEBUG] PCI: 00:14.2 10 <- [0x00000000bedec000 - 0x00000000bedeffff] size 0x00004000 gran 0x0e mem64

[DEBUG] PCI: 00:14.2 18 <- [0x00000000bede6000 - 0x00000000bede6fff] size 0x00001000 gran 0x0c mem64

[DEBUG] PCI: 00:15.0 10 <- [0x00000000bede5000 - 0x00000000bede5fff] size 0x00001000 gran 0x0c mem64

[DEBUG] PCI: 00:16.0 10 <- [0x00000000bede4000 - 0x00000000bede4fff] size 0x00001000 gran 0x0c mem64

[DEBUG] PCI: 00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 01 io

[DEBUG] PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

[DEBUG] PCI: 00:1c.0 20 <- [0x00000000bef00000 - 0x00000000beffffff] size 0x00100000 gran 0x14 bus 01 mem

[DEBUG] PCI: 01:00.0 10 <- [0x00000000bef00000 - 0x00000000bef03fff] size 0x00004000 gran 0x0e mem64

[DEBUG] PCI: 00:1e.0 18 <- [0x00000000bede3000 - 0x00000000bede3fff] size 0x00001000 gran 0x0c mem64

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[DEBUG] LPC: enabling default decode range LPC_IOE_KBC_60_64

[DEBUG] LPC: enabling default decode range LPC_IOE_KBC_60_64

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[ERROR] LPC IO decode base 0!

[DEBUG] PCI: 00:1f.3 10 <- [0x00000000bede8000 - 0x00000000bedebfff] size 0x00004000 gran 0x0e mem64

[DEBUG] PCI: 00:1f.3 20 <- [0x00000000bee00000 - 0x00000000beefffff] size 0x00100000 gran 0x14 mem64

[DEBUG] PCI: 00:1f.4 10 <- [0x00000000bede1000 - 0x00000000bede10ff] size 0x00000100 gran 0x08 mem64

[DEBUG] PCI: 00:1f.5 10 <- [0x00000000bede2000 - 0x00000000bede2fff] size 0x00001000 gran 0x0c mem

[INFO ] Done setting resources.

[INFO ] Done allocating resources.

[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 3 / 1236 ms

[INFO ] coreboot skipped calling FSP notify phase: 00000020.

[DEBUG] BS: BS_DEV_ENABLE entry times (exec / console): 0 / 7 ms

[INFO ] Enabling resources...

[DEBUG] PCI: 00:00.0 subsystem <- 8086/4621

[DEBUG] PCI: 00:00.0 cmd <- 06

[DEBUG] PCI: 00:02.0 subsystem <- 8086/46a6

[DEBUG] PCI: 00:02.0 cmd <- 03

[DEBUG] PCI: 00:08.0 subsystem <- 8086/464f

[DEBUG] PCI: 00:08.0 cmd <- 06

[DEBUG] PCI: 00:14.0 subsystem <- 8086/51ed

[DEBUG] PCI: 00:14.0 cmd <- 02

[DEBUG] PCI: 00:14.2 subsystem <- 8086/51ef

[DEBUG] PCI: 00:14.2 cmd <- 02

[DEBUG] PCI: 00:15.0 subsystem <- 8086/51e8

[DEBUG] PCI: 00:15.0 cmd <- 02

[DEBUG] PCI: 00:16.0 subsystem <- 8086/51e0

[DEBUG] PCI: 00:16.0 cmd <- 02

[DEBUG] PCI: 00:1c.0 bridge ctrl <- 0013

[DEBUG] PCI: 00:1c.0 subsystem <- 8086/51bc

[DEBUG] PCI: 00:1c.0 cmd <- 06

[DEBUG] PCI: 00:1e.0 subsystem <- 8086/51a8

[DEBUG] PCI: 00:1e.0 cmd <- 06

[DEBUG] PCI: 00:1f.0 subsystem <- 8086/5182

[DEBUG] PCI: 00:1f.0 cmd <- 407

[DEBUG] PCI: 00:1f.3 subsystem <- 8086/51c8

[DEBUG] PCI: 00:1f.3 cmd <- 02

[DEBUG] PCI: 00:1f.4 subsystem <- 8086/51a3

[DEBUG] PCI: 00:1f.4 cmd <- 03

[DEBUG] PCI: 00:1f.5 subsystem <- 8086/51a4

[DEBUG] PCI: 00:1f.5 cmd <- 406

[DEBUG] PCI: 01:00.0 cmd <- 02

[INFO ] done.

[DEBUG] BS: BS_DEV_ENABLE run times (exec / console): 1 / 135 ms

[DEBUG] ME: Version: Unavailable

[DEBUG] BS: BS_DEV_ENABLE exit times (exec / console): 0 / 4 ms

[INFO ] Initializing devices...

[DEBUG] PCI: 00:00.0 init

[INFO ] CPU TDP = 28 Watts

[INFO ] CPU PL1 = 15 Watts

[INFO ] CPU PL2 = 15 Watts

[INFO ] CPU PL4 = 90 Watts

[DEBUG] PCI: 00:00.0 init finished in 14 msecs

[DEBUG] PCI: 00:02.0 init

[INFO ] GMA: Found VBT in CBFS

[INFO ] GMA: Found valid VBT in CBFS

[INFO ] framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

[INFO ] x_res x y_res: 1920 x 1080, size: 8294400 at 0xd0000000

[DEBUG] PCI: 00:02.0 init finished in 25 msecs

[DEBUG] PCI: 00:08.0 init

[DEBUG] PCI: 00:08.0 init finished in 0 msecs

[DEBUG] PCI: 00:14.0 init

[DEBUG] PCI: 00:14.0 init finished in 0 msecs

[DEBUG] PCI: 00:14.2 init

[DEBUG] PCI: 00:14.2 init finished in 0 msecs

[DEBUG] PCI: 00:15.0 init

[DEBUG] I2C bus 0 version 0x3230302a

[INFO ] DW I2C bus 0 at 0xbede5000 (400 KHz)

[DEBUG] PCI: 00:15.0 init finished in 9 msecs

[DEBUG] PCI: 00:16.0 init

[DEBUG] PCI: 00:16.0 init finished in 0 msecs

[DEBUG] PCI: 00:1c.0 init

[DEBUG] Initializing PCH PCIe bridge.

[DEBUG] PCI: 00:1c.0 init finished in 4 msecs

[DEBUG] PCI: 00:1f.0 init

[DEBUG] IOAPIC: Initializing IOAPIC at 0xfec00000

[DEBUG] IOAPIC: ID = 0x00

[DEBUG] IOAPIC: 120 interrupts

[DEBUG] IOAPIC: Clearing IOAPIC at 0xfec00000

[DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00

[DEBUG] PCI: 00:1f.0 init finished in 25 msecs

[DEBUG] PCI: 00:1f.2 init

[DEBUG] apm_control: Disabling ACPI.

[DEBUG] APMC done.

[DEBUG] PCI: 00:1f.2 init finished in 7 msecs

[DEBUG] PCI: 00:1f.3 init

[DEBUG] azalia_audio: base = 0xbede8000

[DEBUG] azalia_audio: codec_mask = 01

[DEBUG] azalia_audio: Initializing codec #0

[DEBUG] azalia_audio: codec viddid: 10ec0269

[DEBUG] azalia_audio: verb_size: 68

[DEBUG] azalia_audio: verb loaded.

[DEBUG] CMOS: viddid = 10ec0269

[WARN ] EFIVARS: No Firmware Volume header present

[WARN ] EFIVARS: Failed to validate firmware header

[DEBUG] PCI: 00:1f.3 init finished in 51 msecs

[DEBUG] PCI: 00:1f.4 init

[DEBUG] PCI: 00:1f.4 init finished in 0 msecs

[DEBUG] PCI: 01:00.0 init

[DEBUG] PCI: 01:00.0 init finished in 0 msecs

[DEBUG] PNP: 004e.6 init

[WARN ] EFIVARS: No Firmware Volume header present

[WARN ] EFIVARS: Failed to validate firmware header

[WARN ] EFIVARS: No Firmware Volume header present

[WARN ] EFIVARS: Failed to validate firmware header

[WARN ] EFIVARS: No Firmware Volume header present

[WARN ] EFIVARS: Failed to validate firmware header

[WARN ] EFIVARS: No Firmware Volume header present

[WARN ] EFIVARS: Failed to validate firmware header

[DEBUG] PNP: 004e.6 init finished in 68 msecs

[INFO ] Devices initialized

[DEBUG] BS: BS_DEV_INIT run times (exec / console): 29 / 312 ms

[DEBUG] FMAP: area SMMSTORE found @ 1030000 (262144 bytes)

[DEBUG] smm store: 4 # blocks with size 0x10000

[INFO ] SMMSTORE: Setting up SMI handler

[INFO ] Found TPM SLB9670 TT 2.0 by Infineon

[INFO ] tlcl_send_startup: Startup return code is 0

[DEBUG] TPM: Write digests cached in TPM log to PCR

[DEBUG] TPM: Write digest for FMAP: FMAP into PCR 2

[INFO ] tlcl_extend: response is 0

[DEBUG] TPM: Write digest for CBFS: bootblock into PCR 2

[INFO ] tlcl_extend: response is 0

[DEBUG] TPM: Write digest for CBFS: fallback/romstage into PCR 2

[INFO ] tlcl_extend: response is 0

[DEBUG] TPM: Write digest for CBFS: fspm.bin into PCR 2

[INFO ] tlcl_extend: response is 0

[DEBUG] TPM: Write digest for CBFS: fallback/postcar into PCR 2

[INFO ] tlcl_extend: response is 0

[DEBUG] TPM: Write digest for CBFS: fallback/ramstage into PCR 2

[INFO ] tlcl_extend: response is 0

[DEBUG] TPM: Write digest for CBFS: cpu_microcode_blob.bin into PCR 2

[INFO ] tlcl_extend: response is 0

[DEBUG] TPM: Write digest for CBFS: fsps.bin into PCR 2

[INFO ] tlcl_extend: response is 0

[DEBUG] TPM: Write digest for CBFS: vbt.bin into PCR 2

[INFO ] tlcl_extend: response is 0

[INFO ] TPM: setup succeeded

[DEBUG] BS: BS_DEV_INIT exit times (exec / console): 39 / 137 ms

[INFO ] Finalize devices...

[DEBUG] PCI: 00:02.0 final

[DEBUG] PCI: 00:16.0 final

[DEBUG] PCI: 00:1f.2 final

[DEBUG] PCI: 00:1f.4 final

[INFO ] Devices finalized

[DEBUG] BS: BS_POST_DEVICE run times (exec / console): 0 / 22 ms

[DEBUG] ME: HFSTS1 : 0x80032044

[DEBUG] ME: HFSTS2 : 0x30284106

[DEBUG] ME: HFSTS3 : 0x00000020

[DEBUG] ME: HFSTS4 : 0x00004000

[DEBUG] ME: HFSTS5 : 0x00000000

[DEBUG] ME: HFSTS6 : 0x40200002

[DEBUG] ME: Manufacturing Mode : NO

[DEBUG] ME: SPI Protection Mode Enabled : YES

[DEBUG] ME: FW Partition Table : OK

[DEBUG] ME: Bringup Loader Failure : NO

[DEBUG] ME: Firmware Init Complete : NO

[DEBUG] ME: Boot Options Present : NO

[DEBUG] ME: Update In Progress : NO

[DEBUG] ME: D0i3 Support : YES

[DEBUG] ME: Low Power State Enabled : NO

[DEBUG] ME: CPU Replaced : NO

[DEBUG] ME: CPU Replacement Valid : YES

[DEBUG] ME: Current Working State : 4

[DEBUG] ME: Current Operation State : 1

[DEBUG] ME: Current Operation Mode : 3

[DEBUG] ME: Error Code : 2

[DEBUG] ME: FPFs Committed : YES

[DEBUG] ME: Enhanced Debug Mode : NO

[DEBUG] ME: CPU Debug Disabled : YES

[DEBUG] ME: TXT Support : NO

[DEBUG] ME: Manufacturing Vars Locked : YES

[DEBUG] BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 144 ms

[INFO ] CBFS: Found 'fallback/dsdt.aml' @0xf4f80 size 0x3955 in mcache @0x769fd1d8

[INFO ] VB2:vb2_digest_init() 14677 bytes, hash algo 2, HW acceleration unsupported

[DEBUG] TPM: Extending digest for `CBFS: fallback/dsdt.aml` into PCR 2

[INFO ] tlcl_extend: response is 0

[DEBUG] TPM: Digest of `CBFS: fallback/dsdt.aml` to PCR 2 measured

[WARN ] CBFS: 'fallback/slic' not found.

[INFO ] ACPI: Writing ACPI tables at 768bc000.

[DEBUG] ACPI: * FACS

[DEBUG] ACPI: * DSDT

[DEBUG] ACPI: added table 1/32, length now 40

[DEBUG] SCI is IRQ 9, GSI 9

[DEBUG] ACPI: * FACP

[DEBUG] ACPI: added table 2/32, length now 44

[DEBUG] Found 1 CPU(s) with 12/16 physical/logical core(s) each.

[DEBUG] PSS: 1700MHz power 28000 control 0x1100 status 0x1100

[DEBUG] PSS: 1600MHz power 26031 control 0x1000 status 0x1000

[DEBUG] PSS: 1400MHz power 22260 control 0xe00 status 0xe00

[DEBUG] PSS: 1200MHz power 18614 control 0xc00 status 0xc00

[DEBUG] PSS: 1000MHz power 15163 control 0xa00 status 0xa00

[DEBUG] PSS: 800MHz power 11844 control 0x800 status 0x800

[DEBUG] PSS: 600MHz power 8653 control 0x600 status 0x600

[DEBUG] PSS: 400MHz power 5639 control 0x400 status 0x400

[DEBUG] PSS: 1700MHz power 28000 control 0x1100 status 0x1100

[DEBUG] PSS: 1600MHz power 26031 control 0x1000 status 0x1000

[DEBUG] PSS: 1400MHz power 22260 control 0xe00 status 0xe00

[DEBUG] PSS: 1200MHz power 18614 control 0xc00 status 0xc00

[DEBUG] PSS: 1000MHz power 15163 control 0xa00 status 0xa00

[DEBUG] PSS: 800MHz power 11844 control 0x800 status 0x800

[DEBUG] PSS: 600MHz power 8653 control 0x600 status 0x600

[DEBUG] PSS: 400MHz power 5639 control 0x400 status 0x400

[DEBUG] PSS: 1700MHz power 28000 control 0x1100 status 0x1100

[DEBUG] PSS: 1600MHz power 26031 control 0x1000 status 0x1000

[DEBUG] PSS: 1400MHz power 22260 control 0xe00 status 0xe00

[DEBUG] PSS: 1200MHz power 18614 control 0xc00 status 0xc00

[DEBUG] PSS: 1000MHz power 15163 control 0xa00 status 0xa00

[DEBUG] PSS: 800MHz power 11844 control 0x800 status 0x800

[DEBUG] PSS: 600MHz power 8653 control 0x600 status 0x600

[DEBUG] PSS: 400MHz power 5639 control 0x400 status 0x400

[DEBUG] PSS: 1700MHz power 28000 control 0x1100 status 0x1100

[DEBUG] PSS: 1600MHz power 26031 control 0x1000 status 0x1000

[DEBUG] PSS: 1400MHz power 22260 control 0xe00 status 0xe00

[DEBUG] PSS: 1200MHz power 18614 control 0xc00 status 0xc00

[DEBUG] PSS: 1000MHz power 15163 control 0xa00 status 0xa00

[DEBUG] PSS: 800MHz power 11844 control 0x800 status 0x800

[DEBUG] PSS: 600MHz power 8653 control 0x600 status 0x600

[DEBUG] PSS: 400MHz power 5639 control 0x400 status 0x400

[DEBUG] PSS: 1700MHz power 28000 control 0x1100 status 0x1100

[DEBUG] PSS: 1600MHz power 26031 control 0x1000 status 0x1000

[DEBUG] PSS: 1400MHz power 22260 control 0xe00 status 0xe00

[DEBUG] PSS: 1200MHz power 18614 control 0xc00 status 0xc00

[DEBUG] PSS: 1000MHz power 15163 control 0xa00 status 0xa00

[DEBUG] PSS: 800MHz power 11844 control 0x800 status 0x800

[DEBUG] PSS: 600MHz power 8653 control 0x600 status 0x600

[DEBUG] PSS: 400MHz power 5639 control 0x400 status 0x400

[DEBUG] PSS: 1700MHz power 28000 control 0x1100 status 0x1100

[DEBUG] PSS: 1600MHz power 26031 control 0x1000 status 0x1000

[DEBUG] PSS: 1400MHz power 22260 control 0xe00 status 0xe00

[DEBUG] PSS: 1200MHz power 18614 control 0xc00 status 0xc00

[DEBUG] PSS: 1000MHz power 15163 control 0xa00 status 0xa00

[DEBUG] PSS: 800MHz power 11844 control 0x800 status 0x800

[DEBUG] PSS: 600MHz power 8653 control 0x600 status 0x600

[DEBUG] PSS: 400MHz power 5639 control 0x400 status 0x400

[DEBUG] PSS: 1700MHz power 28000 control 0x1100 status 0x1100

[DEBUG] PSS: 1600MHz power 26031 control 0x1000 status 0x1000

[DEBUG] PSS: 1400MHz power 22260 control 0xe00 status 0xe00

[DEBUG] PSS: 1200MHz power 18614 control 0xc00 status 0xc00

[DEBUG] PSS: 1000MHz power 15163 control 0xa00 status 0xa00

[DEBUG] PSS: 800MHz power 11844 control 0x800 status 0x800

[DEBUG] PSS: 600MHz power 8653 control 0x600 status 0x600

[DEBUG] PSS: 400MHz power 5639 control 0x400 status 0x400

[DEBUG] PSS: 1700MHz power 28000 control 0x1100 status 0x1100

[DEBUG] PSS: 1600MHz power 26031 control 0x1000 status 0x1000

[DEBUG] PSS: 1400MHz power 22260 control 0xe00 status 0xe00

[DEBUG] PSS: 1200MHz power 18614 control 0xc00 status 0xc00

[DEBUG] PSS: 1000MHz power 15163 control 0xa00 status 0xa00

[DEBUG] PSS: 800MHz power 11844 control 0x800 status 0x800

[DEBUG] PSS: 600MHz power 8653 control 0x600 status 0x600

[DEBUG] PSS: 400MHz power 5639 control 0x400 status 0x400

[DEBUG] PSS: 1700MHz power 28000 control 0x1100 status 0x1100

[DEBUG] PSS: 1600MHz power 26031 control 0x1000 status 0x1000

[DEBUG] PSS: 1400MHz power 22260 control 0xe00 status 0xe00

[DEBUG] PSS: 1200MHz power 18614 control 0xc00 status 0xc00

[DEBUG] PSS: 1000MHz power 15163 control 0xa00 status 0xa00

[DEBUG] PSS: 800MHz power 11844 control 0x800 status 0x800

[DEBUG] PSS: 600MHz power 8653 control 0x600 status 0x600

[DEBUG] PSS: 400MHz power 5639 control 0x400 status 0x400

[DEBUG] PSS: 1700MHz power 28000 control 0x1100 status 0x1100

[DEBUG] PSS: 1600MHz power 26031 control 0x1000 status 0x1000

[DEBUG] PSS: 1400MHz power 22260 control 0xe00 status 0xe00

[DEBUG] PSS: 1200MHz power 18614 control 0xc00 status 0xc00

[DEBUG] PSS: 1000MHz power 15163 control 0xa00 status 0xa00

[DEBUG] PSS: 800MHz power 11844 control 0x800 status 0x800

[DEBUG] PSS: 600MHz power 8653 control 0x600 status 0x600

[DEBUG] PSS: 400MHz power 5639 control 0x400 status 0x400

[DEBUG] PSS: 1700MHz power 28000 control 0x1100 status 0x1100

[DEBUG] PSS: 1600MHz power 26031 control 0x1000 status 0x1000

[DEBUG] PSS: 1400MHz power 22260 control 0xe00 status 0xe00

[DEBUG] PSS: 1200MHz power 18614 control 0xc00 status 0xc00

[DEBUG] PSS: 1000MHz power 15163 control 0xa00 status 0xa00

[DEBUG] PSS: 800MHz power 11844 control 0x800 status 0x800

[DEBUG] PSS: 600MHz power 8653 control 0x600 status 0x600

[DEBUG] PSS: 400MHz power 5639 control 0x400 status 0x400

[DEBUG] PSS: 1700MHz power 28000 control 0x1100 status 0x1100

[DEBUG] PSS: 1600MHz power 26031 control 0x1000 status 0x1000

[DEBUG] PSS: 1400MHz power 22260 control 0xe00 status 0xe00

[DEBUG] PSS: 1200MHz power 18614 control 0xc00 status 0xc00

[DEBUG] PSS: 1000MHz power 15163 control 0xa00 status 0xa00

[DEBUG] PSS: 800MHz power 11844 control 0x800 status 0x800

[DEBUG] PSS: 600MHz power 8653 control 0x600 status 0x600

[DEBUG] PSS: 400MHz power 5639 control 0x400 status 0x400

[DEBUG] PSS: 1700MHz power 28000 control 0x1100 status 0x1100

[DEBUG] PSS: 1600MHz power 26031 control 0x1000 status 0x1000

[DEBUG] PSS: 1400MHz power 22260 control 0xe00 status 0xe00

[DEBUG] PSS: 1200MHz power 18614 control 0xc00 status 0xc00

[DEBUG] PSS: 1000MHz power 15163 control 0xa00 status 0xa00

[DEBUG] PSS: 800MHz power 11844 control 0x800 status 0x800

[DEBUG] PSS: 600MHz power 8653 control 0x600 status 0x600

[DEBUG] PSS: 400MHz power 5639 control 0x400 status 0x400

[DEBUG] PSS: 1700MHz power 28000 control 0x1100 status 0x1100

[DEBUG] PSS: 1600MHz power 26031 control 0x1000 status 0x1000

[DEBUG] PSS: 1400MHz power 22260 control 0xe00 status 0xe00

[DEBUG] PSS: 1200MHz power 18614 control 0xc00 status 0xc00

[DEBUG] PSS: 1000MHz power 15163 control 0xa00 status 0xa00

[DEBUG] PSS: 800MHz power 11844 control 0x800 status 0x800

[DEBUG] PSS: 600MHz power 8653 control 0x600 status 0x600

[DEBUG] PSS: 400MHz power 5639 control 0x400 status 0x400

[DEBUG] PSS: 1700MHz power 28000 control 0x1100 status 0x1100

[DEBUG] PSS: 1600MHz power 26031 control 0x1000 status 0x1000

[DEBUG] PSS: 1400MHz power 22260 control 0xe00 status 0xe00

[DEBUG] PSS: 1200MHz power 18614 control 0xc00 status 0xc00

[DEBUG] PSS: 1000MHz power 15163 control 0xa00 status 0xa00

[DEBUG] PSS: 800MHz power 11844 control 0x800 status 0x800

[DEBUG] PSS: 600MHz power 8653 control 0x600 status 0x600

[DEBUG] PSS: 400MHz power 5639 control 0x400 status 0x400

[DEBUG] PSS: 1700MHz power 28000 control 0x1100 status 0x1100

[DEBUG] PSS: 1600MHz power 26031 control 0x1000 status 0x1000

[DEBUG] PSS: 1400MHz power 22260 control 0xe00 status 0xe00

[DEBUG] PSS: 1200MHz power 18614 control 0xc00 status 0xc00

[DEBUG] PSS: 1000MHz power 15163 control 0xa00 status 0xa00

[DEBUG] PSS: 800MHz power 11844 control 0x800 status 0x800

[DEBUG] PSS: 600MHz power 8653 control 0x600 status 0x600

[DEBUG] PSS: 400MHz power 5639 control 0x400 status 0x400

[DEBUG] PCI space above 4GB MMIO is at 0x107fc00000, len = 0x6f80400000

[WARN ] Unknown min d_state for PCI: 00:1f.4

[WARN ] Unknown min d_state for PCI: 00:1f.4

[INFO ] \_SB.PCI0.PEPD: Intel Power Engine Plug-in

[INFO ] \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

[INFO ] \_SB.PCI0.I2C0.H02C: Touchpad at I2C: 00:2c

[INFO ] \_SB.PCI0.RP01: WIFI Device GENERIC: 0.0

[INFO ] \_SB.PCI0.RP01: Enable RTD3 for PCI: 00:1c.0 (Intel PCIe Runtime D3)

[DEBUG] PPI: Pending OS request: 0x6c796c79 (0xbc796c79)

[DEBUG] PPI: OS response: CMD 0xbcb1bcb1 = 0x6c7a937a

[INFO ] \_SB_.PCI0.TPM: LPC TPM PNP: 0c31.0

[INFO ] \_SB.PCI0.RP01.WF00: PCI: 01:00.0

[DEBUG] ACPI: * SSDT

[DEBUG] ACPI: added table 3/32, length now 48

[DEBUG] ACPI: * MCFG

[DEBUG] ACPI: added table 4/32, length now 52

[DEBUG] TPM2 log found at 0x769fa000

[DEBUG] ACPI: * TPM2

[DEBUG] ACPI: added table 5/32, length now 56

[DEBUG] ACPI: * LPIT

[DEBUG] ACPI: added table 6/32, length now 60

[DEBUG] IOAPIC: 120 interrupts

[DEBUG] SCI is IRQ 9, GSI 9

[DEBUG] ACPI: * APIC

[DEBUG] ACPI: added table 7/32, length now 64

[DEBUG] ACPI: * SPCR

[DEBUG] ACPI: added table 8/32, length now 68

[DEBUG] current = 768c46e0

[DEBUG] ACPI: * DMAR

[DEBUG] ACPI: added table 9/32, length now 72

[DEBUG] ACPI: added table 10/32, length now 76

[DEBUG] ACPI: * HPET

[DEBUG] ACPI: added table 11/32, length now 80

[INFO ] ACPI: done.

[DEBUG] ACPI tables: 34848 bytes.

[DEBUG] smbios_write_tables: 768b4000

[DEBUG] BIOS version set to CONFIG_LOCALVERSION: '8.60'

[INFO ] Create SMBIOS type 16

[INFO ] Create SMBIOS type 17

[INFO ] Create SMBIOS type 20

[INFO ] GENERIC: 0.0 (WIFI Device)

[INFO ] PCI: 01:00.0 (unknown)

[DEBUG] SMBIOS tables: 1086 bytes.

[DEBUG] Writing table forward entry at 0x00000500

[DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 8950

[DEBUG] Writing coreboot table at 0x768e0000

[DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

[DEBUG] 1. 0000000000001000-000000000009ffff: RAM

[DEBUG] 2. 00000000000a0000-00000000000fffff: RESERVED

[DEBUG] 3. 0000000000100000-00000000768b3fff: RAM

[DEBUG] 4. 00000000768b4000-000000007696cfff: CONFIGURATION TABLES

[DEBUG] 5. 000000007696d000-00000000769e0fff: RAMSTAGE

[DEBUG] 6. 00000000769e1000-0000000076ffffff: CONFIGURATION TABLES

[DEBUG] 7. 0000000077000000-00000000803fffff: RESERVED

[DEBUG] 8. 00000000c0000000-00000000cfffffff: RESERVED

[DEBUG] 9. 00000000f8000000-00000000f9ffffff: RESERVED

[DEBUG] 10. 00000000fb000000-00000000fb000fff: RESERVED

[DEBUG] 11. 00000000fc800000-00000000fe7fffff: RESERVED

[DEBUG] 12. 00000000feb00000-00000000feb7ffff: RESERVED

[DEBUG] 13. 00000000fec00000-00000000fecfffff: RESERVED

[DEBUG] 14. 00000000fed40000-00000000fed6ffff: RESERVED

[DEBUG] 15. 00000000fed80000-00000000fed87fff: RESERVED

[DEBUG] 16. 00000000fed90000-00000000fed92fff: RESERVED

[DEBUG] 17. 00000000feda0000-00000000feda1fff: RESERVED

[DEBUG] 18. 00000000fedc0000-00000000feddffff: RESERVED

[DEBUG] 19. 00000000ff000000-00000000ffffffff: RESERVED

[DEBUG] 20. 0000000100000000-000000107fbfffff: RAM

[DEBUG] CFR: Written 3496 bytes of CFR structures at 0x768e032c, with CRC32 0x749c9248

[DEBUG] Wrote coreboot table at: 0x768e0000, 0x1354 bytes, checksum 11d4

[DEBUG] coreboot table: 4972 bytes.

[DEBUG] IMD ROOT 0. 0x76fff000 0x00001000

[DEBUG] IMD SMALL 1. 0x76ffe000 0x00001000

[DEBUG] FSP MEMORY 2. 0x76afe000 0x00500000

[DEBUG] CONSOLE 3. 0x769fe000 0x00100000

[DEBUG] RO MCACHE 4. 0x769fd000 0x00000384

[DEBUG] TIME STAMP 5. 0x769fc000 0x00000910

[DEBUG] TPM2 TCGLOG 6. 0x769fa000 0x000013d8

[DEBUG] MEM INFO 7. 0x769f9000 0x000007a8

[DEBUG] AFTER CAR 8. 0x769e1000 0x00018000

[DEBUG] RAMSTAGE 9. 0x7696c000 0x00075000

[DEBUG] REFCODE 10. 0x7690d000 0x0005f000

[DEBUG] SMM BACKUP 11. 0x768fd000 0x00010000

[DEBUG] IGD OPREGION12. 0x768f8000 0x000041fd

[DEBUG] SMM COMBUFFER13. 0x768e8000 0x00010000

[DEBUG] COREBOOT 14. 0x768e0000 0x00008000

[DEBUG] ACPI 15. 0x768bc000 0x00024000

[DEBUG] SMBIOS 16. 0x768b4000 0x00008000

[DEBUG] IMD small region:

[DEBUG] IMD ROOT 0. 0x76ffec00 0x00000400

[DEBUG] FSP RUNTIME 1. 0x76ffebe0 0x00000004

[DEBUG] FMAP 2. 0x76ffea00 0x000001dc

[DEBUG] POWER STATE 3. 0x76ffe9a0 0x00000044

[DEBUG] FSPM VERSION 4. 0x76ffe980 0x00000004

[DEBUG] ROMSTAGE 5. 0x76ffe960 0x00000004

[DEBUG] ROMSTG STCK 6. 0x76ffe8a0 0x000000a8

[DEBUG] ACPI GNVS 7. 0x76ffe860 0x00000038

[DEBUG] TPM PPI 8. 0x76ffe700 0x0000015a

[DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 13 / 1483 ms

[DEBUG] MTRR: Physical address space:

[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6

[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0

[DEBUG] 0x00000000000c0000 - 0x0000000076ffffff size 0x76f40000 type 6

[DEBUG] 0x0000000077000000 - 0x00000000cfffffff size 0x59000000 type 0

[DEBUG] 0x00000000d0000000 - 0x00000000dfffffff size 0x10000000 type 1

[DEBUG] 0x00000000e0000000 - 0x00000000ffffffff size 0x20000000 type 0

[DEBUG] 0x0000000100000000 - 0x000000107fbfffff size 0xf7fc00000 type 6

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 39 bits

[DEBUG] MTRR: default type WB/UC MTRR counts: 6/9.

[DEBUG] MTRR: WB selected as default type.

[DEBUG] MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0

[DEBUG] MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

[DEBUG] MTRR: 2 base 0x0000000080000000 mask 0x0000007fc0000000 type 0

[DEBUG] MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 0

[DEBUG] MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 1

[DEBUG] MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x18: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x11: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x11: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x11: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x11: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x11: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x11: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x11: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x11: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x11: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x11: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x11: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x2c: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x2c: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x2c: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x2c: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x2c: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x2c: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x2c: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x2c: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x2c: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x2c: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x2c: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x9: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x2e: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x2e: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x2e: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x2e: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x2e: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x2e: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x2e: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x2e: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x2e: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x2e: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x2e: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x19: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x19: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x19: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x19: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x19: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x19: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x19: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x19: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x19: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x19: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x19: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x28: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x28: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x28: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x28: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x28: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x28: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x28: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x28: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x28: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x28: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x28: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x9 setup mtrr for CPU physical address size: 39 bits

[DEBUG] apic_id 0x2c setup mtrr for CPU physical address size: 39 bits

[DEBUG] apic_id 0x2e setup mtrr for CPU physical address size: 39 bits

[DEBUG] apic_id 0x19 setup mtrr for CPU physical address size: 39 bits

[DEBUG] apic_id 0x18 setup mtrr for CPU physical address size: 39 bits

[DEBUG] apic_id 0x2a: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x2a: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x2a: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x2a: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x2a: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x2a: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x2a: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x2a: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x2a: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x2a: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x2a: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x10: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x10: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x10: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x10: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x10: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x10: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x10: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x10: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x10: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x10: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x10: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x2a setup mtrr for CPU physical address size: 39 bits

[DEBUG] apic_id 0x11 setup mtrr for CPU physical address size: 39 bits

[DEBUG] apic_id 0x28 setup mtrr for CPU physical address size: 39 bits

[DEBUG] apic_id 0x10 setup mtrr for CPU physical address size: 39 bits

[DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x8: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x20: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x20: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x20: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x20: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x20: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x20: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x20: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x20: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x20: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x20: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x20: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x8 setup mtrr for CPU physical address size: 39 bits

[DEBUG] apic_id 0x26: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x20 setup mtrr for CPU physical address size: 39 bits

[DEBUG] apic_id 0x1 setup mtrr for CPU physical address size: 39 bits

[DEBUG] apic_id 0x22: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x22: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x22: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x22: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x22: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x22: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x22: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x22: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x22: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x22: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x22: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x26: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x26: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x26: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x26: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x26: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x26: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x26: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x26: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x26: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x26: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x22 setup mtrr for CPU physical address size: 39 bits

[DEBUG] apic_id 0x26 setup mtrr for CPU physical address size: 39 bits

[DEBUG] apic_id 0x24: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x24: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x24: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x24: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x24: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x24: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x24: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x24: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x24: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x24: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x24: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x24 setup mtrr for CPU physical address size: 39 bits

[DEBUG] MTRR: TEMPORARY Physical address space:

[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6

[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0

[DEBUG] 0x00000000000c0000 - 0x0000000076ffffff size 0x76f40000 type 6

[DEBUG] 0x0000000077000000 - 0x00000000feffffff size 0x88000000 type 0

[DEBUG] 0x00000000ff000000 - 0x00000000ffffffff size 0x01000000 type 5

[DEBUG] 0x0000000100000000 - 0x000000107fbfffff size 0xf7fc00000 type 6

[DEBUG] MTRR: default type WB/UC MTRR counts: 10/9.

[DEBUG] MTRR: UC selected as default type.

[DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

[DEBUG] MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

[DEBUG] MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

[DEBUG] MTRR: 3 base 0x00000000ff000000 mask 0x0000007fff000000 type 5

[DEBUG] MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

[DEBUG] MTRR: 5 base 0x0000000200000000 mask 0x0000007e00000000 type 6

[DEBUG] MTRR: 6 base 0x0000000400000000 mask 0x0000007c00000000 type 6

[DEBUG] MTRR: 7 base 0x0000000800000000 mask 0x0000007800000000 type 6

[DEBUG] MTRR: 8 base 0x0000001000000000 mask 0x0000007f80000000 type 6



[DEBUG] MTRR check

[DEBUG] Fixed MTRRs : Enabled

[DEBUG] Variable MTRRs: Enabled



[DEBUG] BS: BS_WRITE_TABLES exit times (exec / console): 833 / 351 ms

[INFO ] CBFS: Found 'fallback/payload' @0x212540 size 0xf6f7d in mcache @0x769fd314

[INFO ] VB2:vb2_digest_init() 1011581 bytes, hash algo 2, HW acceleration unsupported

[DEBUG] TPM: Extending digest for `CBFS: fallback/payload` into PCR 2

[INFO ] tlcl_extend: response is 0

[DEBUG] TPM: Digest of `CBFS: fallback/payload` to PCR 2 measured

[DEBUG] Checking segment from ROM address 0xff2a356c

[DEBUG] Checking segment from ROM address 0xff2a3588

[DEBUG] Loading segment from ROM address 0xff2a356c

[DEBUG] code (compression=1)

[DEBUG] New segment dstaddr 0x00800000 memsize 0x590000 srcaddr 0xff2a35a4 filesize 0xf6f45

[DEBUG] Loading Segment: addr: 0x00800000 memsz: 0x0000000000590000 filesz: 0x00000000000f6f45