|
[0m[INFO ] CBFS: Found 'fallback/romstage' @0x80 size 0x8b05 in mcache @0xfef09e4c[0m
|
|
[0m[DEBUG] BS: bootblock times (exec / console): total (unknown) / 21 ms[0m
|
|
[0m
|
|
[0m
|
|
[1m[NOTE ] coreboot-4.17-591-g9f262a8f12-dirty Wed Jul 13 07:32:27 UTC 2022 romstage starting (log level: 7)...[0m
|
|
[0m[INFO ] CPU: Intel(R) Pentium(R) Silver N5000 CPU @ 1.10GHz[0m
|
|
[0m[INFO ] CPU: ID 706a1, Geminilake B0, ucode: 00000039[0m
|
|
[0m[INFO ] CPU: AES Supported, TXT Not Supported, VT Supported[0m
|
|
[0m[INFO ] MCH: device id 31f0 (rev 03) is Geminilake[0m
|
|
[0m[INFO ] PCH: device id 31e8 (rev 03) is Geminilake[0m
|
|
[0m[INFO ] IGD: device id 3184 (rev 03) is Geminilake[0m
|
|
[0m[DEBUG] pm1_sts: 0000 pm1_en: 0000 pm1_cnt: 00000000[0m
|
|
[0m[DEBUG] gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000[0m
|
|
[0m[DEBUG] gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000[0m
|
|
[0m[DEBUG] gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000[0m
|
|
[0m[DEBUG] gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000[0m
|
|
[0m[DEBUG] prsts: 00000000[0m
|
|
[0m[DEBUG] tco_sts: 0000 0000[0m
|
|
[0m[DEBUG] gen_pmcon1: 08004004 gen_pmcon2: 00003a00 gen_pmcon3: 00000000[0m
|
|
[0m[DEBUG] prev_sleep_state 5[0m
|
|
[0m[INFO ] CBFS: Found 'fspm.bin' @0x51100 size 0x2cb68 in mcache @0xfef0a020[0m
|
|
[0m[DEBUG] FMAP: area RW_MRC_CACHE found @ 5d0000 (65536 bytes)[0m
|
|
[1m[NOTE ] MRC: no data in 'RW_MRC_CACHE'[0m
|
|
[0m[DEBUG] FMAP: area RW_VAR_MRC_CACHE found @ 5e0000 (65536 bytes)[0m
|
|
[1m[NOTE ] MRC: no data in 'RW_VAR_MRC_CACHE'[0m
|
|
[0m[DEBUG] CBMEM:[0m
|
|
[0m[DEBUG] IMD: root @ 0x79fff000 254 entries.[0m
|
|
[0m[DEBUG] IMD: root @ 0x79ffec00 62 entries.[0m
|
|
[0m[DEBUG] External stage cache:[0m
|
|
[0m[DEBUG] IMD: root @ 0x7afff000 254 entries.[0m
|
|
[0m[DEBUG] IMD: root @ 0x7affec00 62 entries.[0m
|
|
[0m[DEBUG] FMAP: area RW_MRC_CACHE found @ 5d0000 (65536 bytes)[0m
|
|
[0m[DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'.[0m
|
|
[0m[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x800000[0m
|
|
[1m[NOTE ] MRC: no data in 'RW_MRC_CACHE'[0m
|
|
[0m[DEBUG] MRC: cache data 'RW_MRC_CACHE' needs update.[0m
|
|
[0m[DEBUG] MRC: updated 'RW_MRC_CACHE'.[0m
|
|
[0m[DEBUG] CPU: frequency set to 2700 MHz[0m
|
|
[0m[DEBUG] FMAP: area RW_VAR_MRC_CACHE found @ 5e0000 (65536 bytes)[0m
|
|
[0m[DEBUG] MRC: Checking cached data update for 'RW_VAR_MRC_CACHE'.[0m
|
|
[1m[NOTE ] MRC: no data in 'RW_VAR_MRC_CACHE'[0m
|
|
[0m[DEBUG] MRC: cache data 'RW_VAR_MRC_CACHE' needs update.[0m
|
|
[0m[DEBUG] MRC: updated 'RW_VAR_MRC_CACHE'.[0m
|
|
[0m[DEBUG] 4 DIMMs found[0m
|
|
[0m[DEBUG] SMM Memory Map[0m
|
|
[0m[DEBUG] SMRAM : 0x7a000000 0x1000000[0m
|
|
[0m[DEBUG] Subregion 0: 0x7a000000 0xf00000[0m
|
|
[0m[DEBUG] Subregion 1: 0x7af00000 0x100000[0m
|
|
[0m[DEBUG] Subregion 2: 0x7b000000 0x0[0m
|
|
[0m[DEBUG] top_of_ram = 0x7a000000[0m
|
|
[0m[DEBUG] Normal boot[0m
|
|
[0m[INFO ] CBFS: Found 'fallback/postcar' @0xada80 size 0x587c in mcache @0xfef0a0f8[0m
|
|
[0m[DEBUG] Loading module at 0x79bcf000 with entry 0x79bcf031. filesize: 0x5460 memsize: 0xb7d0[0m
|
|
[0m[DEBUG] Processing 247 relocs. Offset value of 0x77bcf000[0m
|
|
[0m[DEBUG] BS: romstage times (exec / console): total (unknown) / 288 ms[0m
|
|
[0m
|
|
[0m
|
|
[1m[NOTE ] coreboot-4.17-591-g9f262a8f12-dirty Wed Jul 13 07:32:27 UTC 2022 postcar starting (log level: 7)...[0m
|
|
[0m[DEBUG] Normal boot[0m
|
|
[0m[INFO ] CBFS: Found 'fallback/ramstage' @0x2dc80 size 0x1ab86 in mcache @0x79bdd0dc[0m
|
|
[0m[DEBUG] Loading module at 0x79b7a000 with entry 0x79b7a000. filesize: 0x39158 memsize: 0x53550[0m
|
|
[0m[DEBUG] Processing 3911 relocs. Offset value of 0x75b7a000[0m
|
|
[0m[DEBUG] BS: postcar times (exec / console): total (unknown) / 41 ms[0m
|
|
[0m
|
|
[0m
|
|
[1m[NOTE ] coreboot-4.17-591-g9f262a8f12-dirty Wed Jul 13 07:32:27 UTC 2022 ramstage starting (log level: 7)...[0m
|
|
[0m[DEBUG] Normal boot[0m
|
|
[0m[INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x8c40 size 0x25000 in mcache @0x79bdd0ac[0m
|
|
[0m[DEBUG] microcode: sig=0x706a1 pf=0x1 revision=0x39[0m
|
|
[0m[INFO ] microcode: load microcode patch[0m
|
|
[7m[ERROR] microcode: Update failed[0m
|
|
[0m[INFO ] CBFS: Found 'fsps.bin' @0x7dcc0 size 0x2f000 in mcache @0x79bdd234[0m
|
|
[0m[DEBUG] Detected 4 core, 4 thread CPU.[0m
|
|
[0m[INFO ] Will perform SMM setup.[0m
|
|
[0m[INFO ] CPU: Intel(R) Pentium(R) Silver N5000 CPU @ 1.10GHz.[0m
|
|
[0m[INFO ] LAPIC 0x0 in XAPIC mode.[0m
|
|
[0m[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178[0m
|
|
[0m[DEBUG] Processing 18 relocs. Offset value of 0x00030000[0m
|
|
[0m[DEBUG] Attempting to start 3 APs[0m
|
|
[0m[DEBUG] Waiting for 10ms after sending INIT.[0m
|
|
[0m[DEBUG] Waiting for SIPI to complete...[0m
|
|
[0m[DEBUG] done.[0m
|
|
[0m[INFO ] LAPIC 0x4 in XAPIC mode.[0m
|
|
[0m[INFO ] LAPIC 0x2 in XAPIC mode.[0m
|
|
[0m[DEBUG] Waiting for SIPI to complete...[0m
|
|
[0m[DEBUG] done.[0m
|
|
[0m[INFO ] AP: slot 3 apic_id 2, MCU rev: 0x00000039[0m
|
|
[0m[INFO ] AP: slot 2 apic_id 4, MCU rev: 0x00000039[0m
|
|
[0m[INFO ] LAPIC 0x6 in XAPIC mode.[0m
|
|
[0m[INFO ] AP: slot 1 apic_id 6, MCU rev: 0x00000039[0m
|
|
[0m[DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1e0 memsize: 0x1e0[0m
|
|
[0m[DEBUG] Processing 11 relocs. Offset value of 0x00038000[0m
|
|
[0m[DEBUG] smm_module_setup_stub: stack_top = 0x7a002000[0m
|
|
[0m[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800[0m
|
|
[0m[DEBUG] smm_module_setup_stub: runtime.start32_offset = 0x4c[0m
|
|
[0m[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000[0m
|
|
[0m[DEBUG] SMM Module: stub loaded at 38000. Will call 0x79b92bdc[0m
|
|
[0m[DEBUG] Installing permanent SMM handler to 0x7a000000[0m
|
|
[0m[DEBUG] FX_SAVE [0x7aeff800-0x7af00000][0m
|
|
[0m[DEBUG] HANDLER [0x7aefc000-0x7aeff790][0m
|
|
[0m
|
|
[0m[DEBUG] CPU 0[0m
|
|
[0m[DEBUG] ss0 [0x7aefbc00-0x7aefc000][0m
|
|
[0m[DEBUG] stub0 [0x7aef4000-0x7aef41e0][0m
|
|
[0m
|
|
[0m[DEBUG] CPU 1[0m
|
|
[0m[DEBUG] ss1 [0x7aefb800-0x7aefbc00][0m
|
|
[0m[DEBUG] stub1 [0x7aef3c00-0x7aef3de0][0m
|
|
[0m
|
|
[0m[DEBUG] CPU 2[0m
|
|
[0m[DEBUG] ss2 [0x7aefb400-0x7aefb800][0m
|
|
[0m[DEBUG] stub2 [0x7aef3800-0x7aef39e0][0m
|
|
[0m
|
|
[0m[DEBUG] CPU 3[0m
|
|
[0m[DEBUG] ss3 [0x7aefb000-0x7aefb400][0m
|
|
[0m[DEBUG] stub3 [0x7aef3400-0x7aef35e0][0m
|
|
[0m
|
|
[0m[DEBUG] stacks [0x7a000000-0x7a002000][0m
|
|
[0m[DEBUG] Loading module at 0x7aefc000 with entry 0x7aefcdf9. filesize: 0x3690 memsize: 0x3790[0m
|
|
[0m[DEBUG] Processing 218 relocs. Offset value of 0x7aefc000[0m
|
|
[0m[DEBUG] Loading module at 0x7aef4000 with entry 0x7aef4000. filesize: 0x1e0 memsize: 0x1e0[0m
|
|
[0m[DEBUG] Processing 11 relocs. Offset value of 0x7aef4000[0m
|
|
[0m[DEBUG] smm_module_setup_stub: stack_top = 0x7a002000[0m
|
|
[0m[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800[0m
|
|
[0m[DEBUG] smm_module_setup_stub: runtime.start32_offset = 0x4c[0m
|
|
[0m[DEBUG] smm_module_setup_stub: runtime.smm_size = 0xf00000[0m
|
|
[0m[DEBUG] SMM Module: placing smm entry code at 7aef3c00, cpu # 0x1[0m
|
|
[0m[DEBUG] SMM Module: placing smm entry code at 7aef3800, cpu # 0x2[0m
|
|
[0m[DEBUG] SMM Module: placing smm entry code at 7aef3400, cpu # 0x3[0m
|
|
[0m[DEBUG] SMM Module: stub loaded at 7aef4000. Will call 0x7aefcdf9[0m
|
|
[0m[DEBUG] Clearing SMI status registers[0m
|
|
[0m[DEBUG] SMI_STS: PERIODIC [0m
|
|
[0m[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7aeec000, cpu = 0[0m
|
|
[0m[DEBUG] Relocation complete.[0m
|
|
[0m[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7aeeb800, cpu = 2[0m
|
|
[0m[DEBUG] Relocation complete.[0m
|
|
[0m[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7aeeb400, cpu = 3[0m
|
|
[0m[DEBUG] Relocation complete.[0m
|
|
[0m[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7aeebc00, cpu = 1[0m
|
|
[0m[DEBUG] Relocation complete.[0m
|
|
[0m[INFO ] Initializing CPU #0[0m
|
|
[0m[DEBUG] CPU: vendor Intel device 706a1[0m
|
|
[0m[DEBUG] CPU: family 06, model 7a, stepping 01[0m
|
|
[0m[DEBUG] Clearing out pending MCEs[0m
|
|
[0m[INFO ] microcode: load microcode patch[0m
|
|
[7m[ERROR] microcode: Update failed[0m
|
|
[0m[INFO ] CPU #0 initialized[0m
|
|
[0m[INFO ] Initializing CPU #2[0m
|
|
[0m[INFO ] Initializing CPU #3[0m
|
|
[0m[DEBUG] CPU: vendor Intel device 706a1[0m
|
|
[0m[DEBUG] CPU: family 06, model 7a, stepping 01[0m
|
|
[0m[DEBUG] CPU: vendor Intel device 706a1[0m
|
|
[0m[DEBUG] CPU: family 06, model 7a, stepping 01[0m
|
|
[0m[INFO ] Initializing CPU #1[0m
|
|
[0m[DEBUG] Clearing out pending MCEs[0m
|
|
[0m[DEBUG] Clearing out pending MCEs[0m
|
|
[0m[INFO ] microcode: load microcode patch[0m
|
|
[0m[DEBUG] CPU: vendor Intel device 706a1[0m
|
|
[7m[ERROR] microcode: Update failed[0m
|
|
[0m[INFO ] microcode: load microcode patch[0m
|
|
[0m[DEBUG] CPU: family 06, model 7a, stepping 01[0m
|
|
[7m[ERROR] microcode: Update failed[0m
|
|
[0m[DEBUG] Clearing out pending MCEs[0m
|
|
[0m[INFO ] CPU #2 initialized[0m
|
|
[0m[INFO ] CPU #3 initialized[0m
|
|
[0m[INFO ] microcode: load microcode patch[0m
|
|
[7m[ERROR] microcode: Update failed[0m
|
|
[0m[INFO ] CPU #1 initialized[0m
|
|
[0m[INFO ] bsp_do_flight_plan done after 428 msecs.[0m
|
|
[0m[DEBUG] Enabling SMIs.[0m
|
|
[0m[DEBUG] BS: BS_DEV_INIT_CHIPS entry times (exec / console): 193 / 369 ms[0m
|
|
[0m[INFO ] CBFS: Found 'vbt.bin' @0xacd00 size 0x559 in mcache @0x79bdd258[0m
|
|
[0m[INFO ] Found a VBT of 5632 bytes after decompression[0m
|
|
[1;4m[WARN ] PCI:00.1: Could not disable the device[0m
|
|
[1;4m[WARN ] PCI:03.0: Could not disable the device[0m
|
|
[1;4m[WARN ] PCI:0d.0: Could not disable the device[0m
|
|
[1;4m[WARN ] PCI:0d.1: Could not disable the device[0m
|
|
[1;4m[WARN ] PCI:0d.3: Could not disable the device[0m
|
|
[1;4m[WARN ] PCI:1a.0: Could not disable the device[0m
|
|
[0m[DEBUG] WEAK: src/soc/intel/apollolake/chip.c/mainboard_silicon_init_params called[0m
|
|
[0m[INFO ] FSPS returned 0[0m
|
|
[0m[INFO ] ITSS IRQ Polarities Before:[0m
|
|
[0m[INFO ] IPC0: 0xffffeef8[0m
|
|
[0m[INFO ] IPC1: 0xffffffff[0m
|
|
[0m[INFO ] IPC2: 0xffffffff[0m
|
|
[0m[INFO ] IPC3: 0x00ffffff[0m
|
|
[0m[INFO ] ITSS IRQ Polarities After:[0m
|
|
[0m[INFO ] IPC0: 0xffffeef8[0m
|
|
[0m[INFO ] IPC1: 0x0003ffff[0m
|
|
[0m[INFO ] IPC2: 0x00000000[0m
|
|
[0m[INFO ] IPC3: 0x00000000[0m
|
|
[0m[INFO ] CPU TDP = 6 Watts[0m
|
|
[0m[INFO ] CPU PL1 = 10 Watts[0m
|
|
[0m[INFO ] CPU PL2 = 15 Watts[0m
|
|
[0m[DEBUG] BS: BS_DEV_INIT_CHIPS run times (exec / console): 167 / 107 ms[0m
|
|
[0m[INFO ] Enumerating buses...[0m
|
|
[0m[DEBUG] Root Device scanning...[0m
|
|
[0m[DEBUG] DOMAIN: 0000 enabled[0m
|
|
[0m[DEBUG] CPU_CLUSTER: 0 enabled[0m
|
|
[0m[DEBUG] MMIO: fed40000 enabled[0m
|
|
[0m[DEBUG] DOMAIN: 0000 scanning...[0m
|
|
[0m[DEBUG] PCI: pci_scan_bus for bus 00[0m
|
|
[0m[DEBUG] PCI: 00:00.0 [8086/31f0] enabled[0m
|
|
[0m[DEBUG] PCI: 00:00.1 [8086/318c] disabled[0m
|
|
[0m[DEBUG] PCI: 00:02.0 [8086/3184] enabled[0m
|
|
[0m[DEBUG] PCI: 00:0c.0 [8086/31dc] enabled[0m
|
|
[0m[DEBUG] PCI: 00:0d.0 [8086/3192] disabled[0m
|
|
[0m[DEBUG] PCI: 00:0d.1 [8086/3194] disabled[0m
|
|
[0m[DEBUG] PCI: 00:0d.2 [8086/3196] enabled[0m
|
|
[0m[DEBUG] PCI: 00:0d.3 [8086/31ec] disabled[0m
|
|
[0m[DEBUG] PCI: 00:0e.0 [8086/3198] enabled[0m
|
|
[0m[DEBUG] No CMOS option 'me_state'.[0m
|
|
[0m[DEBUG] PCI: 00:0f.0 [8086/319a] enabled[0m
|
|
[0m[DEBUG] PCI: 00:0f.1 [8086/319c] enabled[0m
|
|
[0m[DEBUG] PCI: 00:0f.2 [8086/319e] enabled[0m
|
|
[0m[DEBUG] PCI: 00:12.0 [8086/31e3] enabled[0m
|
|
[0m[DEBUG] PCI: 00:15.0 [8086/31a8] enabled[0m
|
|
[0m[DEBUG] PCI: 00:17.0 [8086/31b4] enabled[0m
|
|
[0m[DEBUG] PCI: 00:17.3 [8086/31ba] enabled[0m
|
|
[0m[DEBUG] PCI: 00:18.0 [8086/31bc] enabled[0m
|
|
[0m[DEBUG] PCI: 00:18.2 [8086/31c0] enabled[0m
|
|
[0m[DEBUG] PCI: 00:19.2 [8086/31c6] enabled[0m
|
|
[0m[DEBUG] PCI: 00:1f.0 [8086/31e8] enabled[0m
|
|
[0m[DEBUG] PCI: 00:1f.1 [8086/31d4] disabled[0m
|
|
[1;4m[WARN ] PCI: Leftover static devices:[0m
|
|
[1;4m[WARN ] PCI: 00:00.2[0m
|
|
[1;4m[WARN ] PCI: 00:03.0[0m
|
|
[1;4m[WARN ] PCI: 00:11.0[0m
|
|
[1;4m[WARN ] PCI: 00:13.0[0m
|
|
[1;4m[WARN ] PCI: 00:13.1[0m
|
|
[1;4m[WARN ] PCI: 00:13.2[0m
|
|
[1;4m[WARN ] PCI: 00:13.3[0m
|
|
[1;4m[WARN ] PCI: 00:14.0[0m
|
|
[1;4m[WARN ] PCI: 00:14.1[0m
|
|
[1;4m[WARN ] PCI: 00:15.1[0m
|
|
[1;4m[WARN ] PCI: 00:16.0[0m
|
|
[1;4m[WARN ] PCI: 00:16.1[0m
|
|
[1;4m[WARN ] PCI: 00:16.2[0m
|
|
[1;4m[WARN ] PCI: 00:16.3[0m
|
|
[1;4m[WARN ] PCI: 00:17.1[0m
|
|
[1;4m[WARN ] PCI: 00:17.2[0m
|
|
[1;4m[WARN ] PCI: 00:18.1[0m
|
|
[1;4m[WARN ] PCI: 00:18.3[0m
|
|
[1;4m[WARN ] PCI: 00:19.0[0m
|
|
[1;4m[WARN ] PCI: 00:19.1[0m
|
|
[1;4m[WARN ] PCI: 00:1a.0[0m
|
|
[1;4m[WARN ] PCI: 00:1b.0[0m
|
|
[1;4m[WARN ] PCI: 00:1c.0[0m
|
|
[1;4m[WARN ] PCI: 00:1d.0[0m
|
|
[1;4m[WARN ] PCI: 00:1e.0[0m
|
|
[1;4m[WARN ] PCI: Check your devicetree.cb.[0m
|
|
[0m[DEBUG] PCI: 00:02.0 scanning...[0m
|
|
[0m[DEBUG] scan_bus: bus PCI: 00:02.0 finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:0c.0 scanning...[0m
|
|
[0m[DEBUG] GENERIC: 0.0 enabled[0m
|
|
[0m[DEBUG] scan_bus: bus PCI: 00:0c.0 finished in 3 msecs[0m
|
|
[0m[DEBUG] PCI: 00:0e.0 scanning...[0m
|
|
[0m[DEBUG] scan_bus: bus PCI: 00:0e.0 finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:15.0 scanning...[0m
|
|
[0m[DEBUG] scan_bus: bus PCI: 00:15.0 finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:17.0 scanning...[0m
|
|
[0m[DEBUG] scan_bus: bus PCI: 00:17.0 finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:17.3 scanning...[0m
|
|
[0m[DEBUG] scan_bus: bus PCI: 00:17.3 finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:19.2 scanning...[0m
|
|
[0m[DEBUG] scan_bus: bus PCI: 00:19.2 finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:1f.0 scanning...[0m
|
|
[0m[DEBUG] PNP: 004e.0 enabled[0m
|
|
[0m[DEBUG] PNP: 004e.1 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.2 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.4 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.5 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.6 enabled[0m
|
|
[0m[DEBUG] PNP: 004e.a disabled[0m
|
|
[0m[DEBUG] PNP: 004e.f disabled[0m
|
|
[0m[DEBUG] PNP: 004e.10 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.11 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.12 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.13 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.14 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.17 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.18 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.19 disabled[0m
|
|
[0m[DEBUG] scan_bus: bus PCI: 00:1f.0 finished in 61 msecs[0m
|
|
[0m[DEBUG] scan_bus: bus DOMAIN: 0000 finished in 352 msecs[0m
|
|
[0m[DEBUG] scan_bus: bus Root Device finished in 374 msecs[0m
|
|
[0m[INFO ] done[0m
|
|
[0m[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 1 / 390 ms[0m
|
|
[0m[DEBUG] FMAP: area UNIFIED_MRC_CACHE found @ 5c0000 (196608 bytes)[0m
|
|
[0m[INFO ] MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.[0m
|
|
[0m[DEBUG] BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 14 ms[0m
|
|
[0m[DEBUG] found VGA at PCI: 00:02.0[0m
|
|
[0m[DEBUG] Setting up VGA for PCI: 00:02.0[0m
|
|
[0m[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000[0m
|
|
[0m[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device[0m
|
|
[0m[INFO ] Allocating resources...[0m
|
|
[0m[INFO ] Reading resources...[0m
|
|
[0m[DEBUG] SA MMIO resource: PCIEXBAR -> base = 0xe0000000, size = 0x10000000[0m
|
|
[0m[DEBUG] SA MMIO resource: MCHBAR -> base = 0xfed10000, size = 0x8000[0m
|
|
[0m[INFO ] Available memory above 4GB: 6144M[0m
|
|
[7m[ERROR] PNP: 004e.0 missing read_resources[0m
|
|
[0m[INFO ] Done reading resources.[0m
|
|
[0m[INFO ] === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===[0m
|
|
[0m[INFO ] === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===[0m
|
|
[0m[DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:1f.0 84 base 000006a0 limit 000006af io (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:1f.0 88 base 00000080 limit 0000008f io (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PNP: 004e.6 60 base 00000060 limit 00000060 io (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PNP: 004e.6 62 base 00000064 limit 00000064 io (fixed)[0m
|
|
[0m[INFO ] DOMAIN: 0000: Resource ranges:[0m
|
|
[0m[INFO ] * Base: 1000, Size: f000, Tag: 100[0m
|
|
[0m[DEBUG] PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io[0m
|
|
[0m[DEBUG] PCI: 00:12.0 20 * [0x1040 - 0x105f] limit: 105f io[0m
|
|
[0m[DEBUG] PCI: 00:12.0 18 * [0x1060 - 0x1067] limit: 1067 io[0m
|
|
[0m[DEBUG] PCI: 00:12.0 1c * [0x1068 - 0x106b] limit: 106b io[0m
|
|
[0m[DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done[0m
|
|
[0m[DEBUG] DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 02 base fed64000 limit fed64fff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 03 base fed65000 limit fed65fff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 04 base 00000000 limit 0009ffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 05 base 000c0000 limit 79ffffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 06 base 7a000000 limit 7fffffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 07 base 100000000 limit 27fffffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 08 base 000a0000 limit 000bffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 09 base 000c0000 limit 000fffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 0a base 11800000 limit 11bfffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 0b base 11000000 limit 117fffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 0c base 12000000 limit 120fffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 0d base 12150000 limit 12150fff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 0e base 12140000 limit 1214ffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 0f base 10000000 limit 10ffffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 10 base 11c00000 limit 11ffffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 11 base 12100000 limit 1213ffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:18.2 10 base ddffc000 limit ddffcfff mem (fixed)[0m
|
|
[0m[INFO ] DOMAIN: 0000: Resource ranges:[0m
|
|
[0m[INFO ] * Base: 80000000, Size: 5dffc000, Tag: 200[0m
|
|
[0m[INFO ] * Base: ddffd000, Size: 2003000, Tag: 200[0m
|
|
[0m[INFO ] * Base: f0000000, Size: ed10000, Tag: 200[0m
|
|
[0m[INFO ] * Base: fed18000, Size: 4c000, Tag: 200[0m
|
|
[0m[INFO ] * Base: fed66000, Size: 129a000, Tag: 200[0m
|
|
[0m[INFO ] * Base: 280000000, Size: 7d80000000, Tag: 100200[0m
|
|
[0m[DEBUG] PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem[0m
|
|
[0m[DEBUG] PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem[0m
|
|
[0m[DEBUG] PCI: 00:0e.0 20 * [0x91000000 - 0x910fffff] limit: 910fffff mem[0m
|
|
[0m[DEBUG] PCI: 00:15.0 10 * [0x91100000 - 0x9110ffff] limit: 9110ffff mem[0m
|
|
[0m[DEBUG] PCI: 00:0c.0 10 * [0x91110000 - 0x91113fff] limit: 91113fff mem[0m
|
|
[0m[DEBUG] PCI: 00:0e.0 10 * [0x91114000 - 0x91117fff] limit: 91117fff mem[0m
|
|
[0m[DEBUG] PCI: 00:12.0 10 * [0x91118000 - 0x91119fff] limit: 91119fff mem[0m
|
|
[0m[DEBUG] PCI: 00:0d.2 10 * [0x9111a000 - 0x9111afff] limit: 9111afff mem[0m
|
|
[0m[DEBUG] PCI: 00:0f.0 10 * [0x9111b000 - 0x9111bfff] limit: 9111bfff mem[0m
|
|
[0m[DEBUG] PCI: 00:0f.1 10 * [0x9111c000 - 0x9111cfff] limit: 9111cfff mem[0m
|
|
[0m[DEBUG] PCI: 00:0f.2 10 * [0x9111d000 - 0x9111dfff] limit: 9111dfff mem[0m
|
|
[0m[DEBUG] PCI: 00:17.0 10 * [0x9111e000 - 0x9111efff] limit: 9111efff mem[0m
|
|
[0m[DEBUG] PCI: 00:17.0 18 * [0x9111f000 - 0x9111ffff] limit: 9111ffff mem[0m
|
|
[0m[DEBUG] PCI: 00:17.3 10 * [0x91120000 - 0x91120fff] limit: 91120fff mem[0m
|
|
[0m[DEBUG] PCI: 00:17.3 18 * [0x91121000 - 0x91121fff] limit: 91121fff mem[0m
|
|
[0m[DEBUG] PCI: 00:18.0 10 * [0x91122000 - 0x91122fff] limit: 91122fff mem[0m
|
|
[0m[DEBUG] PCI: 00:18.0 18 * [0x91123000 - 0x91123fff] limit: 91123fff mem[0m
|
|
[0m[DEBUG] PCI: 00:18.2 18 * [0x91124000 - 0x91124fff] limit: 91124fff mem[0m
|
|
[0m[DEBUG] PCI: 00:19.2 10 * [0x91125000 - 0x91125fff] limit: 91125fff mem[0m
|
|
[0m[DEBUG] PCI: 00:19.2 18 * [0x91126000 - 0x91126fff] limit: 91126fff mem[0m
|
|
[0m[DEBUG] PCI: 00:12.0 24 * [0x91127000 - 0x911277ff] limit: 911277ff mem[0m
|
|
[0m[DEBUG] PCI: 00:12.0 14 * [0x91128000 - 0x911280ff] limit: 911280ff mem[0m
|
|
[0m[DEBUG] DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done[0m
|
|
[0m[INFO ] === Resource allocator: DOMAIN: 0000 - resource allocation complete ===[0m
|
|
[0m[DEBUG] PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64[0m
|
|
[0m[DEBUG] PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64[0m
|
|
[0m[DEBUG] PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io[0m
|
|
[0m[DEBUG] PCI: 00:0c.0 10 <- [0x0091110000 - 0x0091113fff] size 0x00004000 gran 0x0e mem64[0m
|
|
[0m[DEBUG] PCI: 00:0d.2 10 <- [0x009111a000 - 0x009111afff] size 0x00001000 gran 0x0c mem[0m
|
|
[0m[DEBUG] PCI: 00:0e.0 10 <- [0x0091114000 - 0x0091117fff] size 0x00004000 gran 0x0e mem64[0m
|
|
[0m[DEBUG] PCI: 00:0e.0 20 <- [0x0091000000 - 0x00910fffff] size 0x00100000 gran 0x14 mem64[0m
|
|
[0m[DEBUG] PCI: 00:0f.0 10 <- [0x009111b000 - 0x009111bfff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:0f.1 10 <- [0x009111c000 - 0x009111cfff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:0f.2 10 <- [0x009111d000 - 0x009111dfff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:12.0 10 <- [0x0091118000 - 0x0091119fff] size 0x00002000 gran 0x0d mem[0m
|
|
[0m[DEBUG] PCI: 00:12.0 14 <- [0x0091128000 - 0x00911280ff] size 0x00000100 gran 0x08 mem[0m
|
|
[0m[DEBUG] PCI: 00:12.0 18 <- [0x0000001060 - 0x0000001067] size 0x00000008 gran 0x03 io[0m
|
|
[0m[DEBUG] PCI: 00:12.0 1c <- [0x0000001068 - 0x000000106b] size 0x00000004 gran 0x02 io[0m
|
|
[0m[DEBUG] PCI: 00:12.0 20 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io[0m
|
|
[0m[DEBUG] PCI: 00:12.0 24 <- [0x0091127000 - 0x00911277ff] size 0x00000800 gran 0x0b mem[0m
|
|
[0m[DEBUG] PCI: 00:15.0 10 <- [0x0091100000 - 0x009110ffff] size 0x00010000 gran 0x10 mem64[0m
|
|
[0m[DEBUG] PCI: 00:17.0 10 <- [0x009111e000 - 0x009111efff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:17.0 18 <- [0x009111f000 - 0x009111ffff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:17.3 10 <- [0x0091120000 - 0x0091120fff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:17.3 18 <- [0x0091121000 - 0x0091121fff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:18.0 10 <- [0x0091122000 - 0x0091122fff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:18.0 18 <- [0x0091123000 - 0x0091123fff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:18.2 18 <- [0x0091124000 - 0x0091124fff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:19.2 10 <- [0x0091125000 - 0x0091125fff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:19.2 18 <- [0x0091126000 - 0x0091126fff] size 0x00001000 gran 0x0c mem64[0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[0m[DEBUG] LPC: enabling default decode range LPC_IOE_KBC_60_64[0m
|
|
[0m[DEBUG] LPC: enabling default decode range LPC_IOE_KBC_60_64[0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[0m[INFO ] Done setting resources.[0m
|
|
[0m[INFO ] Done allocating resources.[0m
|
|
[0m[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 1 / 957 ms[0m
|
|
[0m[DEBUG] WEAK: src/soc/intel/apollolake/lockdown.c/soc_lockdown_config called[0m
|
|
[0m[DEBUG] BS: BS_DEV_RESOURCES exit times (exec / console): 0 / 8 ms[0m
|
|
[0m[INFO ] full_reset() called![0m
|
|
[0m[DEBUG] CSE is not in normal state, resetting[0m
|
|
?[0m[INFO ] CBFS: Found 'fallback/romstage' @0x80 size 0x8b05 in mcache @0xfef09e4c[0m
|
|
[0m[DEBUG] BS: bootblock times (exec / console): total (unknown) / 21 ms[0m
|
|
[0m
|
|
[0m
|
|
[1m[NOTE ] coreboot-4.17-591-g9f262a8f12-dirty Wed Jul 13 07:32:27 UTC 2022 romstage starting (log level: 7)...[0m
|
|
[0m[INFO ] CPU: Intel(R) Pentium(R) Silver N5000 CPU @ 1.10GHz[0m
|
|
[0m[INFO ] CPU: ID 706a1, Geminilake B0, ucode: 00000039[0m
|
|
[0m[INFO ] CPU: AES Supported, TXT Not Supported, VT Supported[0m
|
|
[0m[INFO ] MCH: device id 31f0 (rev 03) is Geminilake[0m
|
|
[0m[INFO ] PCH: device id 31e8 (rev 03) is Geminilake[0m
|
|
[0m[INFO ] IGD: device id 3184 (rev 03) is Geminilake[0m
|
|
[0m[DEBUG] pm1_sts: 0000 pm1_en: 0100 pm1_cnt: 00000000[0m
|
|
[0m[DEBUG] gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000[0m
|
|
[0m[DEBUG] gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000[0m
|
|
[0m[DEBUG] gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000[0m
|
|
[0m[DEBUG] gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000[0m
|
|
[0m[DEBUG] prsts: 00000000[0m
|
|
[0m[DEBUG] tco_sts: 0000 0000[0m
|
|
[0m[DEBUG] gen_pmcon1: 04004004 gen_pmcon2: 00003a00 gen_pmcon3: 00000000[0m
|
|
[0m[DEBUG] prev_sleep_state 0[0m
|
|
[0m[INFO ] CBFS: Found 'fspm.bin' @0x51100 size 0x2cb68 in mcache @0xfef0a020[0m
|
|
[0m[DEBUG] FMAP: area RW_MRC_CACHE found @ 5d0000 (65536 bytes)[0m
|
|
[0m[DEBUG] FMAP: area RW_VAR_MRC_CACHE found @ 5e0000 (65536 bytes)[0m
|
|
[0m[DEBUG] CBMEM:[0m
|
|
[0m[DEBUG] IMD: root @ 0x79fff000 254 entries.[0m
|
|
[0m[DEBUG] IMD: root @ 0x79ffec00 62 entries.[0m
|
|
[0m[DEBUG] External stage cache:[0m
|
|
[0m[DEBUG] IMD: root @ 0x7afff000 254 entries.[0m
|
|
[0m[DEBUG] IMD: root @ 0x7affec00 62 entries.[0m
|
|
[0m[DEBUG] FMAP: area RW_MRC_CACHE found @ 5d0000 (65536 bytes)[0m
|
|
[0m[DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'.[0m
|
|
[0m[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x800000[0m
|
|
[0m[DEBUG] MRC: cache data 'RW_MRC_CACHE' needs update.[0m
|
|
[0m[INFO ] REGF update can't fit. Will empty.[0m
|
|
[0m[DEBUG] MRC: updated 'RW_MRC_CACHE'.[0m
|
|
[0m[DEBUG] CPU: frequency set to 2700 MHz[0m
|
|
[0m[DEBUG] FMAP: area RW_VAR_MRC_CACHE found @ 5e0000 (65536 bytes)[0m
|
|
[0m[DEBUG] MRC: Checking cached data update for 'RW_VAR_MRC_CACHE'.[0m
|
|
[0m[DEBUG] MRC: cache data 'RW_VAR_MRC_CACHE' needs update.[0m
|
|
[0m[DEBUG] MRC: updated 'RW_VAR_MRC_CACHE'.[0m
|
|
[0m[DEBUG] 4 DIMMs found[0m
|
|
[0m[DEBUG] SMM Memory Map[0m
|
|
[0m[DEBUG] SMRAM : 0x7a000000 0x1000000[0m
|
|
[0m[DEBUG] Subregion 0: 0x7a000000 0xf00000[0m
|
|
[0m[DEBUG] Subregion 1: 0x7af00000 0x100000[0m
|
|
[0m[DEBUG] Subregion 2: 0x7b000000 0x0[0m
|
|
[0m[DEBUG] top_of_ram = 0x7a000000[0m
|
|
[0m[DEBUG] Normal boot[0m
|
|
[0m[INFO ] CBFS: Found 'fallback/postcar' @0xada80 size 0x587c in mcache @0xfef0a0f8[0m
|
|
[0m[DEBUG] Loading module at 0x79bcf000 with entry 0x79bcf031. filesize: 0x5460 memsize: 0xb7d0[0m
|
|
[0m[DEBUG] Processing 247 relocs. Offset value of 0x77bcf000[0m
|
|
[0m[DEBUG] BS: romstage times (exec / console): total (unknown) / 274 ms[0m
|
|
[0m
|
|
[0m
|
|
[1m[NOTE ] coreboot-4.17-591-g9f262a8f12-dirty Wed Jul 13 07:32:27 UTC 2022 postcar starting (log level: 7)...[0m
|
|
[0m[DEBUG] Normal boot[0m
|
|
[0m[INFO ] CBFS: Found 'fallback/ramstage' @0x2dc80 size 0x1ab86 in mcache @0x79bdd0dc[0m
|
|
[0m[DEBUG] Loading module at 0x79b7a000 with entry 0x79b7a000. filesize: 0x39158 memsize: 0x53550[0m
|
|
[0m[DEBUG] Processing 3911 relocs. Offset value of 0x75b7a000[0m
|
|
[0m[DEBUG] BS: postcar times (exec / console): total (unknown) / 41 ms[0m
|
|
[0m
|
|
[0m
|
|
[1m[NOTE ] coreboot-4.17-591-g9f262a8f12-dirty Wed Jul 13 07:32:27 UTC 2022 ramstage starting (log level: 7)...[0m
|
|
[0m[DEBUG] Normal boot[0m
|
|
[0m[INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x8c40 size 0x25000 in mcache @0x79bdd0ac[0m
|
|
[0m[DEBUG] microcode: sig=0x706a1 pf=0x1 revision=0x39[0m
|
|
[0m[INFO ] microcode: load microcode patch[0m
|
|
[7m[ERROR] microcode: Update failed[0m
|
|
[0m[INFO ] CBFS: Found 'fsps.bin' @0x7dcc0 size 0x2f000 in mcache @0x79bdd234[0m
|
|
[0m[DEBUG] Detected 4 core, 4 thread CPU.[0m
|
|
[0m[INFO ] Will perform SMM setup.[0m
|
|
[0m[INFO ] CPU: Intel(R) Pentium(R) Silver N5000 CPU @ 1.10GHz.[0m
|
|
[0m[INFO ] LAPIC 0x0 in XAPIC mode.[0m
|
|
[0m[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178[0m
|
|
[0m[DEBUG] Processing 18 relocs. Offset value of 0x00030000[0m
|
|
[0m[DEBUG] Attempting to start 3 APs[0m
|
|
[0m[DEBUG] Waiting for 10ms after sending INIT.[0m
|
|
[0m[DEBUG] Waiting for SIPI to complete...[0m
|
|
[0m[DEBUG] done.[0m
|
|
[0m[INFO ] LAPIC 0x4 in XAPIC mode.[0m
|
|
[0m[INFO ] LAPIC 0x2 in XAPIC mode.[0m
|
|
[0m[DEBUG] Waiting for SIPI to complete...[0m
|
|
[0m[DEBUG] done.[0m
|
|
[0m[INFO ] AP: slot 3 apic_id 2, MCU rev: 0x00000039[0m
|
|
[0m[INFO ] AP: slot 2 apic_id 4, MCU rev: 0x00000039[0m
|
|
[0m[INFO ] LAPIC 0x6 in XAPIC mode.[0m
|
|
[0m[INFO ] AP: slot 1 apic_id 6, MCU rev: 0x00000039[0m
|
|
[0m[DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1e0 memsize: 0x1e0[0m
|
|
[0m[DEBUG] Processing 11 relocs. Offset value of 0x00038000[0m
|
|
[0m[DEBUG] smm_module_setup_stub: stack_top = 0x7a002000[0m
|
|
[0m[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800[0m
|
|
[0m[DEBUG] smm_module_setup_stub: runtime.start32_offset = 0x4c[0m
|
|
[0m[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000[0m
|
|
[0m[DEBUG] SMM Module: stub loaded at 38000. Will call 0x79b92bdc[0m
|
|
[0m[DEBUG] Installing permanent SMM handler to 0x7a000000[0m
|
|
[0m[DEBUG] FX_SAVE [0x7aeff800-0x7af00000][0m
|
|
[0m[DEBUG] HANDLER [0x7aefc000-0x7aeff790][0m
|
|
[0m
|
|
[0m[DEBUG] CPU 0[0m
|
|
[0m[DEBUG] ss0 [0x7aefbc00-0x7aefc000][0m
|
|
[0m[DEBUG] stub0 [0x7aef4000-0x7aef41e0][0m
|
|
[0m
|
|
[0m[DEBUG] CPU 1[0m
|
|
[0m[DEBUG] ss1 [0x7aefb800-0x7aefbc00][0m
|
|
[0m[DEBUG] stub1 [0x7aef3c00-0x7aef3de0][0m
|
|
[0m
|
|
[0m[DEBUG] CPU 2[0m
|
|
[0m[DEBUG] ss2 [0x7aefb400-0x7aefb800][0m
|
|
[0m[DEBUG] stub2 [0x7aef3800-0x7aef39e0][0m
|
|
[0m
|
|
[0m[DEBUG] CPU 3[0m
|
|
[0m[DEBUG] ss3 [0x7aefb000-0x7aefb400][0m
|
|
[0m[DEBUG] stub3 [0x7aef3400-0x7aef35e0][0m
|
|
[0m
|
|
[0m[DEBUG] stacks [0x7a000000-0x7a002000][0m
|
|
[0m[DEBUG] Loading module at 0x7aefc000 with entry 0x7aefcdf9. filesize: 0x3690 memsize: 0x3790[0m
|
|
[0m[DEBUG] Processing 218 relocs. Offset value of 0x7aefc000[0m
|
|
[0m[DEBUG] Loading module at 0x7aef4000 with entry 0x7aef4000. filesize: 0x1e0 memsize: 0x1e0[0m
|
|
[0m[DEBUG] Processing 11 relocs. Offset value of 0x7aef4000[0m
|
|
[0m[DEBUG] smm_module_setup_stub: stack_top = 0x7a002000[0m
|
|
[0m[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800[0m
|
|
[0m[DEBUG] smm_module_setup_stub: runtime.start32_offset = 0x4c[0m
|
|
[0m[DEBUG] smm_module_setup_stub: runtime.smm_size = 0xf00000[0m
|
|
[0m[DEBUG] SMM Module: placing smm entry code at 7aef3c00, cpu # 0x1[0m
|
|
[0m[DEBUG] SMM Module: placing smm entry code at 7aef3800, cpu # 0x2[0m
|
|
[0m[DEBUG] SMM Module: placing smm entry code at 7aef3400, cpu # 0x3[0m
|
|
[0m[DEBUG] SMM Module: stub loaded at 7aef4000. Will call 0x7aefcdf9[0m
|
|
[0m[DEBUG] Clearing SMI status registers[0m
|
|
[0m[DEBUG] SMI_STS: TCO [0m
|
|
[0m[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7aeec000, cpu = 0[0m
|
|
[0m[DEBUG] Relocation complete.[0m
|
|
[0m[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7aeeb400, cpu = 3[0m
|
|
[0m[DEBUG] Relocation complete.[0m
|
|
[0m[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7aeebc00, cpu = 1[0m
|
|
[0m[DEBUG] Relocation complete.[0m
|
|
[0m[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7aeeb800, cpu = 2[0m
|
|
[0m[DEBUG] Relocation complete.[0m
|
|
[0m[INFO ] Initializing CPU #0[0m
|
|
[0m[DEBUG] CPU: vendor Intel device 706a1[0m
|
|
[0m[DEBUG] CPU: family 06, model 7a, stepping 01[0m
|
|
[0m[INFO ] microcode: load microcode patch[0m
|
|
[7m[ERROR] microcode: Update failed[0m
|
|
[0m[INFO ] CPU #0 initialized[0m
|
|
[0m[INFO ] Initializing CPU #3[0m
|
|
[0m[INFO ] Initializing CPU #1[0m
|
|
[0m[DEBUG] CPU: vendor Intel device 706a1[0m
|
|
[0m[DEBUG] CPU: family 06, model 7a, stepping 01[0m
|
|
[0m[DEBUG] CPU: vendor Intel device 706a1[0m
|
|
[0m[DEBUG] CPU: family 06, model 7a, stepping 01[0m
|
|
[0m[INFO ] Initializing CPU #2[0m
|
|
[0m[INFO ] microcode: load microcode patch[0m
|
|
[0m[DEBUG] CPU: vendor Intel device 706a1[0m
|
|
[7m[ERROR] microcode: Update failed[0m
|
|
[0m[DEBUG] CPU: family 06, model 7a, stepping 01[0m
|
|
[0m[INFO ] microcode: load microcode patch[0m
|
|
[0m[INFO ] CPU #3 initialized[0m
|
|
[7m[ERROR] microcode: Update failed[0m
|
|
[0m[INFO ] microcode: load microcode patch[0m
|
|
[0m[INFO ] CPU #1 initialized[0m
|
|
[7m[ERROR] microcode: Update failed[0m
|
|
[0m[INFO ] CPU #2 initialized[0m
|
|
[0m[INFO ] bsp_do_flight_plan done after 411 msecs.[0m
|
|
[0m[DEBUG] Enabling SMIs.[0m
|
|
[0m[DEBUG] BS: BS_DEV_INIT_CHIPS entry times (exec / console): 179 / 365 ms[0m
|
|
[0m[INFO ] CBFS: Found 'vbt.bin' @0xacd00 size 0x559 in mcache @0x79bdd258[0m
|
|
[0m[INFO ] Found a VBT of 5632 bytes after decompression[0m
|
|
[1;4m[WARN ] PCI:00.1: Could not disable the device[0m
|
|
[1;4m[WARN ] PCI:03.0: Could not disable the device[0m
|
|
[1;4m[WARN ] PCI:0d.0: Could not disable the device[0m
|
|
[1;4m[WARN ] PCI:0d.1: Could not disable the device[0m
|
|
[1;4m[WARN ] PCI:0d.3: Could not disable the device[0m
|
|
[1;4m[WARN ] PCI:1a.0: Could not disable the device[0m
|
|
[0m[DEBUG] WEAK: src/soc/intel/apollolake/chip.c/mainboard_silicon_init_params called[0m
|
|
[0m[INFO ] FSPS returned 0[0m
|
|
[0m[INFO ] ITSS IRQ Polarities Before:[0m
|
|
[0m[INFO ] IPC0: 0xffffeef8[0m
|
|
[0m[INFO ] IPC1: 0xffffffff[0m
|
|
[0m[INFO ] IPC2: 0xffffffff[0m
|
|
[0m[INFO ] IPC3: 0x00ffffff[0m
|
|
[0m[INFO ] ITSS IRQ Polarities After:[0m
|
|
[0m[INFO ] IPC0: 0xffffeef8[0m
|
|
[0m[INFO ] IPC1: 0x0003ffff[0m
|
|
[0m[INFO ] IPC2: 0x00000000[0m
|
|
[0m[INFO ] IPC3: 0x00000000[0m
|
|
[0m[INFO ] CPU TDP = 6 Watts[0m
|
|
[0m[INFO ] CPU PL1 = 10 Watts[0m
|
|
[0m[INFO ] CPU PL2 = 15 Watts[0m
|
|
[0m[DEBUG] BS: BS_DEV_INIT_CHIPS run times (exec / console): 164 / 107 ms[0m
|
|
[0m[INFO ] Enumerating buses...[0m
|
|
[0m[DEBUG] Root Device scanning...[0m
|
|
[0m[DEBUG] DOMAIN: 0000 enabled[0m
|
|
[0m[DEBUG] CPU_CLUSTER: 0 enabled[0m
|
|
[0m[DEBUG] MMIO: fed40000 enabled[0m
|
|
[0m[DEBUG] DOMAIN: 0000 scanning...[0m
|
|
[0m[DEBUG] PCI: pci_scan_bus for bus 00[0m
|
|
[0m[DEBUG] PCI: 00:00.0 [8086/31f0] enabled[0m
|
|
[0m[DEBUG] PCI: 00:00.1 [8086/318c] disabled[0m
|
|
[0m[DEBUG] PCI: 00:02.0 [8086/3184] enabled[0m
|
|
[0m[DEBUG] PCI: 00:0c.0 [8086/31dc] enabled[0m
|
|
[0m[DEBUG] PCI: 00:0d.0 [8086/3192] disabled[0m
|
|
[0m[DEBUG] PCI: 00:0d.1 [8086/3194] disabled[0m
|
|
[0m[DEBUG] PCI: 00:0d.2 [8086/3196] enabled[0m
|
|
[0m[DEBUG] PCI: 00:0d.3 [8086/31ec] disabled[0m
|
|
[0m[DEBUG] PCI: 00:0e.0 [8086/3198] enabled[0m
|
|
[0m[DEBUG] No CMOS option 'me_state'.[0m
|
|
[0m[DEBUG] PCI: 00:0f.0 [8086/319a] enabled[0m
|
|
[0m[DEBUG] PCI: 00:0f.1 [8086/319c] enabled[0m
|
|
[0m[DEBUG] PCI: 00:0f.2 [8086/319e] enabled[0m
|
|
[0m[DEBUG] PCI: 00:12.0 [8086/31e3] enabled[0m
|
|
[0m[DEBUG] PCI: 00:15.0 [8086/31a8] enabled[0m
|
|
[0m[DEBUG] PCI: 00:17.0 [8086/31b4] enabled[0m
|
|
[0m[DEBUG] PCI: 00:17.3 [8086/31ba] enabled[0m
|
|
[0m[DEBUG] PCI: 00:18.0 [8086/31bc] enabled[0m
|
|
[0m[DEBUG] PCI: 00:18.2 [8086/31c0] enabled[0m
|
|
[0m[DEBUG] PCI: 00:19.2 [8086/31c6] enabled[0m
|
|
[0m[DEBUG] PCI: 00:1f.0 [8086/31e8] enabled[0m
|
|
[0m[DEBUG] PCI: 00:1f.1 [8086/31d4] disabled[0m
|
|
[1;4m[WARN ] PCI: Leftover static devices:[0m
|
|
[1;4m[WARN ] PCI: 00:00.2[0m
|
|
[1;4m[WARN ] PCI: 00:03.0[0m
|
|
[1;4m[WARN ] PCI: 00:11.0[0m
|
|
[1;4m[WARN ] PCI: 00:13.0[0m
|
|
[1;4m[WARN ] PCI: 00:13.1[0m
|
|
[1;4m[WARN ] PCI: 00:13.2[0m
|
|
[1;4m[WARN ] PCI: 00:13.3[0m
|
|
[1;4m[WARN ] PCI: 00:14.0[0m
|
|
[1;4m[WARN ] PCI: 00:14.1[0m
|
|
[1;4m[WARN ] PCI: 00:15.1[0m
|
|
[1;4m[WARN ] PCI: 00:16.0[0m
|
|
[1;4m[WARN ] PCI: 00:16.1[0m
|
|
[1;4m[WARN ] PCI: 00:16.2[0m
|
|
[1;4m[WARN ] PCI: 00:16.3[0m
|
|
[1;4m[WARN ] PCI: 00:17.1[0m
|
|
[1;4m[WARN ] PCI: 00:17.2[0m
|
|
[1;4m[WARN ] PCI: 00:18.1[0m
|
|
[1;4m[WARN ] PCI: 00:18.3[0m
|
|
[1;4m[WARN ] PCI: 00:19.0[0m
|
|
[1;4m[WARN ] PCI: 00:19.1[0m
|
|
[1;4m[WARN ] PCI: 00:1a.0[0m
|
|
[1;4m[WARN ] PCI: 00:1b.0[0m
|
|
[1;4m[WARN ] PCI: 00:1c.0[0m
|
|
[1;4m[WARN ] PCI: 00:1d.0[0m
|
|
[1;4m[WARN ] PCI: 00:1e.0[0m
|
|
[1;4m[WARN ] PCI: Check your devicetree.cb.[0m
|
|
[0m[DEBUG] PCI: 00:02.0 scanning...[0m
|
|
[0m[DEBUG] scan_bus: bus PCI: 00:02.0 finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:0c.0 scanning...[0m
|
|
[0m[DEBUG] GENERIC: 0.0 enabled[0m
|
|
[0m[DEBUG] scan_bus: bus PCI: 00:0c.0 finished in 3 msecs[0m
|
|
[0m[DEBUG] PCI: 00:0e.0 scanning...[0m
|
|
[0m[DEBUG] scan_bus: bus PCI: 00:0e.0 finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:15.0 scanning...[0m
|
|
[0m[DEBUG] scan_bus: bus PCI: 00:15.0 finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:17.0 scanning...[0m
|
|
[0m[DEBUG] scan_bus: bus PCI: 00:17.0 finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:17.3 scanning...[0m
|
|
[0m[DEBUG] scan_bus: bus PCI: 00:17.3 finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:19.2 scanning...[0m
|
|
[0m[DEBUG] scan_bus: bus PCI: 00:19.2 finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:1f.0 scanning...[0m
|
|
[0m[DEBUG] PNP: 004e.0 enabled[0m
|
|
[0m[DEBUG] PNP: 004e.1 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.2 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.4 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.5 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.6 enabled[0m
|
|
[0m[DEBUG] PNP: 004e.a disabled[0m
|
|
[0m[DEBUG] PNP: 004e.f disabled[0m
|
|
[0m[DEBUG] PNP: 004e.10 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.11 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.12 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.13 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.14 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.17 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.18 disabled[0m
|
|
[0m[DEBUG] PNP: 004e.19 disabled[0m
|
|
[0m[DEBUG] scan_bus: bus PCI: 00:1f.0 finished in 61 msecs[0m
|
|
[0m[DEBUG] scan_bus: bus DOMAIN: 0000 finished in 352 msecs[0m
|
|
[0m[DEBUG] scan_bus: bus Root Device finished in 374 msecs[0m
|
|
[0m[INFO ] done[0m
|
|
[0m[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 1 / 390 ms[0m
|
|
[0m[DEBUG] FMAP: area UNIFIED_MRC_CACHE found @ 5c0000 (196608 bytes)[0m
|
|
[0m[INFO ] MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.[0m
|
|
[0m[DEBUG] BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 14 ms[0m
|
|
[0m[DEBUG] found VGA at PCI: 00:02.0[0m
|
|
[0m[DEBUG] Setting up VGA for PCI: 00:02.0[0m
|
|
[0m[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000[0m
|
|
[0m[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device[0m
|
|
[0m[INFO ] Allocating resources...[0m
|
|
[0m[INFO ] Reading resources...[0m
|
|
[0m[DEBUG] SA MMIO resource: PCIEXBAR -> base = 0xe0000000, size = 0x10000000[0m
|
|
[0m[DEBUG] SA MMIO resource: MCHBAR -> base = 0xfed10000, size = 0x8000[0m
|
|
[0m[INFO ] Available memory above 4GB: 6144M[0m
|
|
[7m[ERROR] PNP: 004e.0 missing read_resources[0m
|
|
[0m[INFO ] Done reading resources.[0m
|
|
[0m[INFO ] === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===[0m
|
|
[0m[INFO ] === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===[0m
|
|
[0m[DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:1f.0 84 base 000006a0 limit 000006af io (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:1f.0 88 base 00000080 limit 0000008f io (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PNP: 004e.6 60 base 00000060 limit 00000060 io (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PNP: 004e.6 62 base 00000064 limit 00000064 io (fixed)[0m
|
|
[0m[INFO ] DOMAIN: 0000: Resource ranges:[0m
|
|
[0m[INFO ] * Base: 1000, Size: f000, Tag: 100[0m
|
|
[0m[DEBUG] PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io[0m
|
|
[0m[DEBUG] PCI: 00:12.0 20 * [0x1040 - 0x105f] limit: 105f io[0m
|
|
[0m[DEBUG] PCI: 00:12.0 18 * [0x1060 - 0x1067] limit: 1067 io[0m
|
|
[0m[DEBUG] PCI: 00:12.0 1c * [0x1068 - 0x106b] limit: 106b io[0m
|
|
[0m[DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done[0m
|
|
[0m[DEBUG] DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 02 base fed64000 limit fed64fff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 03 base fed65000 limit fed65fff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 04 base 00000000 limit 0009ffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 05 base 000c0000 limit 79ffffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 06 base 7a000000 limit 7fffffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 07 base 100000000 limit 27fffffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 08 base 000a0000 limit 000bffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 09 base 000c0000 limit 000fffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 0a base 11800000 limit 11bfffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 0b base 11000000 limit 117fffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 0c base 12000000 limit 120fffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 0d base 12150000 limit 12150fff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 0e base 12140000 limit 1214ffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 0f base 10000000 limit 10ffffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 10 base 11c00000 limit 11ffffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:00.0 11 base 12100000 limit 1213ffff mem (fixed)[0m
|
|
[0m[DEBUG] update_constraints: PCI: 00:18.2 10 base ddffc000 limit ddffcfff mem (fixed)[0m
|
|
[0m[INFO ] DOMAIN: 0000: Resource ranges:[0m
|
|
[0m[INFO ] * Base: 80000000, Size: 5dffc000, Tag: 200[0m
|
|
[0m[INFO ] * Base: ddffd000, Size: 2003000, Tag: 200[0m
|
|
[0m[INFO ] * Base: f0000000, Size: ed10000, Tag: 200[0m
|
|
[0m[INFO ] * Base: fed18000, Size: 4c000, Tag: 200[0m
|
|
[0m[INFO ] * Base: fed66000, Size: 129a000, Tag: 200[0m
|
|
[0m[INFO ] * Base: 280000000, Size: 7d80000000, Tag: 100200[0m
|
|
[0m[DEBUG] PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem[0m
|
|
[0m[DEBUG] PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem[0m
|
|
[0m[DEBUG] PCI: 00:0e.0 20 * [0x91000000 - 0x910fffff] limit: 910fffff mem[0m
|
|
[0m[DEBUG] PCI: 00:15.0 10 * [0x91100000 - 0x9110ffff] limit: 9110ffff mem[0m
|
|
[0m[DEBUG] PCI: 00:0c.0 10 * [0x91110000 - 0x91113fff] limit: 91113fff mem[0m
|
|
[0m[DEBUG] PCI: 00:0e.0 10 * [0x91114000 - 0x91117fff] limit: 91117fff mem[0m
|
|
[0m[DEBUG] PCI: 00:12.0 10 * [0x91118000 - 0x91119fff] limit: 91119fff mem[0m
|
|
[0m[DEBUG] PCI: 00:0d.2 10 * [0x9111a000 - 0x9111afff] limit: 9111afff mem[0m
|
|
[0m[DEBUG] PCI: 00:0f.0 10 * [0x9111b000 - 0x9111bfff] limit: 9111bfff mem[0m
|
|
[0m[DEBUG] PCI: 00:0f.1 10 * [0x9111c000 - 0x9111cfff] limit: 9111cfff mem[0m
|
|
[0m[DEBUG] PCI: 00:0f.2 10 * [0x9111d000 - 0x9111dfff] limit: 9111dfff mem[0m
|
|
[0m[DEBUG] PCI: 00:17.0 10 * [0x9111e000 - 0x9111efff] limit: 9111efff mem[0m
|
|
[0m[DEBUG] PCI: 00:17.0 18 * [0x9111f000 - 0x9111ffff] limit: 9111ffff mem[0m
|
|
[0m[DEBUG] PCI: 00:17.3 10 * [0x91120000 - 0x91120fff] limit: 91120fff mem[0m
|
|
[0m[DEBUG] PCI: 00:17.3 18 * [0x91121000 - 0x91121fff] limit: 91121fff mem[0m
|
|
[0m[DEBUG] PCI: 00:18.0 10 * [0x91122000 - 0x91122fff] limit: 91122fff mem[0m
|
|
[0m[DEBUG] PCI: 00:18.0 18 * [0x91123000 - 0x91123fff] limit: 91123fff mem[0m
|
|
[0m[DEBUG] PCI: 00:18.2 18 * [0x91124000 - 0x91124fff] limit: 91124fff mem[0m
|
|
[0m[DEBUG] PCI: 00:19.2 10 * [0x91125000 - 0x91125fff] limit: 91125fff mem[0m
|
|
[0m[DEBUG] PCI: 00:19.2 18 * [0x91126000 - 0x91126fff] limit: 91126fff mem[0m
|
|
[0m[DEBUG] PCI: 00:12.0 24 * [0x91127000 - 0x911277ff] limit: 911277ff mem[0m
|
|
[0m[DEBUG] PCI: 00:12.0 14 * [0x91128000 - 0x911280ff] limit: 911280ff mem[0m
|
|
[0m[DEBUG] DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done[0m
|
|
[0m[INFO ] === Resource allocator: DOMAIN: 0000 - resource allocation complete ===[0m
|
|
[0m[DEBUG] PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64[0m
|
|
[0m[DEBUG] PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64[0m
|
|
[0m[DEBUG] PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io[0m
|
|
[0m[DEBUG] PCI: 00:0c.0 10 <- [0x0091110000 - 0x0091113fff] size 0x00004000 gran 0x0e mem64[0m
|
|
[0m[DEBUG] PCI: 00:0d.2 10 <- [0x009111a000 - 0x009111afff] size 0x00001000 gran 0x0c mem[0m
|
|
[0m[DEBUG] PCI: 00:0e.0 10 <- [0x0091114000 - 0x0091117fff] size 0x00004000 gran 0x0e mem64[0m
|
|
[0m[DEBUG] PCI: 00:0e.0 20 <- [0x0091000000 - 0x00910fffff] size 0x00100000 gran 0x14 mem64[0m
|
|
[0m[DEBUG] PCI: 00:0f.0 10 <- [0x009111b000 - 0x009111bfff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:0f.1 10 <- [0x009111c000 - 0x009111cfff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:0f.2 10 <- [0x009111d000 - 0x009111dfff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:12.0 10 <- [0x0091118000 - 0x0091119fff] size 0x00002000 gran 0x0d mem[0m
|
|
[0m[DEBUG] PCI: 00:12.0 14 <- [0x0091128000 - 0x00911280ff] size 0x00000100 gran 0x08 mem[0m
|
|
[0m[DEBUG] PCI: 00:12.0 18 <- [0x0000001060 - 0x0000001067] size 0x00000008 gran 0x03 io[0m
|
|
[0m[DEBUG] PCI: 00:12.0 1c <- [0x0000001068 - 0x000000106b] size 0x00000004 gran 0x02 io[0m
|
|
[0m[DEBUG] PCI: 00:12.0 20 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io[0m
|
|
[0m[DEBUG] PCI: 00:12.0 24 <- [0x0091127000 - 0x00911277ff] size 0x00000800 gran 0x0b mem[0m
|
|
[0m[DEBUG] PCI: 00:15.0 10 <- [0x0091100000 - 0x009110ffff] size 0x00010000 gran 0x10 mem64[0m
|
|
[0m[DEBUG] PCI: 00:17.0 10 <- [0x009111e000 - 0x009111efff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:17.0 18 <- [0x009111f000 - 0x009111ffff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:17.3 10 <- [0x0091120000 - 0x0091120fff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:17.3 18 <- [0x0091121000 - 0x0091121fff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:18.0 10 <- [0x0091122000 - 0x0091122fff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:18.0 18 <- [0x0091123000 - 0x0091123fff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:18.2 18 <- [0x0091124000 - 0x0091124fff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:19.2 10 <- [0x0091125000 - 0x0091125fff] size 0x00001000 gran 0x0c mem64[0m
|
|
[0m[DEBUG] PCI: 00:19.2 18 <- [0x0091126000 - 0x0091126fff] size 0x00001000 gran 0x0c mem64[0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[0m[DEBUG] LPC: enabling default decode range LPC_IOE_KBC_60_64[0m
|
|
[0m[DEBUG] LPC: enabling default decode range LPC_IOE_KBC_60_64[0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[7m[ERROR] LPC IO decode base 0![0m
|
|
[0m[INFO ] Done setting resources.[0m
|
|
[0m[INFO ] Done allocating resources.[0m
|
|
[0m[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 1 / 957 ms[0m
|
|
[0m[DEBUG] WEAK: src/soc/intel/apollolake/lockdown.c/soc_lockdown_config called[0m
|
|
[0m[DEBUG] BS: BS_DEV_RESOURCES exit times (exec / console): 0 / 8 ms[0m
|
|
[0m[INFO ] Enabling resources...[0m
|
|
[0m[DEBUG] PCI: 00:00.0 subsystem <- 8086/31f0[0m
|
|
[0m[DEBUG] PCI: 00:00.0 cmd <- 07[0m
|
|
[0m[DEBUG] PCI: 00:02.0 subsystem <- 8086/3184[0m
|
|
[0m[DEBUG] PCI: 00:02.0 cmd <- 03[0m
|
|
[0m[DEBUG] PCI: 00:0c.0 subsystem <- 8086/31dc[0m
|
|
[0m[DEBUG] PCI: 00:0c.0 cmd <- 02[0m
|
|
[0m[DEBUG] PCI: 00:0d.2 subsystem <- 8086/3196[0m
|
|
[0m[DEBUG] PCI: 00:0d.2 cmd <- 406[0m
|
|
[0m[DEBUG] PCI: 00:0e.0 subsystem <- 8086/3198[0m
|
|
[0m[DEBUG] PCI: 00:0e.0 cmd <- 06[0m
|
|
[0m[DEBUG] PCI: 00:0f.0 subsystem <- 8086/319a[0m
|
|
[0m[DEBUG] PCI: 00:0f.0 cmd <- 06[0m
|
|
[0m[DEBUG] PCI: 00:0f.1 subsystem <- ffff/ffff[0m
|
|
[0m[DEBUG] PCI: 00:0f.1 cmd <- ffff[0m
|
|
[0m[DEBUG] PCI: 00:0f.2 subsystem <- ffff/ffff[0m
|
|
[0m[DEBUG] PCI: 00:0f.2 cmd <- ffff[0m
|
|
[0m[DEBUG] PCI: 00:12.0 subsystem <- 8086/31e3[0m
|
|
[0m[DEBUG] PCI: 00:12.0 cmd <- 03[0m
|
|
[0m[DEBUG] PCI: 00:15.0 subsystem <- 8086/31a8[0m
|
|
[0m[DEBUG] PCI: 00:15.0 cmd <- 02[0m
|
|
[0m[DEBUG] PCI: 00:17.0 subsystem <- 8086/31b4[0m
|
|
[0m[DEBUG] PCI: 00:17.0 cmd <- 02[0m
|
|
[0m[DEBUG] PCI: 00:17.3 subsystem <- 8086/31ba[0m
|
|
[0m[DEBUG] PCI: 00:17.3 cmd <- 02[0m
|
|
[0m[DEBUG] PCI: 00:18.0 subsystem <- 8086/31bc[0m
|
|
[0m[DEBUG] PCI: 00:18.0 cmd <- 02[0m
|
|
[0m[DEBUG] PCI: 00:18.2 subsystem <- 8086/31c0[0m
|
|
[0m[DEBUG] PCI: 00:18.2 cmd <- 06[0m
|
|
[0m[DEBUG] PCI: 00:19.2 subsystem <- 8086/31c6[0m
|
|
[0m[DEBUG] PCI: 00:19.2 cmd <- 02[0m
|
|
[0m[DEBUG] PCI: 00:1f.0 subsystem <- 8086/31e8[0m
|
|
[0m[DEBUG] PCI: 00:1f.0 cmd <- 07[0m
|
|
[0m[INFO ] done.[0m
|
|
[0m[DEBUG] BS: BS_DEV_ENABLE run times (exec / console): 0 / 154 ms[0m
|
|
[0m[INFO ] Initialized TPM device Intel iTPM revision 0[0m
|
|
[0m[DEBUG] tis_open: Intel PTT is active.[0m
|
|
[0m[INFO ] tlcl_send_startup: Startup return code is 0[0m
|
|
[0m[INFO ] TPM: setup succeeded[0m
|
|
[0m[DEBUG] FMAP: area FPF_STATUS found @ 5b0000 (65536 bytes)[0m
|
|
[0m[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x800000[0m
|
|
[7m[ERROR] reply is too large[0m
|
|
[0m[DEBUG] BS: BS_DEV_INIT entry times (exec / console): 5 / 38 ms[0m
|
|
[0m[INFO ] Initializing devices...[0m
|
|
[0m[DEBUG] CPU_CLUSTER: 0 init[0m
|
|
[0m[DEBUG] CPU_CLUSTER: 0 init finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:00.0 init[0m
|
|
[0m[DEBUG] PCI: 00:00.0 init finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:02.0 init[0m
|
|
[0m[INFO ] GMA: Found VBT in CBFS[0m
|
|
[0m[INFO ] GMA: Found valid VBT in CBFS[0m
|
|
[0m[INFO ] framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32[0m
|
|
[0m[INFO ] x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000[0m
|
|
[0m[DEBUG] PCI: 00:02.0 init finished in 25 msecs[0m
|
|
[0m[DEBUG] PCI: 00:0d.2 init[0m
|
|
[0m[DEBUG] PCI: 00:0d.2 init finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:0e.0 init[0m
|
|
[0m[DEBUG] azalia_audio: base = 0x91114000[0m
|
|
[0m[DEBUG] azalia_audio: codec_mask = 05[0m
|
|
[0m[DEBUG] azalia_audio: Initializing codec #2[0m
|
|
[0m[DEBUG] azalia_audio: codec viddid: 8086280d[0m
|
|
[0m[DEBUG] azalia_audio: verb_size: 16[0m
|
|
[0m[DEBUG] azalia_audio: verb loaded.[0m
|
|
[0m[DEBUG] azalia_audio: Initializing codec #0[0m
|
|
[0m[DEBUG] azalia_audio: codec viddid: 10ec0269[0m
|
|
[0m[DEBUG] azalia_audio: verb_size: 60[0m
|
|
[0m[DEBUG] azalia_audio: verb loaded.[0m
|
|
[0m[DEBUG] PCI: 00:0e.0 init finished in 54 msecs[0m
|
|
[0m[DEBUG] PCI: 00:0f.0 init[0m
|
|
[0m[DEBUG] PCI: 00:0f.0 init finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:0f.1 init[0m
|
|
[0m[DEBUG] PCI: 00:0f.1 init finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:0f.2 init[0m
|
|
[0m[DEBUG] PCI: 00:0f.2 init finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:12.0 init[0m
|
|
[0m[DEBUG] PCI: 00:12.0 init finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:15.0 init[0m
|
|
[0m[DEBUG] PCI: 00:15.0 init finished in 0 msecs[0m
|
|
[0m[DEBUG] PCI: 00:17.0 init[0m
|
|
[0m[DEBUG] I2C bus 4 version 0x3132312a[0m
|
|
[0m[INFO ] DW I2C bus 4 at 0x9111e000 (400 KHz)[0m
|
|
[0m[DEBUG] PCI: 00:17.0 init finished in 9 msecs[0m
|
|
[0m[DEBUG] PCI: 00:17.3 init[0m
|
|
[0m[DEBUG] I2C bus 7 version 0x3132312a[0m
|
|
[0m[INFO ] DW I2C bus 7 at 0x91120000 (400 KHz)[0m
|
|
[0m[DEBUG] PCI: 00:17.3 init finished in 9 msecs[0m
|
|
[0m[DEBUG] PCI: 00:1f.0 init[0m
|
|
[0m[DEBUG] RTC Init[0m
|
|
[1;4m[WARN ] RTC: Clear requested[0m
|
|
[0m[DEBUG] PCI: 00:1f.0 init finished in 8 msecs[0m
|
|
[0m[DEBUG] PNP: 004e.6 init[0m
|
|
[0m[DEBUG] PNP: 004e.6 init finished in 11 msecs[0m
|
|
[0m[INFO ] Devices initialized[0m
|
|
[0m[DEBUG] BS: BS_DEV_INIT run times (exec / console): 20 / 232 ms[0m
|
|
[0m[DEBUG] FMAP: area SMMSTORE found @ 5f0000 (262144 bytes)[0m
|
|
[0m[DEBUG] smm store: 64 # blocks with size 0x1000[0m
|
|
[0m[INFO ] SMMSTORE: Setting up SMI handler[0m
|
|
[0m[DEBUG] ME: Version: Unavailable[0m
|
|
[0m[DEBUG] BS: BS_DEV_INIT exit times (exec / console): 2 / 21 ms[0m
|
|
[0m[INFO ] Finalize devices...[0m
|
|
[0m[DEBUG] PCI: 00:0f.0 final[0m
|
|
[0m[INFO ] Devices finalized[0m
|
|
[0m[DEBUG] BS: BS_POST_DEVICE run times (exec / console): 0 / 11 ms[0m
|
|
[0m[INFO ] CBFS: Found 'fallback/dsdt.aml' @0x49140 size 0x2f0f in mcache @0x79bdd198[0m
|
|
[1;4m[WARN ] CBFS: 'fallback/slic' not found.[0m
|
|
[0m[INFO ] ACPI: Writing ACPI tables at 79b09000.[0m
|
|
[0m[DEBUG] ACPI: * FACS[0m
|
|
[0m[DEBUG] ACPI: * DSDT[0m
|
|
[0m[DEBUG] ACPI: * FADT[0m
|
|
[0m[DEBUG] SCI is IRQ9[0m
|
|
[0m[DEBUG] ACPI: added table 1/32, length now 40[0m
|
|
[0m[DEBUG] ACPI: * SSDT[0m
|
|
[0m[DEBUG] PCI space above 4GB MMIO is at 0x280000000, len = 0x7d80000000[0m
|
|
[0m[DEBUG] Found 1 CPU(s) with 4/4 physical/logical core(s) each.[0m
|
|
[0m[INFO ] Turbo is available and visible[0m
|
|
[0m[DEBUG] PSS: 1101MHz power 6000 control 0x1b00 status 0x1b00[0m
|
|
[0m[DEBUG] PSS: 1100MHz power 6000 control 0xb00 status 0xb00[0m
|
|
[0m[DEBUG] PSS: 1000MHz power 5388 control 0xa00 status 0xa00[0m
|
|
[0m[DEBUG] PSS: 800MHz power 4213 control 0x800 status 0x800[0m
|
|
[0m[DEBUG] PSS: 1101MHz power 6000 control 0x1b00 status 0x1b00[0m
|
|
[0m[DEBUG] PSS: 1100MHz power 6000 control 0xb00 status 0xb00[0m
|
|
[0m[DEBUG] PSS: 1000MHz power 5388 control 0xa00 status 0xa00[0m
|
|
[0m[DEBUG] PSS: 800MHz power 4213 control 0x800 status 0x800[0m
|
|
[0m[DEBUG] PSS: 1101MHz power 6000 control 0x1b00 status 0x1b00[0m
|
|
[0m[DEBUG] PSS: 1100MHz power 6000 control 0xb00 status 0xb00[0m
|
|
[0m[DEBUG] PSS: 1000MHz power 5388 control 0xa00 status 0xa00[0m
|
|
[0m[DEBUG] PSS: 800MHz power 4213 control 0x800 status 0x800[0m
|
|
[0m[DEBUG] PSS: 1101MHz power 6000 control 0x1b00 status 0x1b00[0m
|
|
[0m[DEBUG] PSS: 1100MHz power 6000 control 0xb00 status 0xb00[0m
|
|
[0m[DEBUG] PSS: 1000MHz power 5388 control 0xa00 status 0xa00[0m
|
|
[0m[DEBUG] PSS: 800MHz power 4213 control 0x800 status 0x800[0m
|
|
[0m[DEBUG] PPI: Pending OS request: 0x48d859d8 (0x58d858d8)[0m
|
|
[0m[DEBUG] PPI: OS response: CMD 0x48c858c8 = 0x59d959d9[0m
|
|
[0m[INFO ] \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0[0m
|
|
[0m[DEBUG] ACPI: added table 2/32, length now 44[0m
|
|
[0m[DEBUG] ACPI: * MCFG[0m
|
|
[0m[DEBUG] ACPI: added table 3/32, length now 48[0m
|
|
[0m[DEBUG] ACPI: * TPM2[0m
|
|
[0m[DEBUG] TPM2 log created at 0x79af9000[0m
|
|
[0m[DEBUG] ACPI: added table 4/32, length now 52[0m
|
|
[0m[DEBUG] ACPI: * MADT[0m
|
|
[0m[DEBUG] SCI is IRQ9[0m
|
|
[0m[DEBUG] ACPI: added table 5/32, length now 56[0m
|
|
[0m[DEBUG] current = 79b0d1c0[0m
|
|
[0m[DEBUG] ACPI: * DMAR[0m
|
|
[0m[DEBUG] ACPI: added table 6/32, length now 60[0m
|
|
[0m[DEBUG] ACPI: added table 7/32, length now 64[0m
|
|
[0m[DEBUG] ACPI: * HPET[0m
|
|
[0m[DEBUG] ACPI: added table 8/32, length now 68[0m
|
|
[0m[INFO ] ACPI: done.[0m
|
|
[0m[DEBUG] ACPI tables: 17152 bytes.[0m
|
|
[0m[DEBUG] smbios_write_tables: 79af1000[0m
|
|
[0m[INFO ] Create SMBIOS type 16[0m
|
|
[0m[INFO ] Create SMBIOS type 17[0m
|
|
[0m[INFO ] Create SMBIOS type 20[0m
|
|
[0m[INFO ] GENERIC: 0.0 (WIFI Device)[0m
|
|
[0m[DEBUG] SMBIOS tables: 1305 bytes.[0m
|
|
[0m[DEBUG] Writing table forward entry at 0x00000500[0m
|
|
[0m[DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum b62b[0m
|
|
[0m[DEBUG] Writing coreboot table at 0x79b2d000[0m
|
|
[0m[INFO ] CBFS: Found 'cmos_layout.bin' @0xad400 size 0x620 in mcache @0x79bdd2b0[0m
|
|
[0m[DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES[0m
|
|
[0m[DEBUG] 1. 0000000000001000-000000000009ffff: RAM[0m
|
|
[0m[DEBUG] 2. 00000000000a0000-00000000000fffff: RESERVED[0m
|
|
[0m[DEBUG] 3. 0000000000100000-000000000fffffff: RAM[0m
|
|
[0m[DEBUG] 4. 0000000010000000-0000000012150fff: RESERVED[0m
|
|
[0m[DEBUG] 5. 0000000012151000-0000000079af0fff: RAM[0m
|
|
[0m[DEBUG] 6. 0000000079af1000-0000000079b79fff: CONFIGURATION TABLES[0m
|
|
[0m[DEBUG] 7. 0000000079b7a000-0000000079bcdfff: RAMSTAGE[0m
|
|
[0m[DEBUG] 8. 0000000079bce000-0000000079ffffff: CONFIGURATION TABLES[0m
|
|
[0m[DEBUG] 9. 000000007a000000-000000007fffffff: RESERVED[0m
|
|
[0m[DEBUG] 10. 00000000e0000000-00000000efffffff: RESERVED[0m
|
|
[0m[DEBUG] 11. 00000000fed10000-00000000fed17fff: RESERVED[0m
|
|
[0m[DEBUG] 12. 00000000fed64000-00000000fed65fff: RESERVED[0m
|
|
[0m[DEBUG] 13. 0000000100000000-000000027fffffff: RAM[0m
|
|
[0m[DEBUG] Wrote coreboot table at: 0x79b2d000, 0xb4c bytes, checksum bb75[0m
|
|
[0m[DEBUG] coreboot table: 2916 bytes.[0m
|
|
[0m[DEBUG] IMD ROOT 0. 0x79fff000 0x00001000[0m
|
|
[0m[DEBUG] IMD SMALL 1. 0x79ffe000 0x00001000[0m
|
|
[0m[DEBUG] FSP MEMORY 2. 0x79bfe000 0x00400000[0m
|
|
[0m[DEBUG] CONSOLE 3. 0x79bde000 0x00020000[0m
|
|
[0m[DEBUG] RO MCACHE 4. 0x79bdd000 0x00000388[0m
|
|
[0m[DEBUG] TIME STAMP 5. 0x79bdc000 0x00000910[0m
|
|
[0m[DEBUG] MEM INFO 6. 0x79bdb000 0x00000768[0m
|
|
[0m[DEBUG] AFTER CAR 7. 0x79bce000 0x0000d000[0m
|
|
[0m[DEBUG] RAMSTAGE 8. 0x79b79000 0x00055000[0m
|
|
[0m[DEBUG] REFCODE 9. 0x79b4a000 0x0002f000[0m
|
|
[0m[DEBUG] SMM BACKUP 10. 0x79b3a000 0x00010000[0m
|
|
[0m[DEBUG] IGD OPREGION11. 0x79b36000 0x00003597[0m
|
|
[0m[DEBUG] SMM COMBUFFER12. 0x79b35000 0x00001000[0m
|
|
[0m[DEBUG] COREBOOT 13. 0x79b2d000 0x00008000[0m
|
|
[0m[DEBUG] ACPI 14. 0x79b09000 0x00024000[0m
|
|
[0m[DEBUG] TPM2 TCGLOG15. 0x79af9000 0x00010000[0m
|
|
[0m[DEBUG] SMBIOS 16. 0x79af1000 0x00008000[0m
|
|
[0m[DEBUG] IMD small region:[0m
|
|
[0m[DEBUG] IMD ROOT 0. 0x79ffec00 0x00000400[0m
|
|
[0m[DEBUG] FSP RUNTIME 1. 0x79ffebe0 0x00000004[0m
|
|
[0m[DEBUG] FMAP 2. 0x79ffea00 0x000001dc[0m
|
|
[0m[DEBUG] POWER STATE 3. 0x79ffe9c0 0x00000040[0m
|
|
[0m[DEBUG] ROMSTAGE 4. 0x79ffe9a0 0x00000004[0m
|
|
[0m[DEBUG] ROMSTG STCK 5. 0x79ffe8e0 0x000000a8[0m
|
|
[0m[DEBUG] ACPI GNVS 6. 0x79ffe8a0 0x00000030[0m
|
|
[0m[DEBUG] TPM PPI 7. 0x79ffe740 0x0000015a[0m
|
|
[0m[DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 2 / 555 ms[0m
|
|
[0m[DEBUG] MTRR: Physical address space:[0m
|
|
[0m[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6[0m
|
|
[0m[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0[0m
|
|
[0m[DEBUG] 0x00000000000c0000 - 0x0000000079ffffff size 0x79f40000 type 6[0m
|
|
[0m[DEBUG] 0x000000007a000000 - 0x000000007fffffff size 0x06000000 type 0[0m
|
|
[0m[DEBUG] 0x0000000080000000 - 0x000000008fffffff size 0x10000000 type 1[0m
|
|
[0m[DEBUG] 0x0000000090000000 - 0x00000000ffffffff size 0x70000000 type 0[0m
|
|
[0m[DEBUG] 0x0000000100000000 - 0x000000027fffffff size 0x180000000 type 6[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x250 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x258 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x259 0x0000000000000000[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x268 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x269 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26a 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26b 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26c 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26d 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26e 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26f 0x0606060606060606[0m
|
|
[0m[DEBUG] CPU physical address size: 39 bits[0m
|
|
[0m[DEBUG] MTRR: default type WB/UC MTRR counts: 6/6.[0m
|
|
[0m[DEBUG] MTRR: UC selected as default type.[0m
|
|
[0m[DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6[0m
|
|
[0m[DEBUG] MTRR: 1 base 0x000000007a000000 mask 0x0000007ffe000000 type 0[0m
|
|
[0m[DEBUG] MTRR: 2 base 0x000000007c000000 mask 0x0000007ffc000000 type 0[0m
|
|
[0m[DEBUG] MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1[0m
|
|
[0m[DEBUG] MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6[0m
|
|
[0m[DEBUG] MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x250 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x258 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x259 0x0000000000000000[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x268 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x269 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26a 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26b 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26c 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26d 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26e 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26f 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x250 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x258 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x259 0x0000000000000000[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x268 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x269 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26a 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26b 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26c 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26d 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26e 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26f 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x250 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x258 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x259 0x0000000000000000[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x268 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x269 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26a 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26b 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26c 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26d 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26e 0x0606060606060606[0m
|
|
[0m[DEBUG] MTRR: Fixed MSR 0x26f 0x0606060606060606[0m
|
|
[0m[DEBUG] CPU physical address size: 39 bits[0m
|
|
[0m[DEBUG] CPU physical address size: 39 bits[0m
|
|
[0m[DEBUG] CPU physical address size: 39 bits[0m
|
|
[0m[DEBUG] MTRR: TEMPORARY Physical address space:[0m
|
|
[0m[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6[0m
|
|
[0m[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0[0m
|
|
[0m[DEBUG] 0x00000000000c0000 - 0x0000000079ffffff size 0x79f40000 type 6[0m
|
|
[0m[DEBUG] 0x000000007a000000 - 0x00000000ff7fffff size 0x85800000 type 0[0m
|
|
[0m[DEBUG] 0x00000000ff800000 - 0x00000000ffffffff size 0x00800000 type 5[0m
|
|
[0m[DEBUG] 0x0000000100000000 - 0x000000027fffffff size 0x180000000 type 6[0m
|
|
[0m[DEBUG] MTRR: default type WB/UC MTRR counts: 11/6.[0m
|
|
[0m[DEBUG] MTRR: UC selected as default type.[0m
|
|
[0m[DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6[0m
|
|
[0m[DEBUG] MTRR: 1 base 0x000000007a000000 mask 0x0000007ffe000000 type 0[0m
|
|
[0m[DEBUG] MTRR: 2 base 0x000000007c000000 mask 0x0000007ffc000000 type 0[0m
|
|
[0m[DEBUG] MTRR: 3 base 0x00000000ff800000 mask 0x0000007fff800000 type 5[0m
|
|
[0m[DEBUG] MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6[0m
|
|
[0m[DEBUG] MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6[0m
|
|
[0m
|
|
[0m[DEBUG] MTRR check[0m
|
|
[0m[DEBUG] Fixed MTRRs : Enabled[0m
|
|
[0m[DEBUG] Variable MTRRs: Enabled[0m
|
|
[0m
|
|
[0m[DEBUG] BS: BS_WRITE_TABLES exit times (exec / console): 143 / 309 ms[0m
|
|
[0m[INFO ] CBFS: Found 'fallback/payload' @0xb3340 size 0xf3afa in mcache @0x79bdd31c[0m
|
|
[0m[DEBUG] Checking segment from ROM address 0xffdd436c[0m
|
|
[0m[DEBUG] Checking segment from ROM address 0xffdd4388[0m
|
|
[0m[DEBUG] Loading segment from ROM address 0xffdd436c[0m
|
|
[0m[DEBUG] code (compression=1)[0m
|
|
[0m[DEBUG] New segment dstaddr 0x00800000 memsize 0x590000 srcaddr 0xffdd43a4 filesize 0xf3ac2[0m
|
|
[0m[DEBUG] Loading Segment: addr: 0x00800000 memsz: 0x0000000000590000 filesz: 0x00000000000f3ac2[0m
|
|
[0m[DEBUG] using LZMA[0m
|
|
[0m[DEBUG] Loading segment from ROM address 0xffdd4388[0m
|
|
[0m[DEBUG] Entry Point 0x00803468[0m
|
|
[0m[DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 282 / 64 ms[0m
|
|
[0m[DEBUG] CSE FWSTS1: 0x80003052[0m
|
|
[0m[DEBUG] CSE FWSTS2: 0x3b220000[0m
|
|
[0m[DEBUG] CSE FWSTS3: 0x00000000[0m
|
|
[0m[DEBUG] CSE FWSTS4: 0x00080004[0m
|
|
[0m[DEBUG] CSE FWSTS5: 0x00000000[0m
|
|
[0m[DEBUG] CSE FWSTS6: 0x40000000[0m
|
|
[0m[DEBUG] ME: Manufacturing Mode : YES[0m
|
|
[0m[DEBUG] ME: FPF status : unknown[0m
|
|
[0m[INFO ] Disabling Heci using PCR[0m
|
|
[0m[DEBUG] BS: BS_PAYLOAD_LOAD exit times (exec / console): 9 / 38 ms[0m
|
|
[0m[DEBUG] BS: BS_PAYLOAD_BOOT entry times (exec / console): 1 / 0 ms[0m
|
|
[0m[DEBUG] mp_park_aps done after 0 msecs.[0m
|
|
[0m[DEBUG] Jumping to boot code at 0x00803468(0x79b2d000)[0m
|
|
sizeof(UINTN) = 0x4
|
|
Guessing Top of Lower Usable DRAM:
|
|
0. 0000000000000000 - 0000000000000FFF [10]
|
|
1. 0000000000001000 - 000000000009FFFF [01]
|
|
2. 00000000000A0000 - 00000000000FFFFF [02]
|
|
3. 0000000000100000 - 000000000FFFFFFF [01]
|
|
4. 0000000010000000 - 0000000012150FFF [02]
|
|
5. 0000000012151000 - 0000000079AF0FFF [01]
|
|
6. 0000000079AF1000 - 0000000079FFFFFF [10]
|
|
7. 000000007A000000 - 000000007FFFFFFF [02]
|
|
8. 00000000E0000000 - 00000000EFFFFFFF [02]
|
|
9. 00000000FED10000 - 00000000FED17FFF [02]
|
|
10. 00000000FED64000 - 00000000FED65FFF [02]
|
|
11. 0000000100000000 - 000000027FFFFFFF [01]
|
|
Assuming TOLUD = 0x80000000
|
|
Building ResourceDescriptorHobs for usable memory:
|
|
0. 0000000000000000 - 0000000000000FFF [10]
|
|
1. 0000000000001000 - 000000000009FFFF [01]
|
|
buildhob: base = 0x1000, size = 0x9F000, type = 0x0
|
|
2. 00000000000A0000 - 00000000000FFFFF [02]
|
|
3. 0000000000100000 - 000000000FFFFFFF [01]
|
|
buildhob: base = 0x100000, size = 0xFF00000, type = 0x0
|
|
4. 0000000010000000 - 0000000012150FFF [02]
|
|
5. 0000000012151000 - 0000000079AF0FFF [01]
|
|
buildhob: base = 0x12151000, size = 0x679A0000, type = 0x0
|
|
6. 0000000079AF1000 - 0000000079FFFFFF [10]
|
|
7. 000000007A000000 - 000000007FFFFFFF [02]
|
|
8. 00000000E0000000 - 00000000EFFFFFFF [02]
|
|
9. 00000000FED10000 - 00000000FED17FFF [02]
|
|
10. 00000000FED64000 - 00000000FED65FFF [02]
|
|
11. 0000000100000000 - 000000027FFFFFFF [01]
|
|
buildhob: base = 0x100000000, size = 0x180000000, type = 0x0
|
|
Found coreboot video frame buffer information
|
|
physical_address: 0x80000000
|
|
x_resolution: 0x780
|
|
y_resolution: 0x438
|
|
bits_per_pixel: 0x20
|
|
bytes_per_line: 0x1E00
|
|
red_mask_size: 0x8
|
|
red_mask_pos: 0x10
|
|
green_mask_size: 0x8
|
|
green_mask_pos: 0x8
|
|
blue_mask_size: 0x8
|
|
blue_mask_pos: 0x0
|
|
reserved_mask_size: 0x8
|
|
reserved_mask_pos: 0x18
|
|
Created graphics info hob
|
|
Found Smm Store information
|
|
block size: 0x1000
|
|
number of blocks: 0x40
|
|
communication buffer: 0x79B35000
|
|
communication buffer size: 0x1000
|
|
MMIO address of store: 0xFFF71000
|
|
Created SmmStore info hob
|
|
Create smbios table gUniversalPayloadSmbiosTableGuid guid hob
|
|
Find CbMemTable Id 0x534D4254, base 79AF1000, size 0x8000
|
|
Detected Smbios Table at 0x79AF1000
|
|
Create ACPI table gUniversalPayloadAcpiTableGuid guid hob
|
|
Find CbMemTable Id 0x41435049, base 79B09000, size 0x24000
|
|
Detected ACPI Table at 0x79B09000
|
|
Rsdp at 0x79B09000
|
|
Rsdt at 0x79B09030, Xsdt at 0x79B090E0
|
|
Found Fadt in Rsdt
|
|
Found MM config address in Rsdt
|
|
PmCtrl Reg 0x404
|
|
PmTimer Reg 0x408
|
|
Reset Reg 0xCF9
|
|
Reset Value 0x6
|
|
PmEvt Reg 0x400
|
|
PmGpeEn Reg 0x430
|
|
PcieBaseAddr 0xE0000000
|
|
PcieBaseSize 0x10000000
|
|
Create acpi board info guid hob
|
|
Building ResourceDescriptorHobs for reserved memory:
|
|
0. 0000000000000000 - 0000000000000FFF [10]
|
|
buildhob: base = 0x0, size = 0x1000, type = 0x5
|
|
1. 0000000000001000 - 000000000009FFFF [01]
|
|
2. 00000000000A0000 - 00000000000FFFFF [02]
|
|
buildhob: base = 0xA0000, size = 0x60000, type = 0x5
|
|
3. 0000000000100000 - 000000000FFFFFFF [01]
|
|
4. 0000000010000000 - 0000000012150FFF [02]
|
|
buildhob: base = 0x10000000, size = 0x2151000, type = 0x5
|
|
5. 0000000012151000 - 0000000079AF0FFF [01]
|
|
6. 0000000079AF1000 - 0000000079FFFFFF [10]
|
|
buildhob: base = 0x79AF1000, size = 0x50F000, type = 0x5
|
|
7. 000000007A000000 - 000000007FFFFFFF [02]
|
|
buildhob: base = 0x7A000000, size = 0x6000000, type = 0x5
|
|
8. 00000000E0000000 - 00000000EFFFFFFF [02]
|
|
buildhob: base = 0xE0000000, size = 0x10000000, type = 0x1
|
|
9. 00000000FED10000 - 00000000FED17FFF [02]
|
|
buildhob: base = 0xFED10000, size = 0x8000, type = 0x1
|
|
10. 00000000FED64000 - 00000000FED65FFF [02]
|
|
buildhob: base = 0xFED64000, size = 0x2000, type = 0x1
|
|
11. 0000000100000000 - 000000027FFFFFFF [01]
|
|
Building hob to restrict memory resorces to below 4G.
|
|
DxeCoreEntryPoint = 0x4DE6FF6
|
|
PayloadEntry: AddressBits=39 5LevelPaging=0 1GPage=1
|
|
Pml5=1 Pml4=1 Pdp=512 TotalPage=2
|
|
HandOffToDxeCore() Stack Base: 0x4DAF000, Stack Size: 0x20000
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver C68DAA4E-7AB5-41E8-A91D-5954421053F3
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FC31D40
|
|
Loading driver at 0x0000FC2D000 EntryPoint=0x0000FC2DD62 BlSupportDxe.efi
|
|
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FC31B18
|
|
ProtectUefiImageCommon - 0xFC31D40
|
|
- 0x000000000FC2D000 - 0x0000000000001F00
|
|
PROGRESS CODE: V03040002 I0
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver F80697E9-7FD6-4665-8646-88E33EF71DFC
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FC312C0
|
|
Loading driver at 0x0000FC03000 EntryPoint=0x0000FC078B1 SecurityStubDxe.efi
|
|
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FC31618
|
|
ProtectUefiImageCommon - 0xFC312C0
|
|
- 0x000000000FC03000 - 0x0000000000007AC0
|
|
PROGRESS CODE: V03040002 I0
|
|
InstallProtocolInterface: 94AB2F58-1438-4EF1-9152-18941A3A0E68 FC0A3E8
|
|
InstallProtocolInterface: A46423E3-4617-49F1-B9FF-D1BFA9115839 FC0A3E0
|
|
InstallProtocolInterface: 15853D7C-3DDF-43E0-A1CB-EBF85B8F872C FC0A3C0
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver 1A1E4886-9517-440E-9FDE-3BE44CEE2136
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FC2C940
|
|
Loading driver at 0x0000FBCC000 EntryPoint=0x0000FBD5734 CpuDxe.efi
|
|
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FC2C718
|
|
ProtectUefiImageCommon - 0xFC2C940
|
|
- 0x000000000FBCC000 - 0x00000000000194C0
|
|
PROGRESS CODE: V03040002 I0
|
|
Paging: added 512 pages to page table pool
|
|
CurrentPagingContext:
|
|
MachineType - 0x8664
|
|
PageTableBase - 0x4A01000
|
|
Attributes - 0xC0000006
|
|
InstallProtocolInterface: 26BACCB1-6F42-11D4-BCE7-0080C73C8881 FBDEFA0
|
|
MemoryProtectionCpuArchProtocolNotify:
|
|
ProtectUefiImageCommon - 0x4DF67C8
|
|
- 0x0000000004DCF000 - 0x0000000000031000
|
|
ProtectUefiImageCommon - 0xFC46840
|
|
- 0x000000000FC1A000 - 0x000000000000C940
|
|
ProtectUefiImageCommon - 0xFC33BC0
|
|
- 0x000000000FC13000 - 0x00000000000066C0
|
|
ProtectUefiImageCommon - 0xFC32940
|
|
- 0x000000000FF29000 - 0x0000000000006000
|
|
SetUefiImageMemoryAttributes - 0x000000000FF29000 - 0x0000000000001000 (0x0000000000004000)
|
|
SetUefiImageMemoryAttributes - 0x000000000FF2A000 - 0x0000000000003000 (0x0000000000020000)
|
|
SetUefiImageMemoryAttributes - 0x000000000FF2D000 - 0x0000000000002000 (0x0000000000004000)
|
|
ProtectUefiImageCommon - 0xFC2A1C0
|
|
- 0x000000000FF23000 - 0x0000000000006000
|
|
SetUefiImageMemoryAttributes - 0x000000000FF23000 - 0x0000000000001000 (0x0000000000004000)
|
|
SetUefiImageMemoryAttributes - 0x000000000FF24000 - 0x0000000000004000 (0x0000000000020000)
|
|
SetUefiImageMemoryAttributes - 0x000000000FF28000 - 0x0000000000001000 (0x0000000000004000)
|
|
ProtectUefiImageCommon - 0xFC31D40
|
|
- 0x000000000FC2D000 - 0x0000000000001F00
|
|
ProtectUefiImageCommon - 0xFC312C0
|
|
- 0x000000000FC03000 - 0x0000000000007AC0
|
|
ProtectUefiImageCommon - 0xFC2C940
|
|
- 0x000000000FBCC000 - 0x00000000000194C0
|
|
ConvertPages: failed to find range 0 - FFF
|
|
ConvertPages: failed to find range A0000 - BFFFF
|
|
ConvertPages: failed to find range C0000 - FFFFF
|
|
ConvertPages: failed to find range 10000000 - 12150FFF
|
|
ConvertPages: failed to find range 79AF1000 - 79FFFFFF
|
|
ConvertPages: failed to find range 7A000000 - 7FFFFFFF
|
|
ConvertPages: failed to find range E0000000 - EFFFFFFF
|
|
ConvertPages: failed to find range FEC00000 - FEC00FFF
|
|
ConvertPages: failed to find range FEC80000 - FECFFFFF
|
|
Failed to update capability: [15] 00000000FED00000 - 00000000FED003FF (C000000000000001 -> C000000000026001)
|
|
ConvertPages: failed to find range FED10000 - FED17FFF
|
|
ConvertPages: failed to find range FED64000 - FED65FFF
|
|
AP Loop Mode is 1
|
|
AP Vector: non-16-bit = FC12000/31C
|
|
WakeupBufferStart = 87000, WakeupBufferSize = E5
|
|
AP Vector: 16-bit = 87000/41, ExchangeInfo = 87041/A4
|
|
CpuDxe: 5-Level Paging = 0
|
|
APIC MODE is 1
|
|
MpInitLib: Find 4 processors in system.
|
|
GetMicrocodePatchInfoFromHob: Microcode patch cache HOB is not found.
|
|
CpuDxe: 5-Level Paging = 0
|
|
CPU[0000]: Microcode revision = 00000000, expected = 00000000
|
|
CPU[0001]: Microcode revision = 00000000, expected = 00000000
|
|
CPU[0002]: Microcode revision = 00000000, expected = 00000000
|
|
CPU[0003]: Microcode revision = 00000000, expected = 00000000
|
|
Detect CPU count: 4
|
|
Does not find any HOB stored CPU BIST information!
|
|
InstallProtocolInterface: 3FDDA605-A76E-4F46-AD29-12F4531B3D08 FBDF120
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver C8339973-A563-4561-B858-D8476F9DEFC4
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FC2B340
|
|
Loading driver at 0x0000FC0E000 EntryPoint=0x0000FC0ED6D Metronome.efi
|
|
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FC27098
|
|
ProtectUefiImageCommon - 0xFC2B340
|
|
- 0x000000000FC0E000 - 0x0000000000001B80
|
|
PROGRESS CODE: V03040002 I0
|
|
InstallProtocolInterface: 26BACCB2-6F42-11D4-BCE7-0080C73C8881 FC0F990
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver B601F8C4-43B7-4784-95B1-F4226CB40CEE
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FC271C0
|
|
Loading driver at 0x0000FF1D000 EntryPoint=0x0000FF1F3FC RuntimeDxe.efi
|
|
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FC27598
|
|
ProtectUefiImageCommon - 0xFC271C0
|
|
- 0x000000000FF1D000 - 0x0000000000006000
|
|
SetUefiImageMemoryAttributes - 0x000000000FF1D000 - 0x0000000000001000 (0x0000000000004008)
|
|
SetUefiImageMemoryAttributes - 0x000000000FF1E000 - 0x0000000000003000 (0x0000000000020008)
|
|
SetUefiImageMemoryAttributes - 0x000000000FF21000 - 0x0000000000002000 (0x0000000000004008)
|
|
PROGRESS CODE: V03040002 I0
|
|
InstallProtocolInterface: B7DFB4E1-052F-449F-87BE-9818FC91B733 FF210C0
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver 4B28E4C7-FF36-4E10-93CF-A82159E777C5
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FC110C0
|
|
Loading driver at 0x0000FF17000 EntryPoint=0x0000FF19695 ResetSystemRuntimeDxe.efi
|
|
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FC11918
|
|
ProtectUefiImageCommon - 0xFC110C0
|
|
- 0x000000000FF17000 - 0x0000000000006000
|
|
SetUefiImageMemoryAttributes - 0x000000000FF17000 - 0x0000000000001000 (0x0000000000004008)
|
|
SetUefiImageMemoryAttributes - 0x000000000FF18000 - 0x0000000000003000 (0x0000000000020008)
|
|
SetUefiImageMemoryAttributes - 0x000000000FF1B000 - 0x0000000000002000 (0x0000000000004008)
|
|
PROGRESS CODE: V03040002 I0
|
|
InstallProtocolInterface: 27CFAC88-46CC-11D4-9A38-0090273FC14D 0
|
|
InstallProtocolInterface: 9DA34AE0-EAF9-4BBF-8EC3-FD60226C44BE FF1B148
|
|
InstallProtocolInterface: 695D7835-8D47-4C11-AB22-FA8ACCE7AE7A FF1B188
|
|
InstallProtocolInterface: 2DF6BA0B-7092-440D-BD04-FB091EC3F3C1 FF1B108
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver A0402FCA-6B25-4CEA-B7DD-C08F99714B29
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FC100C0
|
|
Loading driver at 0x0000FF0F000 EntryPoint=0x0000FF1194F SmmStoreFvbRuntimeDxe.efi
|
|
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FC10C98
|
|
ProtectUefiImageCommon - 0xFC100C0
|
|
- 0x000000000FF0F000 - 0x0000000000008000
|
|
SetUefiImageMemoryAttributes - 0x000000000FF0F000 - 0x0000000000001000 (0x0000000000004008)
|
|
SetUefiImageMemoryAttributes - 0x000000000FF10000 - 0x0000000000005000 (0x0000000000020008)
|
|
SetUefiImageMemoryAttributes - 0x000000000FF15000 - 0x0000000000002000 (0x0000000000004008)
|
|
PROGRESS CODE: V03040002 I0
|
|
SmmStoreLibInitialize: No memory space descriptor for com buffer found
|
|
NvStorageBase:0xFFF71000, NvStorageSize:0x40000
|
|
ValidateFvHeader: No Firmware Volume header present
|
|
FvbInitialize: The FVB Header is not valid.
|
|
FvbInitialize: Installing a correct one for this volume.
|
|
InstallProtocolInterface: D1A86E3F-0707-4C35-83CD-DC2C29C891A3 0
|
|
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B FFDD900
|
|
InstallProtocolInterface: 8F644FA9-E850-4DB1-9CE2-0B44698E8DA4 FFDD8A8
|
|
SmmStoreInitInstance: Created a new instance
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver A19B1FE7-C1BC-49F8-875F-54A5D542443F
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FC0D0C0
|
|
Loading driver at 0x0000FBFA000 EntryPoint=0x0000FBFB3BA CpuIo2Dxe.efi
|
|
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FC0DA98
|
|
ProtectUefiImageCommon - 0xFC0D0C0
|
|
- 0x000000000FBFA000 - 0x0000000000002180
|
|
PROGRESS CODE: V03040002 I0
|
|
InstallProtocolInterface: AD61F191-AE5F-4C0E-B9FA-E869D288C64F FBFBFC0
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver 96B5C032-DF4C-4B6E-8232-438DCF448D0E
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FC0D540
|
|
Loading driver at 0x0000FC01000 EntryPoint=0x0000FC01F3B NullMemoryTestDxe.efi
|
|
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FBFF018
|
|
ProtectUefiImageCommon - 0xFC0D540
|
|
- 0x000000000FC01000 - 0x0000000000001EC0
|
|
PROGRESS CODE: V03040002 I0
|
|
InstallProtocolInterface: 309DE7F1-7F5E-4ACE-B49C-531BE5AA95EF FC02CA0
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver 348C4D62-BFBD-4882-9ECE-C80BB1C4783B
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FBFF0C0
|
|
Loading driver at 0x0000FB8A000 EntryPoint=0x0000FBA48E1 HiiDatabase.efi
|
|
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FBFFA18
|
|
ProtectUefiImageCommon - 0xFBFF0C0
|
|
- 0x000000000FB8A000 - 0x0000000000020B00
|
|
PROGRESS CODE: V03040002 I0
|
|
InstallProtocolInterface: E9CA4775-8657-47FC-97E7-7ED65A084324 FBAA628
|
|
InstallProtocolInterface: 0FD96974-23AA-4CDC-B9CB-98D17750322A FBAA6A0
|
|
InstallProtocolInterface: EF9FC172-A1B2-4693-B327-6D32FC416042 FBAA6C8
|
|
InstallProtocolInterface: 587E72D7-CC50-4F79-8209-CA291FC1A10F FBAA720
|
|
InstallProtocolInterface: 0A8BADD5-03B8-4D19-B128-7B8F0EDAA596 FBAA750
|
|
InstallProtocolInterface: 31A6406A-6BDF-4E46-B2A2-EBAA89C40920 FBAA648
|
|
InstallProtocolInterface: 1A1241E6-8F19-41A9-BC0E-E8EF39E06546 FBAA670
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver 13AC6DD0-73D0-11D4-B06B-00AA00BD6DE7
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FC0C0C0
|
|
Loading driver at 0x0000FBEC000 EntryPoint=0x0000FBF051E EbcDxe.efi
|
|
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FBFF798
|
|
ProtectUefiImageCommon - 0xFC0C0C0
|
|
- 0x000000000FBEC000 - 0x0000000000006100
|
|
PROGRESS CODE: V03040002 I0
|
|
InstallProtocolInterface: 13AC6DD1-73D0-11D4-B06B-00AA00BD6DE7 FC0C918
|
|
InstallProtocolInterface: 96F46153-97A7-4793-ACC1-FA19BF78EA97 FBF1AA0
|
|
InstallProtocolInterface: 2755590C-6F3C-42FA-9EA4-A3BA543CDA25 FC0C498
|
|
InstallProtocolInterface: AAEACCFD-F27B-4C17-B610-75CA1F2DFB52 FC0BF98
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver F9D88642-0737-49BC-81B5-6889CD57D9EA
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FC0BC40
|
|
Loading driver at 0x0000FBE7000 EntryPoint=0x0000FBE978E SmbiosDxe.efi
|
|
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FC0BB18
|
|
ProtectUefiImageCommon - 0xFC0BC40
|
|
- 0x000000000FBE7000 - 0x0000000000004200
|
|
PROGRESS CODE: V03040002 I0
|
|
InstallProtocolInterface: 03583FF6-CB36-4940-947E-B9B39F4AFAF7 FBEB050
|
|
SmbiosAdd: Smbios type 0 with size 0x31 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 0 with size 0x31 is added to 64-bit table
|
|
SmbiosCreateTable: Initialize 32-bit entry point structure
|
|
SmbiosCreateTable() re-allocate SMBIOS 32-bit table
|
|
SmbiosCreateTable: Initialize 64-bit entry point structure
|
|
SmbiosCreate64BitTable() re-allocate SMBIOS 64-bit table
|
|
SmbiosAdd: Smbios type 1 with size 0x3A is added to 32-bit table
|
|
SmbiosAdd: Smbios type 1 with size 0x3A is added to 64-bit table
|
|
SmbiosAdd: Smbios type 2 with size 0x2A is added to 32-bit table
|
|
SmbiosAdd: Smbios type 2 with size 0x2A is added to 64-bit table
|
|
SmbiosAdd: Smbios type 3 with size 0x2D is added to 32-bit table
|
|
SmbiosAdd: Smbios type 3 with size 0x2D is added to 64-bit table
|
|
SmbiosAdd: Smbios type 4 with size 0x72 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 4 with size 0x72 is added to 64-bit table
|
|
SmbiosAdd: Smbios type 7 with size 0x23 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 7 with size 0x23 is added to 64-bit table
|
|
SmbiosAdd: Smbios type 7 with size 0x23 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 7 with size 0x23 is added to 64-bit table
|
|
SmbiosAdd: Smbios type 7 with size 0x23 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 7 with size 0x23 is added to 64-bit table
|
|
SmbiosAdd: Smbios type 16 with size 0x19 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 16 with size 0x19 is added to 64-bit table
|
|
SmbiosAdd: Smbios type 17 with size 0x76 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 17 with size 0x76 is added to 64-bit table
|
|
SmbiosAdd: Smbios type 17 with size 0x79 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 17 with size 0x79 is added to 64-bit table
|
|
SmbiosAdd: Smbios type 17 with size 0x77 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 17 with size 0x77 is added to 64-bit table
|
|
SmbiosAdd: Smbios type 17 with size 0x76 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 17 with size 0x76 is added to 64-bit table
|
|
SmbiosAdd: Smbios type 19 with size 0x21 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 19 with size 0x21 is added to 64-bit table
|
|
SmbiosAdd: Smbios type 20 with size 0x25 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 20 with size 0x25 is added to 64-bit table
|
|
SmbiosAdd: Smbios type 20 with size 0x25 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 20 with size 0x25 is added to 64-bit table
|
|
SmbiosAdd: Smbios type 20 with size 0x25 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 20 with size 0x25 is added to 64-bit table
|
|
SmbiosAdd: Smbios type 20 with size 0x25 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 20 with size 0x25 is added to 64-bit table
|
|
SmbiosAdd: Smbios type 32 with size 0xD is added to 32-bit table
|
|
SmbiosAdd: Smbios type 32 with size 0xD is added to 64-bit table
|
|
SmbiosAdd: Smbios type 41 with size 0x26 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 41 with size 0x26 is added to 64-bit table
|
|
SmbiosAdd: Smbios type 41 with size 0x28 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 41 with size 0x28 is added to 64-bit table
|
|
SmbiosAdd: Smbios type 41 with size 0x1C is added to 32-bit table
|
|
SmbiosAdd: Smbios type 41 with size 0x1C is added to 64-bit table
|
|
SmbiosAdd: Smbios type 133 with size 0x15 is added to 32-bit table
|
|
SmbiosAdd: Smbios type 133 with size 0x15 is added to 64-bit table
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver 9A5163E7-5C29-453F-825C-837A46A81E15
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FBF6040
|
|
Loading driver at 0x0000FBF3000 EntryPoint=0x0000FBF4975 SerialDxe.efi
|
|
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FBFD398
|
|
ProtectUefiImageCommon - 0xFBF6040
|
|
- 0x000000000FBF3000 - 0x0000000000002800
|
|
PROGRESS CODE: V03040002 I0
|
|
InstallProtocolInterface: BB25CF6F-F1D4-11D2-9A0C-0090273FC1FD FBF5520
|
|
InstallProtocolInterface: 09576E91-6D3F-11D2-8E39-00A0C969723B FBF5620
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver 9622E42C-8E38-4A08-9E8F-54F784652F6B
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FBF69C0
|
|
Loading driver at 0x0000FBBC000 EntryPoint=0x0000FBC0651 AcpiTableDxe.efi
|
|
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FBF6818
|
|
ProtectUefiImageCommon - 0xFBF69C0
|
|
- 0x000000000FBBC000 - 0x0000000000007B80
|
|
PROGRESS CODE: V03040002 I0
|
|
InstallProtocolInterface: FFE06BDD-6107-46A6-7BB2-5A9C7EC5275C FBF90A0
|
|
InstallProtocolInterface: EB97088E-CFDF-49C6-BE4B-D906A5B20E86 FBF90B0
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver 6D33944A-EC75-4855-A54D-809C75241F6C
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FBF9240
|
|
Loading driver at 0x0000FA58000 EntryPoint=0x0000FA687D6 BdsDxe.efi
|
|
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FBF9998
|
|
ProtectUefiImageCommon - 0xFBF9240
|
|
- 0x000000000FA58000 - 0x0000000000018E00
|
|
PROGRESS CODE: V03040002 I0
|
|
InstallProtocolInterface: 665E3FF6-46CC-11D4-9A38-0090273FC14D FA70950
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver 6CE6B0DE-781C-4F6C-B42D-98346C614BEC
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FBC9BC0
|
|
Loading driver at 0x0000FBB8000 EntryPoint=0x0000FBB9A89 HpetTimerDxe.efi
|
|
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FBF9518
|
|
ProtectUefiImageCommon - 0xFBC9BC0
|
|
- 0x000000000FBB8000 - 0x0000000000003940
|
|
PROGRESS CODE: V03040002 I0
|
|
Init HPET Timer Driver
|
|
HPET Base Address = 0xFED00000
|
|
HPET_GENERAL_CAPABILITIES_ID = 0x031ABA858086A701
|
|
HPET_GENERAL_CONFIGURATION = 0x0000000000000000
|
|
HPET_GENERAL_INTERRUPT_STATUS = 0x0000000000000000
|
|
HPET_MAIN_COUNTER = 0x000000000BD452C2
|
|
HPET Main Counter Period = 52083333 (fs)
|
|
HPET_TIMER0_CONFIGURATION = 0x00F0000000008030
|
|
HPET_TIMER0_COMPARATOR = 0xFFFFFFFFFFFFFFFF
|
|
HPET_TIMER0_MSI_ROUTE = 0x0000000000000000
|
|
HPET_TIMER1_CONFIGURATION = 0x00F0000000008000
|
|
HPET_TIMER1_COMPARATOR = 0x00000000FFFFFFFF
|
|
HPET_TIMER1_MSI_ROUTE = 0x0000000000000000
|
|
HPET_TIMER2_CONFIGURATION = 0x00F0080000008000
|
|
HPET_TIMER2_COMPARATOR = 0x0000000079C1DE58
|
|
HPET_TIMER2_MSI_ROUTE = 0x0000000000000000
|
|
HPET_TIMER3_CONFIGURATION = 0x00F0100000008000
|
|
HPET_TIMER3_COMPARATOR = 0x00000000FFFFFFFF
|
|
HPET_TIMER3_MSI_ROUTE = 0x0000000000000000
|
|
HPET_TIMER4_CONFIGURATION = 0x000000000000C000
|
|
HPET_TIMER4_COMPARATOR = 0x00000000FFFFFFFF
|
|
HPET_TIMER4_MSI_ROUTE = 0x0000000000000000
|
|
HPET_TIMER5_CONFIGURATION = 0x000000000000C000
|
|
HPET_TIMER5_COMPARATOR = 0x00000000FFFFFFFF
|
|
HPET_TIMER5_MSI_ROUTE = 0x0000000000000000
|
|
HPET_TIMER6_CONFIGURATION = 0x000000000000C000
|
|
HPET_TIMER6_COMPARATOR = 0x00000000FFFFFFFF
|
|
HPET_TIMER6_MSI_ROUTE = 0x0000000000000000
|
|
HPET_TIMER7_CONFIGURATION = 0x000000000000C000
|
|
HPET_TIMER7_COMPARATOR = 0x00000000FFFFFFFF
|
|
HPET_TIMER7_MSI_ROUTE = 0x0000000000000000
|
|
Choose 64-bit HPET timer.
|
|
HPET Interrupt Mode MSI
|
|
HPET Interrupt Vector = 0x40
|
|
HPET Counter Mask = 0xFFFFFFFFFFFFFFFF
|
|
HPET Timer Period = 100000
|
|
HPET Timer Count = 0x000000000002EE00
|
|
HPET_TIMER0_CONFIGURATION = 0x00F000000000C034
|
|
HPET_TIMER0_COMPARATOR = 0x000000000BDD1CC3
|
|
HPET_TIMER0_MSI_ROUTE = 0xFEE0000000000140
|
|
InstallProtocolInterface: 26BACCB3-6F42-11D4-BCE7-0080C73C8881 FBBB6E0
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver FE5CEA76-4F72-49E8-986F-2CD899DFFE5D
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FBC91C0
|
|
Loading driver at 0x0000FBAC000 EntryPoint=0x0000FBAFEB8 FaultTolerantWriteDxe.efi
|
|
InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FBC9418
|
|
ProtectUefiImageCommon - 0xFBC91C0
|
|
- 0x000000000FBAC000 - 0x0000000000005B40
|
|
PROGRESS CODE: V03040002 I0
|
|
Ftw: FtwWorkSpaceLba - 0x1F, WorkBlockSize - 0x1000, FtwWorkSpaceBase - 0x0
|
|
Ftw: FtwSpareLba - 0x20, SpareBlockSize - 0x1000
|
|
Ftw: NumberOfWorkBlock - 0x1, FtwWorkBlockLba - 0x1F
|
|
Ftw: WorkSpaceLbaInSpare - 0x0, WorkSpaceBaseInSpare - 0x0
|
|
Ftw: Remaining work space size - FE0
|
|
Ftw: Work block header check mismatch
|
|
Ftw: Work block header check mismatch
|
|
Ftw: Both working and spare blocks are invalid, init workspace
|
|
Ftw: start to reclaim work space
|
|
Ftw: reclaim work space successfully
|
|
InstallProtocolInterface: 3EBD9E82-2C78-4DE6-9786-8D4BFCB7C881 FBC7028
|
|
PROGRESS CODE: V03040003 I0
|
|
Loading driver CBD2E4D5-7068-4FF5-B462-9822B4AD8D60
|
|
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FBC6C40
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Loading driver at 0x0000FEFE000 EntryPoint=0x0000FF07DA5 VariableRuntimeDxe.efi
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InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FBC6118
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ProtectUefiImageCommon - 0xFBC6C40
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- 0x000000000FEFE000 - 0x0000000000011000
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SetUefiImageMemoryAttributes - 0x000000000FEFE000 - 0x0000000000001000 (0x0000000000004008)
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SetUefiImageMemoryAttributes - 0x000000000FEFF000 - 0x000000000000E000 (0x0000000000020008)
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SetUefiImageMemoryAttributes - 0x000000000FF0D000 - 0x0000000000002000 (0x0000000000004008)
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PROGRESS CODE: V03040002 I0
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VarCheckLibRegisterSetVariableCheckHandler - 0xFF0273A Success
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Variable driver common space: 0x1EF9C 0x1EF9C 0x1EF9C
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Variable driver will work without auth variable support!
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InstallProtocolInterface: CD3D0A05-9E24-437C-A891-1EE053DB7638 FF0D7F0
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InstallProtocolInterface: AF23B340-97B4-4685-8D4F-A3F28169B21D FF0D7C0
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InstallProtocolInterface: 1E5668E2-8481-11D4-BCF1-0080C73C8881 0
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RecordSecureBootPolicyVarData GetVariable SecureBoot Status E
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InstallProtocolInterface: 6441F818-6362-4E44-B570-7DBA31DD2453 0
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VarCheckLibRegisterSetVariableCheckHandler - 0xFF0249B Success
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InstallProtocolInterface: 81D1675C-86F6-48DF-BD95-9A6E4F0925C3 FF0D760
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PROGRESS CODE: V03040003 I0
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Loading driver EBF342FE-B1D3-4EF8-957C-8048606FF671
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InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FBC5BC0
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Loading driver at 0x0000FA20000 EntryPoint=0x0000FA3215C SetupBrowser.efi
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InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FBC5F18
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ProtectUefiImageCommon - 0xFBC5BC0
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- 0x000000000FA20000 - 0x000000000001B400
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PROGRESS CODE: V03040002 I0
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InstallProtocolInterface: B9D4C360-BCFB-4F9B-9298-53C136982258 FA3AE50
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InstallProtocolInterface: A770C357-B693-4E6D-A6CF-D21C728E550B FA3AE80
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InstallProtocolInterface: 1F73B18D-4630-43C1-A1DE-6F80855D7DA4 FA3AE60
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PROGRESS CODE: V03040003 I0
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Loading driver F74D20EE-37E7-48FC-97F7-9B1047749C69
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InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FBC4040
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Loading driver at 0x0000EC9D000 EntryPoint=0x0000EC9DC26 LogoDxe.efi
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InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FBC4D18
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InstallProtocolInterface: 6A1EE763-D47A-43B4-AABE-EF1DE2AB56FC EC9E970
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ProtectUefiImageCommon - 0xFBC4040
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- 0x000000000EC9D000 - 0x0000000000028B40
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PROGRESS CODE: V03040002 I0
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InstallProtocolInterface: 53CD299F-2BC1-40C0-8C07-23F64FDB30E0 EC9E740
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PROGRESS CODE: V03040003 I0
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Loading driver 128FB770-5E79-4176-9E51-9BB268A17DD1
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InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B FBC43C0
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Loading driver at 0x0000FA49000 EntryPoint=0x0000FA510EB PciHostBridgeDxe.efi
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InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF FBC4718
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ProtectUefiImageCommon - 0xFBC43C0
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- 0x000000000FA49000 - 0x000000000000E480
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PROGRESS CODE: V03040002 I0
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InitRootBridge: populated root bus 0, with room for 0 subordinate bus(es)
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RootBridge: PciRoot(0x0)
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Support/Attr: 7001F / 7001F
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DmaAbove4G: No
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NoExtConfSpace: No
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AllocAttr: 0 ()
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Bus: 0 - 0 Translation=0
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Io: 1000 - EFBF Translation=0
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Mem: 80000000 - DDFFCFFF Translation=0
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MemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0
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PMem: FFFFFFFFFFFFFFFF - 0 Translation=0
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PMemAbove4G: FFFFFFFFFFFFFFFF - 0 Translation=0
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CpuDxe: 5-Level
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