|
*** Pre-CBMEM romstage console overflowed, log truncated! ***
|
|
imC 0, 1, 3: 3c
|
|
timC 0, 1, 4: 46
|
|
timC 0, 1, 5: 47
|
|
timC 0, 1, 6: 28
|
|
timC 0, 1, 7: 51
|
|
timC 1, 0, 0: 56
|
|
timC 1, 0, 1: 59
|
|
timC 1, 0, 2: 35
|
|
timC 1, 0, 3: 48
|
|
timC 1, 0, 4: 3e
|
|
timC 1, 0, 5: 48
|
|
timC 1, 0, 6: 23
|
|
timC 1, 0, 7: 55
|
|
timC 1, 1, 0: 1d
|
|
timC 1, 1, 1: 1d
|
|
timC 1, 1, 2: 3b
|
|
timC 1, 1, 3: 3f
|
|
timC 1, 1, 4: 48
|
|
timC 1, 1, 5: 48
|
|
timC 1, 1, 6: 26
|
|
timC 1, 1, 7: 4e
|
|
normalize 0, 0, 8: mat 180
|
|
normalize 0, 0, 8: delta -5
|
|
normalize 0, 1, 8: mat 180
|
|
normalize 0, 1, 8: delta -5
|
|
normalize 1, 0, 8: mat 130
|
|
normalize 1, 0, 8: delta -4
|
|
normalize 1, 1, 8: mat 205
|
|
normalize 1, 1, 8: delta -5
|
|
OTHP [400c] = 690
|
|
OTHP [440c] = 690
|
|
t123: 1912, 6000, 7620
|
|
ME: FW Partition Table : OK
|
|
ME: Bringup Loader Failure : NO
|
|
ME: Firmware Init Complete : NO
|
|
ME: Manufacturing Mode : NO
|
|
ME: Boot Options Present : NO
|
|
ME: Update In Progress : NO
|
|
ME: Current Working State : Recovery
|
|
ME: Current Operation State : Bring up
|
|
ME: Current Operation Mode : Normal
|
|
ME: Error Code : No Error
|
|
ME: Progress Phase : BUP Phase
|
|
ME: Power Management Event : Pseudo-global reset
|
|
ME: Progress Phase State : Waiting for DID BIOS message
|
|
ME: FWS2: 0x161f017a
|
|
ME: Bist in progress: 0x0
|
|
ME: ICC Status : 0x1
|
|
ME: Invoke MEBx : 0x1
|
|
ME: CPU replaced : 0x1
|
|
ME: MBP ready : 0x1
|
|
ME: MFS failure : 0x1
|
|
ME: Warm reset req : 0x0
|
|
ME: CPU repl valid : 0x1
|
|
ME: (Reserved) : 0x0
|
|
ME: FW update req : 0x0
|
|
ME: (Reserved) : 0x0
|
|
ME: Current state : 0x1f
|
|
ME: Current PM event: 0x6
|
|
ME: Progress code : 0x1
|
|
Full training required
|
|
PASSED! Tell ME that DRAM is ready
|
|
ME: FWS2: 0x162c017a
|
|
ME: Bist in progress: 0x0
|
|
ME: ICC Status : 0x1
|
|
ME: Invoke MEBx : 0x1
|
|
ME: CPU replaced : 0x1
|
|
ME: MBP ready : 0x1
|
|
ME: MFS failure : 0x1
|
|
ME: Warm reset req : 0x0
|
|
ME: CPU repl valid : 0x1
|
|
ME: (Reserved) : 0x0
|
|
ME: FW update req : 0x0
|
|
ME: (Reserved) : 0x0
|
|
ME: Current state : 0x2c
|
|
ME: Current PM event: 0x6
|
|
ME: Progress code : 0x1
|
|
ME: Requested BIOS Action: Continue to boot
|
|
ME: FW Partition Table : OK
|
|
ME: Bringup Loader Failure : NO
|
|
ME: Firmware Init Complete : NO
|
|
ME: Manufacturing Mode : NO
|
|
ME: Boot Options Present : NO
|
|
ME: Update In Progress : NO
|
|
ME: Current Working State : Recovery
|
|
ME: Current Operation State : Bring up
|
|
ME: Current Operation Mode : Normal
|
|
ME: Error Code : No Error
|
|
ME: Progress Phase : BUP Phase
|
|
ME: Power Management Event : Pseudo-global reset
|
|
ME: Progress Phase State : 0x2c
|
|
memcfg DDR3 ref clock 133 MHz
|
|
memcfg DDR3 clock 1330 MHz
|
|
memcfg channel assignment: A: 0, B 1, C 2
|
|
memcfg channel[0] config (00620020):
|
|
ECC inactive
|
|
enhanced interleave mode on
|
|
rank interleave on
|
|
DIMMA 8192 MB width x8 dual rank, selected
|
|
DIMMB 0 MB width x8 single rank
|
|
memcfg channel[1] config (00620020):
|
|
ECC inactive
|
|
enhanced interleave mode on
|
|
rank interleave on
|
|
DIMMA 8192 MB width x8 dual rank, selected
|
|
DIMMB 0 MB width x8 single rank
|
|
CBMEM:
|
|
IMD: root @ bffff000 254 entries.
|
|
IMD: root @ bfffec00 62 entries.
|
|
Relocate MRC DATA from fefff9fc to bffdd000 (1440 bytes)
|
|
CBMEM entry for DIMM info: 0xbfffe960
|
|
POST: 0x3b
|
|
POST: 0x3c
|
|
POST: 0x3d
|
|
POST: 0x3f
|
|
Smashed stack detected in romstage!
|
|
Smashed stack detected in romstage!
|
|
Smashed stack detected in romstage!
|
|
Smashed stack detected in romstage!
|
|
MTRR Range: Start=ff000000 End=0 (Size 1000000)
|
|
MTRR Range: Start=0 End=1000000 (Size 1000000)
|
|
MTRR Range: Start=bf800000 End=c0000000 (Size 800000)
|
|
MTRR Range: Start=c0000000 End=c0800000 (Size 800000)
|
|
CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0)
|
|
CBFS: Locating 'fallback/ramstage'
|
|
CBFS: Found @ offset 2ff00 size 15696
|
|
Decompressing stage fallback/ramstage @ 0xbff97fc0 (260272 bytes)
|
|
Loading module at bff98000 with entry bff98000. filesize: 0x2d930 memsize: 0x3f870
|
|
Processing 3030 relocs. Offset value of 0xbfe98000
|
|
|
|
|
|
coreboot-4.6-643-g5764cbbf91 Mon Jul 3 23:30:50 UTC 2017 ramstage starting...
|
|
POST: 0x39
|
|
POST: 0x80
|
|
Normal boot.
|
|
POST: 0x70
|
|
BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0
|
|
POST: 0x71
|
|
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0
|
|
POST: 0x72
|
|
Enumerating buses...
|
|
Show all devs... Before device enumeration.
|
|
Root Device: enabled 1
|
|
CPU_CLUSTER: 0: enabled 1
|
|
APIC: 00: enabled 1
|
|
APIC: acac: enabled 0
|
|
DOMAIN: 0000: enabled 1
|
|
PCI: 00:00.0: enabled 1
|
|
PCI: 00:01.0: enabled 0
|
|
PCI: 00:02.0: enabled 1
|
|
PCI: 00:14.0: enabled 1
|
|
PCI: 00:16.0: enabled 1
|
|
PCI: 00:16.1: enabled 0
|
|
PCI: 00:16.2: enabled 0
|
|
PCI: 00:16.3: enabled 0
|
|
PCI: 00:19.0: enabled 1
|
|
PCI: 00:1a.0: enabled 1
|
|
PCI: 00:1b.0: enabled 1
|
|
PCI: 00:1c.0: enabled 1
|
|
PCI: 00:00.0: enabled 1
|
|
PCI: 00:1c.1: enabled 1
|
|
PCI: 00:1c.2: enabled 1
|
|
PCI: 00:1c.3: enabled 0
|
|
PCI: 00:1c.4: enabled 0
|
|
PCI: 00:1c.5: enabled 0
|
|
PCI: 00:1c.6: enabled 0
|
|
PCI: 00:1c.7: enabled 0
|
|
PCI: 00:1d.0: enabled 1
|
|
PCI: 00:1e.0: enabled 0
|
|
PCI: 00:1f.0: enabled 1
|
|
PNP: 00ff.1: enabled 1
|
|
PNP: 0c31.0: enabled 1
|
|
PNP: 00ff.2: enabled 1
|
|
PCI: 00:1f.2: enabled 1
|
|
PCI: 00:1f.3: enabled 1
|
|
I2C: 00:54: enabled 1
|
|
I2C: 00:55: enabled 1
|
|
I2C: 00:56: enabled 1
|
|
I2C: 00:57: enabled 1
|
|
I2C: 00:5c: enabled 1
|
|
I2C: 00:5d: enabled 1
|
|
I2C: 00:5e: enabled 1
|
|
I2C: 00:5f: enabled 1
|
|
PCI: 00:1f.5: enabled 0
|
|
PCI: 00:1f.6: enabled 1
|
|
Compare with tree...
|
|
Root Device: enabled 1
|
|
CPU_CLUSTER: 0: enabled 1
|
|
APIC: 00: enabled 1
|
|
APIC: acac: enabled 0
|
|
DOMAIN: 0000: enabled 1
|
|
PCI: 00:00.0: enabled 1
|
|
PCI: 00:01.0: enabled 0
|
|
PCI: 00:02.0: enabled 1
|
|
PCI: 00:14.0: enabled 1
|
|
PCI: 00:16.0: enabled 1
|
|
PCI: 00:16.1: enabled 0
|
|
PCI: 00:16.2: enabled 0
|
|
PCI: 00:16.3: enabled 0
|
|
PCI: 00:19.0: enabled 1
|
|
PCI: 00:1a.0: enabled 1
|
|
PCI: 00:1b.0: enabled 1
|
|
PCI: 00:1c.0: enabled 1
|
|
PCI: 00:00.0: enabled 1
|
|
PCI: 00:1c.1: enabled 1
|
|
PCI: 00:1c.2: enabled 1
|
|
PCI: 00:1c.3: enabled 0
|
|
PCI: 00:1c.4: enabled 0
|
|
PCI: 00:1c.5: enabled 0
|
|
PCI: 00:1c.6: enabled 0
|
|
PCI: 00:1c.7: enabled 0
|
|
PCI: 00:1d.0: enabled 1
|
|
PCI: 00:1e.0: enabled 0
|
|
PCI: 00:1f.0: enabled 1
|
|
PNP: 00ff.1: enabled 1
|
|
PNP: 0c31.0: enabled 1
|
|
PNP: 00ff.2: enabled 1
|
|
PCI: 00:1f.2: enabled 1
|
|
PCI: 00:1f.3: enabled 1
|
|
I2C: 00:54: enabled 1
|
|
I2C: 00:55: enabled 1
|
|
I2C: 00:56: enabled 1
|
|
I2C: 00:57: enabled 1
|
|
I2C: 00:5c: enabled 1
|
|
I2C: 00:5d: enabled 1
|
|
I2C: 00:5e: enabled 1
|
|
I2C: 00:5f: enabled 1
|
|
PCI: 00:1f.5: enabled 0
|
|
PCI: 00:1f.6: enabled 1
|
|
Root Device scanning...
|
|
root_dev_scan_bus for Root Device
|
|
CPU_CLUSTER: 0 enabled
|
|
DOMAIN: 0000 enabled
|
|
DOMAIN: 0000 scanning...
|
|
PCI: pci_scan_bus for bus 00
|
|
POST: 0x24
|
|
PCI: 00:00.0 [8086/0154] ops
|
|
PCI: 00:00.0 [8086/0154] enabled
|
|
Capability: type 0x0d @ 0x88
|
|
Capability: type 0x01 @ 0x80
|
|
Capability: type 0x05 @ 0x90
|
|
Capability: type 0x10 @ 0xa0
|
|
Capability: type 0x0d @ 0x88
|
|
Capability: type 0x01 @ 0x80
|
|
Capability: type 0x05 @ 0x90
|
|
Capability: type 0x10 @ 0xa0
|
|
PCI: 00:01.0 subordinate bus PCI Express
|
|
PCI: 00:01.0 [8086/0151] disabled
|
|
PCI: 00:02.0 [8086/0000] ops
|
|
PCI: 00:02.0 [8086/0166] enabled
|
|
PCI: 00:04.0 [8086/0153] enabled
|
|
PCI: 00:14.0 [8086/0000] ops
|
|
PCI: 00:14.0 [8086/1e31] enabled
|
|
PCI: 00:16.0 [8086/1e3a] ops
|
|
PCI: 00:16.0 [8086/1e3a] enabled
|
|
PCI: 00:16.1: Disabling device
|
|
PCI: 00:16.1 [8086/1e3b] disabled No operations
|
|
PCI: 00:16.2: Disabling device
|
|
PCI: 00:16.2 [8086/1e3c] disabled No operations
|
|
PCI: 00:16.3: Disabling device
|
|
PCI: 00:16.3 [8086/1e3d] disabled No operations
|
|
PCI: 00:19.0 [8086/1502] enabled
|
|
PCI: 00:1a.0 [8086/0000] ops
|
|
PCI: 00:1a.0 [8086/1e2d] enabled
|
|
PCI: 00:1b.0 [8086/0000] ops
|
|
PCI: 00:1b.0 [8086/1e20] enabled
|
|
PCH: PCIe Root Port coalescing is enabled
|
|
PCI: 00:1c.0 [8086/0000] bus ops
|
|
PCI: 00:1c.0 [8086/1e10] enabled
|
|
PCI: 00:1c.1 [8086/0000] bus ops
|
|
PCI: 00:1c.1 [8086/1e12] enabled
|
|
PCI: 00:1c.2 [8086/0000] bus ops
|
|
PCI: 00:1c.2 [8086/1e14] enabled
|
|
PCI: 00:1c.3: Disabling device
|
|
PCI: 00:1c.4: Disabling device
|
|
PCI: 00:1c.4: check set enabled
|
|
PCI: 00:1c.5: Disabling device
|
|
PCI: 00:1c.6: Disabling device
|
|
PCI: 00:1c.7: Disabling device
|
|
PCH: RPFN 0x76543210 -> 0xfedcb210
|
|
PCI: 00:1d.0 [8086/0000] ops
|
|
PCI: 00:1d.0 [8086/1e26] enabled
|
|
PCI: 00:1e.0: Disabling device
|
|
PCI: 00:1f.0 [8086/0000] bus ops
|
|
PCI: 00:1f.0 [8086/1e55] enabled
|
|
PCI: 00:1f.2 [8086/0000] ops
|
|
PCI: 00:1f.2 [8086/1e01] enabled
|
|
PCI: 00:1f.3 [8086/0000] bus ops
|
|
PCI: 00:1f.3 [8086/1e22] enabled
|
|
PCI: 00:1f.5: Disabling device
|
|
PCI: Static device PCI: 00:1f.6 not found, disabling it.
|
|
POST: 0x25
|
|
PCI: 00:1c.0 scanning...
|
|
do_pci_scan_bridge for PCI: 00:1c.0
|
|
PCI: pci_scan_bus for bus 01
|
|
POST: 0x24
|
|
PCI: 01:00.0 [1180/0000] ops
|
|
PCI: 01:00.0 [1180/e822] enabled
|
|
POST: 0x25
|
|
POST: 0x55
|
|
Capability: type 0x05 @ 0x50
|
|
Capability: type 0x01 @ 0x78
|
|
Capability: type 0x10 @ 0x80
|
|
Capability: type 0x10 @ 0x40
|
|
Enabling Common Clock Configuration
|
|
ASPM: Enabled L0s and L1
|
|
scan_bus: scanning of bus PCI: 00:1c.0 took 205 usecs
|
|
PCI: 00:1c.1 scanning...
|
|
do_pci_scan_bridge for PCI: 00:1c.1
|
|
PCI: pci_scan_bus for bus 02
|
|
POST: 0x24
|
|
PCI: 02:00.0 [168c/002b] enabled
|
|
POST: 0x25
|
|
POST: 0x55
|
|
Capability: type 0x01 @ 0x40
|
|
Capability: type 0x05 @ 0x50
|
|
Capability: type 0x10 @ 0x60
|
|
Capability: type 0x10 @ 0x40
|
|
Enabling Common Clock Configuration
|
|
ASPM: Enabled L0s and L1
|
|
scan_bus: scanning of bus PCI: 00:1c.1 took 196 usecs
|
|
PCI: 00:1c.2 scanning...
|
|
do_pci_scan_bridge for PCI: 00:1c.2
|
|
PCI: pci_scan_bus for bus 03
|
|
POST: 0x24
|
|
POST: 0x25
|
|
POST: 0x55
|
|
scan_bus: scanning of bus PCI: 00:1c.2 took 52 usecs
|
|
PCI: 00:1f.0 scanning...
|
|
scan_lpc_bus for PCI: 00:1f.0
|
|
PNP: 00ff.1 enabled
|
|
PNP: 0c31.0 enabled
|
|
recv_ec_data: 0x47
|
|
recv_ec_data: 0x32
|
|
recv_ec_data: 0x48
|
|
recv_ec_data: 0x54
|
|
recv_ec_data: 0x33
|
|
recv_ec_data: 0x35
|
|
recv_ec_data: 0x57
|
|
recv_ec_data: 0x57
|
|
recv_ec_data: 0x16
|
|
recv_ec_data: 0x03
|
|
recv_ec_data: 0x40
|
|
recv_ec_data: 0x11
|
|
EC Firmware ID G2HT35WW-3.22, Version 4.01B
|
|
recv_ec_data: 0x00
|
|
recv_ec_data: 0x70
|
|
recv_ec_data: 0x90
|
|
recv_ec_data: 0x70
|
|
recv_ec_data: 0x70
|
|
recv_ec_data: 0x00
|
|
recv_ec_data: 0xa6
|
|
recv_ec_data: 0xa6
|
|
recv_ec_data: 0x70
|
|
PNP: 00ff.2 enabled
|
|
scan_lpc_bus for PCI: 00:1f.0 done
|
|
scan_bus: scanning of bus PCI: 00:1f.0 took 4481 usecs
|
|
PCI: 00:1f.3 scanning...
|
|
scan_generic_bus for PCI: 00:1f.3
|
|
bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled
|
|
bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled
|
|
bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled
|
|
bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled
|
|
bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled
|
|
bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled
|
|
bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled
|
|
bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled
|
|
scan_generic_bus for PCI: 00:1f.3 done
|
|
scan_bus: scanning of bus PCI: 00:1f.3 took 19 usecs
|
|
POST: 0x55
|
|
scan_bus: scanning of bus DOMAIN: 0000 took 5254 usecs
|
|
root_dev_scan_bus for Root Device done
|
|
scan_bus: scanning of bus Root Device took 5261 usecs
|
|
done
|
|
BS: BS_DEV_ENUMERATE times (us): entry 0 run 5361 exit 0
|
|
POST: 0x73
|
|
found VGA at PCI: 00:02.0
|
|
Setting up VGA for PCI: 00:02.0
|
|
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
|
|
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
|
|
Allocating resources...
|
|
Reading resources...
|
|
Root Device read_resources bus 0 link: 0
|
|
CPU_CLUSTER: 0 read_resources bus 0 link: 0
|
|
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
|
|
DOMAIN: 0000 read_resources bus 0 link: 0
|
|
Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
|
|
PCI: 00:1c.0 read_resources bus 1 link: 0
|
|
PCI: 00:1c.0 read_resources bus 1 link: 0 done
|
|
PCI: 00:1c.1 read_resources bus 2 link: 0
|
|
PCI: 00:1c.1 read_resources bus 2 link: 0 done
|
|
PCI: 00:1c.2 read_resources bus 3 link: 0
|
|
PCI: 00:1c.2 read_resources bus 3 link: 0 done
|
|
PCI: 00:1f.0 read_resources bus 0 link: 0
|
|
PNP: 00ff.1 missing read_resources
|
|
PNP: 0c31.0 missing read_resources
|
|
PNP: 00ff.2 missing read_resources
|
|
PCI: 00:1f.0 read_resources bus 0 link: 0 done
|
|
PCI: 00:1f.3 read_resources bus 1 link: 0
|
|
PCI: 00:1f.3 read_resources bus 1 link: 0 done
|
|
DOMAIN: 0000 read_resources bus 0 link: 0 done
|
|
Root Device read_resources bus 0 link: 0 done
|
|
Done reading resources.
|
|
Show resources in subtree (Root Device)...After reading.
|
|
Root Device child on link 0 CPU_CLUSTER: 0
|
|
CPU_CLUSTER: 0 child on link 0 APIC: 00
|
|
APIC: 00
|
|
APIC: acac
|
|
DOMAIN: 0000 child on link 0 PCI: 00:00.0
|
|
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
|
|
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
|
|
PCI: 00:00.0
|
|
PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
|
|
PCI: 00:01.0
|
|
PCI: 00:02.0
|
|
PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
|
|
PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
|
|
PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
|
|
PCI: 00:04.0
|
|
PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
|
|
PCI: 00:14.0
|
|
PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
|
|
PCI: 00:16.0
|
|
PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10
|
|
PCI: 00:16.1
|
|
PCI: 00:16.2
|
|
PCI: 00:16.3
|
|
PCI: 00:19.0
|
|
PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
|
|
PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
|
|
PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
|
|
PCI: 00:1a.0
|
|
PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
|
|
PCI: 00:1b.0
|
|
PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
|
|
PCI: 00:1c.0 child on link 0 PCI: 01:00.0
|
|
PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
|
|
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
|
|
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
|
|
PCI: 01:00.0
|
|
PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
|
|
PCI: 00:1c.1 child on link 0 PCI: 02:00.0
|
|
PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
|
|
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
|
|
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
|
|
PCI: 02:00.0
|
|
PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
|
|
PCI: 00:1c.2Unknown device path type: 0
|
|
child on link 0
|
|
PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
|
|
PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
|
|
PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
|
|
Unknown device path type: 0
|
|
|
|
Unknown device path type: 0
|
|
resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10
|
|
Unknown device path type: 0
|
|
resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14
|
|
Unknown device path type: 0
|
|
resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18
|
|
PCI: 00:1c.3
|
|
PCI: 00:1c.4
|
|
PCI: 00:1c.5
|
|
PCI: 00:1c.6
|
|
PCI: 00:1c.7
|
|
PCI: 00:1d.0
|
|
PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
|
|
PCI: 00:1e.0
|
|
PCI: 00:1f.0 child on link 0 PNP: 00ff.1
|
|
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
|
|
PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
|
|
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
|
|
PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
|
|
PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
|
|
PNP: 00ff.1
|
|
PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
|
|
PNP: 0c31.0
|
|
PNP: 00ff.2
|
|
PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
|
|
PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
|
|
PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
|
|
PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
|
|
PCI: 00:1f.2
|
|
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
|
|
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
|
|
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
|
|
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
|
|
PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
|
|
PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
|
|
PCI: 00:1f.3 child on link 0 I2C: 01:54
|
|
PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
|
|
PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
|
|
I2C: 01:54
|
|
I2C: 01:55
|
|
I2C: 01:56
|
|
I2C: 01:57
|
|
I2C: 01:5c
|
|
I2C: 01:5d
|
|
I2C: 01:5e
|
|
I2C: 01:5f
|
|
PCI: 00:1f.5
|
|
PCI: 00:1f.6
|
|
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
|
|
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
|
|
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
|
|
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
|
|
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
|
|
PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
|
|
Unknown device path type: 0
|
|
18 * [0x0 - 0xfff] io
|
|
PCI: 00:1c.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done
|
|
PCI: 00:1c.2 1c * [0x0 - 0xfff] io
|
|
PCI: 00:02.0 20 * [0x1000 - 0x103f] io
|
|
PCI: 00:19.0 18 * [0x1040 - 0x105f] io
|
|
PCI: 00:1f.2 20 * [0x1060 - 0x107f] io
|
|
PCI: 00:1f.2 10 * [0x1080 - 0x1087] io
|
|
PCI: 00:1f.2 18 * [0x1088 - 0x108f] io
|
|
PCI: 00:1f.2 14 * [0x1090 - 0x1093] io
|
|
PCI: 00:1f.2 1c * [0x1094 - 0x1097] io
|
|
DOMAIN: 0000 io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done
|
|
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
|
|
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
|
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
|
|
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
|
|
PCI: 01:00.0 10 * [0x0 - 0xff] mem
|
|
PCI: 00:1c.0 mem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done
|
|
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
|
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
|
|
PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
|
|
PCI: 02:00.0 10 * [0x0 - 0xffff] mem
|
|
PCI: 00:1c.1 mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done
|
|
PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
|
Unknown device path type: 0
|
|
14 * [0x0 - 0x7fffff] prefmem
|
|
PCI: 00:1c.2 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done
|
|
PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
|
|
Unknown device path type: 0
|
|
10 * [0x0 - 0x7fffff] mem
|
|
PCI: 00:1c.2 mem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done
|
|
PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
|
|
PCI: 00:1c.2 24 * [0x10000000 - 0x107fffff] prefmem
|
|
PCI: 00:1c.2 20 * [0x10800000 - 0x10ffffff] mem
|
|
PCI: 00:02.0 10 * [0x11000000 - 0x113fffff] mem
|
|
PCI: 00:1c.0 20 * [0x11400000 - 0x114fffff] mem
|
|
PCI: 00:1c.1 20 * [0x11500000 - 0x115fffff] mem
|
|
PCI: 00:19.0 10 * [0x11600000 - 0x1161ffff] mem
|
|
PCI: 00:14.0 10 * [0x11620000 - 0x1162ffff] mem
|
|
PCI: 00:04.0 10 * [0x11630000 - 0x11637fff] mem
|
|
PCI: 00:1b.0 10 * [0x11638000 - 0x1163bfff] mem
|
|
PCI: 00:19.0 14 * [0x1163c000 - 0x1163cfff] mem
|
|
PCI: 00:1f.2 24 * [0x1163d000 - 0x1163d7ff] mem
|
|
PCI: 00:1a.0 10 * [0x1163e000 - 0x1163e3ff] mem
|
|
PCI: 00:1d.0 10 * [0x1163f000 - 0x1163f3ff] mem
|
|
PCI: 00:1f.3 10 * [0x11640000 - 0x116400ff] mem
|
|
PCI: 00:16.0 10 * [0x11641000 - 0x1164100f] mem
|
|
DOMAIN: 0000 mem: base: 11641010 size: 11641010 align: 28 gran: 0 limit: ffffffff done
|
|
avoid_fixed_resources: DOMAIN: 0000
|
|
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
|
|
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
|
|
constrain_resources: PCI: 00:00.0 60 base f8000000 limit fbffffff mem (fixed)
|
|
constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
|
|
constrain_resources: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed)
|
|
skipping PNP: 00ff.2@60 fixed resource, size=0!
|
|
skipping PNP: 00ff.2@62 fixed resource, size=0!
|
|
skipping PNP: 00ff.2@64 fixed resource, size=0!
|
|
skipping PNP: 00ff.2@66 fixed resource, size=0!
|
|
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 0000167c limit 0000ffff
|
|
avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff
|
|
Setting resources...
|
|
DOMAIN: 0000 io: base:167c size:1098 align:12 gran:0 limit:ffff
|
|
PCI: 00:1c.2 1c * [0x2000 - 0x2fff] io
|
|
PCI: 00:02.0 20 * [0x3000 - 0x303f] io
|
|
PCI: 00:19.0 18 * [0x3040 - 0x305f] io
|
|
PCI: 00:1f.2 20 * [0x3060 - 0x307f] io
|
|
PCI: 00:1f.2 10 * [0x3080 - 0x3087] io
|
|
PCI: 00:1f.2 18 * [0x3088 - 0x308f] io
|
|
PCI: 00:1f.2 14 * [0x3090 - 0x3093] io
|
|
PCI: 00:1f.2 1c * [0x3094 - 0x3097] io
|
|
DOMAIN: 0000 io: next_base: 3098 size: 1098 align: 12 gran: 0 done
|
|
PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
|
|
PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
|
|
PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff
|
|
PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done
|
|
PCI: 00:1c.2 io: base:2000 size:1000 align:12 gran:12 limit:2fff
|
|
Unknown device path type: 0
|
|
18 * [0x2000 - 0x2fff] io
|
|
PCI: 00:1c.2 io: next_base: 3000 size: 1000 align: 12 gran: 12 done
|
|
DOMAIN: 0000 mem: base:e0000000 size:11641010 align:28 gran:0 limit:f7ffffff
|
|
PCI: 00:02.0 18 * [0xe0000000 - 0xefffffff] prefmem
|
|
PCI: 00:1c.2 24 * [0xf0000000 - 0xf07fffff] prefmem
|
|
PCI: 00:1c.2 20 * [0xf0800000 - 0xf0ffffff] mem
|
|
PCI: 00:02.0 10 * [0xf1000000 - 0xf13fffff] mem
|
|
PCI: 00:1c.0 20 * [0xf1400000 - 0xf14fffff] mem
|
|
PCI: 00:1c.1 20 * [0xf1500000 - 0xf15fffff] mem
|
|
PCI: 00:19.0 10 * [0xf1600000 - 0xf161ffff] mem
|
|
PCI: 00:14.0 10 * [0xf1620000 - 0xf162ffff] mem
|
|
PCI: 00:04.0 10 * [0xf1630000 - 0xf1637fff] mem
|
|
PCI: 00:1b.0 10 * [0xf1638000 - 0xf163bfff] mem
|
|
PCI: 00:19.0 14 * [0xf163c000 - 0xf163cfff] mem
|
|
PCI: 00:1f.2 24 * [0xf163d000 - 0xf163d7ff] mem
|
|
PCI: 00:1a.0 10 * [0xf163e000 - 0xf163e3ff] mem
|
|
PCI: 00:1d.0 10 * [0xf163f000 - 0xf163f3ff] mem
|
|
PCI: 00:1f.3 10 * [0xf1640000 - 0xf16400ff] mem
|
|
PCI: 00:16.0 10 * [0xf1641000 - 0xf164100f] mem
|
|
DOMAIN: 0000 mem: next_base: f1641010 size: 11641010 align: 28 gran: 0 done
|
|
PCI: 00:1c.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
|
|
PCI: 00:1c.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
|
|
PCI: 00:1c.0 mem: base:f1400000 size:100000 align:20 gran:20 limit:f14fffff
|
|
PCI: 01:00.0 10 * [0xf1400000 - 0xf14000ff] mem
|
|
PCI: 00:1c.0 mem: next_base: f1400100 size: 100000 align: 20 gran: 20 done
|
|
PCI: 00:1c.1 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
|
|
PCI: 00:1c.1 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
|
|
PCI: 00:1c.1 mem: base:f1500000 size:100000 align:20 gran:20 limit:f15fffff
|
|
PCI: 02:00.0 10 * [0xf1500000 - 0xf150ffff] mem
|
|
PCI: 00:1c.1 mem: next_base: f1510000 size: 100000 align: 20 gran: 20 done
|
|
PCI: 00:1c.2 prefmem: base:f0000000 size:800000 align:22 gran:20 limit:f07fffff
|
|
Unknown device path type: 0
|
|
14 * [0xf0000000 - 0xf07fffff] prefmem
|
|
PCI: 00:1c.2 prefmem: next_base: f0800000 size: 800000 align: 22 gran: 20 done
|
|
PCI: 00:1c.2 mem: base:f0800000 size:800000 align:22 gran:20 limit:f0ffffff
|
|
Unknown device path type: 0
|
|
10 * [0xf0800000 - 0xf0ffffff] mem
|
|
PCI: 00:1c.2 mem: next_base: f1000000 size: 800000 align: 22 gran: 20 done
|
|
Root Device assign_resources, bus 0 link: 0
|
|
TOUUD 0x43b600000 TOLUD 0xc2a00000 TOM 0x400000000
|
|
MEBASE 0x3fe000000
|
|
IGD decoded, subtracting 32M UMA and 2M GTT
|
|
TSEG base 0xc0000000 size 8M
|
|
Available memory below 4GB: 3072M
|
|
Available memory above 4GB: 13238M
|
|
DOMAIN: 0000 assign_resources, bus 0 link: 0
|
|
PCI: 00:02.0 10 <- [0x00f1000000 - 0x00f13fffff] size 0x00400000 gran 0x16 mem64
|
|
PCI: 00:02.0 18 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64
|
|
PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io
|
|
PCI: 00:04.0 10 <- [0x00f1630000 - 0x00f1637fff] size 0x00008000 gran 0x0f mem64
|
|
PCI: 00:14.0 10 <- [0x00f1620000 - 0x00f162ffff] size 0x00010000 gran 0x10 mem64
|
|
PCI: 00:16.0 10 <- [0x00f1641000 - 0x00f164100f] size 0x00000010 gran 0x04 mem64
|
|
PCI: 00:19.0 10 <- [0x00f1600000 - 0x00f161ffff] size 0x00020000 gran 0x11 mem
|
|
PCI: 00:19.0 14 <- [0x00f163c000 - 0x00f163cfff] size 0x00001000 gran 0x0c mem
|
|
PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io
|
|
PCI: 00:1a.0 10 <- [0x00f163e000 - 0x00f163e3ff] size 0x00000400 gran 0x0a mem
|
|
PCI: 00:1b.0 10 <- [0x00f1638000 - 0x00f163bfff] size 0x00004000 gran 0x0e mem64
|
|
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
|
|
PCI: 00:1c.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem
|
|
PCI: 00:1c.0 20 <- [0x00f1400000 - 0x00f14fffff] size 0x00100000 gran 0x14 bus 01 mem
|
|
PCI: 00:1c.0 assign_resources, bus 1 link: 0
|
|
PCI: 01:00.0 10 <- [0x00f1400000 - 0x00f14000ff] size 0x00000100 gran 0x08 mem
|
|
PCI: 00:1c.0 assign_resources, bus 1 link: 0
|
|
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
|
|
PCI: 00:1c.1 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
|
|
PCI: 00:1c.1 20 <- [0x00f1500000 - 0x00f15fffff] size 0x00100000 gran 0x14 bus 02 mem
|
|
PCI: 00:1c.1 assign_resources, bus 2 link: 0
|
|
PCI: 02:00.0 10 <- [0x00f1500000 - 0x00f150ffff] size 0x00010000 gran 0x10 mem64
|
|
PCI: 00:1c.1 assign_resources, bus 2 link: 0
|
|
PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io
|
|
PCI: 00:1c.2 24 <- [0x00f0000000 - 0x00f07fffff] size 0x00800000 gran 0x14 bus 03 prefmem
|
|
PCI: 00:1c.2 20 <- [0x00f0800000 - 0x00f0ffffff] size 0x00800000 gran 0x14 bus 03 mem
|
|
PCI: 00:1c.2 assign_resources, bus 3 link: 0
|
|
Unknown device path type: 0
|
|
missing set_resources
|
|
PCI: 00:1c.2 assign_resources, bus 3 link: 0
|
|
PCI: 00:1d.0 10 <- [0x00f163f000 - 0x00f163f3ff] size 0x00000400 gran 0x0a mem
|
|
PCI: 00:1f.0 assign_resources, bus 0 link: 0
|
|
PNP: 00ff.1 missing set_resources
|
|
PNP: 00ff.2 missing set_resources
|
|
PCI: 00:1f.0 assign_resources, bus 0 link: 0
|
|
PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io
|
|
PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io
|
|
PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io
|
|
PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io
|
|
PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io
|
|
PCI: 00:1f.2 24 <- [0x00f163d000 - 0x00f163d7ff] size 0x00000800 gran 0x0b mem
|
|
PCI: 00:1f.3 10 <- [0x00f1640000 - 0x00f16400ff] size 0x00000100 gran 0x08 mem64
|
|
PCI: 00:1f.3 assign_resources, bus 1 link: 0
|
|
PCI: 00:1f.3 assign_resources, bus 1 link: 0
|
|
DOMAIN: 0000 assign_resources, bus 0 link: 0
|
|
Root Device assign_resources, bus 0 link: 0
|
|
Done setting resources.
|
|
Show resources in subtree (Root Device)...After assigning values.
|
|
Root Device child on link 0 CPU_CLUSTER: 0
|
|
CPU_CLUSTER: 0 child on link 0 APIC: 00
|
|
APIC: 00
|
|
APIC: acac
|
|
DOMAIN: 0000 child on link 0 PCI: 00:00.0
|
|
DOMAIN: 0000 resource base 167c size 1098 align 12 gran 0 limit ffff flags 40040100 index 10000000
|
|
DOMAIN: 0000 resource base e0000000 size 11641010 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
|
|
DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
|
|
DOMAIN: 0000 resource base 100000 size bff00000 align 0 gran 0 limit 0 flags e0004200 index 4
|
|
DOMAIN: 0000 resource base 100000000 size 33b600000 align 0 gran 0 limit 0 flags e0004200 index 5
|
|
DOMAIN: 0000 resource base c0000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
|
|
DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
|
|
DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8
|
|
DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
|
|
DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
|
|
PCI: 00:00.0
|
|
PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
|
|
PCI: 00:01.0
|
|
PCI: 00:02.0
|
|
PCI: 00:02.0 resource base f1000000 size 400000 align 22 gran 22 limit f13fffff flags 60000201 index 10
|
|
PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18
|
|
PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20
|
|
PCI: 00:04.0
|
|
PCI: 00:04.0 resource base f1630000 size 8000 align 15 gran 15 limit f1637fff flags 60000201 index 10
|
|
PCI: 00:14.0
|
|
PCI: 00:14.0 resource base f1620000 size 10000 align 16 gran 16 limit f162ffff flags 60000201 index 10
|
|
PCI: 00:16.0
|
|
PCI: 00:16.0 resource base f1641000 size 10 align 12 gran 4 limit f164100f flags 60000201 index 10
|
|
PCI: 00:16.1
|
|
PCI: 00:16.2
|
|
PCI: 00:16.3
|
|
PCI: 00:19.0
|
|
PCI: 00:19.0 resource base f1600000 size 20000 align 17 gran 17 limit f161ffff flags 60000200 index 10
|
|
PCI: 00:19.0 resource base f163c000 size 1000 align 12 gran 12 limit f163cfff flags 60000200 index 14
|
|
PCI: 00:19.0 resource base 3040 size 20 align 5 gran 5 limit 305f flags 60000100 index 18
|
|
PCI: 00:1a.0
|
|
PCI: 00:1a.0 resource base f163e000 size 400 align 12 gran 10 limit f163e3ff flags 60000200 index 10
|
|
PCI: 00:1b.0
|
|
PCI: 00:1b.0 resource base f1638000 size 4000 align 14 gran 14 limit f163bfff flags 60000201 index 10
|
|
PCI: 00:1c.0 child on link 0 PCI: 01:00.0
|
|
PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
|
|
PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
|
|
PCI: 00:1c.0 resource base f1400000 size 100000 align 20 gran 20 limit f14fffff flags 60080202 index 20
|
|
PCI: 01:00.0
|
|
PCI: 01:00.0 resource base f1400000 size 100 align 12 gran 8 limit f14000ff flags 60000200 index 10
|
|
PCI: 00:1c.1 child on link 0 PCI: 02:00.0
|
|
PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
|
|
PCI: 00:1c.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
|
|
PCI: 00:1c.1 resource base f1500000 size 100000 align 20 gran 20 limit f15fffff flags 60080202 index 20
|
|
PCI: 02:00.0
|
|
PCI: 02:00.0 resource base f1500000 size 10000 align 16 gran 16 limit f150ffff flags 60000201 index 10
|
|
PCI: 00:1c.2Unknown device path type: 0
|
|
child on link 0
|
|
PCI: 00:1c.2 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
|
|
PCI: 00:1c.2 resource base f0000000 size 800000 align 22 gran 20 limit f07fffff flags 60081202 index 24
|
|
PCI: 00:1c.2 resource base f0800000 size 800000 align 22 gran 20 limit f0ffffff flags 60080202 index 20
|
|
Unknown device path type: 0
|
|
|
|
Unknown device path type: 0
|
|
resource base f0800000 size 800000 align 22 gran 22 limit f0ffffff flags 40000200 index 10
|
|
Unknown device path type: 0
|
|
resource base f0000000 size 800000 align 22 gran 22 limit f07fffff flags 40001200 index 14
|
|
Unknown device path type: 0
|
|
resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 40000100 index 18
|
|
PCI: 00:1c.3
|
|
PCI: 00:1c.4
|
|
PCI: 00:1c.5
|
|
PCI: 00:1c.6
|
|
PCI: 00:1c.7
|
|
PCI: 00:1d.0
|
|
PCI: 00:1d.0 resource base f163f000 size 400 align 12 gran 10 limit f163f3ff flags 60000200 index 10
|
|
PCI: 00:1e.0
|
|
PCI: 00:1f.0 child on link 0 PNP: 00ff.1
|
|
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
|
|
PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
|
|
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
|
|
PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
|
|
PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
|
|
PNP: 00ff.1
|
|
PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
|
|
PNP: 0c31.0
|
|
PNP: 00ff.2
|
|
PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
|
|
PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
|
|
PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
|
|
PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
|
|
PCI: 00:1f.2
|
|
PCI: 00:1f.2 resource base 3080 size 8 align 3 gran 3 limit 3087 flags 60000100 index 10
|
|
PCI: 00:1f.2 resource base 3090 size 4 align 2 gran 2 limit 3093 flags 60000100 index 14
|
|
PCI: 00:1f.2 resource base 3088 size 8 align 3 gran 3 limit 308f flags 60000100 index 18
|
|
PCI: 00:1f.2 resource base 3094 size 4 align 2 gran 2 limit 3097 flags 60000100 index 1c
|
|
PCI: 00:1f.2 resource base 3060 size 20 align 5 gran 5 limit 307f flags 60000100 index 20
|
|
PCI: 00:1f.2 resource base f163d000 size 800 align 12 gran 11 limit f163d7ff flags 60000200 index 24
|
|
PCI: 00:1f.3 child on link 0 I2C: 01:54
|
|
PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
|
|
PCI: 00:1f.3 resource base f1640000 size 100 align 12 gran 8 limit f16400ff flags 60000201 index 10
|
|
I2C: 01:54
|
|
I2C: 01:55
|
|
I2C: 01:56
|
|
I2C: 01:57
|
|
I2C: 01:5c
|
|
I2C: 01:5d
|
|
I2C: 01:5e
|
|
I2C: 01:5f
|
|
PCI: 00:1f.5
|
|
PCI: 00:1f.6
|
|
Done allocating resources.
|
|
BS: BS_DEV_RESOURCES times (us): entry 0 run 2118 exit 0
|
|
POST: 0x74
|
|
Enabling resources...
|
|
PCI: 00:00.0 subsystem <- 17aa/21fa
|
|
PCI: 00:00.0 cmd <- 06
|
|
PCI: 00:02.0 subsystem <- 17aa/21fa
|
|
PCI: 00:02.0 cmd <- 03
|
|
PCI: 00:04.0 cmd <- 02
|
|
PCI: 00:14.0 subsystem <- 17aa/21fa
|
|
PCI: 00:14.0 cmd <- 102
|
|
PCI: 00:16.0 subsystem <- 17aa/21fa
|
|
PCI: 00:16.0 cmd <- 02
|
|
PCI: 00:19.0 subsystem <- 17aa/21f3
|
|
PCI: 00:19.0 cmd <- 103
|
|
PCI: 00:1a.0 subsystem <- 17aa/21fa
|
|
PCI: 00:1a.0 cmd <- 102
|
|
PCI: 00:1b.0 subsystem <- 17aa/21fa
|
|
PCI: 00:1b.0 cmd <- 102
|
|
PCI: 00:1c.0 bridge ctrl <- 0003
|
|
PCI: 00:1c.0 subsystem <- 17aa/21fa
|
|
PCI: 00:1c.0 cmd <- 106
|
|
PCI: 00:1c.1 bridge ctrl <- 0003
|
|
PCI: 00:1c.1 subsystem <- 17aa/21fa
|
|
PCI: 00:1c.1 cmd <- 106
|
|
PCI: 00:1c.2 bridge ctrl <- 0003
|
|
PCI: 00:1c.2 subsystem <- 17aa/21fa
|
|
PCI: 00:1c.2 cmd <- 107
|
|
PCI: 00:1d.0 subsystem <- 17aa/21fa
|
|
PCI: 00:1d.0 cmd <- 102
|
|
pch_decode_init
|
|
PCI: 00:1f.0 subsystem <- 17aa/21fa
|
|
PCI: 00:1f.0 cmd <- 107
|
|
PCI: 00:1f.2 subsystem <- 17aa/21fa
|
|
PCI: 00:1f.2 cmd <- 03
|
|
PCI: 00:1f.3 subsystem <- 17aa/21fa
|
|
PCI: 00:1f.3 cmd <- 103
|
|
PCI: 01:00.0 subsystem <- 17aa/21fa
|
|
PCI: 01:00.0 cmd <- 06
|
|
PCI: 02:00.0 cmd <- 02
|
|
done.
|
|
BS: BS_DEV_ENABLE times (us): entry 0 run 120 exit 0
|
|
POST: 0x75
|
|
Initializing devices...
|
|
Root Device init ...
|
|
Root Device init finished in 0 usecs
|
|
POST: 0x75
|
|
CPU_CLUSTER: 0 init ...
|
|
start_eip=0x00001000, code_size=0x00000031
|
|
Setting up SMI for CPU
|
|
Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
|
|
Processing 12 relocs. Offset value of 0x00038000
|
|
SMM Module: stub loaded at 00038000. Will call bffb1001(bffd3800)
|
|
Installing SMM handler to 0xc0000000
|
|
Loading module at c0010000 with entry c0010118. filesize: 0x1158 memsize: 0x5178
|
|
Processing 63 relocs. Offset value of 0xc0010000
|
|
Loading module at c0008000 with entry c0008000. filesize: 0x1a8 memsize: 0x1a8
|
|
Processing 12 relocs. Offset value of 0xc0008000
|
|
SMM Module: placing jmp sequence at c0007c00 rel16 0x03fd
|
|
SMM Module: placing jmp sequence at c0007800 rel16 0x07fd
|
|
SMM Module: placing jmp sequence at c0007400 rel16 0x0bfd
|
|
SMM Module: stub loaded at c0008000. Will call c0010118(00000000)
|
|
Initializing southbridge SMI... ... pmbase = 0x0500
|
|
|
|
SMI_STS: MCSMI
|
|
PM1_STS:
|
|
GPE0_STS: GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO1 GPIO0
|
|
ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0
|
|
TCO_STS:
|
|
... raise SMI#
|
|
In relocation handler: cpu 0
|
|
New SMBASE=0xc0000000 IEDBASE=0xc0400000 @ 0003fc00
|
|
Writing SMRR. base = 0xc0000006, mask=0xff800800
|
|
Relocation complete.
|
|
Locking SMM.
|
|
Initializing CPU #0
|
|
CPU: vendor Intel device 306a9
|
|
CPU: family 06, model 3a, stepping 09
|
|
POST: 0x60
|
|
Enabling cache
|
|
CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0)
|
|
CBFS: Locating 'cpu_microcode_blob.bin'
|
|
CBFS: Found @ offset 14180 size 5800
|
|
microcode: sig=0x306a9 pf=0x10 revision=0x1b
|
|
CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz.
|
|
MTRR: Physical address space:
|
|
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
|
|
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
|
|
0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6
|
|
0x00000000c0000000 - 0x00000000e0000000 size 0x20000000 type 0
|
|
0x00000000e0000000 - 0x00000000f0000000 size 0x10000000 type 1
|
|
0x00000000f0000000 - 0x0000000100000000 size 0x10000000 type 0
|
|
0x0000000100000000 - 0x000000043b600000 size 0x33b600000 type 6
|
|
MTRR: Fixed MSR 0x250 0x0606060606060606
|
|
MTRR: Fixed MSR 0x258 0x0606060606060606
|
|
MTRR: Fixed MSR 0x259 0x0000000000000000
|
|
MTRR: Fixed MSR 0x268 0x0606060606060606
|
|
MTRR: Fixed MSR 0x269 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26a 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26b 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26c 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26d 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26e 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26f 0x0606060606060606
|
|
call enable_fixed_mtrr()
|
|
CPU physical address size: 36 bits
|
|
MTRR: default type WB/UC MTRR counts: 3/11.
|
|
MTRR: WB selected as default type.
|
|
MTRR: 0 base 0x00000000c0000000 mask 0x0000000fe0000000 type 0
|
|
MTRR: 1 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1
|
|
MTRR: 2 base 0x00000000f0000000 mask 0x0000000ff0000000 type 0
|
|
|
|
MTRR check
|
|
Fixed MTRRs : Enabled
|
|
Variable MTRRs: Enabled
|
|
|
|
POST: 0x93
|
|
Setting up local APIC... apic_id: 0x00 done.
|
|
POST: 0x9b
|
|
VMX is locked, so set_vmx will do nothing
|
|
model_x06ax: energy policy set to 6
|
|
model_x06ax: frequency set to 2600
|
|
Turbo is available but hidden
|
|
Turbo has been enabled
|
|
CPU: 0 has 2 cores, 2 threads per core
|
|
CPU: 0 has core 1
|
|
CPU1: stack_base bffcc000, stack_end bffccff8
|
|
Asserting INIT.
|
|
Waiting for send to finish...
|
|
+Deasserting INIT.
|
|
Waiting for send to finish...
|
|
+#startup loops: 2.
|
|
Sending STARTUP #1 to 1.
|
|
After apic_write.
|
|
In relocation handler: cpu 1
|
|
New SMBASE=0xbffffc00 IEDBASE=0xc0400000 @ 0003fc00
|
|
Writing SMRR. base = 0xc0000006, mask=0xff800800
|
|
Startup point 1.
|
|
Waiting for send to finish...
|
|
+Sending STARTUP #2 to 1.
|
|
After apic_write.
|
|
Startup point 1.
|
|
Waiting for send to finish...
|
|
+After Startup.
|
|
Initializing CPU #1
|
|
CPU: 0 has core 2
|
|
CPU: vendor Intel device 306a9
|
|
CPU: family 06, model 3a, stepping 09
|
|
POST: 0x60
|
|
Enabling cache
|
|
CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0)
|
|
CBFS: Locating 'cpu_microcode_blob.bin'
|
|
CBFS: Found @ offset 14180 size 5800
|
|
microcode: sig=0x306a9 pf=0x10 revision=0x1b
|
|
CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz.
|
|
MTRR: Fixed MSR 0x250 0x0606060606060606
|
|
MTRR: Fixed MSR 0x258 0x0606060606060606
|
|
MTRR: Fixed MSR 0x259 0x0000000000000000
|
|
MTRR: Fixed MSR 0x268 0x0606060606060606
|
|
MTRR: Fixed MSR 0x269 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26a 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26b 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26c 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26d 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26e 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26f 0x0606060606060606
|
|
call enable_fixed_mtrr()
|
|
CPU physical address size: 36 bits
|
|
|
|
MTRR check
|
|
Fixed MTRRs : Enabled
|
|
Variable MTRRs: Enabled
|
|
|
|
POST: 0x93
|
|
Setting up local APIC... apic_id: 0x01 done.
|
|
POST: 0x9b
|
|
VMX is locked, so set_vmx will do nothing
|
|
model_x06ax: energy policy set to 6
|
|
model_x06ax: frequency set to 2600
|
|
CPU #1 initialized
|
|
CPU2: stack_base bffcb000, stack_end bffcbff8
|
|
Asserting INIT.
|
|
Waiting for send to finish...
|
|
+Deasserting INIT.
|
|
Waiting for send to finish...
|
|
+#startup loops: 2.
|
|
Sending STARTUP #1 to 2.
|
|
After apic_write.
|
|
In relocation handler: cpu 2
|
|
Startup point 1.
|
|
Waiting for send to finish...
|
|
+New SMBASE=0xbffff800 IEDBASE=0xc0400000 @ 0003fc00
|
|
Sending STARTUP #2 to 2.
|
|
After apic_write.
|
|
Writing SMRR. base = 0xc0000006, mask=0xff800800
|
|
Startup point 1.
|
|
Waiting for send to finish...
|
|
+After Startup.
|
|
CPU: 0 has core 3
|
|
Initializing CPU #2
|
|
CPU: vendor Intel device 306a9
|
|
CPU: family 06, model 3a, stepping 09
|
|
POST: 0x60
|
|
Enabling cache
|
|
CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0)
|
|
CBFS: Locating 'cpu_microcode_blob.bin'
|
|
CBFS: Found @ offset 14180 size 5800
|
|
microcode: sig=0x306a9 pf=0x10 revision=0x0
|
|
microcode: updated to revision 0x1b date=2014-05-29
|
|
CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz.
|
|
MTRR: Fixed MSR 0x250 0x0606060606060606
|
|
MTRR: Fixed MSR 0x258 0x0606060606060606
|
|
MTRR: Fixed MSR 0x259 0x0000000000000000
|
|
MTRR: Fixed MSR 0x268 0x0606060606060606
|
|
MTRR: Fixed MSR 0x269 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26a 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26b 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26c 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26d 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26e 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26f 0x0606060606060606
|
|
call enable_fixed_mtrr()
|
|
CPU physical address size: 36 bits
|
|
|
|
MTRR check
|
|
Fixed MTRRs : Enabled
|
|
Variable MTRRs: Enabled
|
|
|
|
POST: 0x93
|
|
Setting up local APIC... apic_id: 0x02 done.
|
|
POST: 0x9b
|
|
VMX is locked, so set_vmx will do nothing
|
|
model_x06ax: energy policy set to 6
|
|
model_x06ax: frequency set to 2600
|
|
CPU #2 initialized
|
|
CPU3: stack_base bffca000, stack_end bffcaff8
|
|
Asserting INIT.
|
|
Waiting for send to finish...
|
|
+Deasserting INIT.
|
|
Waiting for send to finish...
|
|
+#startup loops: 2.
|
|
Sending STARTUP #1 to 3.
|
|
After apic_write.
|
|
In relocation handler: cpu 3
|
|
New SMBASE=0xbffff400 IEDBASE=0xc0400000 @ 0003fc00
|
|
Writing SMRR. base = 0xc0000006, mask=0xff800800
|
|
Startup point 1.
|
|
Waiting for send to finish...
|
|
+Sending STARTUP #2 to 3.
|
|
After apic_write.
|
|
Startup point 1.
|
|
Waiting for send to finish...
|
|
+After Startup.
|
|
CPU #0 initialized
|
|
Waiting for 1 CPUS to stop
|
|
Initializing CPU #3
|
|
CPU: vendor Intel device 306a9
|
|
CPU: family 06, model 3a, stepping 09
|
|
POST: 0x60
|
|
Enabling cache
|
|
CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0)
|
|
CBFS: Locating 'cpu_microcode_blob.bin'
|
|
CBFS: Found @ offset 14180 size 5800
|
|
microcode: sig=0x306a9 pf=0x10 revision=0x1b
|
|
CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz.
|
|
MTRR: Fixed MSR 0x250 0x0606060606060606
|
|
MTRR: Fixed MSR 0x258 0x0606060606060606
|
|
MTRR: Fixed MSR 0x259 0x0000000000000000
|
|
MTRR: Fixed MSR 0x268 0x0606060606060606
|
|
MTRR: Fixed MSR 0x269 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26a 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26b 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26c 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26d 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26e 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26f 0x0606060606060606
|
|
call enable_fixed_mtrr()
|
|
CPU physical address size: 36 bits
|
|
|
|
MTRR check
|
|
Fixed MTRRs : Enabled
|
|
Variable MTRRs: Enabled
|
|
|
|
POST: 0x93
|
|
Setting up local APIC... apic_id: 0x03 done.
|
|
POST: 0x9b
|
|
VMX is locked, so set_vmx will do nothing
|
|
model_x06ax: energy policy set to 6
|
|
model_x06ax: frequency set to 2600
|
|
CPU #3 initialized
|
|
All AP CPUs stopped (420 loops)
|
|
CPU0: stack: bffcd000 - bffce000, lowest used address bffcdab0, stack used: 1360 bytes
|
|
CPU1: stack: bffcc000 - bffcd000, lowest used address bffccc94, stack used: 876 bytes
|
|
CPU2: stack: bffcb000 - bffcc000, lowest used address bffcbc94, stack used: 876 bytes
|
|
CPU3: stack: bffca000 - bffcb000, lowest used address bffcac94, stack used: 876 bytes
|
|
CPU_CLUSTER: 0 init finished in 86033 usecs
|
|
POST: 0x75
|
|
POST: 0x75
|
|
POST: 0x75
|
|
POST: 0x75
|
|
POST: 0x75
|
|
POST: 0x75
|
|
POST: 0x75
|
|
PCI: 00:00.0 init ...
|
|
Disabling PEG12.
|
|
Disabling PEG11.
|
|
Disabling PEG10.
|
|
Disabling PEG60.
|
|
Disabling Device 7.
|
|
Disabling PEG IO clock.
|
|
Set BIOS_RESET_CPL
|
|
CPU TDP: 35 Watts
|
|
PCI: 00:00.0 init finished in 1014 usecs
|
|
POST: 0x75
|
|
POST: 0x75
|
|
PCI: 00:02.0 init ...
|
|
GT Power Management Init
|
|
IVB GT2 25W-35W Power Meter Weights
|
|
GT Power Management Init (post VBIOS)
|
|
Initializing VGA without OPROM.
|
|
EDID:
|
|
00 ff ff ff ff ff ff 00 06 af 6c 10 00 00 00 00
|
|
00 14 01 04 90 1c 10 78 02 20 e5 92 55 54 92 28
|
|
25 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
|
|
01 01 01 01 01 01 12 1b 56 58 50 00 19 30 30 20
|
|
36 00 15 9c 10 00 00 18 00 00 00 0f 00 00 00 00
|
|
00 00 00 00 00 00 00 00 00 20 00 00 00 fe 00 41
|
|
55 4f 0a 20 20 20 20 20 20 20 20 20 00 00 00 fe
|
|
00 42 31 32 35 58 57 30 31 20 56 30 20 0a 00 ec
|
|
Extracted contents:
|
|
header: 00 ff ff ff ff ff ff 00
|
|
serial number: 06 af 6c 10 00 00 00 00 00 14
|
|
version: 01 04
|
|
basic params: 90 1c 10 78 02
|
|
chroma info: 20 e5 92 55 54 92 28 25 50 54
|
|
established: 00 00 00
|
|
standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
|
|
descriptor 1: 12 1b 56 58 50 00 19 30 30 20 36 00 15 9c 10 00 00 18
|
|
descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
|
|
descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
|
|
descriptor 4: 00 00 00 fe 00 42 31 32 35 58 57 30 31 20 56 30 20 0a
|
|
extensions: 00
|
|
checksum: ec
|
|
|
|
Manufacturer: AUO Model 106c Serial Number 0
|
|
Made week 0 of 2010
|
|
EDID version: 1.4
|
|
Digital display
|
|
6 bits per primary color channel
|
|
Digital interface is not defined
|
|
Maximum image size: 28 cm x 16 cm
|
|
Gamma: 220%
|
|
Check DPMS levels
|
|
Supported color formats: RGB 4:4:4
|
|
First detailed timing is preferred timing
|
|
Established timings supported:
|
|
Standard timings supported:
|
|
Detailed timings
|
|
Hex of detail: 121b56585000193030203600159c10000018
|
|
Detailed mode (IN HEX): Clock 69300 KHz, 115 mm x 9c mm
|
|
0556 0586 05a6 05ae hborder 0
|
|
0300 0303 0309 0319 vborder 0
|
|
-hsync -vsync
|
|
Did detailed timing
|
|
Hex of detail: 0000000f0000000000000000000000000020
|
|
Manufacturer-specified data, tag 15
|
|
Hex of detail: 000000fe0041554f0a202020202020202020
|
|
ASCII string: AUO
|
|
Hex of detail: 000000fe004231323558573031205630200a
|
|
ASCII string: B125XW01 V0
|
|
Checksum
|
|
Checksum: 0xec (valid)
|
|
bringing up panel at resolution 1376 x 768
|
|
Borders 0 x 0
|
|
Blank 88 x 25
|
|
Sync 32 x 6
|
|
Front porch 48 x 3
|
|
Spread spectrum clock
|
|
Single channel
|
|
Polarities 1, 1
|
|
Data M1=4844421, N1=8388608
|
|
Link frequency 270000 kHz
|
|
Link M1=134567, N1=524288
|
|
Pixel N=6, M1=18, M2=7, P1=2
|
|
Pixel clock 138571 kHz
|
|
waiting for panel powerup
|
|
panel powered up
|
|
PCI: 00:02.0 init finished in 41222 usecs
|
|
POST: 0x75
|
|
PCI: 00:04.0 init ...
|
|
PCI: 00:04.0 init finished in 0 usecs
|
|
POST: 0x75
|
|
PCI: 00:14.0 init ...
|
|
XHCI: Setting up controller.. done.
|
|
PCI: 00:14.0 init finished in 6 usecs
|
|
POST: 0x75
|
|
PCI: 00:16.0 init ...
|
|
ME: FW Partition Table : OK
|
|
ME: Bringup Loader Failure : NO
|
|
ME: Firmware Init Complete : NO
|
|
ME: Manufacturing Mode : YES
|
|
ME: Boot Options Present : NO
|
|
ME: Update In Progress : NO
|
|
ME: Current Working State : Recovery
|
|
ME: Current Operation State : M0 with UMA
|
|
ME: Current Operation Mode : Normal
|
|
ME: Error Code : Image Failure
|
|
ME: Progress Phase : BUP Phase
|
|
ME: Power Management Event : Pseudo-global reset
|
|
ME: Progress Phase State : M0 kernel load
|
|
ME: BIOS path: Error
|
|
PCI: 00:16.0 init finished in 15 usecs
|
|
POST: 0x75
|
|
POST: 0x75
|
|
POST: 0x75
|
|
POST: 0x75
|
|
PCI: 00:19.0 init ...
|
|
PCI: 00:19.0 init finished in 0 usecs
|
|
POST: 0x75
|
|
PCI: 00:1a.0 init ...
|
|
EHCI: Setting up controller.. done.
|
|
PCI: 00:1a.0 init finished in 12 usecs
|
|
POST: 0x75
|
|
PCI: 00:1b.0 init ...
|
|
Azalia: base = f1638000
|
|
Azalia: codec_mask = 09
|
|
Azalia: Initializing codec #3
|
|
Azalia: codec viddid: 80862806
|
|
Azalia: verb_size: 16
|
|
Azalia: verb loaded.
|
|
Azalia: Initializing codec #0
|
|
Azalia: codec viddid: 10ec0269
|
|
Azalia: verb_size: 76
|
|
Azalia: verb loaded.
|
|
PCI: 00:1b.0 init finished in 5973 usecs
|
|
POST: 0x75
|
|
PCI: 00:1c.0 init ...
|
|
Initializing PCH PCIe bridge.
|
|
PCI: 00:1c.0 init finished in 9 usecs
|
|
POST: 0x75
|
|
PCI: 00:1c.1 init ...
|
|
Initializing PCH PCIe bridge.
|
|
PCI: 00:1c.1 init finished in 11 usecs
|
|
POST: 0x75
|
|
PCI: 00:1c.2 init ...
|
|
Initializing PCH PCIe bridge.
|
|
PCI: 00:1c.2 init finished in 14 usecs
|
|
POST: 0x75
|
|
POST: 0x75
|
|
POST: 0x75
|
|
POST: 0x75
|
|
POST: 0x75
|
|
POST: 0x75
|
|
PCI: 00:1d.0 init ...
|
|
EHCI: Setting up controller.. done.
|
|
PCI: 00:1d.0 init finished in 12 usecs
|
|
POST: 0x75
|
|
POST: 0x75
|
|
PCI: 00:1f.0 init ...
|
|
pch: lpc_init
|
|
IOAPIC: Initializing IOAPIC at 0xfec00000
|
|
IOAPIC: Bootstrap Processor Local APIC = 0x00
|
|
IOAPIC: ID = 0x02
|
|
IOAPIC: Dumping registers
|
|
reg 0x0000: 0x02000000
|
|
reg 0x0001: 0x00170020
|
|
reg 0x0002: 0x00170020
|
|
Set power off after power failure.
|
|
NMI sources disabled.
|
|
PantherPoint PM init
|
|
rtc_failed = 0x0
|
|
RTC Init
|
|
Enabling BIOS updates outside of SMM... Disabling ACPI via APMC:
|
|
done.
|
|
pch_spi_init
|
|
PCI: 00:1f.0 init finished in 326 usecs
|
|
POST: 0x75
|
|
PCI: 00:1f.2 init ...
|
|
SATA: Initializing...
|
|
SATA: Controller in AHCI mode.
|
|
ABAR: f163d000
|
|
PCI: 00:1f.2 init finished in 72 usecs
|
|
POST: 0x75
|
|
PCI: 00:1f.3 init ...
|
|
PCI: 00:1f.3 init finished in 8 usecs
|
|
POST: 0x75
|
|
POST: 0x75
|
|
POST: 0x75
|
|
PCI: 01:00.0 init ...
|
|
PCI: 01:00.0 init finished in 14 usecs
|
|
POST: 0x75
|
|
PCI: 02:00.0 init ...
|
|
PCI: 02:00.0 init finished in 1 usecs
|
|
POST: 0x75
|
|
POST: 0x75
|
|
POST: 0x75
|
|
POST: 0x75
|
|
PNP: 00ff.2 init ...
|
|
Keyboard init...
|
|
Keyboard controller output buffer result timeout
|
|
PS/2 keyboard initialized on primary channel
|
|
PNP: 00ff.2 init finished in 508295 usecs
|
|
POST: 0x75
|
|
smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ...
|
|
I2C: 01:54 init finished in 1 usecs
|
|
POST: 0x75
|
|
smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ...
|
|
I2C: 01:55 init finished in 1 usecs
|
|
POST: 0x75
|
|
smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ...
|
|
I2C: 01:56 init finished in 1 usecs
|
|
POST: 0x75
|
|
smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ...
|
|
I2C: 01:57 init finished in 1 usecs
|
|
POST: 0x75
|
|
smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ...
|
|
Locking EEPROM RFID
|
|
init EEPROM done
|
|
I2C: 01:5c init finished in 25664 usecs
|
|
POST: 0x75
|
|
smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ...
|
|
I2C: 01:5d init finished in 0 usecs
|
|
POST: 0x75
|
|
smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ...
|
|
I2C: 01:5e init finished in 0 usecs
|
|
POST: 0x75
|
|
smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ...
|
|
I2C: 01:5f init finished in 0 usecs
|
|
Devices initialized
|
|
Show all devs... After init.
|
|
Root Device: enabled 1
|
|
CPU_CLUSTER: 0: enabled 1
|
|
APIC: 00: enabled 1
|
|
APIC: acac: enabled 0
|
|
DOMAIN: 0000: enabled 1
|
|
PCI: 00:00.0: enabled 1
|
|
PCI: 00:01.0: enabled 0
|
|
PCI: 00:02.0: enabled 1
|
|
PCI: 00:14.0: enabled 1
|
|
PCI: 00:16.0: enabled 1
|
|
PCI: 00:16.1: enabled 0
|
|
PCI: 00:16.2: enabled 0
|
|
PCI: 00:16.3: enabled 0
|
|
PCI: 00:19.0: enabled 1
|
|
PCI: 00:1a.0: enabled 1
|
|
PCI: 00:1b.0: enabled 1
|
|
PCI: 00:1c.0: enabled 1
|
|
PCI: 01:00.0: enabled 1
|
|
PCI: 00:1c.1: enabled 1
|
|
PCI: 00:1c.2: enabled 1
|
|
PCI: 00:1c.3: enabled 0
|
|
PCI: 00:1c.4: enabled 0
|
|
PCI: 00:1c.5: enabled 0
|
|
PCI: 00:1c.6: enabled 0
|
|
PCI: 00:1c.7: enabled 0
|
|
PCI: 00:1d.0: enabled 1
|
|
PCI: 00:1e.0: enabled 0
|
|
PCI: 00:1f.0: enabled 1
|
|
PNP: 00ff.1: enabled 1
|
|
PNP: 0c31.0: enabled 1
|
|
PNP: 00ff.2: enabled 1
|
|
PCI: 00:1f.2: enabled 1
|
|
PCI: 00:1f.3: enabled 1
|
|
I2C: 01:54: enabled 1
|
|
I2C: 01:55: enabled 1
|
|
I2C: 01:56: enabled 1
|
|
I2C: 01:57: enabled 1
|
|
I2C: 01:5c: enabled 1
|
|
I2C: 01:5d: enabled 1
|
|
I2C: 01:5e: enabled 1
|
|
I2C: 01:5f: enabled 1
|
|
PCI: 00:1f.5: enabled 0
|
|
PCI: 00:1f.6: enabled 0
|
|
PCI: 00:04.0: enabled 1
|
|
PCI: 02:00.0: enabled 1
|
|
Unknown device path type: 0
|
|
: enabled 1
|
|
APIC: 01: enabled 1
|
|
APIC: 02: enabled 1
|
|
APIC: 03: enabled 1
|
|
BS: BS_DEV_INIT times (us): entry 8 run 668769 exit 0
|
|
POST: 0x76
|
|
Finalize devices...
|
|
PCI: 00:1f.0 final
|
|
Devices finalized
|
|
BS: BS_POST_DEVICE times (us): entry 0 run 2 exit 0
|
|
POST: 0x77
|
|
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0
|
|
Updating MRC cache data.
|
|
CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0)
|
|
CBFS: Locating 'mrc.cache'
|
|
CBFS: Found @ offset 1fec0 size 10000
|
|
find_current_mrc_cache_local: No valid MRC cache found.
|
|
flash size 0xc00000 bytes
|
|
SF: Detected Opaque HW-sequencing with sector size 0x1000, total 0xc00000
|
|
Need to erase the MRC cache region of 65536 bytes at fff20000
|
|
SF: Successfully erased 65536 bytes @ 0xb20000
|
|
Finally: write MRC cache update to flash at fff20000
|
|
SF: Successfully written 1456 bytes @ 0xb20000
|
|
Successfully wrote MRC cache
|
|
POST: 0x79
|
|
POST: 0x9c
|
|
CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0)
|
|
CBFS: Locating 'fallback/dsdt.aml'
|
|
CBFS: Found @ offset 1a680 size 34ff
|
|
CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0)
|
|
CBFS: Locating 'fallback/slic'
|
|
CBFS: 'fallback/slic' not found.
|
|
ACPI: Writing ACPI tables at bff2b000.
|
|
ACPI: * FACS
|
|
ACPI: * DSDT
|
|
ACPI: * FADT
|
|
ACPI: added table 1/32, length now 40
|
|
ACPI: * SSDT
|
|
Found 1 CPU(s) with 4 core(s) each.
|
|
PSS: 2601MHz power 35000 control 0x2100 status 0x2100
|
|
PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00
|
|
PSS: 2400MHz power 31561 control 0x1800 status 0x1800
|
|
PSS: 2200MHz power 28247 control 0x1600 status 0x1600
|
|
PSS: 2000MHz power 25084 control 0x1400 status 0x1400
|
|
PSS: 1800MHz power 22064 control 0x1200 status 0x1200
|
|
PSS: 1600MHz power 19135 control 0x1000 status 0x1000
|
|
PSS: 1400MHz power 16344 control 0xe00 status 0xe00
|
|
PSS: 1200MHz power 13666 control 0xc00 status 0xc00
|
|
PSS: 2601MHz power 35000 control 0x2100 status 0x2100
|
|
PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00
|
|
PSS: 2400MHz power 31561 control 0x1800 status 0x1800
|
|
PSS: 2200MHz power 28247 control 0x1600 status 0x1600
|
|
PSS: 2000MHz power 25084 control 0x1400 status 0x1400
|
|
PSS: 1800MHz power 22064 control 0x1200 status 0x1200
|
|
PSS: 1600MHz power 19135 control 0x1000 status 0x1000
|
|
PSS: 1400MHz power 16344 control 0xe00 status 0xe00
|
|
PSS: 1200MHz power 13666 control 0xc00 status 0xc00
|
|
PSS: 2601MHz power 35000 control 0x2100 status 0x2100
|
|
PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00
|
|
PSS: 2400MHz power 31561 control 0x1800 status 0x1800
|
|
PSS: 2200MHz power 28247 control 0x1600 status 0x1600
|
|
PSS: 2000MHz power 25084 control 0x1400 status 0x1400
|
|
PSS: 1800MHz power 22064 control 0x1200 status 0x1200
|
|
PSS: 1600MHz power 19135 control 0x1000 status 0x1000
|
|
PSS: 1400MHz power 16344 control 0xe00 status 0xe00
|
|
PSS: 1200MHz power 13666 control 0xc00 status 0xc00
|
|
PSS: 2601MHz power 35000 control 0x2100 status 0x2100
|
|
PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00
|
|
PSS: 2400MHz power 31561 control 0x1800 status 0x1800
|
|
PSS: 2200MHz power 28247 control 0x1600 status 0x1600
|
|
PSS: 2000MHz power 25084 control 0x1400 status 0x1400
|
|
PSS: 1800MHz power 22064 control 0x1200 status 0x1200
|
|
PSS: 1600MHz power 19135 control 0x1000 status 0x1000
|
|
PSS: 1400MHz power 16344 control 0xe00 status 0xe00
|
|
PSS: 1200MHz power 13666 control 0xc00 status 0xc00
|
|
ACPI: added table 2/32, length now 44
|
|
ACPI: * MCFG
|
|
ACPI: added table 3/32, length now 48
|
|
ACPI: * TCPA
|
|
TCPA log created at bff1a000
|
|
ACPI: added table 4/32, length now 52
|
|
ACPI: * MADT
|
|
ACPI: added table 5/32, length now 56
|
|
current = bff30090
|
|
ACPI: * DMAR
|
|
ACPI: added table 6/32, length now 60
|
|
current = bff30140
|
|
GET_VBIOS: aa55 8086 0 0 3
|
|
... VBIOS found at 000c0000
|
|
ACPI: * HPET
|
|
ACPI: added table 7/32, length now 64
|
|
ACPI: done.
|
|
ACPI tables: 29056 bytes.
|
|
smbios_write_tables: bff19000
|
|
recv_ec_data: 0x47
|
|
recv_ec_data: 0x32
|
|
recv_ec_data: 0x48
|
|
recv_ec_data: 0x54
|
|
recv_ec_data: 0x33
|
|
recv_ec_data: 0x35
|
|
recv_ec_data: 0x57
|
|
recv_ec_data: 0x57
|
|
recv_ec_data: 0x16
|
|
recv_ec_data: 0x03
|
|
Create SMBIOS type 17
|
|
Root Device (LENOVO ThinkPad X230)
|
|
CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge)
|
|
APIC: 00 (unknown)
|
|
APIC: acac (Intel SandyBridge/IvyBridge CPU)
|
|
DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge)
|
|
PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
|
|
PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
|
|
PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
|
|
PCI: 00:14.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 01:00.0 (unknown)
|
|
PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7)
|
|
PNP: 0c31.0 (unknown)
|
|
PNP: 00ff.2 (Lenovo H8 EC)
|
|
PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
I2C: 01:54 (AT24RF08C)
|
|
I2C: 01:55 (AT24RF08C)
|
|
I2C: 01:56 (AT24RF08C)
|
|
I2C: 01:57 (AT24RF08C)
|
|
I2C: 01:5c (AT24RF08C)
|
|
I2C: 01:5d (AT24RF08C)
|
|
I2C: 01:5e (AT24RF08C)
|
|
I2C: 01:5f (AT24RF08C)
|
|
PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
|
|
PCI: 00:04.0 (unknown)
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PCI: 02:00.0 (unknown)
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Unknown device path type: 0
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(unknown)
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APIC: 01 (unknown)
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APIC: 02 (unknown)
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APIC: 03 (unknown)
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SMBIOS tables: 623 bytes.
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Writing table forward entry at 0x00000500
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Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4fe9
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Writing coreboot table at 0xbff4f000
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0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
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1. 0000000000001000-000000000009ffff: RAM
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2. 00000000000a0000-00000000000fffff: RESERVED
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3. 0000000000100000-00000000bff18fff: RAM
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4. 00000000bff19000-00000000bfffffff: CONFIGURATION TABLES
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5. 00000000c0000000-00000000c29fffff: RESERVED
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6. 00000000f8000000-00000000fbffffff: RESERVED
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7. 00000000fed90000-00000000fed91fff: RESERVED
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8. 0000000100000000-000000043b5fffff: RAM
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flash size 0xc00000 bytes
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SF: Detected Opaque HW-sequencing with sector size 0x1000, total 0xc00000
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CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0)
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FMAP: Found "FLASH" version 1.1 at b00000.
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FMAP: base = ff400000 size = c00000 #areas = 3
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Wrote coreboot table at: bff4f000, 0x318 bytes, checksum afd
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coreboot table: 816 bytes.
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IMD ROOT 0. bffff000 00001000
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IMD SMALL 1. bfffe000 00001000
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CONSOLE 2. bffde000 00020000
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MRC DATA 3. bffdd000 000005b0
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ROMSTG STCK 4. bffd8000 00005000
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RAMSTAGE 5. bff97000 00041000
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57a9e100 6. bff57000 0003f870
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COREBOOT 7. bff4f000 00008000
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ACPI 8. bff2b000 00024000
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ACPI GNVS 9. bff2a000 00001000
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TCPA LOG 10. bff1a000 00010000
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SMBIOS 11. bff19000 00000800
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IMD small region:
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IMD ROOT 0. bfffec00 00000400
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CAR GLOBALS 1. bfffeac0 00000140
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MEM INFO 2. bfffe960 00000141
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ROMSTAGE 3. bfffe940 00000004
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57a9e000 4. bfffe920 00000010
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BS: BS_WRITE_TABLES times (us): entry 664440 run 25344 exit 0
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POST: 0x7a
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CBFS: 'Master Header Locator' located CBFS at [b00100:bfffc0)
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CBFS: Locating 'fallback/payload'
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CBFS: Found @ offset 8ac80 size f66b
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Loading segment from ROM address 0xfff8adb8
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code (compression=1)
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New segment dstaddr 0xe31c0 memsize 0x1ce40 srcaddr 0xfff8adf0 filesize 0xf633
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Loading segment from ROM address 0xfff8add4
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Entry Point 0x000ff06e
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Payload being loaded at below 1MiB without region being marked as RAM usable.
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Loading Segment: addr: 0x00000000000e31c0 memsz: 0x000000000001ce40 filesz: 0x000000000000f633
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lb: [0x00000000bff98000, 0x00000000bffd7870)
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Post relocation: addr: 0x00000000000e31c0 memsz: 0x000000000001ce40 filesz: 0x000000000000f633
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using LZMA
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[ 0x000e31c0, 00100000, 0x00100000) <- fff8adf0
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dest 000e31c0, end 00100000, bouncebuffer ffffffff
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Loaded segments
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BS: BS_PAYLOAD_LOAD times (us): entry 0 run 26734 exit 0
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POST: 0x7b
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PCH watchdog disabled
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Jumping to boot code at 000ff06e(bff4f000)
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POST: 0xf8
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CPU0: stack: bffcd000 - bffce000, lowest used address bffcd890, stack used: 1904 bytes
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es, bus 1 link: 0
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PCI: 01:00.0 10 <- [0x00f1400000 - 0x00f14000ff] size 0x00000100 gran 0x08 mem
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PCI: 00:1c.0 assign_resources, bus 1 link: 0
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PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
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PCI: 00:1c.1 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
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PCI: 00:1c.1 20 <- [0x00f1500000 - 0x00f15fffff] size 0x00100000 gran 0x14 bus 02 mem
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PCI: 00:1c.1 assign_resources, bus 2 link: 0
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PCI: 02:00.0 10 <- [0x00f1500000 - 0x00f150ffff] size 0x00010000 gran 0x10 mem64
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PCI: 00:1c.1 assign_resources, bus 2 link: 0
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PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io
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PCI: 00:1c.2 24 <- [0x00f0000000 - 0x00f07fffff] size 0x00800000 gran 0x14 bus 03 prefmem
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PCI: 00:1c.2 20 <- [0x00f0800000 - 0x00f0ffffff] size 0x00800000 gran 0x14 bus 03 mem
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PCI: 00:1c.2 assign_resources, bus 3 link: 0
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Unknown device path type: 0
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missing set_resources
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PCI: 00:1c.2 assign_resources, bus 3 link: 0
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PCI: 00:1d.0 10 <- [0x00f163f000 - 0x00f163f3ff] size 0x00000400 gran 0x0a mem
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PCI: 00:1f.0 assign_resources, bus 0 link: 0
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PNP: 00ff.1 missing set_resources
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PNP: 00ff.2 missing set_resources
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PCI: 00:1f.0 assign_resources, bus 0 link: 0
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PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io
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PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io
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PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io
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PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io
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PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io
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PCI: 00:1f.2 24 <- [0x00f163d000 - 0x00f163d7ff] size 0x00000800 gran 0x0b mem
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PCI: 00:1f.3 10 <- [0x00f1640000 - 0x00f16400ff] size 0x00000100 gran 0x08 mem64
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PCI: 00:1f.3 assign_resources, bus 1 link: 0
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PCI: 00:1f.3 assign_resources, bus 1 link: 0
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DOMAIN: 0000 assign_resources, bus 0 link: 0
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Root Device assign_resources, bus 0 link: 0
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Done setting resources.
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Show resources in subtree (Root Device)...After assigning values.
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Root Device child on link 0 CPU_CLUSTER: 0
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CPU_CLUSTER: 0 child on link 0 APIC: 00
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APIC: 00
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APIC: acac
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DOMAIN: 0000 child on link 0 PCI: 00:00.0
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DOMAIN: 0000 resource base 167c size 1098 align 12 gran 0 limit ffff flags 40040100 index 10000000
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DOMAIN: 0000 resource base e0000000 size 11641010 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
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DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
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DOMAIN: 0000 resource base 100000 size bff00000 align 0 gran 0 limit 0 flags e0004200 index 4
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