Bug #148

KGPE-D16 AMD-vi fails because combined sata is enabled

Added by Thierry Laurion almost 2 years ago. Updated over 1 year ago.

Status:NewStart date:11/07/2017
Priority:NormalDue date:
Assignee:-% Done:

0%

Category:chipset configuration
Target version:-

Description

Original post:
Xen error:
(XEN) AMD-Vi: SP5100 erratum 28 detected, disabling IOMMU.
(XEN) If possible, disable SATA Combined mode in BIOS or contact your vendor
for BIOS update.
(XEN) AMD-Vi: Error initialization
(XEN) I/O virtualisation disabled
-but HAP is working,
(XEN) HVM: SVM enabled
(XEN) HVM: Hardware Assisted Paging (HAP) detected
(XEN) HVM: HAP page sizes: 4kB, 2MB, 1GB
Src:https://lists.gt.net/xen/users/371020

AMD's SP5100 chipset can be placed into SATA Combined mode
that may cause prevent dom0 from booting when IOMMU is
enabled and per-device interrupt remapping table is used.
While SP5100 erratum 28 requires BIOSes to disable this mode,
some may still use it.
src: https://lists.alpinelinux.org/alpine-devel/2724.html

ENABLE_IDE_COMBINED_MODE available for sp800 but not for sp700, for ewhich sp5100 is derived from:
https://www.coreboot.org/Coreboot_Options

SP5100 Product Errata
46836 Rev. 3.00 June 2012 P.18
Product Errata 28
Incorrect IOMMU Table Accessed in SATA Combined Mode

Description
Systems with SP5100 SATA set to AHCI or IDE combined mode with SATA port 4 or 5 in use will use the SATA source ID for IDE DMA when consulting the IOMMU tables.

Potential Effect on System
Operating systems where the IDE and SATA tables are separated will experience I/O page faults.

Several warnings will be issued during kernel initialization, ultimately leading to the inability to boot the operating system due to the boot disk not being found.

Suggested Workaround
Disable combined mode by setting a platform BIOS callback option to CIMx called "SataIdeCombinedMode" to 0.
This change will not have an impact on AHCI/RAID mode, however, in IDE mode, the total number of available ports is reduced by two.

Fix Planned
No
src:https://support.amd.com/TechDocs/46836.pdf

Coreboot: Release 4.6
Xen: 4.8.x
Xen code responsible for detection:
https://github.com/xenserver/xen-4.3.pg/blob/master/tweak-iommu-errata-policy.patch

Is there something i'm missing? Is it possible to disable combined sata mode for sb700 from coreboot?

Thanks,

Thierry

Peter Sturge answered:
SB700 mainboard support seems copypasted rather than engineered. The
sustainable solution is to move sb700_cfg.c from src/mainboard/*/
to src/southbridge/amd/cimx/sb700/ and hook the configuration in that
file into Kconfig.

Until someone does that, you could indeed change the assignment of
that option by looking for

SataIdeCombinedMode

in the source code, if a sb700_cimx_config() function is called for
this board - but that might not be the case if the board port chose
not to use that part of AGESA.

//Peter

I replied:
As I understand the code, KGPE-d16 doesn't use AGESA part (nor any?).

Thanks,
Thierry

kgpe-d16-coreboot_7-WORKING.config (325 Bytes) Thierry Laurion, 01/31/2018 04:44 PM

History

#2 Updated by Thierry Laurion over 1 year ago

For some reason, it is no longer that case.
This is the minimal configuration required for the board to boot and have interrupt remapping, SLAT and IOMMU.

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