Issue Tracker: Issues
https://ticket.coreboot.org/
https://ticket.coreboot.org/themes/PurpleMine2-2.16.2/favicon/favicon.ico?1
2024-03-21T10:17:34Z
Issue Tracker
Redmine
coreboot - Support #534 (New): Enable Ethernet (LAN) on ADL-P Custom Board
https://ticket.coreboot.org/issues/534
2024-03-21T10:17:34Z
Mahesh Kilumu
<p>Hi, With respect to the Alderlake-P RVP platform designed Custom Board.<br>
i have been trying to implement the Ethernet(LAN) on my Custom Board. on RVP intel team used GBE PHY but on my custom board we have used the External Realtek RTL8111H controller over PCIe Root port7 for Ethernet. </p>
<p>Below are the configuration details:<br>
1) Devicetree.cb: <br>
device ref pcie_rp7 on end<br>
# Enable PCH PCIE RP 7 using CLK 6<br>
register "pch_pcie_rp[PCH_RP(7)]" = "{<br>
.clk_src = 6,<br>
.clk_req = 6,<br>
.flags = PCIE_CLK_LAN<br>
}"</p>
<p>2) gpio.c:<br>
/* 19: PCIE SRCCLKREQ6- same as RVP <em>/<br>
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),<br>
/</em> 2: GPD_2_LAN_WAKE_N- same as RVP*/<br>
PAD_CFG_NF(GPD2, NONE, DEEP, NF1),<br><br>
/* 21 : LAN_ISOLATE# -New Implementation */<br>
PAD_CFG_GPO(GPP_A21, 1, DEEP),</p>
<p>from the logs observed that,<br>
Root port got enabled ->> [SPEW ] PCI: 00:00:1c.6: enabled 1</p>
<p>But observed the few Error & warnings in the log with respect to the above configuration<br>
[WARN ] Missing root port clock structure definition<br>
[ERROR] PCI: 00:00:1c.6 missing read_resources</p>
<p>full log details : <br>
<a href="https://pastebin.com/zWcsEZvL" class="external">https://pastebin.com/zWcsEZvL</a> </p>
Infrastructure - Bug #532 (New): Fetchung https://git.seabios.org/seabios.git/ results in The req...
https://ticket.coreboot.org/issues/532
2024-03-05T18:35:26Z
Paul Menzel
pmenzel+ticket.coreboot@molgen.mpg.de
<pre><code>$ LANG= git remote update
Fetching origin
fatal: unable to access 'https://git.seabios.org/seabios.git/': The requested URL returned error: 502
error: could not fetch origin
</code></pre>
Infrastructure - Bug #531 (New): https://review.coreboot.org/plugins/gitiles/coreboot//+log/?form...
https://ticket.coreboot.org/issues/531
2024-03-04T20:15:10Z
Rachel Nancollas
<p>I can no longer access this site: <a href="https://review.coreboot.org/plugins/gitiles/coreboot//+log/?format=JSON&n=1" class="external">https://review.coreboot.org/plugins/gitiles/coreboot//+log/?format=JSON&n=1</a>. I get a 404, Not Found. It was available on Thursday. </p>
coreboot - Bug #530 (New): fatal: unable to access 'https://git.seabios.org/seabios.git/': The re...
https://ticket.coreboot.org/issues/530
2024-03-04T07:52:39Z
Paul Menzel
pmenzel+ticket.coreboot@molgen.mpg.de
<p>I am unable to access the SeaBIOS archive:</p>
<pre><code>$ LANG= git fetch
fatal: unable to access 'https://git.seabios.org/seabios.git/': The requested URL returned error: 502
</code></pre>
coreboot - Bug #529 (New): `make what-jenkins-does` fails with `go: go.mod file not found in curr...
https://ticket.coreboot.org/issues/529
2024-03-03T08:59:57Z
Paul Menzel
pmenzel+ticket.coreboot@molgen.mpg.de
<pre><code>$ git log --oneline --no-decorate -1
ec7b4807600 Revert "mb/sifive: Add Hifive Unmatched mainboard"
$ make what-jenkins-does
selected junit
Check that files have license headers (lint-stable-000-license-headers): success
Check for superfluous whitespace in the tree (lint-stable-003-whitespace): success
Check that C labels begin at start-of-line (lint-stable-004-style-labels): success
Check that every board has a meaningful board_info.txt (lint-stable-005-board-status): success
Check that every vendor and board has a Kconfig.name (lint-stable-006-board-name): success
Check Kconfig files for errors (lint-stable-008-kconfig): success
Verify that files don't have the old style header (lint-stable-009-old-licenses): success
Check that we use a single assembler syntax (lint-stable-010-asm-syntax): success
Check that source files are not executable (lint-stable-012-executable-bit): success
Verify that site-local is not in the coreboot repository (lint-stable-013-site-local): success
Check for non-ASCII and unprintable characters (lint-stable-016-non-ascii): fatal: cannot use Perl-compatible regexes when not compiled with USE_LIBPCRE
success
Check that saved config files are miniconfigs (lint-stable-017-configs): success
Report any symbolic links (lint-stable-018-symlinks): success
Check for auto-included headers (lint-stable-019-header-files): success
Verify that the word 'coreboot' is lowercase (lint-stable-021-coreboot-lowercase): success
Run clang-format on white-listed directories (lint-stable-022-clang-format): success
Check for illegal characters in filename (lint-stable-023-filenames): success
Check that no board's Kconfig sets SUBSYSTEM_(VENDOR|DEVICE)_ID (lint-stable-024-kconfig-no-subsystem): success
Verify that files don't contain windows line endings (lint-stable-026-line-endings): fatal: cannot use Perl-compatible regexes when not compiled with USE_LIBPCRE
success
Check that path patterns in MAINTAINERS have trailing slash (lint-stable-027-maintainers-syntax): success
Check that no touchpad uses the "probed" flag (lint-stable-028-touchpad-probed-warning): success
Check that boards don't use select Kconfig.name (lint-stable-029-kconfig-name-selects): success
selected junit
Run checkpatch on directories that are known good (lint-extended-007-checkpatch): success
Check that files end with a single newline (lint-extended-015-final-newlines): success
Check for a signed-off-by line on the latest commit (lint-extended-020-signed-off-by): success
go: go.mod file not found in current directory or any parent directory; see 'go help modules'
make: *** [util/testing/Makefile.mk:98: what-jenkins-does] Error 1
</code></pre>
coreboot - Bug #528 (New): Building `emulation/qemu-i440fx` with `CONFIG_CBFS_VERIFICATION=y` fails
https://ticket.coreboot.org/issues/528
2024-03-01T21:31:08Z
Paul Menzel
pmenzel+ticket.coreboot@molgen.mpg.de
<p>Building a coreboot image for <code>emulation/qemu-i440fx</code> with <code>CONFIG_CBFS_VERIFICATION=y</code> fails.</p>
<pre><code>$ git log --oneline --no-decorate -1
ff2d863515 drivers/intel/gma: Allow SPARK function with side effects
$ make savedefconfig
$ more defconfig
CONFIG_ANY_TOOLCHAIN=y
# CONFIG_SEPARATE_ROMSTAGE is not set
CONFIG_TIMESTAMPS_ON_CONSOLE=y
# CONFIG_USE_BLOBS is not set
CONFIG_NO_POST=y
CONFIG_USE_EXP_X86_64_SUPPORT=y
# CONFIG_PCI_ALLOW_BUS_MASTER is not set
CONFIG_CBFS_VERIFICATION=y
CONFIG_CONSOLE_SERIAL_921600=y
# CONFIG_CONSOLE_QEMU_DEBUGCON is not set
CONFIG_PAYLOAD_FILO=y
CONFIG_FILO_HEAD=y
CONFIG_FILO_USE_AUTOBOOT=y
CONFIG_FILO_AUTOBOOT_FILE="hda1:/vmlinuz initrd=hda1:/initrd.img root=/dev/sda1 ro quiet"
$ make -j4
[…]
CC ramstage/arch/x86/boot.o
CC ramstage/arch/x86/breakpoint.o
LINK cbfs/fallback/postcar.debug
LINK cbfs/fallback/bootblock.debug
x86_64-linux-gnu-ld.bfd: warning: build/postcar/mainboard/emulation/qemu-i440fx/exit_car.o: missing .note.GNU-stack section implies executable stack
x86_64-linux-gnu-ld.bfd: NOTE: This behaviour is deprecated and will be removed in a future version of the linker
x86_64-linux-gnu-ld.bfd: warning: build/cbfs/fallback/postcar.debug has a LOAD segment with RWX permissions
HOSTCC cbfstool/ifittool (link)
HOSTCC cbfstool/ifwitool (link)
HOSTCC cbfstool/cse_fpt (link)
x86_64-linux-gnu-ld.bfd: warning: build/bootblock/cpu/x86/reset16.o: missing .note.GNU-stack section implies executable stack
x86_64-linux-gnu-ld.bfd: NOTE: This behaviour is deprecated and will be removed in a future version of the linker
x86_64-linux-gnu-ld.bfd: warning: build/cbfs/fallback/bootblock.debug has a LOAD segment with RWX permissions
x86_64-linux-gnu-ld.bfd: build/bootblock/cpu/qemu-x86/cache_as_ram_bootblock.o: in function `cache_as_ram':
/dev/shm/coreboot/src/cpu/qemu-x86/cache_as_ram_bootblock.S:46:(.init+0x1f): undefined reference to `walkcbfs_asm'
/dev/shm/coreboot/src/cpu/qemu-x86/cache_as_ram_bootblock.S:46:(.init+0x1f): relocation truncated to fit: R_X86_64_PC32 against undefined symbol `walkcbfs_asm'
make: *** [src/arch/x86/Makefile.mk:101: build/cbfs/fallback/bootblock.debug] Fehler 1
make: *** Es wird auf noch nicht beendete Prozesse gewartet....
</code></pre>
coreboot - Bug #527 (New): Can't compile coreboot on Arch Linux
https://ticket.coreboot.org/issues/527
2024-02-23T13:44:57Z
naixin Lv
<p>I want to compile coreboot for my Gigabyte GA-H61M-DS2 mainboard, but I only found a short guide for this board at this site: <a href="https://www.iot-tech.dev/full.php?ar=166" class="external">https://www.iot-tech.dev/full.php?ar=166</a><br>
After downloaded the coreboot git repository, It gave me this error:</p>
<pre><code class="shell syntaxhl" data-language="shell">/home/zhongli/coreboot/util/crossgcc/xgcc/bin/x86_64-elf-ld.bfd: build/romstage/console/vtxprintf.o: <span class="k">in function</span> <span class="sb">`</span>number<span class="s1">':
/home/zhongli/coreboot/src/console/vtxprintf.c:63:(.text.number+0x12b): undefined reference to `__udivmoddi4'</span>
/home/zhongli/coreboot/util/crossgcc/xgcc/bin/x86_64-elf-ld.bfd: build/romstage/lib/gcc.o: <span class="k">in function</span> <span class="sb">`</span>__wrap___divdi3<span class="s1">':
/home/zhongli/coreboot/src/lib/gcc.c:19:(.text.__wrap___divdi3+0x1): undefined reference to `__divdi3'</span>
/home/zhongli/coreboot/util/crossgcc/xgcc/bin/x86_64-elf-ld.bfd: build/romstage/lib/gcc.o: <span class="k">in function</span> <span class="sb">`</span>__wrap___udivdi3<span class="s1">':
/home/zhongli/coreboot/src/lib/gcc.c:20:(.text.__wrap___udivdi3+0x1): undefined reference to `__udivdi3'</span>
make: <span class="k">***</span> <span class="o">[</span>src/arch/x86/Makefile.mk:191: build/cbfs/fallback/romstage.debug] Error 1
</code></pre>
<p>And I'll put my config file on here.<br>
Any help ?</p>
flashrom - Feature #526 (New): Add Support for Macronix MX29LV800CT
https://ticket.coreboot.org/issues/526
2024-02-16T16:13:32Z
Star Fox
<p>Hi,</p>
<p>it would be very nice if you can add support for the Macronix MX29LV800CT.</p>
<p>Datasheets here:<br>
<a href="https://www.mxic.com.tw/Lists/Datasheet/Attachments/8544/MX29LV800C%20T-B,%203V,%208Mb,%20v2.6.pdf" class="external">https://www.mxic.com.tw/Lists/Datasheet/Attachments/8544/MX29LV800C%20T-B,%203V,%208Mb,%20v2.6.pdf</a></p>
<p>Another Flashrom Version from jhcloos has this Chipset in the flashchips.h File:<br>
<a href="https://github.com/jhcloos/flashrom/blob/master/flashchips.h" class="external">https://github.com/jhcloos/flashrom/blob/master/flashchips.h</a></p>
<p>Big Thanks in advance</p>
flashrom - Bug #525 (New): Potential clash when custom get_flash_region() called in erase_write
https://ticket.coreboot.org/issues/525
2024-02-05T03:40:27Z
Anastasia Klimchuk
<p><code>erase_write</code> in erasure_layout.c makes a call to <code>get_flash_region()</code>. This call happens after erase layout is calculated, however <code>get_flash_region()</code> can potentially return smaller region.</p>
<p>Issue needs research (and fix if needed).</p>
<p>Originally reported by Vincent Fazio, copying the report below:</p>
<pre><code>As part of looking over #1 and #2, I developed some slight concerns about the loop on line 314 which is separate from
this patchset. I don't know if it warrants an issue and further discussion, and I haven't spelunked into the erase function
selection logic, but the concern I have there is we've already pre-calculated what erase functions we're using but
`get_flash_region` could return a region with a shorter end range, meaning the selected erase block fn could erase part
of the next region. So if we had a 32k erase block fn, it seems like if region.end forces the length of the erasable region
to 4k, we don't actually select a 4k erase function and instead continue to use a 32k function. If the next region is write
protected it seems like we'd have verification errors.
I think this currently only affects masters that have get_region defined, so `opaque_master_ich_hwseq` is at risk here.
This may have been less of a risk with the legacy path because, from what I remember, it always used the smallest working
erase block function, however the new path adjusts the function used based on the amount of changed data and coalesces blocks
when possible (I think).
</code></pre>
coreboot - Bug #524 (New): `CONFIG_X2APIC_ONLY=y`or `CONFIG_X2APIC_RUNTIME=y` cause Linux in emul...
https://ticket.coreboot.org/issues/524
2024-02-04T13:32:49Z
Paul Menzel
pmenzel+ticket.coreboot@molgen.mpg.de
<p>Build coreboot for <code>emulation/qemu-i440fx</code> with <code>CONFIG_X2APIC_ONLY=y</code>or <code>CONFIG_X2APIC_RUNTIME=y</code> causes Linux to crash:</p>
<a name="CONFIG_X2APIC_ONLYy"></a>
<h3 ><code>CONFIG_X2APIC_ONLY=y</code><a href="#CONFIG_X2APIC_ONLYy" class="wiki-anchor">¶</a></h3>
<pre><code>$ qemu-system-x86_64 -bios /dev/shm/coreboot/build/coreboot.rom -L /dev/shm -enable-kvm -smp cpus=2 -m 1G -hda /dev/shm/debian-32.img -serial stdio -net nic -net user,hostfwd=tcp::22222-:22
WARNING: Image format was not specified for '/dev/shm/debian-32.img' and probing guessed raw.
Automatically detecting the format is dangerous for raw images, write operations on block 0 will be restricted.
Specify the 'raw' format explicitly to remove the restrictions.
[NOTE ] coreboot-4.22-671-g416cc665929e Fri Feb 02 20:40:20 UTC 2024 x86_64 bootblock starting (log level: 7)...
[INFO ] Timestamp - end of bootblock: 18374588
[INFO ] Timestamp - start of romstage: 20847149
[INFO ] QEMU: firmware config interface detected
[INFO ] Firmware config version id: 3
[INFO ] QEMU: firmware config: Found 'etc/e820'
[DEBUG] CBMEM:
[DEBUG] IMD: root @ 0x3ffff000 254 entries.
[DEBUG] IMD: root @ 0x3fffec00 62 entries.
[DEBUG] FMAP: Found "FLASH" version 1.1 at 0x0.
[DEBUG] FMAP: base = 0xffc00000 size = 0x400000 #areas = 3
[DEBUG] FMAP: area COREBOOT found @ 200 (4193792 bytes)
[INFO ] CBFS: mcache @0x00014e00 built for 13 files, used 0x294 of 0x4000 bytes
[INFO ] CBFS: Found 'fallback/postcar' @0x1c140 size 0x91b0 in mcache @0x00014fe0
[DEBUG] Loading module at 0x3ffce000 with entry 0x3ffce042. filesize: 0x7d90 memsize: 0xe118
[DEBUG] Processing 636 relocs. Offset value of 0x3dfce000
[INFO ] Timestamp - end of romstage: 69275568
[DEBUG] BS: bootblock times (exec / console): total (unknown) / 12 ms
[NOTE ] coreboot-4.22-671-g416cc665929e Fri Feb 02 20:40:20 UTC 2024 x86_64 postcar starting (log level: 7)...
[INFO ] Timestamp - start of postcar: 113911520
[INFO ] Timestamp - end of postcar: 117105771
[INFO ] Timestamp - starting to load ramstage: 121657944
[DEBUG] FMAP: area COREBOOT found @ 200 (4193792 bytes)
[INFO ] CBFS: Found 'fallback/ramstage' @0xd040 size 0xf072 in mcache @0x3fffeaec
[INFO ] Timestamp - starting LZMA decompress (ignore for x86): 133785778
[INFO ] Timestamp - finished LZMA decompress (ignore for x86): 158178845
[DEBUG] Loading module at 0x3fe9d000 with entry 0x3fe9d000. filesize: 0x234e0 memsize: 0x12fe28
[DEBUG] Processing 3390 relocs. Offset value of 0x3be9d000
[INFO ] Timestamp - finished loading ramstage: 193391473
[DEBUG] BS: postcar times (exec / console): total (unknown) / 5 ms
[NOTE ] coreboot-4.22-671-g416cc665929e Fri Feb 02 20:40:20 UTC 2024 x86_64 ramstage starting (log level: 7)...
[INFO ] Timestamp - start of ramstage: 216358307
[INFO ] Timestamp - device enumeration: 219906562
[DEBUG] BS: BS_DEV_INIT_CHIPS run times (exec / console): 0 / 1 ms
[INFO ] Enumerating buses...
[DEBUG] Root Device scanning...
[DEBUG] CPU_CLUSTER: 0 enabled
[DEBUG] DOMAIN: 00000000 enabled
[DEBUG] DOMAIN: 00000000 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 00
[DEBUG] PCI: 00:00:00.0 [8086/1237] enabled
[DEBUG] PCI: 00:00:01.0 [8086/7000] enabled
[DEBUG] PCI: 00:00:01.1 [8086/7010] enabled
[DEBUG] PCI: 00:00:01.3 [8086/7113] enabled
[DEBUG] PCI: 00:00:02.0 [1234/1111] enabled
[DEBUG] PCI: 00:00:03.0 [8086/100e] enabled
[DEBUG] PCI: 00:00:01.0 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:01.0 finished in 0 msecs
[DEBUG] PCI: 00:00:01.3 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:01.3 finished in 0 msecs
[DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 14 msecs
[DEBUG] scan_bus: bus Root Device finished in 18 msecs
[INFO ] done
[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 1 / 21 ms
[INFO ] Timestamp - device configuration: 298893234
[DEBUG] found VGA at PCI: 00:00:02.0
[DEBUG] Setting up VGA for PCI: 00:00:02.0
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
[INFO ] Allocating resources...
[INFO ] Reading resources...
[INFO ] QEMU: firmware config interface detected
[INFO ] Firmware config version id: 3
[INFO ] QEMU: firmware config: Found 'etc/e820'
[DEBUG] QEMU: e820/res: 0xfeffc000 +0x00004000
[DEBUG] QEMU: e820/ram: 0x00000000 + 0x40000000
[DEBUG] QEMU: reserve ioports 0x0510-0x0511 [firmware-config]
[DEBUG] QEMU: reserve ioports 0x5658-0x5658 [vmware-port]
[DEBUG] QEMU: reserve ioports 0xae00-0xae0f [pci-hotplug]
[DEBUG] QEMU: reserve ioports 0xaf00-0xaf1f [cpu-hotplug]
[DEBUG] QEMU: reserve ioports 0xafe0-0xafe3 [piix4-gpe0]
[INFO ] Done reading resources.
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) ===
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) ===
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 0d base 00000510 limit 00000511 io (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 0e base 00005658 limit 00005658 io (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 0f base 0000ae00 limit 0000ae0f io (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 10 base 0000af00 limit 0000af1f io (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 11 base 0000afe0 limit 0000afe3 io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:01.0 01 base 00000000 limit 00000fff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:01.3 01 base 0000e400 limit 0000e43f io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:01.3 02 base 00000f00 limit 00000f0f io (fixed)
[INFO ] DOMAIN: 00000000: Resource ranges:
[INFO ] * Base: 1000, Size: 4658, Tag: 100
[INFO ] * Base: 5659, Size: 57a7, Tag: 100
[INFO ] * Base: ae10, Size: f0, Tag: 100
[INFO ] * Base: af20, Size: c0, Tag: 100
[INFO ] * Base: afe4, Size: 341c, Tag: 100
[INFO ] * Base: e440, Size: 1bc0, Tag: 100
[DEBUG] PCI: 00:00:03.0 14 * [0xffc0 - 0xffff] limit: ffff io
[DEBUG] PCI: 00:00:01.1 20 * [0xffb0 - 0xffbf] limit: ffbf io
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
[DEBUG] DOMAIN: 00000000 mem: base: 40000000 size: 0 align: 0 gran: 0 limit: fdffffff
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: ffffffffff
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 0a base feffc000 limit feffffff mem (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 0b base 00000000 limit 0009ffff mem (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 0c base 000c0000 limit 3fffffff mem (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 12 base 000a0000 limit 000bffff mem (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 13 base 000c0000 limit 000fffff mem (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 02 base fec00000 limit fecfffff mem (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 03 base fee00000 limit fee0ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 00 base 00008000 limit 0000dfff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:01.0 02 base ff800000 limit ffffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:01.0 03 base fec00000 limit fec00fff mem (fixed)
[INFO ] DOMAIN: 00000000: Resource ranges:
[INFO ] * Base: 40000000, Size: be000000, Tag: 200
[INFO ] * Base: 100000000, Size: ff00000000, Tag: 200
[DEBUG] PCI: 00:00:02.0 10 * [0xfd000000 - 0xfdffffff] limit: fdffffff prefmem
[DEBUG] PCI: 00:00:03.0 30 * [0xfcfc0000 - 0xfcffffff] limit: fcffffff mem
[DEBUG] PCI: 00:00:03.0 10 * [0xfcfa0000 - 0xfcfbffff] limit: fcfbffff mem
[DEBUG] PCI: 00:00:02.0 30 * [0xfcf90000 - 0xfcf9ffff] limit: fcf9ffff mem
[DEBUG] PCI: 00:00:02.0 18 * [0xfcf8f000 - 0xfcf8ffff] limit: fcf8ffff mem
[DEBUG] DOMAIN: 00000000 mem: base: 40000000 size: 0 align: 0 gran: 0 limit: fdffffff done
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: ffffffffff done
[INFO ] === Resource allocator: DOMAIN: 00000000 - resource allocation complete ===
[DEBUG] PCI: 00:00:01.1 20 <- [0x000000000000ffb0 - 0x000000000000ffbf] size 0x00000010 gran 0x04 io
[DEBUG] PCI: 00:00:02.0 10 <- [0x00000000fd000000 - 0x00000000fdffffff] size 0x01000000 gran 0x18 prefmem
[DEBUG] PCI: 00:00:02.0 18 <- [0x00000000fcf8f000 - 0x00000000fcf8ffff] size 0x00001000 gran 0x0c mem
[DEBUG] PCI: 00:00:02.0 30 <- [0x00000000fcf90000 - 0x00000000fcf9ffff] size 0x00010000 gran 0x10 romem
[DEBUG] PCI: 00:00:03.0 10 <- [0x00000000fcfa0000 - 0x00000000fcfbffff] size 0x00020000 gran 0x11 mem
[DEBUG] PCI: 00:00:03.0 14 <- [0x000000000000ffc0 - 0x000000000000ffff] size 0x00000040 gran 0x06 io
[DEBUG] PCI: 00:00:03.0 30 <- [0x00000000fcfc0000 - 0x00000000fcffffff] size 0x00040000 gran 0x12 romem
[INFO ] Done setting resources.
[INFO ] Done allocating resources.
[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 5 / 126 ms
[INFO ] Timestamp - device enable: 684358641
[INFO ] Enabling resources...
[DEBUG] PCI: 00:00:00.0 cmd <- 00
[DEBUG] PCI: 00:00:01.0 cmd <- 00
[DEBUG] PCI: 00:00:01.1 cmd <- 01
[DEBUG] PCI: 00:00:01.3 cmd <- 00
[DEBUG] PCI: 00:00:02.0 cmd <- 03
[DEBUG] PCI: 00:00:03.0 cmd <- 03
[INFO ] done.
[DEBUG] BS: BS_DEV_ENABLE run times (exec / console): 2 / 7 ms
[DEBUG] BS: BS_DEV_INIT entry times (exec / console): 2 / 0 ms
[INFO ] Timestamp - device initialization: 727416775
[INFO ] Initializing devices...
[DEBUG] CPU_CLUSTER: 0 init
[INFO ] CPU: QEMU Virtual CPU version 2.5+.
[INFO ] LAPIC 0x0 switched to X2APIC mode.
[DEBUG] CPU: APIC: 00 enabled
[DEBUG] CPU: APIC: 01 enabled
[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x1b8 memsize: 0x1b8
[DEBUG] Processing 17 relocs. Offset value of 0x00030000
[DEBUG] Attempting to start 1 APs
[DEBUG] Waiting for 10ms after sending INIT.
[DEBUG] Waiting for SIPI to complete...
[INFO ] LAPIC 0x1 switched to X2APIC mode.
[DEBUG] done.
[INFO ] AP: slot 1 apic_id 1
[DEBUG] Waiting for SIPI to complete...
[DEBUG] done.
[INFO ] Initializing CPU #0
[DEBUG] CPU: vendor Intel device 60fb1
[DEBUG] CPU: family 0f, model 6b, stepping 01
[INFO ] CPU #0 initialized
[INFO ] Initializing CPU #1
[DEBUG] CPU: vendor Intel device 60fb1
[DEBUG] CPU: family 0f, model 6b, stepping 01
[INFO ] CPU #1 initialized
[INFO ] bsp_do_flight_plan done after 7 msecs.
[DEBUG] CPU_CLUSTER: 0 init finished in 30 msecs
[DEBUG] PCI: 00:00:00.0 init
[DEBUG] Assigning IRQ 10 to PCI: 00:00:01.3
[DEBUG] Assigning IRQ 11 to PCI: 00:00:03.0
[DEBUG] PCI: 00:00:00.0 init finished in 7 msecs
[DEBUG] PCI: 00:00:01.0 init
[DEBUG] RTC Init
[DEBUG] IOAPIC: Initializing IOAPIC at 0xfec00000
[DEBUG] IOAPIC: ID = 0x02
[DEBUG] IOAPIC: 24 interrupts
[DEBUG] IOAPIC: Clearing IOAPIC at 0xfec00000
[DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00
[DEBUG] PCI: 00:00:01.0 init finished in 5 msecs
[DEBUG] PCI: 00:00:01.1 init
[DEBUG] IDE: Primary interface: on
[DEBUG] IDE: Secondary interface: on
[DEBUG] IDE: Access to legacy IDE ports: off
[DEBUG] PCI: 00:00:01.1 init finished in 3 msecs
[DEBUG] PCI: 00:00:02.0 init
[DEBUG] PCI: 00:00:02.0 init finished in 35 msecs
[DEBUG] PCI: 00:00:03.0 init
[DEBUG] PCI: 00:00:03.0 init finished in 0 msecs
[INFO ] Devices initialized
[DEBUG] BS: BS_DEV_INIT run times (exec / console): 57 / 43 ms
[INFO ] Finalize devices...
[INFO ] Devices finalized
[INFO ] Timestamp - device setup done: 1027392332
[DEBUG] BS: BS_POST_DEVICE run times (exec / console): 0 / 3 ms
[INFO ] Timestamp - cbmem post: 1037915018
[DEBUG] BS: BS_OS_RESUME_CHECK run times (exec / console): 0 / 1 ms
[INFO ] Timestamp - write tables: 1046578108
[INFO ] Copying Interrupt Routing Table to 0x000f0000... done.
[INFO ] Copying Interrupt Routing Table to 0x3fe93000... done.
[DEBUG] PIRQ table: 128 bytes.
[INFO ] QEMU: firmware config: Found 'etc/table-loader'
[DEBUG] QEMU: found ACPI tables in fw_cfg.
[INFO ] QEMU: firmware config: Found 'etc/acpi/rsdp'
[DEBUG] QEMU: loading "etc/acpi/rsdp" to 0x3fe6f000 (len 20)
[INFO ] QEMU: firmware config: Found 'etc/acpi/tables'
[DEBUG] QEMU: loading "etc/acpi/tables" to 0x3fe6f040 (len 131072)
[DEBUG] QEMU: loaded ACPI tables from fw_cfg.
[DEBUG] Looking on 0x3fe6f000 for valid checksum
[DEBUG] Checksum 1 passed
[DEBUG] Checksum 2 passed all OK
[DEBUG] ACPI: added table 1/32, length now 44
[DEBUG] ACPI: added table 2/32, length now 52
[DEBUG] ACPI: added table 3/32, length now 60
[DEBUG] ACPI: added table 4/32, length now 68
[DEBUG] ACPI: * SSDT
[DEBUG] Found 2 CPU(s).
[DEBUG] ACPI: added table 5/32, length now 76
[DEBUG] ACPI tables: 131136 bytes.
[DEBUG] smbios_write_tables: 3fe67000
[DEBUG] SMBIOS firmware version is set to coreboot_version: '4.22-671-g416cc665929e'
[DEBUG] SMBIOS: Unknown CPU or CPU doesn't support Deterministic Cache CPUID leaf
[INFO ] DOMAIN: 00000000 (QEMU Northbridge i440fx)
[INFO ] QEMU: firmware config: Found 'etc/smbios/smbios-tables'
[DEBUG] QEMU: found smbios tables in fw_cfg (len 327).
[DEBUG] QEMU: coreboot type0 table found at 0x3fe67040.
[DEBUG] QEMU: loading smbios tables to 0x3fe67086
[DEBUG] SMBIOS tables: 461 bytes.
[DEBUG] Writing table forward entry at 0x00000500
[DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7ff5
[DEBUG] Writing coreboot table at 0x3fe94000
[DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
[DEBUG] 1. 0000000000001000-0000000000007fff: RAM
[DEBUG] 2. 0000000000008000-000000000000dfff: RESERVED
[DEBUG] 3. 000000000000e000-000000000009ffff: RAM
[DEBUG] 4. 00000000000a0000-00000000000fffff: RESERVED
[DEBUG] 5. 0000000000100000-000000003fe66fff: RAM
[DEBUG] 6. 000000003fe67000-000000003fe9cfff: CONFIGURATION TABLES
[DEBUG] 7. 000000003fe9d000-000000003ffccfff: RAMSTAGE
[DEBUG] 8. 000000003ffcd000-000000003fffffff: CONFIGURATION TABLES
[DEBUG] 9. 00000000fec00000-00000000fec00fff: RESERVED
[DEBUG] 10. 00000000ff800000-00000000ffffffff: RESERVED
[DEBUG] FMAP: area COREBOOT found @ 200 (4193792 bytes)
[DEBUG] Wrote coreboot table at: 0x3fe94000, 0x310 bytes, checksum 85a4
[DEBUG] coreboot table: 808 bytes.
[DEBUG] IMD ROOT 0. 0x3ffff000 0x00001000
[DEBUG] IMD SMALL 1. 0x3fffe000 0x00001000
[DEBUG] CONSOLE 2. 0x3ffde000 0x00020000
[DEBUG] TIME STAMP 3. 0x3ffdd000 0x00000910
[DEBUG] AFTER CAR 4. 0x3ffcd000 0x00010000
[DEBUG] RAMSTAGE 5. 0x3fe9c000 0x00131000
[DEBUG] COREBOOT 6. 0x3fe94000 0x00008000
[DEBUG] IRQ TABLE 7. 0x3fe93000 0x00001000
[DEBUG] ACPI 8. 0x3fe6f000 0x00024000
[DEBUG] SMBIOS 9. 0x3fe67000 0x00008000
[DEBUG] IMD small region:
[DEBUG] IMD ROOT 0. 0x3fffec00 0x00000400
[DEBUG] RO MCACHE 1. 0x3fffe960 0x00000294
[DEBUG] FMAP 2. 0x3fffe8a0 0x000000b6
[DEBUG] ROMSTG STCK 3. 0x3fffe800 0x00000088
[INFO ] Timestamp - finalize chips: 1281447080
[DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 4 / 77 ms
[INFO ] Timestamp - starting to load payload: 1287927356
[INFO ] CBFS: Found 'fallback/payload' @0x25340 size 0x10049 in mcache @0x3fffeb84
[DEBUG] Checking segment from ROM address 0xffc2556c
[DEBUG] Checking segment from ROM address 0xffc25588
[DEBUG] Loading segment from ROM address 0xffc2556c
[DEBUG] code (compression=1)
[DEBUG] New segment dstaddr 0x00100000 memsize 0x135a30 srcaddr 0xffc255a4 filesize 0x10011
[DEBUG] Loading Segment: addr: 0x00100000 memsz: 0x0000000000135a30 filesz: 0x0000000000010011
[DEBUG] using LZMA
[INFO ] Timestamp - starting LZMA decompress (ignore for x86): 1321754094
[INFO ] Timestamp - finished LZMA decompress (ignore for x86): 1342389486
[DEBUG] Clearing Segment: addr: 0x000000000011eb68 memsz: 0x0000000000116ec8
[DEBUG] Loading segment from ROM address 0xffc25588
[DEBUG] Entry Point 0x00100000
[DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 6 / 19 ms
[DEBUG] Jumping to boot code at 0x00100000(0x3fe94000)
[INFO ] Timestamp - selfboot jump: 1370405009
coreboot: 4.22-671-g416cc665929e
FILO version 0.6.0 (pmenzel@abreu) Sun Feb 4 13:23:12 UTC 2024
Press <Enter> for default boot, or <Esc> for boot prompt... timed out
boot: hda1:/vmlinuz initrd=hda1:/initrd.img root=/dev/sda1 ro quiet console=ttyS0,115200
ATA-0: [io ports 0x1f0-0x1f7,0x3f6]
* hda [ATA Disk]: QEMU HARDDISK
Found Linux version 5.6.0-1-686-pae (debian-kernel@lists.debian.org) #1 SMP Debian 5.6.7-1 (2020-04-29) relocatable bzImage.
Loading kernel... ok
Loading initrd... ok
Jumping to entry point...
[ 0.051519] kernel BUG at arch/x86/kernel/apic/apic.c:1629!
[ 0.052720] invalid opcode: 0000 [#1] SMP PTI
[ 0.053664] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.6.0-1-686-pae #1 Debian 5.6.7-1
[ 0.055428] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 4.22-671-g416cc665929e 02/02/2024
[ 0.057435] EIP: setup_local_APIC+0x478/0x4b0
[ 0.058334] Code: fe ff ff 85 d2 0f 8f bd 11 00 00 a1 e0 06 93 df ba 00 07 01 00 8b 48 08 b8 50 03 00 00 e8 20 92 6f 00 e9 db fe ff ff 8d 76 00 <0f> 0b 8d b6 00 00 00 00 0f 0b e9 4b fc ff ff e8 d4 4b 02 00 a1 e0
[ 0.061881] EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: ffffffff
[ 0.063022] ESI: dfaac8cd EDI: 00000000 EBP: df993f64 ESP: df993f14
[ 0.064306] DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068 EFLAGS: 00210246
[ 0.065936] CR0: 80050033 CR2: ff9ff000 CR3: 1fb48000 CR4: 000006b0
[ 0.066869] Call Trace:
[ 0.067243] ? vprintk_default+0x17/0x20
[ 0.067871] ? kvm_arch_para_features+0x43/0x80
[ 0.068468] apic_intr_mode_init+0xf4/0x10a
[ 0.069017] x86_late_time_init+0x1d/0x24
[ 0.069544] start_kernel+0x3f9/0x4ac
[ 0.070027] i386_start_kernel+0x48/0x4a
[ 0.070543] startup_32_smp+0x164/0x168
[ 0.071118] Modules linked in:
[ 0.071619] ---[ end trace 61fac992e46bca1b ]---
[ 0.072257] EIP: setup_local_APIC+0x478/0x4b0
[ 0.072850] Code: fe ff ff 85 d2 0f 8f bd 11 00 00 a1 e0 06 93 df ba 00 07 01 00 8b 48 08 b8 50 03 00 00 e8 20 92 6f 00 e9 db fe ff ff 8d 76 00 <0f> 0b 8d b6 00 00 00 00 0f 0b e9 4b fc ff ff e8 d4 4b 02 00 a1 e0
[ 0.075365] EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: ffffffff
[ 0.076426] ESI: dfaac8cd EDI: 00000000 EBP: df993f64 ESP: df993f14
[ 0.077327] DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068 EFLAGS: 00210246
[ 0.078485] CR0: 80050033 CR2: ff9ff000 CR3: 1fb48000 CR4: 000006b0
[ 0.079731] Kernel panic - not syncing: Attempted to kill the idle task!
[ 0.081327] ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ]---
</code></pre>
<a name="CONFIG_X2APIC_RUNTIMEy"></a>
<h3 ><code>CONFIG_X2APIC_RUNTIME=y</code><a href="#CONFIG_X2APIC_RUNTIMEy" class="wiki-anchor">¶</a></h3>
<pre><code>$ qemu-system-x86_64 -bios /dev/shm/coreboot/build/coreboot.rom -L /dev/shm -enable-kvm -smp cpus=2 -m 1G -hda /dev/shm/debian-32.img -serial stdio -net nic -net user,hostfwd=tcp::22222-:22
WARNING: Image format was not specified for '/dev/shm/debian-32.img' and probing guessed raw.
Automatically detecting the format is dangerous for raw images, write operations on block 0 will be restricted.
Specify the 'raw' format explicitly to remove the restrictions.
[NOTE ] coreboot-4.22-671-g416cc665929e Fri Feb 02 20:40:20 UTC 2024 x86_64 bootblock starting (log level: 7)...
[INFO ] Timestamp - end of bootblock: 16577474
[INFO ] Timestamp - start of romstage: 18671246
[INFO ] QEMU: firmware config interface detected
[INFO ] Firmware config version id: 3
[INFO ] QEMU: firmware config: Found 'etc/e820'
[DEBUG] CBMEM:
[DEBUG] IMD: root @ 0x3ffff000 254 entries.
[DEBUG] IMD: root @ 0x3fffec00 62 entries.
[DEBUG] FMAP: Found "FLASH" version 1.1 at 0x0.
[DEBUG] FMAP: base = 0xffc00000 size = 0x400000 #areas = 3
[DEBUG] FMAP: area COREBOOT found @ 200 (4193792 bytes)
[INFO ] CBFS: mcache @0x00014e00 built for 13 files, used 0x294 of 0x4000 bytes
[INFO ] CBFS: Found 'fallback/postcar' @0x1c280 size 0x91b0 in mcache @0x00014fe0
[DEBUG] Loading module at 0x3ffce000 with entry 0x3ffce042. filesize: 0x7d90 memsize: 0xe118
[DEBUG] Processing 636 relocs. Offset value of 0x3dfce000
[INFO ] Timestamp - end of romstage: 67022354
[DEBUG] BS: bootblock times (exec / console): total (unknown) / 21 ms
[NOTE ] coreboot-4.22-671-g416cc665929e Fri Feb 02 20:40:20 UTC 2024 x86_64 postcar starting (log level: 7)...
[INFO ] Timestamp - start of postcar: 90003960
[INFO ] Timestamp - end of postcar: 93116574
[INFO ] Timestamp - starting to load ramstage: 95752126
[DEBUG] FMAP: area COREBOOT found @ 200 (4193792 bytes)
[INFO ] CBFS: Found 'fallback/ramstage' @0xd040 size 0xf1b6 in mcache @0x3fffeaec
[INFO ] Timestamp - starting LZMA decompress (ignore for x86): 134002537
[INFO ] Timestamp - finished LZMA decompress (ignore for x86): 159465672
[DEBUG] Loading module at 0x3fe9c000 with entry 0x3fe9c000. filesize: 0x239e0 memsize: 0x130328
[DEBUG] Processing 3412 relocs. Offset value of 0x3be9c000
[INFO ] Timestamp - finished loading ramstage: 173672609
[DEBUG] BS: postcar times (exec / console): total (unknown) / 25 ms
[NOTE ] coreboot-4.22-671-g416cc665929e Fri Feb 02 20:40:20 UTC 2024 x86_64 ramstage starting (log level: 7)...
[INFO ] Timestamp - start of ramstage: 212046129
[INFO ] Timestamp - device enumeration: 215792182
[DEBUG] BS: BS_DEV_INIT_CHIPS run times (exec / console): 0 / 1 ms
[INFO ] Enumerating buses...
[DEBUG] Root Device scanning...
[DEBUG] CPU_CLUSTER: 0 enabled
[DEBUG] DOMAIN: 00000000 enabled
[DEBUG] DOMAIN: 00000000 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 00
[DEBUG] PCI: 00:00:00.0 [8086/1237] enabled
[DEBUG] PCI: 00:00:01.0 [8086/7000] enabled
[DEBUG] PCI: 00:00:01.1 [8086/7010] enabled
[DEBUG] PCI: 00:00:01.3 [8086/7113] enabled
[DEBUG] PCI: 00:00:02.0 [1234/1111] enabled
[DEBUG] PCI: 00:00:03.0 [8086/100e] enabled
[DEBUG] PCI: 00:00:01.0 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:01.0 finished in 0 msecs
[DEBUG] PCI: 00:00:01.3 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:01.3 finished in 0 msecs
[DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 14 msecs
[DEBUG] scan_bus: bus Root Device finished in 18 msecs
[INFO ] done
[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 1 / 21 ms
[INFO ] Timestamp - device configuration: 293163829
[DEBUG] found VGA at PCI: 00:00:02.0
[DEBUG] Setting up VGA for PCI: 00:00:02.0
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
[INFO ] Allocating resources...
[INFO ] Reading resources...
[INFO ] QEMU: firmware config interface detected
[INFO ] Firmware config version id: 3
[INFO ] QEMU: firmware config: Found 'etc/e820'
[DEBUG] QEMU: e820/res: 0xfeffc000 +0x00004000
[DEBUG] QEMU: e820/ram: 0x00000000 + 0x40000000
[DEBUG] QEMU: reserve ioports 0x0510-0x0511 [firmware-config]
[DEBUG] QEMU: reserve ioports 0x5658-0x5658 [vmware-port]
[DEBUG] QEMU: reserve ioports 0xae00-0xae0f [pci-hotplug]
[DEBUG] QEMU: reserve ioports 0xaf00-0xaf1f [cpu-hotplug]
[DEBUG] QEMU: reserve ioports 0xafe0-0xafe3 [piix4-gpe0]
[INFO ] Done reading resources.
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) ===
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) ===
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 0d base 00000510 limit 00000511 io (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 0e base 00005658 limit 00005658 io (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 0f base 0000ae00 limit 0000ae0f io (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 10 base 0000af00 limit 0000af1f io (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 11 base 0000afe0 limit 0000afe3 io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:01.0 01 base 00000000 limit 00000fff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:01.3 01 base 0000e400 limit 0000e43f io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:01.3 02 base 00000f00 limit 00000f0f io (fixed)
[INFO ] DOMAIN: 00000000: Resource ranges:
[INFO ] * Base: 1000, Size: 4658, Tag: 100
[INFO ] * Base: 5659, Size: 57a7, Tag: 100
[INFO ] * Base: ae10, Size: f0, Tag: 100
[INFO ] * Base: af20, Size: c0, Tag: 100
[INFO ] * Base: afe4, Size: 341c, Tag: 100
[INFO ] * Base: e440, Size: 1bc0, Tag: 100
[DEBUG] PCI: 00:00:03.0 14 * [0xffc0 - 0xffff] limit: ffff io
[DEBUG] PCI: 00:00:01.1 20 * [0xffb0 - 0xffbf] limit: ffbf io
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
[DEBUG] DOMAIN: 00000000 mem: base: 40000000 size: 0 align: 0 gran: 0 limit: fdffffff
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: ffffffffff
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 0a base feffc000 limit feffffff mem (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 0b base 00000000 limit 0009ffff mem (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 0c base 000c0000 limit 3fffffff mem (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 12 base 000a0000 limit 000bffff mem (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 13 base 000c0000 limit 000fffff mem (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 02 base fec00000 limit fecfffff mem (fixed)
[DEBUG] avoid_fixed_resources: DOMAIN: 00000000 03 base fee00000 limit fee0ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 00 base 00008000 limit 0000dfff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:01.0 02 base ff800000 limit ffffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:01.0 03 base fec00000 limit fec00fff mem (fixed)
[INFO ] DOMAIN: 00000000: Resource ranges:
[INFO ] * Base: 40000000, Size: be000000, Tag: 200
[INFO ] * Base: 100000000, Size: ff00000000, Tag: 200
[DEBUG] PCI: 00:00:02.0 10 * [0xfd000000 - 0xfdffffff] limit: fdffffff prefmem
[DEBUG] PCI: 00:00:03.0 30 * [0xfcfc0000 - 0xfcffffff] limit: fcffffff mem
[DEBUG] PCI: 00:00:03.0 10 * [0xfcfa0000 - 0xfcfbffff] limit: fcfbffff mem
[DEBUG] PCI: 00:00:02.0 30 * [0xfcf90000 - 0xfcf9ffff] limit: fcf9ffff mem
[DEBUG] PCI: 00:00:02.0 18 * [0xfcf8f000 - 0xfcf8ffff] limit: fcf8ffff mem
[DEBUG] DOMAIN: 00000000 mem: base: 40000000 size: 0 align: 0 gran: 0 limit: fdffffff done
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: ffffffffff done
[INFO ] === Resource allocator: DOMAIN: 00000000 - resource allocation complete ===
[DEBUG] PCI: 00:00:01.1 20 <- [0x000000000000ffb0 - 0x000000000000ffbf] size 0x00000010 gran 0x04 io
[DEBUG] PCI: 00:00:02.0 10 <- [0x00000000fd000000 - 0x00000000fdffffff] size 0x01000000 gran 0x18 prefmem
[DEBUG] PCI: 00:00:02.0 18 <- [0x00000000fcf8f000 - 0x00000000fcf8ffff] size 0x00001000 gran 0x0c mem
[DEBUG] PCI: 00:00:02.0 30 <- [0x00000000fcf90000 - 0x00000000fcf9ffff] size 0x00010000 gran 0x10 romem
[DEBUG] PCI: 00:00:03.0 10 <- [0x00000000fcfa0000 - 0x00000000fcfbffff] size 0x00020000 gran 0x11 mem
[DEBUG] PCI: 00:00:03.0 14 <- [0x000000000000ffc0 - 0x000000000000ffff] size 0x00000040 gran 0x06 io
[DEBUG] PCI: 00:00:03.0 30 <- [0x00000000fcfc0000 - 0x00000000fcffffff] size 0x00040000 gran 0x12 romem
[INFO ] Done setting resources.
[INFO ] Done allocating resources.
[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 6 / 125 ms
[INFO ] Timestamp - device enable: 679631328
[INFO ] Enabling resources...
[DEBUG] PCI: 00:00:00.0 cmd <- 00
[DEBUG] PCI: 00:00:01.0 cmd <- 00
[DEBUG] PCI: 00:00:01.1 cmd <- 01
[DEBUG] PCI: 00:00:01.3 cmd <- 00
[DEBUG] PCI: 00:00:02.0 cmd <- 03
[DEBUG] PCI: 00:00:03.0 cmd <- 03
[INFO ] done.
[DEBUG] BS: BS_DEV_ENABLE run times (exec / console): 5 / 8 ms
[DEBUG] BS: BS_DEV_INIT entry times (exec / console): 3 / 0 ms
[INFO ] Timestamp - device initialization: 735362458
[INFO ] Initializing devices...
[DEBUG] CPU_CLUSTER: 0 init
[INFO ] CPU: QEMU Virtual CPU version 2.5+.
[INFO ] LAPIC 0x0 switched to X2APIC mode.
[DEBUG] CPU: APIC: 00 enabled
[DEBUG] CPU: APIC: 01 enabled
[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x1b8 memsize: 0x1b8
[DEBUG] Processing 17 relocs. Offset value of 0x00030000
[DEBUG] Attempting to start 1 APs
[DEBUG] Waiting for 10ms after sending INIT.
[DEBUG] Waiting for SIPI to complete...
[INFO ] LAPIC 0x1 switched to X2APIC mode.
[DEBUG] done.
[INFO ] AP: slot 1 apic_id 1
[DEBUG] Waiting for SIPI to complete...
[DEBUG] done.
[INFO ] Initializing CPU #0
[DEBUG] CPU: vendor Intel device 60fb1
[DEBUG] CPU: family 0f, model 6b, stepping 01
[INFO ] CPU #0 initialized
[INFO ] Initializing CPU #1
[DEBUG] CPU: vendor Intel device 60fb1
[DEBUG] CPU: family 0f, model 6b, stepping 01
[INFO ] CPU #1 initialized
[INFO ] bsp_do_flight_plan done after 7 msecs.
[DEBUG] CPU_CLUSTER: 0 init finished in 30 msecs
[DEBUG] PCI: 00:00:00.0 init
[DEBUG] Assigning IRQ 10 to PCI: 00:00:01.3
[DEBUG] Assigning IRQ 11 to PCI: 00:00:03.0
[DEBUG] PCI: 00:00:00.0 init finished in 5 msecs
[DEBUG] PCI: 00:00:01.0 init
[DEBUG] RTC Init
[DEBUG] IOAPIC: Initializing IOAPIC at 0xfec00000
[DEBUG] IOAPIC: ID = 0x02
[DEBUG] IOAPIC: 24 interrupts
[DEBUG] IOAPIC: Clearing IOAPIC at 0xfec00000
[DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00
[DEBUG] PCI: 00:00:01.0 init finished in 5 msecs
[DEBUG] PCI: 00:00:01.1 init
[DEBUG] IDE: Primary interface: on
[DEBUG] IDE: Secondary interface: on
[DEBUG] IDE: Access to legacy IDE ports: off
[DEBUG] PCI: 00:00:01.1 init finished in 2 msecs
[DEBUG] PCI: 00:00:02.0 init
[DEBUG] PCI: 00:00:02.0 init finished in 35 msecs
[DEBUG] PCI: 00:00:03.0 init
[DEBUG] PCI: 00:00:03.0 init finished in 0 msecs
[INFO ] Devices initialized
[DEBUG] BS: BS_DEV_INIT run times (exec / console): 57 / 36 ms
[INFO ] Finalize devices...
[INFO ] Devices finalized
[INFO ] Timestamp - device setup done: 1012995431
[DEBUG] BS: BS_POST_DEVICE run times (exec / console): 0 / 3 ms
[INFO ] Timestamp - cbmem post: 1023365228
[DEBUG] BS: BS_OS_RESUME_CHECK run times (exec / console): 0 / 1 ms
[INFO ] Timestamp - write tables: 1050553506
[INFO ] Copying Interrupt Routing Table to 0x000f0000... done.
[INFO ] Copying Interrupt Routing Table to 0x3fe92000... done.
[DEBUG] PIRQ table: 128 bytes.
[INFO ] QEMU: firmware config: Found 'etc/table-loader'
[DEBUG] QEMU: found ACPI tables in fw_cfg.
[INFO ] QEMU: firmware config: Found 'etc/acpi/rsdp'
[DEBUG] QEMU: loading "etc/acpi/rsdp" to 0x3fe6e000 (len 20)
[INFO ] QEMU: firmware config: Found 'etc/acpi/tables'
[DEBUG] QEMU: loading "etc/acpi/tables" to 0x3fe6e040 (len 131072)
[DEBUG] QEMU: loaded ACPI tables from fw_cfg.
[DEBUG] Looking on 0x3fe6e000 for valid checksum
[DEBUG] Checksum 1 passed
[DEBUG] Checksum 2 passed all OK
[DEBUG] ACPI: added table 1/32, length now 44
[DEBUG] ACPI: added table 2/32, length now 52
[DEBUG] ACPI: added table 3/32, length now 60
[DEBUG] ACPI: added table 4/32, length now 68
[DEBUG] ACPI: * SSDT
[DEBUG] Found 2 CPU(s).
[DEBUG] ACPI: added table 5/32, length now 76
[DEBUG] ACPI tables: 131136 bytes.
[DEBUG] smbios_write_tables: 3fe66000
[DEBUG] SMBIOS firmware version is set to coreboot_version: '4.22-671-g416cc665929e'
[DEBUG] SMBIOS: Unknown CPU or CPU doesn't support Deterministic Cache CPUID leaf
[INFO ] DOMAIN: 00000000 (QEMU Northbridge i440fx)
[INFO ] QEMU: firmware config: Found 'etc/smbios/smbios-tables'
[DEBUG] QEMU: found smbios tables in fw_cfg (len 327).
[DEBUG] QEMU: coreboot type0 table found at 0x3fe66040.
[DEBUG] QEMU: loading smbios tables to 0x3fe66086
[DEBUG] SMBIOS tables: 461 bytes.
[DEBUG] Writing table forward entry at 0x00000500
[DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 8ff5
[DEBUG] Writing coreboot table at 0x3fe93000
[DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
[DEBUG] 1. 0000000000001000-0000000000007fff: RAM
[DEBUG] 2. 0000000000008000-000000000000dfff: RESERVED
[DEBUG] 3. 000000000000e000-000000000009ffff: RAM
[DEBUG] 4. 00000000000a0000-00000000000fffff: RESERVED
[DEBUG] 5. 0000000000100000-000000003fe65fff: RAM
[DEBUG] 6. 000000003fe66000-000000003fe9bfff: CONFIGURATION TABLES
[DEBUG] 7. 000000003fe9c000-000000003ffccfff: RAMSTAGE
[DEBUG] 8. 000000003ffcd000-000000003fffffff: CONFIGURATION TABLES
[DEBUG] 9. 00000000fec00000-00000000fec00fff: RESERVED
[DEBUG] 10. 00000000ff800000-00000000ffffffff: RESERVED
[DEBUG] FMAP: area COREBOOT found @ 200 (4193792 bytes)
[DEBUG] Wrote coreboot table at: 0x3fe93000, 0x310 bytes, checksum e5a4
[DEBUG] coreboot table: 808 bytes.
[DEBUG] IMD ROOT 0. 0x3ffff000 0x00001000
[DEBUG] IMD SMALL 1. 0x3fffe000 0x00001000
[DEBUG] CONSOLE 2. 0x3ffde000 0x00020000
[DEBUG] TIME STAMP 3. 0x3ffdd000 0x00000910
[DEBUG] AFTER CAR 4. 0x3ffcd000 0x00010000
[DEBUG] RAMSTAGE 5. 0x3fe9b000 0x00132000
[DEBUG] COREBOOT 6. 0x3fe93000 0x00008000
[DEBUG] IRQ TABLE 7. 0x3fe92000 0x00001000
[DEBUG] ACPI 8. 0x3fe6e000 0x00024000
[DEBUG] SMBIOS 9. 0x3fe66000 0x00008000
[DEBUG] IMD small region:
[DEBUG] IMD ROOT 0. 0x3fffec00 0x00000400
[DEBUG] RO MCACHE 1. 0x3fffe960 0x00000294
[DEBUG] FMAP 2. 0x3fffe8a0 0x000000b6
[DEBUG] ROMSTG STCK 3. 0x3fffe800 0x00000088
[INFO ] Timestamp - finalize chips: 1300590328
[DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 5 / 82 ms
[INFO ] Timestamp - starting to load payload: 1308405624
[INFO ] CBFS: Found 'fallback/payload' @0x25480 size 0x10049 in mcache @0x3fffeb84
[DEBUG] Checking segment from ROM address 0xffc256ac
[DEBUG] Checking segment from ROM address 0xffc256c8
[DEBUG] Loading segment from ROM address 0xffc256ac
[DEBUG] code (compression=1)
[DEBUG] New segment dstaddr 0x00100000 memsize 0x135a30 srcaddr 0xffc256e4 filesize 0x10011
[DEBUG] Loading Segment: addr: 0x00100000 memsz: 0x0000000000135a30 filesz: 0x0000000000010011
[DEBUG] using LZMA
[INFO ] Timestamp - starting LZMA decompress (ignore for x86): 1342618898
[INFO ] Timestamp - finished LZMA decompress (ignore for x86): 1362402424
[DEBUG] Clearing Segment: addr: 0x000000000011eb68 memsz: 0x0000000000116ec8
[DEBUG] Loading segment from ROM address 0xffc256c8
[DEBUG] Entry Point 0x00100000
[DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 6 / 17 ms
[DEBUG] Jumping to boot code at 0x00100000(0x3fe93000)
[INFO ] Timestamp - selfboot jump: 1382362947
coreboot: 4.22-671-g416cc665929e
FILO version 0.6.0 (pmenzel@abreu) Sun Feb 4 13:23:12 UTC 2024
Press <Enter> for default boot, or <Esc> for boot prompt... timed out
boot: hda1:/vmlinuz initrd=hda1:/initrd.img root=/dev/sda1 ro quiet console=ttyS0,115200
ATA-0: [io ports 0x1f0-0x1f7,0x3f6]
* hda [ATA Disk]: QEMU HARDDISK
Found Linux version 5.6.0-1-686-pae (debian-kernel@lists.debian.org) #1 SMP Debian 5.6.7-1 (2020-04-29) relocatable bzImage.
Loading kernel... ok
Loading initrd... ok
Jumping to entry point...
[ 0.051630] kernel BUG at arch/x86/kernel/apic/apic.c:1629!
[ 0.052637] invalid opcode: 0000 [#1] SMP PTI
[ 0.053267] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.6.0-1-686-pae #1 Debian 5.6.7-1
[ 0.054409] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 4.22-671-g416cc665929e 02/02/2024
[ 0.055811] EIP: setup_local_APIC+0x478/0x4b0
[ 0.056427] Code: fe ff ff 85 d2 0f 8f bd 11 00 00 a1 e0 06 93 c5 ba 00 07 01 00 8b 48 08 b8 50 03 00 00 e8 20 92 6f 00 e9 db fe ff ff 8d 76 00 <0f> 0b 8d b6 00 00 00 00 0f 0b e9 4b fc ff ff e8 d4 4b 02 00 a1 e0
[ 0.058843] EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: ffffffff
[ 0.059700] ESI: c5aac8cd EDI: 00000000 EBP: c5993f64 ESP: c5993f14
[ 0.060676] DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068 EFLAGS: 00210246
[ 0.061610] CR0: 80050033 CR2: ff9ff000 CR3: 05b48000 CR4: 000006b0
[ 0.062494] Call Trace:
[ 0.062876] ? vprintk_default+0x17/0x20
[ 0.063547] ? kvm_arch_para_features+0x43/0x80
[ 0.064399] apic_intr_mode_init+0xf4/0x10a
[ 0.065197] x86_late_time_init+0x1d/0x24
[ 0.066421] start_kernel+0x3f9/0x4ac
[ 0.066965] i386_start_kernel+0x48/0x4a
[ 0.067506] startup_32_smp+0x164/0x168
[ 0.068167] Modules linked in:
[ 0.068759] ---[ end trace 78220014fc8c5bde ]---
[ 0.069553] EIP: setup_local_APIC+0x478/0x4b0
[ 0.070297] Code: fe ff ff 85 d2 0f 8f bd 11 00 00 a1 e0 06 93 c5 ba 00 07 01 00 8b 48 08 b8 50 03 00 00 e8 20 92 6f 00 e9 db fe ff ff 8d 76 00 <0f> 0b 8d b6 00 00 00 00 0f 0b e9 4b fc ff ff e8 d4 4b 02 00 a1 e0
[ 0.073445] EAX: 00000000 EBX: 00000000 ECX: 00000000 EDX: ffffffff
[ 0.074518] ESI: c5aac8cd EDI: 00000000 EBP: c5993f64 ESP: c5993f14
[ 0.075590] DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068 EFLAGS: 00210246
[ 0.076777] CR0: 80050033 CR2: ff9ff000 CR3: 05b48000 CR4: 000006b0
[ 0.077875] Kernel panic - not syncing: Attempted to kill the idle task!
[ 0.079101] ---[ end Kernel panic - not syncing: Attempted to kill the idle task! ]---
</code></pre>
coreboot - Bug #522 (New): `region_overlap()` function might not work as expected due to an integ...
https://ticket.coreboot.org/issues/522
2023-12-27T17:29:28Z
Vadim Zaliva
lord@digamma.ai
<p><code>region_overlap()</code> function checks whether or not two memory regions overlap. Memory regions are represented as a region struct that contains the region's offset and size. This function then relies on <code>region_end()</code> function to compute the end of the region. <code>region_end()</code> function is susceptible to an integer overflow, which might result in the incorrect behaviour of <code>region_overlap()</code> function.</p>
<p>An example of inputs that lead to wrong behaviour:</p>
<pre><code>struct region r1 = {SIZE_MAX - 10, 20};
struct region r2 = {SIZE_MAX - 20, 15};
</code></pre>
<p>It returns 0, but since the regions actually overlap, it should return 1.</p>
<p><code>region_overlap()</code> function is used in <code>smm_region_overlaps_handler()</code> function, which is itself used in SMI handlers to validate address values that come from an untrusted environment. This is necessary to prevent security vulnerabilities such as described in <a href="https://www.c7zero.info/stuff/REConBrussels2017_BARing_the_system.pdf" class="external">BARing the System by Yuriy Bulygin, Oleksandr Bazhaniuk et al.</a></p>
<p>We do not have an example of an exploit based on this incorrect behaviour and are aware of the existence of one. However, theoretically, this could lead to security vulnerabilities.</p>
<p>This bug was found during an ongoing <a href="https://zaliva.org/UCSC-Twisted-Presentation-20231211.pdf" class="external">Coreboot Formal Verification Project</a>, which aims to prove some important security properties of the coreboot’s SMI handler for the Gemini Lake/Octopus platform using Coq proof assistant and Verified Software Toolchain framework.</p>
coreboot - Bug #521 (New): gizmosphere/gizmo2 development board VGA support not working
https://ticket.coreboot.org/issues/521
2023-12-24T18:50:04Z
8oDE 03
<p>I got a gizmo2 development board. the official hardware and software support stopped a long time ago and no BIOS source code was released.<br>
I tried to compile coreboot firmware to support some new features. The latest supported coreboot version is 4.18.<br>
I flashed and booted the gizmo2 development board, there is no video output during the coreboot startup phase, but it boots the OS normally and the OS has video output, I purchased a FT232H board for printing logs, and it seems like there are a lot of problems.</p>
<pre><code>FMAP REGION: COREBOOT
Name Offset Type Size Comp
cbfs_master_header 0x0 cbfs header 32 none
config 0x80 raw 562 none
revision 0x300 raw 720 none
build_info 0x600 raw 103 none
spd.bin 0x6c0 spd 128 none
fallback/dsdt.aml 0x780 raw 6172 none
cmos_layout.bin 0x2000 cmos_layout 616 none
fallback/postcar 0x22c0 stage 22312 none
payload_config 0x7a40 raw 1621 none
payload_revision 0x80c0 raw 237 none
(empty) 0x8200 null 31652 none
apu/amdfw 0xfdc0 raw 135168 none
fallback/romstage 0x30e00 stage 387544 none
fallback/ramstage 0x8f880 stage 136240 LZMA (311716 decompressed)
pci1002,9830.rom 0xb0d40 optionrom 59392 none
fallback/payload 0xbf580 simple elf 72695 none
(empty) 0xd11c0 null 3255268 none
bootblock 0x3ebdc0 bootblock 16384 none
</code></pre>
flashrom - Bug #520 (New): Factor out verification from erase path
https://ticket.coreboot.org/issues/520
2023-12-19T15:59:01Z
Vincent Fazio
<p>Currently, <code>flashrom_image_erase</code> differs from <code>flashrom_image_write</code> in how it performs its verification.</p>
<p>When writes are completed, verification occurs <u>afterwards</u> per the verify flags specified in the <code>flashctx</code> argument.</p>
<pre><code class="C syntaxhl" data-language="C"> <span class="cm">/* Verify only if we actually changed something. */</span>
<span class="k">if</span> <span class="p">(</span><span class="n">verify</span> <span class="o">&&</span> <span class="o">!</span><span class="n">all_skipped</span><span class="p">)</span> <span class="p">{</span>
<span class="n">msg_cinfo</span><span class="p">(</span><span class="s">"Verifying flash... "</span><span class="p">);</span>
<span class="cm">/* Work around chips which need some time to calm down. */</span>
<span class="n">programmer_delay</span><span class="p">(</span><span class="n">flashctx</span><span class="p">,</span> <span class="mi">1000</span><span class="o">*</span><span class="mi">1000</span><span class="p">);</span>
<span class="k">if</span> <span class="p">(</span><span class="n">verify_all</span><span class="p">)</span>
<span class="n">combine_image_by_layout</span><span class="p">(</span><span class="n">flashctx</span><span class="p">,</span> <span class="n">newcontents</span><span class="p">,</span> <span class="n">oldcontents</span><span class="p">);</span>
<span class="n">ret</span> <span class="o">=</span> <span class="n">verify_by_layout</span><span class="p">(</span><span class="n">flashctx</span><span class="p">,</span> <span class="n">verify_layout</span><span class="p">,</span> <span class="n">curcontents</span><span class="p">,</span> <span class="n">newcontents</span><span class="p">);</span>
</code></pre>
<p>For the erase path, there is no post-operation verification. Instead, <code>check_erased_range</code> is called regardless of verify flags, performing verification even if the user doesn't request it and imposing a performance penalty.</p>
coreboot - Bug #519 (New): make gconfig - could not find glade file
https://ticket.coreboot.org/issues/519
2023-12-07T16:41:59Z
James Feeney
james@nurealm.net
<p>$ git rev-parse HEAD<br>
62c25351c101a3d5c7104aa6fc34e71990478dde<br>
Arch Linux<br>
make 4.4.1-2</p>
<p>$ make gconfig<br>
...<br>
(gconf:825619): libglade-WARNING **: 09:26:11.670: could not find glade file '/sdb/coreboot.main/build/util/kconfig/gconf.glade'</p>
<p>** (gconf:825619): ERROR **: 09:26:11.673: GUI loading failed !</p>
<p>make: *** [build/util/kconfig/Makefile.real:47: gconfig] Trace/breakpoint trap (core dumped)</p>
<p>$ find -name gconf.glade<br>
./util/kconfig/gconf.glade</p>
<p>$ ll /sdb/coreboot.main/build/util/kconfig/gconf.glade<br>
/bin/ls: cannot access '/sdb/coreboot.main/build/util/kconfig/gconf.glade': No such file or directory</p>
coreboot - Bug #518 (New): make xconfig - g++: fatal error: no input files
https://ticket.coreboot.org/issues/518
2023-12-07T16:25:37Z
James Feeney
james@nurealm.net
<p>$ git rev-parse HEAD<br>
62c25351c101a3d5c7104aa6fc34e71990478dde<br>
Arch Linux<br>
make 4.4.1-2</p>
<p>$ make -d xconfig<br>
...<br>
Found '/sdb/coreboot.main/util/kconfig/qconf.cc'.<br>
...<br>
No implicit rule found for '/sdb/coreboot.main/util/kconfig/qconf.cc'.<br>
...<br>
Finished prerequisites of target file 'build/util/kconfig/qconf.o'.<br>
Must remake target 'build/util/kconfig/qconf.o'.<br>
/sdb/coreboot.main/util/kconfig/Makefile.inc:63: update target 'build/util/kconfig/qconf.o' due to: target does not exist<br>
...<br>
g++: fatal error: no input files<br>
compilation terminated.<br>
...</p>