CPU: ID 0x30678, Processor Type 0x0, Family 0x6, Model 0x37, Stepping 0x8
Northbridge: 8086:0f00 (Bay Trail)
Southbridge: 8086:0f1c (Bay Trail)
IGD: 8086:0f31 (unknown)

============= GPIOS =============

GPIOBASE = 0x0500 (IO)

gpiobase+0x0000: 0x00000001 (SC_USE_SEL_31_0_)
gpiobase+0x0004: 0x00000001 (SC_IO_SEL_31_0_)
gpiobase+0x0008: 0x00000000 (SC_GP_LVL_31_0_))
gpiobase+0x000c: 0x00000000 (SC_TPE_31_0_)
gpiobase+0x0010: 0x00000001 (SC_TNE_31_0_)
gpiobase+0x0014: 0x00000000 (SC_TS_31_0_)
gpiobase+0x0020: 0x00000000 (SC_USE_SEL_63_32_)
gpiobase+0x0024: 0x00000000 (SC_IO_SEL_63_32_)
gpiobase+0x0028: 0x00000000 (SC_GP_LVL_63_32_)
gpiobase+0x002c: 0x00000000 (SC_TPE_63_32_)
gpiobase+0x0030: 0x00000000 (SC_TNE_63_32_)
gpiobase+0x0034: 0x00000000 (SC_TS_63_32_)
gpiobase+0x0040: 0x00000000 (SC_USE_SEL_95_64_)
gpiobase+0x0044: 0x00000000 (SC_IO_SEL_95_64_)
gpiobase+0x0048: 0x00000000 (SC_GP_LVL_95_64_)
gpiobase+0x004c: 0x00000000 (SC_TPE_95_64_)
gpiobase+0x0050: 0x00000000 (SC_TNE_95_64_)
gpiobase+0x0054: 0x00000000 (SC_TS_95_64_)
gpiobase+0x0058: 0x00000000 (SC_USE_SEL_127_96_)
gpiobase+0x0064: 0x00000000 (SC_IO_SEL_127_96_)
gpiobase+0x0068: 0x00000000 (SC_GP_LVL_127_96_)
gpiobase+0x006c: 0x00000000 (SC_TPE_127_96_)
gpiobase+0x0070: 0x00000000 (SC_TNE_127_96_)
gpiobase+0x0074: 0x00000000 (SC_TS_127_96_)
gpiobase+0x0080: 0x00000001 (SUS_USE_SEL_31_0_)
gpiobase+0x0084: 0x00000001 (SUS_IO_SEL_31_0_)
gpiobase+0x0088: 0x00000000 (SUS_GP_LVL_31_0_)
gpiobase+0x008c: 0x00000000 (SUS_TPE_31_0_)
gpiobase+0x0090: 0x00000001 (SUS_TNE_31_0_)
gpiobase+0x0094: 0x00000000 (SUS_TS_31_0_)
gpiobase+0x0098: 0x00000081 (SUS_WAKE_EN_31_0_)
gpiobase+0x00a0: 0x00000000 (SUS_USE_SEL_43_32_)
gpiobase+0x00a4: 0x00000000 (SUS_IO_SEL_43_32_)
gpiobase+0x00a8: 0x00000000 (SUS_GP_LVL_43_32_)
gpiobase+0x00ac: 0x00000000 (SUS_TPE_43_32_)
gpiobase+0x00b0: 0x00000000 (SUS_TNE_43_32_)
gpiobase+0x00b4: 0x00000000 (SUS_TS_43_32_)
gpiobase+0x00b8: 0x00000000 (SUS_WAKE_EN_43_32_)

IOBASE: 0xfed0c000

========== Bay Trail NCORE GPIOs ===========

Address         | GPIO #   | reg value  | Pull Dir & Str | Func #: Func Name            | I/O            | Current Val
iobase + 0x1130 | GPIO   0 | 0x2003cc82 | Pull: Up   20k | Func 2: DDI0_HPD             |          Input | Low 
iobase + 0x1120 | GPIO   1 | 0x2083cd02 | Pull: Down 20k | Func 2: DDI0_DDCDATA         |          Input | Low 
iobase + 0x1110 | GPIO   2 | 0x2003cc82 | Pull: Up   20k | Func 2: DDI0_DDCCLK          |          Input | Low 
iobase + 0x1140 | GPIO   3 | 0x2003cd00 | Pull: Down 20k | Func 0: GPIO_S0_NC[03]       |          Input | Low 
iobase + 0x1150 | GPIO   4 | 0x2003cd00 | Pull: Down 20k | Func 0: GPIO_S0_NC[04]       |          Input | Low 
iobase + 0x1160 | GPIO   5 | 0x2003cd00 | Pull: Down 20k | Func 0: GPIO_S0_NC[05]       |          Input | Low 
iobase + 0x1180 | GPIO   6 | 0x2003cc02 | Pull: None     | Func 2: DDI1_HPD             |          Input | Low 
iobase + 0x1190 | GPIO   7 | 0x2083cc02 | Pull: None     | Func 2: DDI1_DDCDATA         |          Input | Low 
iobase + 0x1170 | GPIO   8 | 0x2003cc02 | Pull: None     | Func 2: DDI1_DDCCLK          |          Input | Low 
iobase + 0x1100 | GPIO   9 | 0x2003cc02 | Pull: None     | Func 2: DDI1_VDDEN           |          Input | Low 
iobase + 0x10e0 | GPIO  10 | 0x2003cc02 | Pull: None     | Func 2: DDI1_BKLTEN          |          Input | Low 
iobase + 0x10f0 | GPIO  11 | 0x2003cc02 | Pull: None     | Func 2: DDI1_BKLTCTL         |          Input | Low 
iobase + 0x10c0 | GPIO  12 | 0x2003cd00 | Pull: Down 20k | Func 0: GPIO_S0_NC[12]       |          Input | Low 
iobase + 0x11a0 | GPIO  13 | 0x2003cc01 | Pull: None     | Func 1: RESERVED             |          Input | Low 
iobase + 0x11b0 | GPIO  14 | 0x2003cc01 | Pull: None     | Func 1: RESERVED             |          Input | Low 
iobase + 0x1010 | GPIO  15 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_NC[15]       | Output / Input | Low 
iobase + 0x1040 | GPIO  16 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_NC[16]       | Output / Input | Low 
iobase + 0x1080 | GPIO  17 | 0x2003cd00 | Pull: Down 20k | Func 0: GPIO_S0_NC[17]       |          Input | Low 
iobase + 0x10b0 | GPIO  18 | 0x2003cd00 | Pull: Down 20k | Func 0: GPIO_S0_NC[18]       |          Input | Low 
iobase + 0x1000 | GPIO  19 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_NC[19]       | Output / Input | Low 
iobase + 0x1030 | GPIO  20 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_NC[20]       | Output / Input | Low 
iobase + 0x1060 | GPIO  21 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_NC[21]       | Output / Input | Low 
iobase + 0x10a0 | GPIO  22 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_NC[22]       | Output / Input | Low 
iobase + 0x10d0 | GPIO  23 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_NC[23]       | Output / Input | Low 
iobase + 0x1020 | GPIO  24 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_NC[24]       | Output / Input | Low 
iobase + 0x1050 | GPIO  25 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_NC[25]       | Output / Input | Low 
iobase + 0x1090 | GPIO  26 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_NC[26]       | Output / Input | Low 

========== Bay Trail SCORE GPIOs (GPIO_S0_SC_XX) ===========

Address         | GPIO #   | reg value  | Pull Dir & Str | Func #: Func Name            | I/O            | Current Val
iobase + 0x0550 | GPIO   0 | 0x2003cd00 | Pull: Down 20k | Func 0: GPIO_S0_SC[000]      |          Input | Low 
iobase + 0x0590 | GPIO   1 | 0x2003cd02 | Pull: Down 20k | Func 2: SATA_DEVSLP[0]       |          Input | Low 
iobase + 0x05d0 | GPIO   2 | 0x2003cc81 | Pull: Up   20k | Func 1: SATA_LED#            |          Input | Low 
iobase + 0x0600 | GPIO   3 | 0x2003cc81 | Pull: Up   20k | Func 1: PCIE_CLKREQ[0]#      |          Input | High
iobase + 0x0630 | GPIO   4 | 0x2003cc81 | Pull: Up   20k | Func 1: PCIE_CLKREQ[1]#      |          Input | High
iobase + 0x0660 | GPIO   5 | 0x2003cc81 | Pull: Up   20k | Func 1: PCIE_CLKREQ[2]#      |          Input | High
iobase + 0x0620 | GPIO   6 | 0x2003cc81 | Pull: Up   20k | Func 1: PCIE_CLKREQ[3]#      |          Input | High
iobase + 0x0650 | GPIO   7 | 0x2003cd02 | Pull: Down 20k | Func 2: SD3_WP               |          Input | High
iobase + 0x0220 | GPIO   8 | 0x2003ed02 | Pull: Down 20k | Func 2: HDA_RST#             |          Input | High
iobase + 0x0250 | GPIO   9 | 0x2003ed02 | Pull: Down 20k | Func 2: HDA_SYNC             |          Input | Low 
iobase + 0x0240 | GPIO  10 | 0x2003ed02 | Pull: Down 20k | Func 2: HDA_CLK              |          Input | Low 
iobase + 0x0260 | GPIO  11 | 0x2003ed02 | Pull: Down 20k | Func 2: HDA_SDO              |          Input | Low 
iobase + 0x0270 | GPIO  12 | 0x2003ed02 | Pull: Down 20k | Func 2: HDA_SDI[0]           |          Input | Low 
iobase + 0x0230 | GPIO  13 | 0x2003ed02 | Pull: Down 20k | Func 2: HDA_SDI[1]           |          Input | Low 
iobase + 0x0280 | GPIO  14 | 0x2003ed02 | Pull: Down 20k | Func 2: RESERVED             |          Input | High
iobase + 0x0540 | GPIO  15 | 0x2003cd02 | Pull: Down 20k | Func 2: RESERVED             |          Input | High
iobase + 0x03e0 | GPIO  16 | 0x2003ed03 | Pull: Down 20k | Func 3: MMC1_45_CLK          |          Input | Low 
iobase + 0x03d0 | GPIO  17 | 0x2003ec83 | Pull: Up   20k | Func 3: MMC1_45_D[0]         |          Input | Low 
iobase + 0x0400 | GPIO  18 | 0x2003ec83 | Pull: Up   20k | Func 3: MMC1_45_D[1]         |          Input | Low 
iobase + 0x03b0 | GPIO  19 | 0x2003ec83 | Pull: Up   20k | Func 3: MMC1_45_D[2]         |          Input | Low 
iobase + 0x0360 | GPIO  20 | 0x2003ec83 | Pull: Up   20k | Func 3: MMC1_45_D[3]         |          Input | High
iobase + 0x0380 | GPIO  21 | 0x2003ec83 | Pull: Up   20k | Func 3: MMC1_45_D[4]         |          Input | Low 
iobase + 0x03c0 | GPIO  22 | 0x2003ec83 | Pull: Up   20k | Func 3: MMC1_45_D[5]         |          Input | Low 
iobase + 0x0370 | GPIO  23 | 0x2003ec83 | Pull: Up   20k | Func 3: MMC1_45_D[6]         |          Input | Low 
iobase + 0x03f0 | GPIO  24 | 0x2003ec83 | Pull: Up   20k | Func 3: MMC1_45_D[7]         |          Input | Low 
iobase + 0x0390 | GPIO  25 | 0x2003ec83 | Pull: Up   20k | Func 3: MMC1_45_CMD          |          Input | Low 
iobase + 0x0330 | GPIO  26 | 0x2003ed03 | Pull: Down 20k | Func 3: MMC1_45_RST#         |          Input | High
iobase + 0x0320 | GPIO  27 | 0x2003ed01 | Pull: Down 20k | Func 1: SD2_CLK              |          Input | Low 
iobase + 0x0350 | GPIO  28 | 0x2003ec81 | Pull: Up   20k | Func 1: SD2_D[0]             |          Input | Low 
iobase + 0x02f0 | GPIO  29 | 0x2003ec81 | Pull: Up   20k | Func 1: SD2_D[1]             |          Input | Low 
iobase + 0x0340 | GPIO  30 | 0x2003ec81 | Pull: Up   20k | Func 1: SD2_D[2]             |          Input | Low 
iobase + 0x0310 | GPIO  31 | 0x2003ec81 | Pull: Up   20k | Func 1: SD2_D[3]_CD#         |          Input | High
iobase + 0x0300 | GPIO  32 | 0x2003ec81 | Pull: Up   20k | Func 1: SD2_CMD              |          Input | Low 
iobase + 0x02b0 | GPIO  33 | 0x20038d01 | Pull: Down 20k | Func 1: SD3_CLK              |          Input | Low 
iobase + 0x02e0 | GPIO  34 | 0x20038c81 | Pull: Up   20k | Func 1: SD3_D[0]             |          Input | Low 
iobase + 0x0290 | GPIO  35 | 0x20038c81 | Pull: Up   20k | Func 1: SD3_D[1]             |          Input | Low 
iobase + 0x02d0 | GPIO  36 | 0x20038c81 | Pull: Up   20k | Func 1: SD3_D[2]             |          Input | Low 
iobase + 0x02a0 | GPIO  37 | 0x20038c81 | Pull: Up   20k | Func 1: SD3_D[3]             |          Input | Low 
iobase + 0x03a0 | GPIO  38 | 0x06008880 | Pull: Up    2k | Func 0: GPIO_S0_SC[038]      |          Input | Low 
iobase + 0x02c0 | GPIO  39 | 0x20038c81 | Pull: Up   20k | Func 1: SD3_CMD              |          Input | Low 
iobase + 0x05f0 | GPIO  40 | 0x2003cd01 | Pull: Down 20k | Func 1: SD3_1P8EN            |          Input | Low 
iobase + 0x0690 | GPIO  41 | 0x2003cc81 | Pull: Up   20k | Func 1: SD3_PWREN#           |          Input | High
iobase + 0x0460 | GPIO  42 | 0x20038c81 | Pull: Up   20k | Func 1: ILB_LPC_AD[0]        |          Input | Low 
iobase + 0x0440 | GPIO  43 | 0x20038c81 | Pull: Up   20k | Func 1: ILB_LPC_AD[1]        |          Input | Low 
iobase + 0x0430 | GPIO  44 | 0x20038c81 | Pull: Up   20k | Func 1: ILB_LPC_AD[2]        |          Input | Low 
iobase + 0x0420 | GPIO  45 | 0x20038c81 | Pull: Up   20k | Func 1: ILB_LPC_AD[3]        |          Input | Low 
iobase + 0x0450 | GPIO  46 | 0x20038c81 | Pull: Up   20k | Func 1: ILB_LPC_FRAME#       |          Input | High
iobase + 0x0470 | GPIO  47 | 0x20038d01 | Pull: Down 20k | Func 1: ILB_LPC_CLK[0]       |          Input | Low 
iobase + 0x0410 | GPIO  48 | 0x20038d01 | Pull: Down 20k | Func 1: ILB_LPC_CLK[1]       |          Input | Low 
iobase + 0x0480 | GPIO  49 | 0x20038c81 | Pull: Up   20k | Func 1: ILB_LPC_CLKRUN#      |          Input | High
iobase + 0x0560 | GPIO  50 | 0x2003cc81 | Pull: Up   20k | Func 1: ILB_LPC_SERIRQ       |          Input | Low 
iobase + 0x05a0 | GPIO  51 | 0x2003cc81 | Pull: Up   20k | Func 1: PCU_SMB_DATA         |          Input | Low 
iobase + 0x0580 | GPIO  52 | 0x2003cc81 | Pull: Up   20k | Func 1: PCU_SMB_CLK          |          Input | Low 
iobase + 0x05c0 | GPIO  53 | 0x2003cc81 | Pull: Up   20k | Func 1: PCU_SMB_ALERT#       |          Input | High
iobase + 0x0670 | GPIO  54 | 0x2003cd01 | Pull: Down 20k | Func 1: ILB_8254_SPKR        |          Input | Low 
iobase + 0x04d0 | GPIO  55 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[055]      | Output / Input | Low 
iobase + 0x04f0 | GPIO  56 | 0x2083cc00 | Pull: None     | Func 0: GPIO_S0_SC[056]      | Output / Input | High
iobase + 0x0530 | GPIO  57 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[057]      | Output / Input | Low 
iobase + 0x04e0 | GPIO  58 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[058]      | Output / Input | Low 
iobase + 0x0510 | GPIO  59 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[059]      | Output / Input | Low 
iobase + 0x0500 | GPIO  60 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[060]      | Output / Input | Low 
iobase + 0x0520 | GPIO  61 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[061]      | Output / Input | High
iobase + 0x00d0 | GPIO  62 | 0x2003cd01 | Pull: Down 20k | Func 1: LPE_I2S2_CLK         |          Input | Low 
iobase + 0x00c0 | GPIO  63 | 0x2083cd01 | Pull: Down 20k | Func 1: LPE_I2S2_FRM         |          Input | Low 
iobase + 0x00f0 | GPIO  64 | 0x2003cd01 | Pull: Down 20k | Func 1: LPE_I2S2_DATAIN      |          Input | Low 
iobase + 0x00e0 | GPIO  65 | 0x2083cd01 | Pull: Down 20k | Func 1: LPE_I2S2_DATAOUT     |          Input | Low 
iobase + 0x0110 | GPIO  66 | 0x2003cc81 | Pull: Up   20k | Func 1: SIO_SPI_CS#          |          Input | High
iobase + 0x0120 | GPIO  67 | 0x2003cc81 | Pull: Up   20k | Func 1: SIO_SPI_MISO         |          Input | Low 
iobase + 0x0130 | GPIO  68 | 0x2003cc81 | Pull: Up   20k | Func 1: SIO_SPI_MOSI         |          Input | Low 
iobase + 0x0100 | GPIO  69 | 0x2003cd01 | Pull: Down 20k | Func 1: SIO_SPI_CLK          |          Input | Low 
iobase + 0x0020 | GPIO  70 | 0x2003cc81 | Pull: Up   20k | Func 1: SIO_UART1_RXD        |          Input | Low 
iobase + 0x0010 | GPIO  71 | 0x2003cc81 | Pull: Up   20k | Func 1: SIO_UART1_TXD        |          Input | Low 
iobase + 0x0000 | GPIO  72 | 0x2003cc81 | Pull: Up   20k | Func 1: SIO_UART1_RTS#       |          Input | High
iobase + 0x0040 | GPIO  73 | 0x2003cc81 | Pull: Up   20k | Func 1: SIO_UART1_CTS#       |          Input | High
iobase + 0x0060 | GPIO  74 | 0x2003cc81 | Pull: Up   20k | Func 1: SIO_UART2_RXD        |          Input | Low 
iobase + 0x0070 | GPIO  75 | 0x2003cc81 | Pull: Up   20k | Func 1: SIO_UART2_TXD        |          Input | Low 
iobase + 0x0090 | GPIO  76 | 0x2003cc81 | Pull: Up   20k | Func 1: SIO_UART2_RTS#       |          Input | High
iobase + 0x0080 | GPIO  77 | 0x2003cc81 | Pull: Up   20k | Func 1: SIO_UART2_CTS#       |          Input | High
iobase + 0x0210 | GPIO  78 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[078]      | Output / Input | Low 
iobase + 0x0200 | GPIO  79 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[079]      | Output / Input | Low 
iobase + 0x01f0 | GPIO  80 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[080]      | Output / Input | Low 
iobase + 0x01e0 | GPIO  81 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[081]      | Output / Input | Low 
iobase + 0x01d0 | GPIO  82 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[082]      | Output / Input | Low 
iobase + 0x01b0 | GPIO  83 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[083]      | Output / Input | Low 
iobase + 0x0190 | GPIO  84 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[084]      | Output / Input | Low 
iobase + 0x01c0 | GPIO  85 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[085]      | Output / Input | Low 
iobase + 0x01a0 | GPIO  86 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[086]      | Output / Input | Low 
iobase + 0x0170 | GPIO  87 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[087]      | Output / Input | Low 
iobase + 0x0150 | GPIO  88 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[088]      | Output / Input | Low 
iobase + 0x0140 | GPIO  89 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[089]      | Output / Input | Low 
iobase + 0x0180 | GPIO  90 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[090]      | Output / Input | Low 
iobase + 0x0160 | GPIO  91 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[091]      | Output / Input | Low 
iobase + 0x0050 | GPIO  92 | 0x2003cc00 | Pull: None     | Func 0: RESERVED             | Output / Input | Low 
iobase + 0x0030 | GPIO  93 | 0x2003cc00 | Pull: None     | Func 0: RESERVED             | Output / Input | Low 
iobase + 0x00a0 | GPIO  94 | 0x2b03cc00 | Pull: None     | Func 0: GPIO_S0_SC[094]      |          Input | Low 
iobase + 0x00b0 | GPIO  95 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S0_SC[095]      | Output / Input | Low 
iobase + 0x06a0 | GPIO  96 | 0x2003cd01 | Pull: Down 20k | Func 1: PMC_PLT_CLK[0]       |          Input | High
iobase + 0x0570 | GPIO  97 | 0x2003cc81 | Pull: Up   20k | Func 1: PMC_PLT_CLK[1]       |          Input | Low 
iobase + 0x05b0 | GPIO  98 | 0x2003cc81 | Pull: Up   20k | Func 1: PMC_PLT_CLK[2]       |          Input | Low 
iobase + 0x0680 | GPIO  99 | 0x2003cc81 | Pull: Up   20k | Func 1: PMC_PLT_CLK[3]       |          Input | Low 
iobase + 0x0610 | GPIO 100 | 0x2003cc81 | Pull: Up   20k | Func 1: PMC_PLT_CLK[4]       |          Input | Low 
iobase + 0x0640 | GPIO 101 | 0x2003cd01 | Pull: Down 20k | Func 1: PMC_PLT_CLK[5]       |          Input | Low 

========== Bay Trail SSUS GPIOs (GPIO_S5) ===========

Address         | GPIO #   | reg value  | Pull Dir & Str | Func #: Func Name            | I/O            | Current Val
iobase + 0x21d0 | GPIO   0 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[00]          |          Input | Low 
iobase + 0x2210 | GPIO   1 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[01]          | Output / Input | High
iobase + 0x21e0 | GPIO   2 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[02]          | Output / Input | High
iobase + 0x21f0 | GPIO   3 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[03]          | Output / Input | High
iobase + 0x2200 | GPIO   4 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[04]          | Output / Input | Low 
iobase + 0x2220 | GPIO   5 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[05]          | Output / Input | Low 
iobase + 0x2240 | GPIO   6 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[06]          | Output / Input | Low 
iobase + 0x2230 | GPIO   7 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[07]          | Output / Input | Low 
iobase + 0x2260 | GPIO   8 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[08]          | Output / Input | Low 
iobase + 0x2250 | GPIO   9 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[09]          | Output / Input | Low 
iobase + 0x2120 | GPIO  10 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[10]          | Output / Input | High
iobase + 0x2070 | GPIO  11 | 0x2003cd00 | Pull: Down 20k | Func 0: PMC_SUSPWRDNACK      |          Input | Low 
iobase + 0x20b0 | GPIO  12 | 0x2003cd00 | Pull: Down 20k | Func 0: PMC_SUSCLK[0]        |          Input | Low 
iobase + 0x2140 | GPIO  13 | 0x2003cd00 | Pull: Down 20k | Func 0: RESERVED             |          Input | High
iobase + 0x2110 | GPIO  14 | 0x2003cc01 | Pull: None     | Func 1: GPIO_S5[14]          | Output / Input | High
iobase + 0x2010 | GPIO  15 | 0x2003cc80 | Pull: Up   20k | Func 0: PMC_WAKE_PCIE[0]#    |          Input | High
iobase + 0x2080 | GPIO  16 | 0x2003cc80 | Pull: Up   20k | Func 0: PMC_PWRBTN#          |          Input | High
iobase + 0x20a0 | GPIO  17 | 0x2b03cc01 | Pull: None     | Func 1: GPIO_S5[17]          |          Input | Low 
iobase + 0x2130 | GPIO  18 | 0x2003cd00 | Pull: Down 20k | Func 0: PMC_SUS_STAT#        |          Input | High
iobase + 0x20c0 | GPIO  19 | 0x2003cc80 | Pull: Up   20k | Func 0: USB_OC[0]#           |          Input | High
iobase + 0x2000 | GPIO  20 | 0x2003cc80 | Pull: Up   20k | Func 0: USB_OC[1]#           |          Input | High
iobase + 0x2020 | GPIO  21 | 0x2003ec01 | Pull: None     | Func 1: GPIO_S5[21]          | Output / Input | Low 
iobase + 0x2170 | GPIO  22 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[22]          | Output / Input | Low 
iobase + 0x2270 | GPIO  23 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[23]          | Output / Input | Low 
iobase + 0x21c0 | GPIO  24 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[24]          | Output / Input | Low 
iobase + 0x21b0 | GPIO  25 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[25]          | Output / Input | Low 
iobase + 0x2160 | GPIO  26 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[26]          | Output / Input | Low 
iobase + 0x2150 | GPIO  27 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[27]          | Output / Input | High
iobase + 0x2180 | GPIO  28 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[28]          | Output / Input | High
iobase + 0x2190 | GPIO  29 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[29]          | Output / Input | High
iobase + 0x21a0 | GPIO  30 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[30]          | Output / Input | High
iobase + 0x2330 | GPIO  31 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[31]          | Output / Input | Low 
iobase + 0x2380 | GPIO  32 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[32]          | Output / Input | Low 
iobase + 0x2360 | GPIO  33 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[33]          | Output / Input | Low 
iobase + 0x2310 | GPIO  34 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[34]          | Output / Input | Low 
iobase + 0x2370 | GPIO  35 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[35]          | Output / Input | Low 
iobase + 0x2300 | GPIO  36 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[36]          | Output / Input | Low 
iobase + 0x2390 | GPIO  37 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[37]          | Output / Input | Low 
iobase + 0x2320 | GPIO  38 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[38]          | Output / Input | Low 
iobase + 0x23a0 | GPIO  39 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[39]          | Output / Input | Low 
iobase + 0x2340 | GPIO  40 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[40]          | Output / Input | High
iobase + 0x2350 | GPIO  41 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[41]          | Output / Input | Low 
iobase + 0x23b0 | GPIO  42 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[42]          | Output / Input | High
iobase + 0x2280 | GPIO  43 | 0x2003cc00 | Pull: None     | Func 0: GPIO_S5[43]          | Output / Input | Low 



============= RCBA ==============

Error: Dumping RCBA on this southbridge is not (yet) supported.



========== ACPI/PMC =========


========== ABASE/PMBASE =========

PMBASE = 0x0400 (IO)

pmbase+0x0000: 0x6001     (PM1_STS)
pmbase+0x0002: 0x0120     (PM1_EN)
pmbase+0x0004: 0x00000001 (PM1_CNT)
pmbase+0x0008: 0x0085bfc3 (PM1_TMR)
pmbase+0x000c: 0x00000000 (RESERVED)
pmbase+0x0010: 0x00000000 (RESERVED)
pmbase+0x0014: 0x00000000 (RESERVED)
pmbase+0x0018: 0x00000000 (RESERVED)
pmbase+0x001c: 0x00000000 (RESERVED)
pmbase+0x0020: 0x00000000 (GPE0_STS)
               0x00000000
pmbase+0x0028: 0x00810006 (GPE0_EN)
               0x00000000
pmbase+0x0030: 0x00000033 (SMI_EN)
pmbase+0x0034: 0x00004100 (SMI_STS)
pmbase+0x0038: 0x0000     (ALT_GP_SMI_EN)
pmbase+0x003a: 0x0000     (ALT_GP_SMI_STS)
pmbase+0x003c: 0x00       (UPRWC)
pmbase+0x003d: 0x01       (RESERVED)
pmbase+0x003e: 0x0000     (RESERVED)
pmbase+0x0040: 0x0000     (RESERVED)
pmbase+0x0042: 0x00       (GPE_CNTL)
pmbase+0x0043: 0x00       (RESERVED)
pmbase+0x0044: 0x0000     (DEVACT_STS)
pmbase+0x0046: 0x0000     (RESERVED)
pmbase+0x0048: 0x00000000 (RESERVED)
pmbase+0x004c: 0x00000000 (RESERVED)
pmbase+0x0050: 0x00       (PM2_CNT)
pmbase+0x0051: 0x00       (RESERVED)
pmbase+0x0052: 0x0000     (RESERVED)
pmbase+0x0054: 0x00000000 (RESERVED)
pmbase+0x0058: 0x00000000 (RESERVED)
pmbase+0x005c: 0x00000000 (RESERVED)
pmbase+0x0060: 0x0003     (TCO_RLD)
pmbase+0x0062: 0x00       (TCO_DAT_IN)
pmbase+0x0063: 0x00       (TCO_DAT_OUT)
pmbase+0x0064: 0x0000     (TCO1_STS)
pmbase+0x0066: 0x0000     (TCO2_STS)
pmbase+0x0068: 0x1800     (TCO1_CNT)
pmbase+0x006a: 0x0000     (TCO2_CNT)
pmbase+0x006c: 0x0000     (TCO_MESSAGE)
pmbase+0x006e: 0x00       (TCO_WDCNT)
pmbase+0x006f: 0x00       (RESERVED)
pmbase+0x0070: 0x00       (SW_IRQ_GEN)
pmbase+0x0071: 0x00       (RESERVED)
pmbase+0x0072: 0x0004     (TCO_TMR)
pmbase+0x0074: 0x00000000 (RESERVED)
pmbase+0x0078: 0x00000000 (RESERVED)
pmbase+0x007c: 0x00000000 (RESERVED)



========== LPC/eSPI =========

Error: Dumping LPC/eSPI on this southbridge is not (yet) supported.



============= MCHBAR ============

Error: Dumping MCHBAR on this northbridge is not (yet) supported.



============= EPBAR =============

Error: Dumping EPBAR on this northbridge is not (yet) supported.



============= DMIBAR ============

Error: Dumping DMIBAR on this northbridge is not (yet) supported.


========= PCIEXBAR ========

Error: Dumping PCIEXBAR on this northbridge is not (yet) supported.



===================== SHARED MSRs (All Cores) =====================
 MSR 0x00000000 = 0x00000000:0x00000000 (IA32_P5_MC_ADDR)
 MSR 0x00000001 = 0x00000000:0x00000000 (IA32_P5_MC_TYPE)
 MSR 0x00000017 = 0x000C0000:0x90341A45 (IA32_PLATFORM_ID)
 MSR 0x0000002A = 0x00000000:0x40080000 (MSR_EBC_HARD_POWERON)
 MSR 0x000000CD = 0x00000000:0x00000000 (MSR_FSB_FREQ)
 MSR 0x000000E2 = 0x00000000:0x0016000F (MSR_PKG_CST_CONFIG_CONTROL)
 MSR 0x000000E4 = 0x00000000:0x00020000 (MSR_PMG_IO_CAPTURE_BASE)
 MSR 0x0000011E = 0x00000000:0x7E2801FF (BBL_CR_CTL3)
 MSR 0x00000198 = 0x00007A00:0x00001A45 (IA32_PERF_STATUS)
 MSR 0x000001A2 = 0x00000000:0x00690000 (MSR_TEMPERATURE_TARGET)
 MSR 0x000001A6 = 0x00000000:0x00000000 (MSR_OFFCORE_RSP_0)
 MSR 0x000001A7 = 0x00000000:0x00000000 (MSR_OFFCORE_RSP_1)
 MSR 0x000001AD = 0x00000000:0x00000000 (MSR_TURBO_RATIO_LIMIT)
 MSR 0x000003FA = 0x00000000:0x167FCB08 (MSR_PKG_C6_RESIDENCY)
 MSR 0x00000400 = 0x00000000:0x0000003F (IA32_MC0_CTL)
 MSR 0x00000401 = 0x00000000:0x00000000 (IA32_MC0_STATUS)
 MSR 0x00000402 = 0x00000000:0x00000000 (IA32_MC0_ADDR)
 MSR 0x00000404 = 0x00000000:0x00000001 (IA32_MC1_CTL)
 MSR 0x00000405 = 0x00000000:0x00000000 (IA32_MC1_STATUS)
 MSR 0x00000408 = 0x00000000:0x00000003 (IA32_MC2_CTL)
 MSR 0x00000409 = 0x00000000:0x00000000 (IA32_MC2_STATUS)
 MSR 0x0000040A = 0x00000000:0x00000000 (IA32_MC2_ADDR)
 MSR 0x00000414 = 0x00000000:0x00000007 (MSR_MC5_CTL)
 MSR 0x00000415 = 0x00000000:0x00000000 (MSR_MC5_STATUS)
 MSR 0x00000416 = 0x00000000:0x00000000 (MSR_MC5_ADDR)

====================== UNIQUE MSRs  (core 0) ======================
 MSR 0x00000006 = 0x00000000:0x00000040 (IA32_MONITOR_FILTER_LINE_SIZE)
 MSR 0x00000010 = 0x0000003F:0x10E26504 (IA32_TIME_STAMP_COUNTER)
 MSR 0x0000001B = 0x00000000:0xFEE00900 (IA32_APIC_BASE)
 MSR 0x00000034 = 0x00000000:0x00000007 (MSR_SMI_COUNT)
 MSR 0x0000003A = 0x00000000:0x00000005 (IA32_FEATURE_CONTROL)
 MSR 0x00000040 = 0x00000000:0x00000000 (MSR_LASTBRANCH_0_FROM_IP)
 MSR 0x00000041 = 0x00000000:0x00000000 (MSR_LASTBRANCH_1_FROM_IP)
 MSR 0x00000042 = 0x00000000:0x00000000 (MSR_LASTBRANCH_2_FROM_IP)
 MSR 0x00000043 = 0x00000000:0x00000000 (MSR_LASTBRANCH_3_FROM_IP)
 MSR 0x00000044 = 0x00000000:0x00000000 (MSR_LASTBRANCH_4_FROM_IP)
 MSR 0x00000045 = 0x00000000:0x00000000 (MSR_LASTBRANCH_5_FROM_IP)
 MSR 0x00000046 = 0x00000000:0x00000000 (MSR_LASTBRANCH_6_FROM_IP)
 MSR 0x00000047 = 0x00000000:0x00000000 (MSR_LASTBRANCH_7_FROM_IP)
 MSR 0x00000060 = 0x00000000:0x00000000 (MSR_LASTBRANCH_0_TO_IP)
 MSR 0x00000061 = 0x00000000:0x00000000 (MSR_LASTBRANCH_1_TO_IP)
 MSR 0x00000062 = 0x00000000:0x00000000 (MSR_LASTBRANCH_2_TO_IP)
 MSR 0x00000063 = 0x00000000:0x00000000 (MSR_LASTBRANCH_3_TO_IP)
 MSR 0x00000064 = 0x00000000:0x00000000 (MSR_LASTBRANCH_4_TO_IP)
 MSR 0x00000065 = 0x00000000:0x00000000 (MSR_LASTBRANCH_5_TO_IP)
 MSR 0x00000066 = 0x00000000:0x00000000 (MSR_LASTBRANCH_6_TO_IP)
 MSR 0x00000067 = 0x00000000:0x00000000 (MSR_LASTBRANCH_7_TO_IP)
 MSR 0x0000008B = 0x00000838:0x00000000 (IA32_BIOS_SIGN_ID)
 MSR 0x000000C1 = 0x00000000:0x00000000 (IA32_PMC0)
 MSR 0x000000C2 = 0x00000000:0x00000000 (IA32_PMC1)
 MSR 0x000000E7 = 0x0000000D:0x200E1498 (IA32_MPERF)
 MSR 0x000000E8 = 0x0000000D:0xFAC28DB4 (IA32_APERF)
 MSR 0x000000FE = 0x00000000:0x00000D08 (IA32_MTRRCAP)
 MSR 0x00000174 = 0x00000000:0x00000010 (IA32_SYSENTER_CS)
 MSR 0x00000175 = 0xFFFFFE0A:0xF232C000 (IA32_SYSENTER_ESP)
 MSR 0x00000176 = 0xFFFFFFFF:0xB7201930 (IA32_SYSENTER_EIP)
 MSR 0x00000179 = 0x00000000:0x00000806 (IA32_MCG_CAP)
 MSR 0x0000017A = 0x00000000:0x00000000 (IA32_MCG_STATUS)
 MSR 0x00000186 = 0x00000000:0x00000000 (IA32_PERF_EVNTSEL0)
 MSR 0x00000187 = 0x00000000:0x00000000 (IA32_PERF_EVNTSEL1)
 MSR 0x00000199 = 0x00000000:0x00000A28 (IA32_PERF_CONTROL)
 MSR 0x0000019A = 0x00000000:0x00000000 (IA32_CLOCK_MODULATION)
 MSR 0x0000019B = 0x00000000:0x00000000 (IA32_THERM_INTERRUPT)
 MSR 0x0000019C = 0x00000000:0x88320000 (IA32_THERM_STATUS)
 MSR 0x000001A0 = 0x00000000:0x00850089 (IA32_MISC_ENABLES)
 MSR 0x000001B0 = 0x00000000:0x00000006 (IA32_ENERGY_PERF_BIAS)
 MSR 0x000001C9 = 0x00000000:0x00000000 (MSR_LASTBRANCH_TOS)
 MSR 0x000001D9 = 0x00000000:0x00000000 (IA32_DEBUGCTL)
 MSR 0x000001DD = 0x00000000:0x00000000 (MSR_LER_FROM_LIP)
 MSR 0x000001DE = 0x00000000:0x00000000 (MSR_LER_TO_LIP)
 MSR 0x000001F2 = 0x00000000:0x7A000006 (IA32_SMRR_PHYSBASE)
 MSR 0x000001F3 = 0x00000000:0xFF800800 (IA32_SMRR_PHYSMASK)
 MSR 0x00000200 = 0x00000000:0x00000006 (IA32_MTRR_PHYSBASE0)
 MSR 0x00000201 = 0x0000000F:0x80000800 (IA32_MTRR_PHYSMASK0)
 MSR 0x00000202 = 0x00000000:0x7A800000 (IA32_MTRR_PHYSBASE1)
 MSR 0x00000203 = 0x0000000F:0xFF800800 (IA32_MTRR_PHYSMASK1)
 MSR 0x00000204 = 0x00000000:0x7B000000 (IA32_MTRR_PHYSBASE2)
 MSR 0x00000205 = 0x0000000F:0xFF000800 (IA32_MTRR_PHYSMASK2)
 MSR 0x00000206 = 0x00000000:0x7C000000 (IA32_MTRR_PHYSBASE3)
 MSR 0x00000207 = 0x0000000F:0xFC000800 (IA32_MTRR_PHYSMASK3)
 MSR 0x00000208 = 0x00000000:0x00000000 (IA32_MTRR_PHYSBASE4)
 MSR 0x00000209 = 0x00000000:0x00000000 (IA32_MTRR_PHYSMASK4)
 MSR 0x0000020A = 0x00000000:0x00000000 (IA32_MTRR_PHYSBASE5)
 MSR 0x0000020B = 0x00000000:0x00000000 (IA32_MTRR_PHYSMASK5)
 MSR 0x0000020C = 0x00000000:0x00000000 (IA32_MTRR_PHYSBASE6)
 MSR 0x0000020D = 0x00000000:0x00000000 (IA32_MTRR_PHYSMASK6)
 MSR 0x0000020E = 0x00000000:0x00000000 (IA32_MTRR_PHYSBASE7)
 MSR 0x0000020F = 0x00000000:0x00000000 (IA32_MTRR_PHYSMASK7)
 MSR 0x00000250 = 0x06060606:0x06060606 (IA32_MTRR_FIX64K_00000)
 MSR 0x00000258 = 0x06060606:0x06060606 (IA32_MTRR_FIX16K_80000)
 MSR 0x00000259 = 0x00000000:0x00000000 (IA32_MTRR_FIX16K_A0000)
 MSR 0x00000268 = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_C0000)
 MSR 0x00000269 = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_C8000)
 MSR 0x0000026A = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_D0000)
 MSR 0x0000026B = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_D8000)
 MSR 0x0000026C = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_E0000)
 MSR 0x0000026D = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_E8000)
 MSR 0x0000026E = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_F0000)
 MSR 0x0000026F = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_F8000)
 MSR 0x00000277 = 0x04070506:0x00070106 (IA32_PAT)
 MSR 0x000002FF = 0x00000000:0x00000C00 (IA32_MTRR_DEF_TYPE)
 MSR 0x00000309 = 0x00000000:0x00000000 (IA32_FIXED_CTR0)
 MSR 0x0000030A = 0x00000000:0x00000000 (IA32_FIXED_CTR1)
 MSR 0x0000030B = 0x00000000:0x00000000 (IA32_FIXED_CTR2)
 MSR 0x00000345 = 0x00000000:0x000032C1 (IA32_PERF_CAPABILITIES)
 MSR 0x0000038D = 0x00000000:0x00000000 (IA32_FIXED_CTR_CTRL)
 MSR 0x0000038E = 0x00000000:0x00000000 (IA32_PERF_GLOBAL_STATUS)
 MSR 0x0000038F = 0x00000000:0x00000003 (IA32_PERF_GLOBAL_CTRL)
 MSR 0x00000390 = 0x00000000:0x00000000 (IA32_PERF_GLOBAL_OVF_CTRL)
 MSR 0x000003F1 = 0x00000000:0x00000000 (MSR_PEBS_ENABLE)
 MSR 0x000003FD = 0x00000026:0x8C939420 (MSR_CORE_C6_RESIDENCY)
 MSR 0x0000040C = 0x00000000:0x00000003 (IA32_MC3_CTL)
 MSR 0x0000040D = 0x00000000:0x00000000 (IA32_MC3_STATUS)
 MSR 0x0000040E = 0x00000000:0x00000000 (IA32_MC3_ADDR)
 MSR 0x00000410 = 0x00000000:0x00000001 (IA32_MC4_CTL)
 MSR 0x00000411 = 0x00000000:0x00000000 (IA32_MC4_STATUS)
 MSR 0x00000412 = 0x00000000:0x00000000 (IA32_MC4_ADDR)
 MSR 0x00000480 = 0x00DA0400:0x00000002 (IA32_VMX_BASIC)
 MSR 0x00000481 = 0x0000007F:0x00000016 (IA32_VMX_PINBASED_CTLS)
 MSR 0x00000482 = 0xFFF9FFFE:0x0401E172 (IA32_VMX_PROCBASED_CTLS)
 MSR 0x00000483 = 0x007FFFFF:0x00036DFF (IA32_VMX_EXIT_CTLS)
 MSR 0x00000484 = 0x0000FFFF:0x000011FF (IA32_VMX_ENTRY_CTLS)
 MSR 0x00000485 = 0x00000000:0x000481E6 (IA32_VMX_MISC)
 MSR 0x00000486 = 0x00000000:0x80000021 (IA32_VMX_CR0_FIXED0)
 MSR 0x00000487 = 0x00000000:0xFFFFFFFF (IA32_VMX_CR0_FIXED1)
 MSR 0x00000488 = 0x00000000:0x00002000 (IA32_VMX_CR4_FIXED0)
 MSR 0x00000489 = 0x00000000:0x001027FF (IA32_VMX_CR4_FIXED1)
 MSR 0x0000048A = 0x00000000:0x0000002E (IA32_VMX_VMCS_ENUM)
 MSR 0x0000048B = 0x000028EF:0x00000000 (IA32_VMX_PROCBASED_CTLS2)
 MSR 0x0000048C = 0x00000F01:0x06114141 (IA32_VMX_EPT_VPID_ENUM)
 MSR 0x0000048D = 0x0000007F:0x00000016 (IA32_VMX_TRUE_PINBASED_CTLS)
 MSR 0x0000048E = 0xFFF9FFFE:0x04006172 (IA32_VMX_TRUE_PROCBASED_CTLS)
 MSR 0x0000048F = 0x007FFFFF:0x00036DFB (IA32_VMX_TRUE_EXIT_CTLS)
 MSR 0x00000490 = 0x0000FFFF:0x000011FB (IA32_VMX_TRUE_ENTRY_CTLS)
 MSR 0x00000491 = 0x00000000:0x00000001 (IA32_VMX_FMFUNC)
 MSR 0x000004C1 = 0x00000000:0x00000000 (IA32_A_PMC0)
 MSR 0x000004C2 = 0x00000000:0x00000000 (IA32_A_PMC1)
 MSR 0x00000600 = 0xFFFFFE0A:0xF2344000 (IA32_DS_AREA)
 MSR 0x00000660 = 0x0000000B:0x1790D790 (MSR_CORE_C1_RESIDENCY)
 MSR 0x000006E0 = 0x0000003F:0x110CFB8A (IA32_TSC_DEADLINE)

====================== UNIQUE MSRs  (core 1) ======================
 MSR 0x00000006 = 0x00000000:0x00000040 (IA32_MONITOR_FILTER_LINE_SIZE)
 MSR 0x00000010 = 0x0000003F:0x10FAD97A (IA32_TIME_STAMP_COUNTER)
 MSR 0x0000001B = 0x00000000:0xFEE00800 (IA32_APIC_BASE)
 MSR 0x00000034 = 0x00000000:0x00000007 (MSR_SMI_COUNT)
 MSR 0x0000003A = 0x00000000:0x00000005 (IA32_FEATURE_CONTROL)
 MSR 0x00000040 = 0x00000000:0x00000000 (MSR_LASTBRANCH_0_FROM_IP)
 MSR 0x00000041 = 0x00000000:0x00000000 (MSR_LASTBRANCH_1_FROM_IP)
 MSR 0x00000042 = 0x00000000:0x00000000 (MSR_LASTBRANCH_2_FROM_IP)
 MSR 0x00000043 = 0x00000000:0x00000000 (MSR_LASTBRANCH_3_FROM_IP)
 MSR 0x00000044 = 0x00000000:0x00000000 (MSR_LASTBRANCH_4_FROM_IP)
 MSR 0x00000045 = 0x00000000:0x00000000 (MSR_LASTBRANCH_5_FROM_IP)
 MSR 0x00000046 = 0x00000000:0x00000000 (MSR_LASTBRANCH_6_FROM_IP)
 MSR 0x00000047 = 0x00000000:0x00000000 (MSR_LASTBRANCH_7_FROM_IP)
 MSR 0x00000060 = 0x00000000:0x00000000 (MSR_LASTBRANCH_0_TO_IP)
 MSR 0x00000061 = 0x00000000:0x00000000 (MSR_LASTBRANCH_1_TO_IP)
 MSR 0x00000062 = 0x00000000:0x00000000 (MSR_LASTBRANCH_2_TO_IP)
 MSR 0x00000063 = 0x00000000:0x00000000 (MSR_LASTBRANCH_3_TO_IP)
 MSR 0x00000064 = 0x00000000:0x00000000 (MSR_LASTBRANCH_4_TO_IP)
 MSR 0x00000065 = 0x00000000:0x00000000 (MSR_LASTBRANCH_5_TO_IP)
 MSR 0x00000066 = 0x00000000:0x00000000 (MSR_LASTBRANCH_6_TO_IP)
 MSR 0x00000067 = 0x00000000:0x00000000 (MSR_LASTBRANCH_7_TO_IP)
 MSR 0x0000008B = 0x00000838:0x00000000 (IA32_BIOS_SIGN_ID)
 MSR 0x000000C1 = 0x00000000:0x00000000 (IA32_PMC0)
 MSR 0x000000C2 = 0x00000000:0x00000000 (IA32_PMC1)
 MSR 0x000000E7 = 0x00000008:0x9D872284 (IA32_MPERF)
 MSR 0x000000E8 = 0x00000008:0xF1225E0B (IA32_APERF)
 MSR 0x000000FE = 0x00000000:0x00000D08 (IA32_MTRRCAP)
 MSR 0x00000174 = 0x00000000:0x00000010 (IA32_SYSENTER_CS)
 MSR 0x00000175 = 0xFFFFFE79:0xBD233000 (IA32_SYSENTER_ESP)
 MSR 0x00000176 = 0xFFFFFFFF:0xB7201930 (IA32_SYSENTER_EIP)
 MSR 0x00000179 = 0x00000000:0x00000806 (IA32_MCG_CAP)
 MSR 0x0000017A = 0x00000000:0x00000000 (IA32_MCG_STATUS)
 MSR 0x00000186 = 0x00000000:0x00000000 (IA32_PERF_EVNTSEL0)
 MSR 0x00000187 = 0x00000000:0x00000000 (IA32_PERF_EVNTSEL1)
 MSR 0x00000199 = 0x00000000:0x00001A45 (IA32_PERF_CONTROL)
 MSR 0x0000019A = 0x00000000:0x00000000 (IA32_CLOCK_MODULATION)
 MSR 0x0000019B = 0x00000000:0x00000003 (IA32_THERM_INTERRUPT)
 MSR 0x0000019C = 0x00000000:0x88310000 (IA32_THERM_STATUS)
 MSR 0x000001A0 = 0x00000000:0x00850089 (IA32_MISC_ENABLES)
 MSR 0x000001B0 = 0x00000000:0x00000006 (IA32_ENERGY_PERF_BIAS)
 MSR 0x000001C9 = 0x00000000:0x00000000 (MSR_LASTBRANCH_TOS)
 MSR 0x000001D9 = 0x00000000:0x00004000 (IA32_DEBUGCTL)
 MSR 0x000001DD = 0x00000000:0x00000000 (MSR_LER_FROM_LIP)
 MSR 0x000001DE = 0x00000000:0x00000000 (MSR_LER_TO_LIP)
 MSR 0x000001F2 = 0x00000000:0x7A000006 (IA32_SMRR_PHYSBASE)
 MSR 0x000001F3 = 0x00000000:0xFF800800 (IA32_SMRR_PHYSMASK)
 MSR 0x00000200 = 0x00000000:0x00000006 (IA32_MTRR_PHYSBASE0)
 MSR 0x00000201 = 0x0000000F:0x80000800 (IA32_MTRR_PHYSMASK0)
 MSR 0x00000202 = 0x00000000:0x7A800000 (IA32_MTRR_PHYSBASE1)
 MSR 0x00000203 = 0x0000000F:0xFF800800 (IA32_MTRR_PHYSMASK1)
 MSR 0x00000204 = 0x00000000:0x7B000000 (IA32_MTRR_PHYSBASE2)
 MSR 0x00000205 = 0x0000000F:0xFF000800 (IA32_MTRR_PHYSMASK2)
 MSR 0x00000206 = 0x00000000:0x7C000000 (IA32_MTRR_PHYSBASE3)
 MSR 0x00000207 = 0x0000000F:0xFC000800 (IA32_MTRR_PHYSMASK3)
 MSR 0x00000208 = 0x00000000:0x00000000 (IA32_MTRR_PHYSBASE4)
 MSR 0x00000209 = 0x00000000:0x00000000 (IA32_MTRR_PHYSMASK4)
 MSR 0x0000020A = 0x00000000:0x00000000 (IA32_MTRR_PHYSBASE5)
 MSR 0x0000020B = 0x00000000:0x00000000 (IA32_MTRR_PHYSMASK5)
 MSR 0x0000020C = 0x00000000:0x00000000 (IA32_MTRR_PHYSBASE6)
 MSR 0x0000020D = 0x00000000:0x00000000 (IA32_MTRR_PHYSMASK6)
 MSR 0x0000020E = 0x00000000:0x00000000 (IA32_MTRR_PHYSBASE7)
 MSR 0x0000020F = 0x00000000:0x00000000 (IA32_MTRR_PHYSMASK7)
 MSR 0x00000250 = 0x06060606:0x06060606 (IA32_MTRR_FIX64K_00000)
 MSR 0x00000258 = 0x06060606:0x06060606 (IA32_MTRR_FIX16K_80000)
 MSR 0x00000259 = 0x00000000:0x00000000 (IA32_MTRR_FIX16K_A0000)
 MSR 0x00000268 = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_C0000)
 MSR 0x00000269 = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_C8000)
 MSR 0x0000026A = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_D0000)
 MSR 0x0000026B = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_D8000)
 MSR 0x0000026C = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_E0000)
 MSR 0x0000026D = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_E8000)
 MSR 0x0000026E = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_F0000)
 MSR 0x0000026F = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_F8000)
 MSR 0x00000277 = 0x04070506:0x00070106 (IA32_PAT)
 MSR 0x000002FF = 0x00000000:0x00000C00 (IA32_MTRR_DEF_TYPE)
 MSR 0x00000309 = 0x00000000:0x00000000 (IA32_FIXED_CTR0)
 MSR 0x0000030A = 0x000000FC:0x385A15F6 (IA32_FIXED_CTR1)
 MSR 0x0000030B = 0x00000000:0x00000000 (IA32_FIXED_CTR2)
 MSR 0x00000345 = 0x00000000:0x000032C1 (IA32_PERF_CAPABILITIES)
 MSR 0x0000038D = 0x00000000:0x000000B0 (IA32_FIXED_CTR_CTRL)
 MSR 0x0000038E = 0x00000000:0x00000000 (IA32_PERF_GLOBAL_STATUS)
 MSR 0x0000038F = 0x00000007:0x00000003 (IA32_PERF_GLOBAL_CTRL)
 MSR 0x00000390 = 0x00000000:0x00000000 (IA32_PERF_GLOBAL_OVF_CTRL)
 MSR 0x000003F1 = 0x00000000:0x00000000 (MSR_PEBS_ENABLE)
 MSR 0x000003FD = 0x0000002C:0x05DC3E40 (MSR_CORE_C6_RESIDENCY)
 MSR 0x0000040C = 0x00000000:0x00000003 (IA32_MC3_CTL)
 MSR 0x0000040D = 0x00000000:0x00000000 (IA32_MC3_STATUS)
 MSR 0x0000040E = 0x00000000:0x00000000 (IA32_MC3_ADDR)
 MSR 0x00000410 = 0x00000000:0x00000001 (IA32_MC4_CTL)
 MSR 0x00000411 = 0x00000000:0x00000000 (IA32_MC4_STATUS)
 MSR 0x00000412 = 0x00000000:0x00000000 (IA32_MC4_ADDR)
 MSR 0x00000480 = 0x00DA0400:0x00000002 (IA32_VMX_BASIC)
 MSR 0x00000481 = 0x0000007F:0x00000016 (IA32_VMX_PINBASED_CTLS)
 MSR 0x00000482 = 0xFFF9FFFE:0x0401E172 (IA32_VMX_PROCBASED_CTLS)
 MSR 0x00000483 = 0x007FFFFF:0x00036DFF (IA32_VMX_EXIT_CTLS)
 MSR 0x00000484 = 0x0000FFFF:0x000011FF (IA32_VMX_ENTRY_CTLS)
 MSR 0x00000485 = 0x00000000:0x000481E6 (IA32_VMX_MISC)
 MSR 0x00000486 = 0x00000000:0x80000021 (IA32_VMX_CR0_FIXED0)
 MSR 0x00000487 = 0x00000000:0xFFFFFFFF (IA32_VMX_CR0_FIXED1)
 MSR 0x00000488 = 0x00000000:0x00002000 (IA32_VMX_CR4_FIXED0)
 MSR 0x00000489 = 0x00000000:0x001027FF (IA32_VMX_CR4_FIXED1)
 MSR 0x0000048A = 0x00000000:0x0000002E (IA32_VMX_VMCS_ENUM)
 MSR 0x0000048B = 0x000028EF:0x00000000 (IA32_VMX_PROCBASED_CTLS2)
 MSR 0x0000048C = 0x00000F01:0x06114141 (IA32_VMX_EPT_VPID_ENUM)
 MSR 0x0000048D = 0x0000007F:0x00000016 (IA32_VMX_TRUE_PINBASED_CTLS)
 MSR 0x0000048E = 0xFFF9FFFE:0x04006172 (IA32_VMX_TRUE_PROCBASED_CTLS)
 MSR 0x0000048F = 0x007FFFFF:0x00036DFB (IA32_VMX_TRUE_EXIT_CTLS)
 MSR 0x00000490 = 0x0000FFFF:0x000011FB (IA32_VMX_TRUE_ENTRY_CTLS)
 MSR 0x00000491 = 0x00000000:0x00000001 (IA32_VMX_FMFUNC)
 MSR 0x000004C1 = 0x00000000:0x00000000 (IA32_A_PMC0)
 MSR 0x000004C2 = 0x00000000:0x00000000 (IA32_A_PMC1)
 MSR 0x00000600 = 0xFFFFFE79:0xBD24B000 (IA32_DS_AREA)
 MSR 0x00000660 = 0x0000000A:0x1405D0C0 (MSR_CORE_C1_RESIDENCY)
 MSR 0x000006E0 = 0x0000003F:0x1160E8C4 (IA32_TSC_DEADLINE)

====================== UNIQUE MSRs  (core 2) ======================
 MSR 0x00000006 = 0x00000000:0x00000040 (IA32_MONITOR_FILTER_LINE_SIZE)
 MSR 0x00000010 = 0x0000003F:0x115EB102 (IA32_TIME_STAMP_COUNTER)
 MSR 0x0000001B = 0x00000000:0xFEE00800 (IA32_APIC_BASE)
 MSR 0x00000034 = 0x00000000:0x00000007 (MSR_SMI_COUNT)
 MSR 0x0000003A = 0x00000000:0x00000005 (IA32_FEATURE_CONTROL)
 MSR 0x00000040 = 0x00000000:0x00000000 (MSR_LASTBRANCH_0_FROM_IP)
 MSR 0x00000041 = 0x00000000:0x00000000 (MSR_LASTBRANCH_1_FROM_IP)
 MSR 0x00000042 = 0x00000000:0x00000000 (MSR_LASTBRANCH_2_FROM_IP)
 MSR 0x00000043 = 0x00000000:0x00000000 (MSR_LASTBRANCH_3_FROM_IP)
 MSR 0x00000044 = 0x00000000:0x00000000 (MSR_LASTBRANCH_4_FROM_IP)
 MSR 0x00000045 = 0x00000000:0x00000000 (MSR_LASTBRANCH_5_FROM_IP)
 MSR 0x00000046 = 0x00000000:0x00000000 (MSR_LASTBRANCH_6_FROM_IP)
 MSR 0x00000047 = 0x00000000:0x00000000 (MSR_LASTBRANCH_7_FROM_IP)
 MSR 0x00000060 = 0x00000000:0x00000000 (MSR_LASTBRANCH_0_TO_IP)
 MSR 0x00000061 = 0x00000000:0x00000000 (MSR_LASTBRANCH_1_TO_IP)
 MSR 0x00000062 = 0x00000000:0x00000000 (MSR_LASTBRANCH_2_TO_IP)
 MSR 0x00000063 = 0x00000000:0x00000000 (MSR_LASTBRANCH_3_TO_IP)
 MSR 0x00000064 = 0x00000000:0x00000000 (MSR_LASTBRANCH_4_TO_IP)
 MSR 0x00000065 = 0x00000000:0x00000000 (MSR_LASTBRANCH_5_TO_IP)
 MSR 0x00000066 = 0x00000000:0x00000000 (MSR_LASTBRANCH_6_TO_IP)
 MSR 0x00000067 = 0x00000000:0x00000000 (MSR_LASTBRANCH_7_TO_IP)
 MSR 0x0000008B = 0x00000838:0x00000000 (IA32_BIOS_SIGN_ID)
 MSR 0x000000C1 = 0x00000000:0x00000000 (IA32_PMC0)
 MSR 0x000000C2 = 0x00000000:0x00000000 (IA32_PMC1)
 MSR 0x000000E7 = 0x0000000C:0xE85FF8F0 (IA32_MPERF)
 MSR 0x000000E8 = 0x0000000C:0xE7291B07 (IA32_APERF)
 MSR 0x000000FE = 0x00000000:0x00000D08 (IA32_MTRRCAP)
 MSR 0x00000174 = 0x00000000:0x00000010 (IA32_SYSENTER_CS)
 MSR 0x00000175 = 0xFFFFFE49:0x0D283000 (IA32_SYSENTER_ESP)
 MSR 0x00000176 = 0xFFFFFFFF:0xB7201930 (IA32_SYSENTER_EIP)
 MSR 0x00000179 = 0x00000000:0x00000806 (IA32_MCG_CAP)
 MSR 0x0000017A = 0x00000000:0x00000000 (IA32_MCG_STATUS)
 MSR 0x00000186 = 0x00000000:0x00000000 (IA32_PERF_EVNTSEL0)
 MSR 0x00000187 = 0x00000000:0x00000000 (IA32_PERF_EVNTSEL1)
 MSR 0x00000199 = 0x00000000:0x00000825 (IA32_PERF_CONTROL)
 MSR 0x0000019A = 0x00000000:0x00000000 (IA32_CLOCK_MODULATION)
 MSR 0x0000019B = 0x00000000:0x00000003 (IA32_THERM_INTERRUPT)
 MSR 0x0000019C = 0x00000000:0x882F0000 (IA32_THERM_STATUS)
 MSR 0x000001A0 = 0x00000000:0x00850089 (IA32_MISC_ENABLES)
 MSR 0x000001B0 = 0x00000000:0x00000006 (IA32_ENERGY_PERF_BIAS)
 MSR 0x000001C9 = 0x00000000:0x00000000 (MSR_LASTBRANCH_TOS)
 MSR 0x000001D9 = 0x00000000:0x00004000 (IA32_DEBUGCTL)
 MSR 0x000001DD = 0x00000000:0x00000000 (MSR_LER_FROM_LIP)
 MSR 0x000001DE = 0x00000000:0x00000000 (MSR_LER_TO_LIP)
 MSR 0x000001F2 = 0x00000000:0x7A000006 (IA32_SMRR_PHYSBASE)
 MSR 0x000001F3 = 0x00000000:0xFF800800 (IA32_SMRR_PHYSMASK)
 MSR 0x00000200 = 0x00000000:0x00000006 (IA32_MTRR_PHYSBASE0)
 MSR 0x00000201 = 0x0000000F:0x80000800 (IA32_MTRR_PHYSMASK0)
 MSR 0x00000202 = 0x00000000:0x7A800000 (IA32_MTRR_PHYSBASE1)
 MSR 0x00000203 = 0x0000000F:0xFF800800 (IA32_MTRR_PHYSMASK1)
 MSR 0x00000204 = 0x00000000:0x7B000000 (IA32_MTRR_PHYSBASE2)
 MSR 0x00000205 = 0x0000000F:0xFF000800 (IA32_MTRR_PHYSMASK2)
 MSR 0x00000206 = 0x00000000:0x7C000000 (IA32_MTRR_PHYSBASE3)
 MSR 0x00000207 = 0x0000000F:0xFC000800 (IA32_MTRR_PHYSMASK3)
 MSR 0x00000208 = 0x00000000:0x00000000 (IA32_MTRR_PHYSBASE4)
 MSR 0x00000209 = 0x00000000:0x00000000 (IA32_MTRR_PHYSMASK4)
 MSR 0x0000020A = 0x00000000:0x00000000 (IA32_MTRR_PHYSBASE5)
 MSR 0x0000020B = 0x00000000:0x00000000 (IA32_MTRR_PHYSMASK5)
 MSR 0x0000020C = 0x00000000:0x00000000 (IA32_MTRR_PHYSBASE6)
 MSR 0x0000020D = 0x00000000:0x00000000 (IA32_MTRR_PHYSMASK6)
 MSR 0x0000020E = 0x00000000:0x00000000 (IA32_MTRR_PHYSBASE7)
 MSR 0x0000020F = 0x00000000:0x00000000 (IA32_MTRR_PHYSMASK7)
 MSR 0x00000250 = 0x06060606:0x06060606 (IA32_MTRR_FIX64K_00000)
 MSR 0x00000258 = 0x06060606:0x06060606 (IA32_MTRR_FIX16K_80000)
 MSR 0x00000259 = 0x00000000:0x00000000 (IA32_MTRR_FIX16K_A0000)
 MSR 0x00000268 = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_C0000)
 MSR 0x00000269 = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_C8000)
 MSR 0x0000026A = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_D0000)
 MSR 0x0000026B = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_D8000)
 MSR 0x0000026C = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_E0000)
 MSR 0x0000026D = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_E8000)
 MSR 0x0000026E = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_F0000)
 MSR 0x0000026F = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_F8000)
 MSR 0x00000277 = 0x04070506:0x00070106 (IA32_PAT)
 MSR 0x000002FF = 0x00000000:0x00000C00 (IA32_MTRR_DEF_TYPE)
 MSR 0x00000309 = 0x00000000:0x00000000 (IA32_FIXED_CTR0)
 MSR 0x0000030A = 0x000000FB:0xE014CE64 (IA32_FIXED_CTR1)
 MSR 0x0000030B = 0x00000000:0x00000000 (IA32_FIXED_CTR2)
 MSR 0x00000345 = 0x00000000:0x000032C1 (IA32_PERF_CAPABILITIES)
 MSR 0x0000038D = 0x00000000:0x000000B0 (IA32_FIXED_CTR_CTRL)
 MSR 0x0000038E = 0x00000000:0x00000000 (IA32_PERF_GLOBAL_STATUS)
 MSR 0x0000038F = 0x00000007:0x00000003 (IA32_PERF_GLOBAL_CTRL)
 MSR 0x00000390 = 0x00000000:0x00000000 (IA32_PERF_GLOBAL_OVF_CTRL)
 MSR 0x000003F1 = 0x00000000:0x00000000 (MSR_PEBS_ENABLE)
 MSR 0x000003FD = 0x00000029:0x19B2B064 (MSR_CORE_C6_RESIDENCY)
 MSR 0x0000040C = 0x00000000:0x00000003 (IA32_MC3_CTL)
 MSR 0x0000040D = 0x00000000:0x00000000 (IA32_MC3_STATUS)
 MSR 0x0000040E = 0x00000000:0x00000000 (IA32_MC3_ADDR)
 MSR 0x00000410 = 0x00000000:0x00000001 (IA32_MC4_CTL)
 MSR 0x00000411 = 0x00000000:0x00000000 (IA32_MC4_STATUS)
 MSR 0x00000412 = 0x00000000:0x00000000 (IA32_MC4_ADDR)
 MSR 0x00000480 = 0x00DA0400:0x00000002 (IA32_VMX_BASIC)
 MSR 0x00000481 = 0x0000007F:0x00000016 (IA32_VMX_PINBASED_CTLS)
 MSR 0x00000482 = 0xFFF9FFFE:0x0401E172 (IA32_VMX_PROCBASED_CTLS)
 MSR 0x00000483 = 0x007FFFFF:0x00036DFF (IA32_VMX_EXIT_CTLS)
 MSR 0x00000484 = 0x0000FFFF:0x000011FF (IA32_VMX_ENTRY_CTLS)
 MSR 0x00000485 = 0x00000000:0x000481E6 (IA32_VMX_MISC)
 MSR 0x00000486 = 0x00000000:0x80000021 (IA32_VMX_CR0_FIXED0)
 MSR 0x00000487 = 0x00000000:0xFFFFFFFF (IA32_VMX_CR0_FIXED1)
 MSR 0x00000488 = 0x00000000:0x00002000 (IA32_VMX_CR4_FIXED0)
 MSR 0x00000489 = 0x00000000:0x001027FF (IA32_VMX_CR4_FIXED1)
 MSR 0x0000048A = 0x00000000:0x0000002E (IA32_VMX_VMCS_ENUM)
 MSR 0x0000048B = 0x000028EF:0x00000000 (IA32_VMX_PROCBASED_CTLS2)
 MSR 0x0000048C = 0x00000F01:0x06114141 (IA32_VMX_EPT_VPID_ENUM)
 MSR 0x0000048D = 0x0000007F:0x00000016 (IA32_VMX_TRUE_PINBASED_CTLS)
 MSR 0x0000048E = 0xFFF9FFFE:0x04006172 (IA32_VMX_TRUE_PROCBASED_CTLS)
 MSR 0x0000048F = 0x007FFFFF:0x00036DFB (IA32_VMX_TRUE_EXIT_CTLS)
 MSR 0x00000490 = 0x0000FFFF:0x000011FB (IA32_VMX_TRUE_ENTRY_CTLS)
 MSR 0x00000491 = 0x00000000:0x00000001 (IA32_VMX_FMFUNC)
 MSR 0x000004C1 = 0x00000000:0x00000000 (IA32_A_PMC0)
 MSR 0x000004C2 = 0x00000000:0x00000000 (IA32_A_PMC1)
 MSR 0x00000600 = 0xFFFFFE49:0x0D29B000 (IA32_DS_AREA)
 MSR 0x00000660 = 0x00000008:0xCAD093B0 (MSR_CORE_C1_RESIDENCY)
 MSR 0x000006E0 = 0x0000003F:0x11D0D1AA (IA32_TSC_DEADLINE)

====================== UNIQUE MSRs  (core 3) ======================
 MSR 0x00000006 = 0x00000000:0x00000040 (IA32_MONITOR_FILTER_LINE_SIZE)
 MSR 0x00000010 = 0x0000003F:0x11D0517A (IA32_TIME_STAMP_COUNTER)
 MSR 0x0000001B = 0x00000000:0xFEE00800 (IA32_APIC_BASE)
 MSR 0x00000034 = 0x00000000:0x00000007 (MSR_SMI_COUNT)
 MSR 0x0000003A = 0x00000000:0x00000005 (IA32_FEATURE_CONTROL)
 MSR 0x00000040 = 0x00000000:0x00000000 (MSR_LASTBRANCH_0_FROM_IP)
 MSR 0x00000041 = 0x00000000:0x00000000 (MSR_LASTBRANCH_1_FROM_IP)
 MSR 0x00000042 = 0x00000000:0x00000000 (MSR_LASTBRANCH_2_FROM_IP)
 MSR 0x00000043 = 0x00000000:0x00000000 (MSR_LASTBRANCH_3_FROM_IP)
 MSR 0x00000044 = 0x00000000:0x00000000 (MSR_LASTBRANCH_4_FROM_IP)
 MSR 0x00000045 = 0x00000000:0x00000000 (MSR_LASTBRANCH_5_FROM_IP)
 MSR 0x00000046 = 0x00000000:0x00000000 (MSR_LASTBRANCH_6_FROM_IP)
 MSR 0x00000047 = 0x00000000:0x00000000 (MSR_LASTBRANCH_7_FROM_IP)
 MSR 0x00000060 = 0x00000000:0x00000000 (MSR_LASTBRANCH_0_TO_IP)
 MSR 0x00000061 = 0x00000000:0x00000000 (MSR_LASTBRANCH_1_TO_IP)
 MSR 0x00000062 = 0x00000000:0x00000000 (MSR_LASTBRANCH_2_TO_IP)
 MSR 0x00000063 = 0x00000000:0x00000000 (MSR_LASTBRANCH_3_TO_IP)
 MSR 0x00000064 = 0x00000000:0x00000000 (MSR_LASTBRANCH_4_TO_IP)
 MSR 0x00000065 = 0x00000000:0x00000000 (MSR_LASTBRANCH_5_TO_IP)
 MSR 0x00000066 = 0x00000000:0x00000000 (MSR_LASTBRANCH_6_TO_IP)
 MSR 0x00000067 = 0x00000000:0x00000000 (MSR_LASTBRANCH_7_TO_IP)
 MSR 0x0000008B = 0x00000838:0x00000000 (IA32_BIOS_SIGN_ID)
 MSR 0x000000C1 = 0x00000000:0x00000000 (IA32_PMC0)
 MSR 0x000000C2 = 0x00000000:0x00000000 (IA32_PMC1)
 MSR 0x000000E7 = 0x00000009:0x23B90F88 (IA32_MPERF)
 MSR 0x000000E8 = 0x00000008:0xEB23246D (IA32_APERF)
 MSR 0x000000FE = 0x00000000:0x00000D08 (IA32_MTRRCAP)
 MSR 0x00000174 = 0x00000000:0x00000010 (IA32_SYSENTER_CS)
 MSR 0x00000175 = 0xFFFFFE56:0xB75B1000 (IA32_SYSENTER_ESP)
 MSR 0x00000176 = 0xFFFFFFFF:0xB7201930 (IA32_SYSENTER_EIP)
 MSR 0x00000179 = 0x00000000:0x00000806 (IA32_MCG_CAP)
 MSR 0x0000017A = 0x00000000:0x00000000 (IA32_MCG_STATUS)
 MSR 0x00000186 = 0x00000000:0x00000000 (IA32_PERF_EVNTSEL0)
 MSR 0x00000187 = 0x00000000:0x00000000 (IA32_PERF_EVNTSEL1)
 MSR 0x00000199 = 0x00000000:0x00000621 (IA32_PERF_CONTROL)
 MSR 0x0000019A = 0x00000000:0x00000000 (IA32_CLOCK_MODULATION)
 MSR 0x0000019B = 0x00000000:0x00000003 (IA32_THERM_INTERRUPT)
 MSR 0x0000019C = 0x00000000:0x882E0000 (IA32_THERM_STATUS)
 MSR 0x000001A0 = 0x00000000:0x00850089 (IA32_MISC_ENABLES)
 MSR 0x000001B0 = 0x00000000:0x00000006 (IA32_ENERGY_PERF_BIAS)
 MSR 0x000001C9 = 0x00000000:0x00000000 (MSR_LASTBRANCH_TOS)
 MSR 0x000001D9 = 0x00000000:0x00004000 (IA32_DEBUGCTL)
 MSR 0x000001DD = 0x00000000:0x00000000 (MSR_LER_FROM_LIP)
 MSR 0x000001DE = 0x00000000:0x00000000 (MSR_LER_TO_LIP)
 MSR 0x000001F2 = 0x00000000:0x7A000006 (IA32_SMRR_PHYSBASE)
 MSR 0x000001F3 = 0x00000000:0xFF800800 (IA32_SMRR_PHYSMASK)
 MSR 0x00000200 = 0x00000000:0x00000006 (IA32_MTRR_PHYSBASE0)
 MSR 0x00000201 = 0x0000000F:0x80000800 (IA32_MTRR_PHYSMASK0)
 MSR 0x00000202 = 0x00000000:0x7A800000 (IA32_MTRR_PHYSBASE1)
 MSR 0x00000203 = 0x0000000F:0xFF800800 (IA32_MTRR_PHYSMASK1)
 MSR 0x00000204 = 0x00000000:0x7B000000 (IA32_MTRR_PHYSBASE2)
 MSR 0x00000205 = 0x0000000F:0xFF000800 (IA32_MTRR_PHYSMASK2)
 MSR 0x00000206 = 0x00000000:0x7C000000 (IA32_MTRR_PHYSBASE3)
 MSR 0x00000207 = 0x0000000F:0xFC000800 (IA32_MTRR_PHYSMASK3)
 MSR 0x00000208 = 0x00000000:0x00000000 (IA32_MTRR_PHYSBASE4)
 MSR 0x00000209 = 0x00000000:0x00000000 (IA32_MTRR_PHYSMASK4)
 MSR 0x0000020A = 0x00000000:0x00000000 (IA32_MTRR_PHYSBASE5)
 MSR 0x0000020B = 0x00000000:0x00000000 (IA32_MTRR_PHYSMASK5)
 MSR 0x0000020C = 0x00000000:0x00000000 (IA32_MTRR_PHYSBASE6)
 MSR 0x0000020D = 0x00000000:0x00000000 (IA32_MTRR_PHYSMASK6)
 MSR 0x0000020E = 0x00000000:0x00000000 (IA32_MTRR_PHYSBASE7)
 MSR 0x0000020F = 0x00000000:0x00000000 (IA32_MTRR_PHYSMASK7)
 MSR 0x00000250 = 0x06060606:0x06060606 (IA32_MTRR_FIX64K_00000)
 MSR 0x00000258 = 0x06060606:0x06060606 (IA32_MTRR_FIX16K_80000)
 MSR 0x00000259 = 0x00000000:0x00000000 (IA32_MTRR_FIX16K_A0000)
 MSR 0x00000268 = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_C0000)
 MSR 0x00000269 = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_C8000)
 MSR 0x0000026A = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_D0000)
 MSR 0x0000026B = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_D8000)
 MSR 0x0000026C = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_E0000)
 MSR 0x0000026D = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_E8000)
 MSR 0x0000026E = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_F0000)
 MSR 0x0000026F = 0x00000000:0x00000000 (IA32_MTRR_FIX4K_F8000)
 MSR 0x00000277 = 0x04070506:0x00070106 (IA32_PAT)
 MSR 0x000002FF = 0x00000000:0x00000C00 (IA32_MTRR_DEF_TYPE)
 MSR 0x00000309 = 0x00000000:0x00000000 (IA32_FIXED_CTR0)
 MSR 0x0000030A = 0x000000FC:0x29AF1D58 (IA32_FIXED_CTR1)
 MSR 0x0000030B = 0x00000000:0x00000000 (IA32_FIXED_CTR2)
 MSR 0x00000345 = 0x00000000:0x000032C1 (IA32_PERF_CAPABILITIES)
 MSR 0x0000038D = 0x00000000:0x000000B0 (IA32_FIXED_CTR_CTRL)
 MSR 0x0000038E = 0x00000000:0x00000000 (IA32_PERF_GLOBAL_STATUS)
 MSR 0x0000038F = 0x00000007:0x00000003 (IA32_PERF_GLOBAL_CTRL)
 MSR 0x00000390 = 0x00000000:0x00000000 (IA32_PERF_GLOBAL_OVF_CTRL)
 MSR 0x000003F1 = 0x00000000:0x00000000 (MSR_PEBS_ENABLE)
 MSR 0x000003FD = 0x0000002E:0x8A3C7180 (MSR_CORE_C6_RESIDENCY)
 MSR 0x0000040C = 0x00000000:0x00000003 (IA32_MC3_CTL)
 MSR 0x0000040D = 0x00000000:0x00000000 (IA32_MC3_STATUS)
 MSR 0x0000040E = 0x00000000:0x00000000 (IA32_MC3_ADDR)
 MSR 0x00000410 = 0x00000000:0x00000001 (IA32_MC4_CTL)
 MSR 0x00000411 = 0x00000000:0x00000000 (IA32_MC4_STATUS)
 MSR 0x00000412 = 0x00000000:0x00000000 (IA32_MC4_ADDR)
 MSR 0x00000480 = 0x00DA0400:0x00000002 (IA32_VMX_BASIC)
 MSR 0x00000481 = 0x0000007F:0x00000016 (IA32_VMX_PINBASED_CTLS)
 MSR 0x00000482 = 0xFFF9FFFE:0x0401E172 (IA32_VMX_PROCBASED_CTLS)
 MSR 0x00000483 = 0x007FFFFF:0x00036DFF (IA32_VMX_EXIT_CTLS)
 MSR 0x00000484 = 0x0000FFFF:0x000011FF (IA32_VMX_ENTRY_CTLS)
 MSR 0x00000485 = 0x000