CBFS: 'Master Header Locator' located CBFS at [100:ffffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 2ad80 size e88 coreboot-4.5-917-g545edca Tue Jan 31 16:40:28 UTC 2017 ramstage starting... Moving GDT to b7ffe9e0...ok Normal boot. BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0 BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0 Enumerating buses... Show all devs... Before device enumeration. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:00.1: enabled 1 PCI: 00:00.2: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:03.0: enabled 0 PCI: 00:04.0: enabled 1 PCI: 00:05.0: enabled 0 PCI: 00:06.0: enabled 0 PCI: 00:07.0: enabled 0 PCI: 00:08.0: enabled 0 PCI: 00:09.0: enabled 1 PCI: 00:0a.0: enabled 1 PCI: 00:0b.0: enabled 1 PCI: 00:0c.0: enabled 1 PCI: 00:0d.0: enabled 1 PCI: 00:11.0: enabled 1 PCI: 00:12.0: enabled 1 PCI: 00:12.1: enabled 1 PCI: 00:12.2: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:13.1: enabled 1 PCI: 00:13.2: enabled 1 PCI: 00:14.0: enabled 1 I2C: 00:50: enabled 1 I2C: 00:51: enabled 1 I2C: 00:52: enabled 1 I2C: 00:53: enabled 1 I2C: 00:54: enabled 1 I2C: 00:55: enabled 1 I2C: 00:56: enabled 1 I2C: 00:57: enabled 1 I2C: 00:2f: enabled 1 PCI: 00:14.1: enabled 1 PCI: 00:14.2: enabled 1 PCI: 00:14.3: enabled 1 PNP: 002e.0: enabled 0 PNP: 002e.1: enabled 0 PNP: 002e.2: enabled 1 PNP: 002e.3: enabled 1 PNP: 002e.5: enabled 1 PNP: 002e.106: enabled 0 PNP: 002e.107: enabled 0 PNP: 002e.207: enabled 0 PNP: 002e.307: enabled 0 PNP: 002e.407: enabled 0 PNP: 002e.8: enabled 0 PNP: 002e.108: enabled 0 PNP: 002e.9: enabled 0 PNP: 002e.109: enabled 0 PNP: 002e.209: enabled 0 PNP: 002e.309: enabled 0 PNP: 002e.a: enabled 1 PNP: 002e.b: enabled 1 PNP: 002e.c: enabled 0 PNP: 002e.d: enabled 0 PNP: 002e.f: enabled 0 PNP: 004e.0: enabled 1 PCI: 00:14.4: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:03.0: enabled 1 PCI: 00:14.5: enabled 1 PCI: 00:18.1: enabled 1 PCI: 00:18.2: enabled 1 PCI: 00:18.3: enabled 1 PCI: 00:18.4: enabled 1 PCI: 00:18.5: enabled 1 PCI: 00:19.0: enabled 1 PCI: 00:19.1: enabled 1 PCI: 00:19.2: enabled 1 PCI: 00:19.3: enabled 1 PCI: 00:19.4: enabled 1 PCI: 00:19.5: enabled 1 PCI: 00:1a.0: enabled 1 PCI: 00:1a.1: enabled 1 PCI: 00:1a.2: enabled 1 PCI: 00:1a.3: enabled 1 PCI: 00:1a.4: enabled 1 PCI: 00:1a.5: enabled 1 PCI: 00:1b.0: enabled 1 PCI: 00:1b.1: enabled 1 PCI: 00:1b.2: enabled 1 PCI: 00:1b.3: enabled 1 PCI: 00:1b.4: enabled 1 PCI: 00:1b.5: enabled 1 Compare with tree... Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 DOMAIN: 0000: enabled 1 PCI: 00:18.0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:00.1: enabled 1 PCI: 00:00.2: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:03.0: enabled 0 PCI: 00:04.0: enabled 1 PCI: 00:05.0: enabled 0 PCI: 00:06.0: enabled 0 PCI: 00:07.0: enabled 0 PCI: 00:08.0: enabled 0 PCI: 00:09.0: enabled 1 PCI: 00:0a.0: enabled 1 PCI: 00:0b.0: enabled 1 PCI: 00:0c.0: enabled 1 PCI: 00:0d.0: enabled 1 PCI: 00:11.0: enabled 1 PCI: 00:12.0: enabled 1 PCI: 00:12.1: enabled 1 PCI: 00:12.2: enabled 1 PCI: 00:13.0: enabled 1 PCI: 00:13.1: enabled 1 PCI: 00:13.2: enabled 1 PCI: 00:14.0: enabled 1 I2C: 00:50: enabled 1 I2C: 00:51: enabled 1 I2C: 00:52: enabled 1 I2C: 00:53: enabled 1 I2C: 00:54: enabled 1 I2C: 00:55: enabled 1 I2C: 00:56: enabled 1 I2C: 00:57: enabled 1 I2C: 00:2f: enabled 1 PCI: 00:14.1: enabled 1 PCI: 00:14.2: enabled 1 PCI: 00:14.3: enabled 1 PNP: 002e.0: enabled 0 PNP: 002e.1: enabled 0 PNP: 002e.2: enabled 1 PNP: 002e.3: enabled 1 PNP: 002e.5: enabled 1 PNP: 002e.106: enabled 0 PNP: 002e.107: enabled 0 PNP: 002e.207: enabled 0 PNP: 002e.307: enabled 0 PNP: 002e.407: enabled 0 PNP: 002e.8: enabled 0 PNP: 002e.108: enabled 0 PNP: 002e.9: enabled 0 PNP: 002e.109: enabled 0 PNP: 002e.209: enabled 0 PNP: 002e.309: enabled 0 PNP: 002e.a: enabled 1 PNP: 002e.b: enabled 1 PNP: 002e.c: enabled 0 PNP: 002e.d: enabled 0 PNP: 002e.f: enabled 0 PNP: 004e.0: enabled 1 PCI: 00:14.4: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:03.0: enabled 1 PCI: 00:14.5: enabled 1 PCI: 00:18.1: enabled 1 PCI: 00:18.2: enabled 1 PCI: 00:18.3: enabled 1 PCI: 00:18.4: enabled 1 PCI: 00:18.5: enabled 1 PCI: 00:19.0: enabled 1 PCI: 00:19.1: enabled 1 PCI: 00:19.2: enabled 1 PCI: 00:19.3: enabled 1 PCI: 00:19.4: enabled 1 PCI: 00:19.5: enabled 1 PCI: 00:1a.0: enabled 1 PCI: 00:1a.1: enabled 1 PCI: 00:1a.2: enabled 1 PCI: 00:1a.3: enabled 1 PCI: 00:1a.4: enabled 1 PCI: 00:1a.5: enabled 1 PCI: 00:1b.0: enabled 1 PCI: 00:1b.1: enabled 1 PCI: 00:1b.2: enabled 1 PCI: 00:1b.3: enabled 1 PCI: 00:1b.4: enabled 1 PCI: 00:1b.5: enabled 1 Mainboard KGPE-D16 Enable. dev=0x0012e860 mainboard_enable, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000 mainboard_enable, TOP MEM2: msr2.lo = 0x40000000, msr2.hi = 0x00000020 Root Device scanning... root_dev_scan_bus for Root Device setup_bsp_ramtop, TOP MEM: msr.lo = 0xc0000000, msr.hi = 0x00000000 setup_bsp_ramtop, TOP MEM2: msr.lo = 0x40000000, msr.hi = 0x00000020 CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled CPU_CLUSTER: 0 scanning... CBFS: 'Master Header Locator' located CBFS at [100:ffffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 2ad80 size e88 CBFS: 'Master Header Locator' located CBFS at [100:ffffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 2ad80 size e88 PCI: 00:18.5 siblings=7 CPU: APIC: 00 enabled CPU: APIC: 01 enabled CPU: APIC: 02 enabled CPU: APIC: 03 enabled CPU: APIC: 04 enabled CPU: APIC: 05 enabled CPU: APIC: 06 enabled CPU: APIC: 07 enabled PCI: 00:19.5 siblings=7 CPU: APIC: 08 enabled CPU: APIC: 09 enabled CPU: APIC: 0a enabled CPU: APIC: 0b enabled CPU: APIC: 0c enabled CPU: APIC: 0d enabled CPU: APIC: 0e enabled CPU: APIC: 0f enabled PCI: 00:1a.5 siblings=7 CPU: APIC: 20 enabled CPU: APIC: 21 enabled CPU: APIC: 22 enabled CPU: APIC: 23 enabled CPU: APIC: 24 enabled CPU: APIC: 25 enabled CPU: APIC: 26 enabled CPU: APIC: 27 enabled PCI: 00:1b.5 siblings=7 CPU: APIC: 28 enabled CPU: APIC: 29 enabled CPU: APIC: 2a enabled CPU: APIC: 2b enabled CPU: APIC: 2c enabled CPU: APIC: 2d enabled CPU: APIC: 2e enabled CPU: APIC: 2f enabled scan_bus: scanning of bus CPU_CLUSTER: 0 took 72637 usecs DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:18.0 [1022/1600] bus ops PCI: 00:18.0 [1022/1600] enabled PCI: 00:18.1 [1022/1601] enabled PCI: 00:18.2 [1022/1602] enabled PCI: 00:18.3 [1022/1603] ops PCI: 00:18.3 [1022/1603] enabled PCI: 00:18.4 [1022/1604] ops PCI: 00:18.4 [1022/1604] enabled PCI: 00:18.5 [1022/1605] ops PCI: 00:18.5 [1022/1605] enabled PCI: 00:19.0 [1022/1600] bus ops PCI: 00:19.0 [1022/1600] enabled PCI: 00:19.1 [1022/1601] enabled PCI: 00:19.2 [1022/1602] enabled PCI: 00:19.3 [1022/1603] ops PCI: 00:19.3 [1022/1603] enabled PCI: 00:19.4 [1022/1604] ops PCI: 00:19.4 [1022/1604] enabled PCI: 00:19.5 [1022/1605] ops PCI: 00:19.5 [1022/1605] enabled PCI: 00:1a.0 [1022/1600] bus ops PCI: 00:1a.0 [1022/1600] enabled PCI: 00:1a.1 [1022/1601] enabled PCI: 00:1a.2 [1022/1602] enabled PCI: 00:1a.3 [1022/1603] ops PCI: 00:1a.3 [1022/1603] enabled PCI: 00:1a.4 [1022/1604] ops PCI: 00:1a.4 [1022/1604] enabled PCI: 00:1a.5 [1022/1605] ops PCI: 00:1a.5 [1022/1605] enabled PCI: 00:1b.0 [1022/1600] bus ops PCI: 00:1b.0 [1022/1600] enabled PCI: 00:1b.1 [1022/1601] enabled PCI: 00:1b.2 [1022/1602] enabled PCI: 00:1b.3 [1022/1603] ops PCI: 00:1b.3 [1022/1603] enabled PCI: 00:1b.4 [1022/1604] ops PCI: 00:1b.4 [1022/1604] enabled PCI: 00:1b.5 [1022/1605] ops PCI: 00:1b.5 [1022/1605] enabled PCI: 00:18.0 scanning... do_hypertransport_scan_chain for bus 00 sr5650_enable: dev=00131180, VID_DID=0x5a101002 Bus-0, Dev-0, Fun-0. enable_pcie_bar3 sr5650_gpp_sb_init: nb_dev=0x00131180, dev=0x00130be0, port=0x8 PciePowerOffGppPorts() port 8 NB_PCI_REG04 = 2. NB_PCI_REG84 = 3000010. NB_PCI_REG4C = 52042. Sysmem TOM = 0_c0000000 Sysmem TOM2 = 20_40000000 PCI: 00:00.0 [1002/5a10] ops PCI: 00:00.0 [1002/5a10] enabled Capability: type 0x08 @ 0xf0 flags: 0xa803 Capability: type 0x08 @ 0xf0 Capability: type 0x08 @ 0xc4 flags: 0x0280 PCI: 00:00.0 count: 0014 static_count: 0015 PCI: 00:00.0 [1002/5a10] enabled next_unitid: 0015 PCI: pci_scan_bus for bus 00 sr5650_enable: dev=00131180, VID_DID=0x5a101002 Bus-0, Dev-0, Fun-0. enable_pcie_bar3 sr5650_gpp_sb_init: nb_dev=0x00131180, dev=0x00130be0, port=0x8 PciePowerOffGppPorts() port 8 NB_PCI_REG04 = 2. NB_PCI_REG84 = 3000010. NB_PCI_REG4C = 52042. Sysmem TOM = 0_c0000000 Sysmem TOM2 = 20_40000000 PCI: 00:00.0 [1002/5a10] enabled sr5650_enable: dev=001310e0, VID_DID=0xffffffff Bus-0, Dev-0, Fun-1. PCI: Static device PCI: 00:00.1 not found, disabling it. sr5650_enable: dev=00131040, VID_DID=0x5a231002 Bus-0, Dev-0, Fun-2. PCI: 00:00.2 [1002/5a23] ops PCI: 00:00.2 [1002/5a23] enabled sr5650_enable: dev=00130fa0, VID_DID=0xffffffff Bus-0, Dev-2,3, Fun-0. enable=1 sr5650_gpp_sb_init: nb_dev=0x00131180, dev=0x00130fa0, port=0x2 PcieLinkTraining port=2:lc current state=2030400 sr5650_gpp_sb_init: port=0x2 hw_port=0x2 result=0 PciePowerOffGppPorts() port 2 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:02.0 subordinate bus PCI Express PCI: 00:02.0 [1002/5a16] enabled sr5650_enable: dev=00130f00, VID_DID=0xffffffff Bus-0, Dev-2,3, Fun-0. enable=0 sr5650_enable: dev=00130e60, VID_DID=0xffffffff enable_pcie_bar3 Bus-0, Dev-4,5,6,7, Fun-0. enable=1 sr5650_gpp_sb_init: nb_dev=0x00131180, dev=0x00130e60, port=0x4 PcieLinkTraining port=4:lc current state=2030400 sr5650_gpp_sb_init: port=0x4 hw_port=0x4 result=0 PciePowerOffGppPorts() port 4 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:04.0 subordinate bus PCI Express PCI: 00:04.0 [1002/5a18] enabled sr5650_enable: dev=00130dc0, VID_DID=0xffffffff enable_pcie_bar3 Bus-0, Dev-4,5,6,7, Fun-0. enable=0 sr5650_enable: dev=00130d20, VID_DID=0xffffffff enable_pcie_bar3 Bus-0, Dev-4,5,6,7, Fun-0. enable=0 sr5650_enable: dev=00130c80, VID_DID=0xffffffff enable_pcie_bar3 Bus-0, Dev-4,5,6,7, Fun-0. enable=0 sr5650_enable: dev=00130be0, VID_DID=0xffffffff Bus-0, Dev-8, Fun-0. enable=0 disable_pcie_bar3 sr5650_enable: dev=00130b40, VID_DID=0xffffffff Bus-0, Dev-9, 10, Fun-0. enable=1 enable_pcie_bar3 sr5650_gpp_sb_init: nb_dev=0x00131180, dev=0x00130b40, port=0x9 PcieLinkTraining port=5:lc current state=a0b0f10 addr=c0000000,bus=0,devfn=48 PcieTrainPort reg=0x10000 sr5650_gpp_sb_init: port=0x9 hw_port=0x5 result=1 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:09.0 subordinate bus PCI Express PCI: 00:09.0 [1002/5a1c] enabled sr5650_enable: dev=00130aa0, VID_DID=0xffffffff Bus-0, Dev-9, 10, Fun-0. enable=1 enable_pcie_bar3 sr5650_gpp_sb_init: nb_dev=0x00131180, dev=0x00130aa0, port=0xa PcieLinkTraining port=6:lc current state=a0b0f10 addr=c0000000,bus=0,devfn=50 PcieTrainPort reg=0x10000 sr5650_gpp_sb_init: port=0xa hw_port=0x6 result=1 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:0a.0 subordinate bus PCI Express PCI: 00:0a.0 [1002/5a1d] enabled sr5650_enable: dev=00130a00, VID_DID=0xffffffff Bus-0, Dev-11,12, Fun-0. enable=1 sr5650_gpp_sb_init: nb_dev=0x00131180, dev=0x00130a00, port=0xb PcieLinkTraining port=b:lc current state=2030400 sr5650_gpp_sb_init: port=0xb hw_port=0xb result=0 PciePowerOffGppPorts() port 11 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:0b.0 subordinate bus PCI Express PCI: 00:0b.0 [1002/5a1f] enabled sr5650_enable: dev=00130960, VID_DID=0xffffffff Bus-0, Dev-11,12, Fun-0. enable=1 sr5650_gpp_sb_init: nb_dev=0x00131180, dev=0x00130960, port=0xc PcieLinkTraining port=c:lc current state=2030400 sr5650_gpp_sb_init: port=0xc hw_port=0xc result=0 PciePowerOffGppPorts() port 12 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:0c.0 subordinate bus PCI Express PCI: 00:0c.0 [1002/5a20] enabled sr5650_enable: dev=001308c0, VID_DID=0xffffffff sr5650_gpp_sb_init: nb_dev=0x00131180, dev=0x001308c0, port=0xd PcieLinkTraining port=d:lc current state=20212210 addr=c0000000,bus=0,devfn=68 PcieTrainPort reg=0x10000 sr5650_gpp_sb_init: port=0xd hw_port=0xd result=1 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Capability: type 0x05 @ 0xa0 Capability: type 0x0d @ 0xb0 Capability: type 0x08 @ 0xb8 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 PCI: 00:0d.0 subordinate bus PCI Express PCI: 00:0d.0 [1002/5a1e] enabled sb7xx_51xx_enable() PCI: 00:11.0 [1002/4394] ops PCI: 00:11.0 [1002/4394] enabled sb7xx_51xx_enable() PCI: 00:12.0 [1002/4397] ops PCI: 00:12.0 [1002/4397] enabled sb7xx_51xx_enable() PCI: 00:12.1 [1002/4398] ops PCI: 00:12.1 [1002/4398] enabled sb7xx_51xx_enable() PCI: 00:12.2 [1002/4396] ops PCI: 00:12.2 [1002/4396] enabled sb7xx_51xx_enable() PCI: 00:13.0 [1002/4397] ops PCI: 00:13.0 [1002/4397] enabled sb7xx_51xx_enable() PCI: 00:13.1 [1002/4398] ops PCI: 00:13.1 [1002/4398] enabled sb7xx_51xx_enable() PCI: 00:13.2 [1002/4396] ops PCI: 00:13.2 [1002/4396] enabled sb7xx_51xx_enable() PCI: 00:14.0 [1002/4385] bus ops PCI: 00:14.0 [1002/4385] enabled sb7xx_51xx_enable() PCI: 00:14.1 [1002/439c] ops PCI: 00:14.1 [1002/439c] enabled sb7xx_51xx_enable() PCI: 00:14.2 [1002/4383] ops PCI: 00:14.2 [1002/4383] enabled sb7xx_51xx_enable() PCI: 00:14.3 [1002/439d] bus ops PCI: 00:14.3 [1002/439d] enabled sb7xx_51xx_enable() PCI: 00:14.4 [1002/4384] bus ops PCI: 00:14.4 [1002/4384] enabled sb7xx_51xx_enable() PCI: 00:14.5 [1002/4399] ops PCI: 00:14.5 [1002/4399] enabled PCI: 00:02.0 scanning... do_pci_scan_bridge for PCI: 00:02.0 PCI: pci_scan_bus for bus 01 scan_bus: scanning of bus PCI: 00:02.0 took 5916 usecs PCI: 00:04.0 scanning... do_pci_scan_bridge for PCI: 00:04.0 PCI: pci_scan_bus for bus 02 scan_bus: scanning of bus PCI: 00:04.0 took 5921 usecs PCI: 00:09.0 scanning... do_pci_scan_bridge for PCI: 00:09.0 PCI: pci_scan_bus for bus 03 PCI: 03:00.0 [8086/10d3] enabled Capability: type 0x01 @ 0xc8 Capability: type 0x05 @ 0xd0 Capability: type 0x10 @ 0xe0 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Enabling Common Clock Configuration PCIE CLK PM is not supported by endpointASPM: Enabled None scan_bus: scanning of bus PCI: 00:09.0 took 23895 usecs PCI: 00:0a.0 scanning... do_pci_scan_bridge for PCI: 00:0a.0 PCI: pci_scan_bus for bus 04 PCI: 04:00.0 [8086/10d3] enabled Capability: type 0x01 @ 0xc8 Capability: type 0x05 @ 0xd0 Capability: type 0x10 @ 0xe0 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Enabling Common Clock Configuration PCIE CLK PM is not supported by endpointASPM: Enabled None scan_bus: scanning of bus PCI: 00:0a.0 took 23818 usecs PCI: 00:0b.0 scanning... do_pci_scan_bridge for PCI: 00:0b.0 PCI: pci_scan_bus for bus 05 scan_bus: scanning of bus PCI: 00:0b.0 took 5921 usecs PCI: 00:0c.0 scanning... do_pci_scan_bridge for PCI: 00:0c.0 PCI: pci_scan_bus for bus 06 scan_bus: scanning of bus PCI: 00:0c.0 took 5920 usecs PCI: 00:0d.0 scanning... do_pci_scan_bridge for PCI: 00:0d.0 PCI: pci_scan_bus for bus 07 PCI: 07:00.0 [8086/10fb] enabled PCI: 07:00.1 [8086/10fb] enabled Capability: type 0x01 @ 0x40 Capability: type 0x05 @ 0x50 Capability: type 0x11 @ 0x70 Capability: type 0x10 @ 0xa0 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Enabling Common Clock Configuration PCIE CLK PM is not supported by endpointASPM: Enabled None Capability: type 0x01 @ 0x40 Capability: type 0x05 @ 0x50 Capability: type 0x11 @ 0x70 Capability: type 0x10 @ 0xa0 Capability: type 0x01 @ 0x50 Capability: type 0x10 @ 0x58 Enabling Common Clock Configuration PCIE CLK PM is not supported by endpointASPM: Enabled None scan_bus: scanning of bus PCI: 00:0d.0 took 45521 usecs PCI: 00:14.0 scanning... scan_smbus for PCI: 00:14.0 smbus: PCI: 00:14.0[0]->I2C: 01:50 enabled smbus: PCI: 00:14.0[0]->I2C: 01:51 enabled smbus: PCI: 00:14.0[0]->I2C: 01:52 enabled smbus: PCI: 00:14.0[0]->I2C: 01:53 enabled smbus: PCI: 00:14.0[0]->I2C: 01:54 enabled smbus: PCI: 00:14.0[0]->I2C: 01:55 enabled smbus: PCI: 00:14.0[0]->I2C: 01:56 enabled smbus: PCI: 00:14.0[0]->I2C: 01:57 enabled smbus: PCI: 00:14.0[0]->I2C: 01:2f enabled scan_smbus for PCI: 00:14.0 done scan_bus: scanning of bus PCI: 00:14.0 took 30833 usecs PCI: 00:14.3 scanning... scan_lpc_bus for PCI: 00:14.3 PNP: 002e.0 disabled PNP: 002e.1 disabled PNP: 002e.2 enabled PNP: 002e.3 enabled PNP: 002e.5 enabled PNP: 002e.106 disabled PNP: 002e.107 disabled PNP: 002e.207 disabled PNP: 002e.307 disabled PNP: 002e.407 disabled PNP: 002e.8 disabled PNP: 002e.108 disabled PNP: 002e.9 disabled PNP: 002e.109 disabled PNP: 002e.209 disabled PNP: 002e.309 disabled PNP: 002e.a enabled PNP: 002e.b enabled PNP: 002e.c disabled PNP: 002e.d disabled PNP: 002e.f disabled PNP: 004e.0 enabled scan_lpc_bus for PCI: 00:14.3 done scan_bus: scanning of bus PCI: 00:14.3 took 37794 usecs PCI: 00:14.4 scanning... do_pci_scan_bridge for PCI: 00:14.4 PCI: pci_scan_bus for bus 08 sb7xx_51xx_enable() PCI: 08:01.0 [1a03/2000] ops PCI: 08:01.0 [1a03/2000] enabled sb7xx_51xx_enable() PCI: 08:02.0 [11c1/5811] enabled sb7xx_51xx_enable() PCI: Static device PCI: 08:03.0 not found, disabling it. scan_bus: scanning of bus PCI: 00:14.4 took 19838 usecs scan_bus: scanning of bus PCI: 00:18.0 took 1755376 usecs PCI: 00:19.0 scanning... scan_bus: scanning of bus PCI: 00:19.0 took 1653 usecs PCI: 00:1a.0 scanning... scan_bus: scanning of bus PCI: 00:1a.0 took 1651 usecs PCI: 00:1b.0 scanning... scan_bus: scanning of bus PCI: 00:1b.0 took 1652 usecs DOMAIN: 0000 passpw: enabled DOMAIN: 0000 passpw: enabled DOMAIN: 0000 passpw: enabled DOMAIN: 0000 passpw: enabled scan_bus: scanning of bus DOMAIN: 0000 took 1869101 usecs root_dev_scan_bus for Root Device done scan_bus: scanning of bus Root Device took 1967288 usecs done BS: BS_DEV_ENUMERATE times (us): entry 0 run 2288640 exit 0 found VGA at PCI: 08:01.0 Setting up VGA for PCI: 08:01.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:14.4 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done Adding PCIe enhanced config space BAR 0xc0000000-0xd0000000. CBFS: 'Master Header Locator' located CBFS at [100:ffffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 2ad80 size e88 Reserving CC6 save segment base: 2038000000 size: 08000000 DOMAIN: 0000 read_resources bus 0 link: 0 PCI: 00:18.0 read_resources bus 0 link: 2 PCI: 00:18.0 read_resources bus 0 link: 2 done PCI: 00:18.0 read_resources bus 0 link: 3 PCI: 00:18.0 read_resources bus 0 link: 3 done PCI: 00:18.0 read_resources bus 0 link: 0 PCI: 00:18.0 read_resources bus 0 link: 0 done PCI: 00:18.0 read_resources bus 0 link: 1 sr5690_read_resource: PCI: 00:00.0 CBFS: 'Master Header Locator' located CBFS at [100:ffffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 2ad80 size e88 PCI: 00:02.0 read_resources bus 1 link: 0 PCI: 00:02.0 read_resources bus 1 link: 0 done PCI: 00:04.0 read_resources bus 2 link: 0 PCI: 00:04.0 read_resources bus 2 link: 0 done PCI: 00:09.0 read_resources bus 3 link: 0 PCI: 00:09.0 read_resources bus 3 link: 0 done PCI: 00:0a.0 read_resources bus 4 link: 0 PCI: 00:0a.0 read_resources bus 4 link: 0 done PCI: 00:0b.0 read_resources bus 5 link: 0 PCI: 00:0b.0 read_resources bus 5 link: 0 done PCI: 00:0c.0 read_resources bus 6 link: 0 PCI: 00:0c.0 read_resources bus 6 link: 0 done PCI: 00:0d.0 read_resources bus 7 link: 0 PCI: 00:0d.0 read_resources bus 7 link: 0 done PCI: 00:14.0 read_resources bus 1 link: 0 I2C: 01:50 missing read_resources I2C: 01:51 missing read_resources I2C: 01:52 missing read_resources I2C: 01:53 missing read_resources I2C: 01:54 missing read_resources I2C: 01:55 missing read_resources I2C: 01:56 missing read_resources I2C: 01:57 missing read_resources PCI: 00:14.0 read_resources bus 1 link: 0 done PCI: 00:14.3 read_resources bus 0 link: 0 PNP: 004e.0 missing read_resources PCI: 00:14.3 read_resources bus 0 link: 0 done PCI: 00:14.4 read_resources bus 8 link: 0 PCI: 00:14.4 read_resources bus 8 link: 0 done PCI: 00:18.0 read_resources bus 0 link: 1 done CBFS: 'Master Header Locator' located CBFS at [100:ffffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 2ad80 size e88 PCI: 00:18.4 read_resources bus 0 link: 0 PCI: 00:18.4 read_resources bus 0 link: 0 done PCI: 00:18.4 read_resources bus 0 link: 1 PCI: 00:18.4 read_resources bus 0 link: 1 done PCI: 00:18.4 read_resources bus 0 link: 2 PCI: 00:18.4 read_resources bus 0 link: 2 done PCI: 00:18.4 read_resources bus 0 link: 3 PCI: 00:18.4 read_resources bus 0 link: 3 done PCI: 00:19.0 read_resources bus 0 link: 3 PCI: 00:19.0 read_resources bus 0 link: 3 done PCI: 00:19.0 read_resources bus 0 link: 2 PCI: 00:19.0 read_resources bus 0 link: 2 done PCI: 00:19.0 read_resources bus 0 link: 0 PCI: 00:19.0 read_resources bus 0 link: 0 done PCI: 00:19.0 read_resources bus 0 link: 1 PCI: 00:19.0 read_resources bus 0 link: 1 done PCI: 00:19.4 read_resources bus 0 link: 0 PCI: 00:19.4 read_resources bus 0 link: 0 done PCI: 00:19.4 read_resources bus 0 link: 1 PCI: 00:19.4 read_resources bus 0 link: 1 done PCI: 00:19.4 read_resources bus 0 link: 2 PCI: 00:19.4 read_resources bus 0 link: 2 done PCI: 00:19.4 read_resources bus 0 link: 3 PCI: 00:19.4 read_resources bus 0 link: 3 done PCI: 00:1a.0 read_resources bus 0 link: 3 PCI: 00:1a.0 read_resources bus 0 link: 3 done PCI: 00:1a.0 read_resources bus 0 link: 2 PCI: 00:1a.0 read_resources bus 0 link: 2 done PCI: 00:1a.0 read_resources bus 0 link: 0 PCI: 00:1a.0 read_resources bus 0 link: 0 done PCI: 00:1a.0 read_resources bus 0 link: 1 PCI: 00:1a.0 read_resources bus 0 link: 1 done PCI: 00:1a.4 read_resources bus 0 link: 0 PCI: 00:1a.4 read_resources bus 0 link: 0 done PCI: 00:1a.4 read_resources bus 0 link: 1 PCI: 00:1a.4 read_resources bus 0 link: 1 done PCI: 00:1a.4 read_resources bus 0 link: 2 PCI: 00:1a.4 read_resources bus 0 link: 2 done PCI: 00:1a.4 read_resources bus 0 link: 3 PCI: 00:1a.4 read_resources bus 0 link: 3 done PCI: 00:1b.0 read_resources bus 0 link: 3 PCI: 00:1b.0 read_resources bus 0 link: 3 done PCI: 00:1b.0 read_resources bus 0 link: 2 PCI: 00:1b.0 read_resources bus 0 link: 2 done PCI: 00:1b.0 read_resources bus 0 link: 0 PCI: 00:1b.0 read_resources bus 0 link: 0 done PCI: 00:1b.0 read_resources bus 0 link: 1 PCI: 00:1b.0 read_resources bus 0 link: 1 done PCI: 00:1b.4 read_resources bus 0 link: 0 PCI: 00:1b.4 read_resources bus 0 link: 0 done PCI: 00:1b.4 read_resources bus 0 link: 1 PCI: 00:1b.4 read_resources bus 0 link: 1 done PCI: 00:1b.4 read_resources bus 0 link: 2 PCI: 00:1b.4 read_resources bus 0 link: 2 done PCI: 00:1b.4 read_resources bus 0 link: 3 PCI: 00:1b.4 read_resources bus 0 link: 3 done DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: 01 APIC: 02 APIC: 03 APIC: 04 APIC: 05 APIC: 06 APIC: 07 APIC: 08 APIC: 09 APIC: 0a APIC: 0b APIC: 0c APIC: 0d APIC: 0e APIC: 0f APIC: 20 APIC: 21 APIC: 22 APIC: 23 APIC: 24 APIC: 25 APIC: 26 APIC: 27 APIC: 28 APIC: 29 APIC: 2a APIC: 2b APIC: 2c APIC: 2d APIC: 2e APIC: 2f DOMAIN: 0000 child on link 0 PCI: 00:18.0 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7 DOMAIN: 0000 resource base 2038000000 size 8000000 align 0 gran 0 limit 0 flags f0004200 index 8 PCI: 00:18.0 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 110b0 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 110b8 PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 110d8 PCI: 00:00.0 PCI: 00:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 1200 index fc PCI: 00:00.1 PCI: 00:00.2 PCI: 00:00.2 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 10000200 index 44 PCI: 00:02.0 PCI: 00:02.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:03.0 PCI: 00:04.0 PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:05.0 PCI: 00:06.0 PCI: 00:07.0 PCI: 00:08.0 PCI: 00:09.0 child on link 0 PCI: 03:00.0 PCI: 00:09.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:09.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 03:00.0 PCI: 03:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 PCI: 03:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c PCI: 00:0a.0 child on link 0 PCI: 04:00.0 PCI: 00:0a.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:0a.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 04:00.0 PCI: 04:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 PCI: 04:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 PCI: 04:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 1c PCI: 00:0b.0 PCI: 00:0b.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:0b.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:0c.0 PCI: 00:0c.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:0c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:0d.0 child on link 0 PCI: 07:00.0 PCI: 00:0d.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:0d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 07:00.0 PCI: 07:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffffffffffff flags 1201 index 10 PCI: 07:00.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 PCI: 07:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20 PCI: 07:00.1 PCI: 07:00.1 resource base 0 size 80000 align 19 gran 19 limit ffffffffffffffff flags 1201 index 10 PCI: 07:00.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 PCI: 07:00.1 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20 PCI: 00:11.0 PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 PCI: 00:11.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24 PCI: 00:12.0 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:12.1 PCI: 00:12.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:12.2 PCI: 00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 PCI: 00:13.0 PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:13.1 PCI: 00:13.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:13.2 PCI: 00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 PCI: 00:14.0 child on link 0 I2C: 01:50 PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74 PCI: 00:14.0 resource base feb00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 9c PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4 PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90 PCI: 00:14.0 resource base b20 size 10 align 8 gran 8 limit ffff flags d0000100 index 58 I2C: 01:50 I2C: 01:51 I2C: 01:52 I2C: 01:53 I2C: 01:54 I2C: 01:55 I2C: 01:56 I2C: 01:57 I2C: 01:2f PCI: 00:14.1 PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:14.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 PCI: 00:14.2 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 PCI: 00:14.3 child on link 0 PNP: 002e.0 PCI: 00:14.3 resource base 0 size 1 align 12 gran 0 limit ffffffff flags 200 index a0 PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PNP: 002e.0 PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 002e.1 PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 002e.2 PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60 PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.3 PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60 PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.5 PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60 PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62 PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70 PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72 PNP: 002e.106 PNP: 002e.106 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62 PNP: 002e.107 PNP: 002e.207 PNP: 002e.307 PNP: 002e.407 PNP: 002e.8 PNP: 002e.108 PNP: 002e.9 PNP: 002e.109 PNP: 002e.209 PNP: 002e.309 PNP: 002e.a PNP: 002e.b PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags c0000100 index 60 PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 002e.c PNP: 002e.d PNP: 002e.f PNP: 004e.0 PCI: 00:14.4 child on link 0 PCI: 08:01.0 PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24 PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 08:01.0 PCI: 08:01.0 resource base 0 size 800000 align 23 gran 23 limit ffffffff flags 200 index 10 PCI: 08:01.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 14 PCI: 08:01.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 18 PCI: 08:02.0 PCI: 08:02.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 08:03.0 PCI: 00:14.5 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 PCI: 00:18.1 PCI: 00:18.2 PCI: 00:18.3 PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94 PCI: 00:18.4 PCI: 00:18.5 PCI: 00:19.0 PCI: 00:19.1 PCI: 00:19.2 PCI: 00:19.3 PCI: 00:19.4 PCI: 00:19.5 PCI: 00:1a.0 PCI: 00:1a.1 PCI: 00:1a.2 PCI: 00:1a.3 PCI: 00:1a.4 PCI: 00:1a.5 PCI: 00:1b.0 PCI: 00:1b.1 PCI: 00:1b.2 PCI: 00:1b.3 PCI: 00:1b.4 PCI: 00:1b.5 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff PCI: 00:18.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:02.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 00:02.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done PCI: 00:09.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 03:00.0 18 * [0x0 - 0x1f] io PCI: 00:09.0 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:0a.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 04:00.0 18 * [0x0 - 0x1f] io PCI: 00:0a.0 io: base: 20 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 00:0b.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 00:0c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done PCI: 00:0d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff PCI: 07:00.0 18 * [0x0 - 0x1f] io PCI: 07:00.1 18 * [0x20 - 0x3f] io PCI: 00:0d.0 io: base: 40 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 08:01.0 18 * [0x0 - 0x7f] io PCI: 00:14.4 io: base: 80 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:09.0 1c * [0x0 - 0xfff] io PCI: 00:0a.0 1c * [0x1000 - 0x1fff] io PCI: 00:0d.0 1c * [0x2000 - 0x2fff] io PCI: 00:14.4 1c * [0x3000 - 0x3fff] io PCI: 00:11.0 20 * [0x4000 - 0x400f] io PCI: 00:14.1 20 * [0x4010 - 0x401f] io PCI: 00:11.0 10 * [0x4020 - 0x4027] io PCI: 00:11.0 18 * [0x4028 - 0x402f] io PCI: 00:14.1 10 * [0x4030 - 0x4037] io PCI: 00:14.1 18 * [0x4038 - 0x403f] io PCI: 00:11.0 14 * [0x4040 - 0x4043] io PCI: 00:11.0 1c * [0x4044 - 0x4047] io PCI: 00:14.1 14 * [0x4048 - 0x404b] io PCI: 00:14.1 1c * [0x404c - 0x404f] io PCI: 00:18.0 io: base: 4050 size: 5000 align: 12 gran: 12 limit: ffff done PCI: 00:18.0 110d8 * [0x0 - 0x4fff] io DOMAIN: 0000 io: base: 5000 size: 5000 align: 12 gran: 0 limit: ffff done DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff PCI: 00:18.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff PCI: 00:02.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:02.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:09.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:0a.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:0a.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:0b.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:0c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:0d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 07:00.0 10 * [0x0 - 0x7ffff] prefmem PCI: 07:00.1 10 * [0x80000 - 0xfffff] prefmem PCI: 07:00.0 20 * [0x100000 - 0x103fff] prefmem PCI: 07:00.1 20 * [0x104000 - 0x107fff] prefmem PCI: 00:0d.0 prefmem: base: 108000 size: 200000 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:0d.0 24 * [0x0 - 0x1fffff] prefmem PCI: 00:00.0 fc * [0x200000 - 0x2000ff] prefmem PCI: 00:18.0 prefmem: base: 200100 size: 300000 align: 20 gran: 20 limit: ffffffff done PCI: 00:18.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff PCI: 00:02.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:02.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:09.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 03:00.0 10 * [0x0 - 0x1ffff] mem PCI: 03:00.0 1c * [0x20000 - 0x23fff] mem PCI: 00:09.0 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:0a.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 04:00.0 10 * [0x0 - 0x1ffff] mem PCI: 04:00.0 1c * [0x20000 - 0x23fff] mem PCI: 00:0a.0 mem: base: 24000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:0b.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:0b.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:0c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:0c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:0d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 08:01.0 10 * [0x0 - 0x7fffff] mem PCI: 08:01.0 14 * [0x800000 - 0x81ffff] mem PCI: 08:02.0 10 * [0x820000 - 0x820fff] mem PCI: 00:14.4 mem: base: 821000 size: 900000 align: 23 gran: 20 limit: ffffffff done PCI: 00:14.4 20 * [0x0 - 0x8fffff] mem PCI: 00:09.0 20 * [0x900000 - 0x9fffff] mem PCI: 00:0a.0 20 * [0xa00000 - 0xafffff] mem PCI: 00:00.2 44 * [0xb00000 - 0xb03fff] mem PCI: 00:14.2 10 * [0xb04000 - 0xb07fff] mem PCI: 00:12.0 10 * [0xb08000 - 0xb08fff] mem PCI: 00:12.1 10 * [0xb09000 - 0xb09fff] mem PCI: 00:13.0 10 * [0xb0a000 - 0xb0afff] mem PCI: 00:13.1 10 * [0xb0b000 - 0xb0bfff] mem PCI: 00:14.5 10 * [0xb0c000 - 0xb0cfff] mem PCI: 00:11.0 24 * [0xb0d000 - 0xb0d3ff] mem PCI: 00:12.2 10 * [0xb0e000 - 0xb0e0ff] mem PCI: 00:13.2 10 * [0xb0f000 - 0xb0f0ff] mem PCI: 00:14.3 a0 * [0xb10000 - 0xb10000] mem PCI: 00:18.0 mem: base: b10001 size: c00000 align: 23 gran: 20 limit: ffffffff done PCI: 00:18.3 94 * [0x0 - 0x3ffffff] mem PCI: 00:18.0 110b8 * [0x4000000 - 0x4bfffff] mem PCI: 00:18.0 110b0 * [0x4c00000 - 0x4efffff] prefmem DOMAIN: 0000 mem: base: 4f00000 size: 4f00000 align: 26 gran: 0 limit: ffffffff done avoid_fixed_resources: DOMAIN: 0000 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff constrain_resources: DOMAIN: 0000 c0010058 base c0000000 limit cfffffff mem (fixed) constrain_resources: DOMAIN: 0000 07 base 00000000 limit bfffffff mem (fixed) constrain_resources: DOMAIN: 0000 08 base 2038000000 limit 203fffffff mem (fixed) constrain_resources: PCI: 00:14.0 74 base fec00000 limit fec00fff mem (fixed) constrain_resources: PCI: 00:14.0 b4 base fed00000 limit fed003ff mem (fixed) constrain_resources: PCI: 00:14.0 90 base 00000b00 limit 00000b0f io (fixed) constrain_resources: PCI: 00:14.0 58 base 00000b20 limit 00000b2f io (fixed) constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed) constrain_resources: PCI: 00:14.3 10000100 base ff800000 limit ffffffff mem (fixed) avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 base f8000000 limit ffffffff Setting resources... DOMAIN: 0000 io: base:1000 size:5000 align:12 gran:0 limit:ffff PCI: 00:18.0 110d8 * [0x1000 - 0x5fff] io DOMAIN: 0000 io: next_base: 6000 size: 5000 align: 12 gran: 0 done PCI: 00:18.0 io: base:1000 size:5000 align:12 gran:12 limit:5fff PCI: 00:09.0 1c * [0x1000 - 0x1fff] io PCI: 00:0a.0 1c * [0x2000 - 0x2fff] io PCI: 00:0d.0 1c * [0x3000 - 0x3fff] io PCI: 00:14.4 1c * [0x4000 - 0x4fff] io PCI: 00:11.0 20 * [0x5000 - 0x500f] io PCI: 00:14.1 20 * [0x5010 - 0x501f] io PCI: 00:11.0 10 * [0x5020 - 0x5027] io PCI: 00:11.0 18 * [0x5028 - 0x502f] io PCI: 00:14.1 10 * [0x5030 - 0x5037] io PCI: 00:14.1 18 * [0x5038 - 0x503f] io PCI: 00:11.0 14 * [0x5040 - 0x5043] io PCI: 00:11.0 1c * [0x5044 - 0x5047] io PCI: 00:14.1 14 * [0x5048 - 0x504b] io PCI: 00:14.1 1c * [0x504c - 0x504f] io PCI: 00:18.0 io: next_base: 5050 size: 5000 align: 12 gran: 12 done PCI: 00:02.0 io: base:5fff size:0 align:12 gran:12 limit:5fff PCI: 00:02.0 io: next_base: 5fff size: 0 align: 12 gran: 12 done PCI: 00:04.0 io: base:5fff size:0 align:12 gran:12 limit:5fff PCI: 00:04.0 io: next_base: 5fff size: 0 align: 12 gran: 12 done PCI: 00:09.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff PCI: 03:00.0 18 * [0x1000 - 0x101f] io PCI: 00:09.0 io: next_base: 1020 size: 1000 align: 12 gran: 12 done PCI: 00:0a.0 io: base:2000 size:1000 align:12 gran:12 limit:2fff PCI: 04:00.0 18 * [0x2000 - 0x201f] io PCI: 00:0a.0 io: next_base: 2020 size: 1000 align: 12 gran: 12 done PCI: 00:0b.0 io: base:5fff size:0 align:12 gran:12 limit:5fff PCI: 00:0b.0 io: next_base: 5fff size: 0 align: 12 gran: 12 done PCI: 00:0c.0 io: base:5fff size:0 align:12 gran:12 limit:5fff PCI: 00:0c.0 io: next_base: 5fff size: 0 align: 12 gran: 12 done PCI: 00:0d.0 io: base:3000 size:1000 align:12 gran:12 limit:3fff PCI: 07:00.0 18 * [0x3000 - 0x301f] io PCI: 07:00.1 18 * [0x3020 - 0x303f] io PCI: 00:0d.0 io: next_base: 3040 size: 1000 align: 12 gran: 12 done PCI: 00:14.4 io: base:4000 size:1000 align:12 gran:12 limit:4fff PCI: 08:01.0 18 * [0x4000 - 0x407f] io PCI: 00:14.4 io: next_base: 4080 size: 1000 align: 12 gran: 12 done DOMAIN: 0000 mem: base:f8000000 size:4f00000 align:26 gran:0 limit:ffffffff PCI: 00:18.3 94 * [0xf8000000 - 0xfbffffff] mem PCI: 00:18.0 110b8 * [0xfc000000 - 0xfcbfffff] mem PCI: 00:18.0 110b0 * [0xfcc00000 - 0xfcefffff] prefmem DOMAIN: 0000 mem: next_base: fcf00000 size: 4f00000 align: 26 gran: 0 done PCI: 00:18.0 prefmem: base:fcc00000 size:300000 align:20 gran:20 limit:fcefffff PCI: 00:0d.0 24 * [0xfcc00000 - 0xfcdfffff] prefmem PCI: 00:00.0 fc * [0xfce00000 - 0xfce000ff] prefmem PCI: 00:18.0 prefmem: next_base: fce00100 size: 300000 align: 20 gran: 20 done PCI: 00:02.0 prefmem: base:fcefffff size:0 align:20 gran:20 limit:fcefffff PCI: 00:02.0 prefmem: next_base: fcefffff size: 0 align: 20 gran: 20 done PCI: 00:04.0 prefmem: base:fcefffff size:0 align:20 gran:20 limit:fcefffff PCI: 00:04.0 prefmem: next_base: fcefffff size: 0 align: 20 gran: 20 done PCI: 00:09.0 prefmem: base:fcefffff size:0 align:20 gran:20 limit:fcefffff PCI: 00:09.0 prefmem: next_base: fcefffff size: 0 align: 20 gran: 20 done PCI: 00:0a.0 prefmem: base:fcefffff size:0 align:20 gran:20 limit:fcefffff PCI: 00:0a.0 prefmem: next_base: fcefffff size: 0 align: 20 gran: 20 done PCI: 00:0b.0 prefmem: base:fcefffff size:0 align:20 gran:20 limit:fcefffff PCI: 00:0b.0 prefmem: next_base: fcefffff size: 0 align: 20 gran: 20 done PCI: 00:0c.0 prefmem: base:fcefffff size:0 align:20 gran:20 limit:fcefffff PCI: 00:0c.0 prefmem: next_base: fcefffff size: 0 align: 20 gran: 20 done PCI: 00:0d.0 prefmem: base:fcc00000 size:200000 align:20 gran:20 limit:fcdfffff PCI: 07:00.0 10 * [0xfcc00000 - 0xfcc7ffff] prefmem PCI: 07:00.1 10 * [0xfcc80000 - 0xfccfffff] prefmem PCI: 07:00.0 20 * [0xfcd00000 - 0xfcd03fff] prefmem PCI: 07:00.1 20 * [0xfcd04000 - 0xfcd07fff] prefmem PCI: 00:0d.0 prefmem: next_base: fcd08000 size: 200000 align: 20 gran: 20 done PCI: 00:14.4 prefmem: base:fcefffff size:0 align:20 gran:20 limit:fcefffff PCI: 00:14.4 prefmem: next_base: fcefffff size: 0 align: 20 gran: 20 done PCI: 00:18.0 mem: base:fc000000 size:c00000 align:23 gran:20 limit:fcbfffff PCI: 00:14.4 20 * [0xfc000000 - 0xfc8fffff] mem PCI: 00:09.0 20 * [0xfc900000 - 0xfc9fffff] mem PCI: 00:0a.0 20 * [0xfca00000 - 0xfcafffff] mem PCI: 00:00.2 44 * [0xfcb00000 - 0xfcb03fff] mem PCI: 00:14.2 10 * [0xfcb04000 - 0xfcb07fff] mem PCI: 00:12.0 10 * [0xfcb08000 - 0xfcb08fff] mem PCI: 00:12.1 10 * [0xfcb09000 - 0xfcb09fff] mem PCI: 00:13.0 10 * [0xfcb0a000 - 0xfcb0afff] mem PCI: 00:13.1 10 * [0xfcb0b000 - 0xfcb0bfff] mem PCI: 00:14.5 10 * [0xfcb0c000 - 0xfcb0cfff] mem PCI: 00:11.0 24 * [0xfcb0d000 - 0xfcb0d3ff] mem PCI: 00:12.2 10 * [0xfcb0e000 - 0xfcb0e0ff] mem PCI: 00:13.2 10 * [0xfcb0f000 - 0xfcb0f0ff] mem PCI: 00:14.3 a0 * [0xfcb10000 - 0xfcb10000] mem PCI: 00:18.0 mem: next_base: fcb10001 size: c00000 align: 23 gran: 20 done PCI: 00:02.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff PCI: 00:02.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done PCI: 00:04.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff PCI: 00:04.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done PCI: 00:09.0 mem: base:fc900000 size:100000 align:20 gran:20 limit:fc9fffff PCI: 03:00.0 10 * [0xfc900000 - 0xfc91ffff] mem PCI: 03:00.0 1c * [0xfc920000 - 0xfc923fff] mem PCI: 00:09.0 mem: next_base: fc924000 size: 100000 align: 20 gran: 20 done PCI: 00:0a.0 mem: base:fca00000 size:100000 align:20 gran:20 limit:fcafffff PCI: 04:00.0 10 * [0xfca00000 - 0xfca1ffff] mem PCI: 04:00.0 1c * [0xfca20000 - 0xfca23fff] mem PCI: 00:0a.0 mem: next_base: fca24000 size: 100000 align: 20 gran: 20 done PCI: 00:0b.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff PCI: 00:0b.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done PCI: 00:0c.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff PCI: 00:0c.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done PCI: 00:0d.0 mem: base:fcbfffff size:0 align:20 gran:20 limit:fcbfffff PCI: 00:0d.0 mem: next_base: fcbfffff size: 0 align: 20 gran: 20 done PCI: 00:14.4 mem: base:fc000000 size:900000 align:23 gran:20 limit:fc8fffff PCI: 08:01.0 10 * [0xfc000000 - 0xfc7fffff] mem PCI: 08:01.0 14 * [0xfc800000 - 0xfc81ffff] mem PCI: 08:02.0 10 * [0xfc820000 - 0xfc820fff] mem PCI: 00:14.4 mem: next_base: fc821000 size: 900000 align: 23 gran: 20 done Root Device assign_resources, bus 0 link: 0 0: mmio_basek=00300000, basek=00400000, limitk=02100000 1: mmio_basek=00300000, basek=02100000, limitk=04100000 2: mmio_basek=00300000, basek=04100000, limitk=06100000 3: mmio_basek=00300000, basek=06100000, limitk=08100000 DOMAIN: 0000 assign_resources, bus 0 link: 0 VGA: PCI: 00:18.0 (aka node 0) link 1 has VGA device PCI: 00:18.0 111b8 <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran 0x00 mem PCI: 00:18.0 110b0 <- [0x00fcc00000 - 0x00fcefffff] size 0x00300000 gran 0x14 prefmem PCI: 00:18.0 110b8 <- [0x00fc000000 - 0x00fcbfffff] size 0x00c00000 gran 0x14 mem PCI: 00:18.0 110d8 <- [0x0000001000 - 0x0000005fff] size 0x00005000 gran 0x0c io PCI: 00:18.0 assign_resources, bus 0 link: 1 PCI: 00:00.0 sr5690_set_resources sr5690_set_resources: PCI: 00:00.0[0x1c] base = c0000000 limit = cfffffff PCI: 00:00.0 c0010058 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x00 mem sr5690_set_resources: PCI: 00:18.1 <- index a8 base c00003 limit cfff90 PCI: 00:00.0 fc <- [0x00fce00000 - 0x00fce000ff] size 0x00000100 gran 0x08 prefmem CBFS: 'Master Header Locator' located CBFS at [100:ffffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 2ad80 size e88 PCI: 00:00.2 44 <- [0x00fcb00000 - 0x00fcb03fff] size 0x00004000 gran 0x0e mem PCI: 00:02.0 1c <- [0x0000005fff - 0x0000005ffe] size 0x00000000 gran 0x0c bus 01 io PCI: 00:02.0 24 <- [0x00fcefffff - 0x00fceffffe] size 0x00000000 gran 0x14 bus 01 prefmem PCI: 00:02.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 01 mem PCI: 00:04.0 1c <- [0x0000005fff - 0x0000005ffe] size 0x00000000 gran 0x0c bus 02 io PCI: 00:04.0 24 <- [0x00fcefffff - 0x00fceffffe] size 0x00000000 gran 0x14 bus 02 prefmem PCI: 00:04.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 02 mem PCI: 00:09.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 03 io PCI: 00:09.0 24 <- [0x00fcefffff - 0x00fceffffe] size 0x00000000 gran 0x14 bus 03 prefmem PCI: 00:09.0 20 <- [0x00fc900000 - 0x00fc9fffff] size 0x00100000 gran 0x14 bus 03 mem PCI: 00:09.0 assign_resources, bus 3 link: 0 PCI: 03:00.0 10 <- [0x00fc900000 - 0x00fc91ffff] size 0x00020000 gran 0x11 mem PCI: 03:00.0 18 <- [0x0000001000 - 0x000000101f] size 0x00000020 gran 0x05 io PCI: 03:00.0 1c <- [0x00fc920000 - 0x00fc923fff] size 0x00004000 gran 0x0e mem PCI: 00:09.0 assign_resources, bus 3 link: 0 PCI: 00:0a.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 04 io PCI: 00:0a.0 24 <- [0x00fcefffff - 0x00fceffffe] size 0x00000000 gran 0x14 bus 04 prefmem PCI: 00:0a.0 20 <- [0x00fca00000 - 0x00fcafffff] size 0x00100000 gran 0x14 bus 04 mem PCI: 00:0a.0 assign_resources, bus 4 link: 0 PCI: 04:00.0 10 <- [0x00fca00000 - 0x00fca1ffff] size 0x00020000 gran 0x11 mem PCI: 04:00.0 18 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io PCI: 04:00.0 1c <- [0x00fca20000 - 0x00fca23fff] size 0x00004000 gran 0x0e mem PCI: 00:0a.0 assign_resources, bus 4 link: 0 PCI: 00:0b.0 1c <- [0x0000005fff - 0x0000005ffe] size 0x00000000 gran 0x0c bus 05 io PCI: 00:0b.0 24 <- [0x00fcefffff - 0x00fceffffe] size 0x00000000 gran 0x14 bus 05 prefmem PCI: 00:0b.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 05 mem PCI: 00:0c.0 1c <- [0x0000005fff - 0x0000005ffe] size 0x00000000 gran 0x0c bus 06 io PCI: 00:0c.0 24 <- [0x00fcefffff - 0x00fceffffe] size 0x00000000 gran 0x14 bus 06 prefmem PCI: 00:0c.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 06 mem PCI: 00:0d.0 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 07 io PCI: 00:0d.0 24 <- [0x00fcc00000 - 0x00fcdfffff] size 0x00200000 gran 0x14 bus 07 prefmem PCI: 00:0d.0 20 <- [0x00fcbfffff - 0x00fcbffffe] size 0x00000000 gran 0x14 bus 07 mem PCI: 00:0d.0 assign_resources, bus 7 link: 0 PCI: 07:00.0 10 <- [0x00fcc00000 - 0x00fcc7ffff] size 0x00080000 gran 0x13 prefmem64 PCI: 07:00.0 18 <- [0x0000003000 - 0x000000301f] size 0x00000020 gran 0x05 io PCI: 07:00.0 20 <- [0x00fcd00000 - 0x00fcd03fff] size 0x00004000 gran 0x0e prefmem64 PCI: 07:00.1 10 <- [0x00fcc80000 - 0x00fccfffff] size 0x00080000 gran 0x13 prefmem64 PCI: 07:00.1 18 <- [0x0000003020 - 0x000000303f] size 0x00000020 gran 0x05 io PCI: 07:00.1 20 <- [0x00fcd04000 - 0x00fcd07fff] size 0x00004000 gran 0x0e prefmem64 PCI: 00:0d.0 assign_resources, bus 7 link: 0 PCI: 00:11.0 10 <- [0x0000005020 - 0x0000005027] size 0x00000008 gran 0x03 io PCI: 00:11.0 14 <- [0x0000005040 - 0x0000005043] size 0x00000004 gran 0x02 io PCI: 00:11.0 18 <- [0x0000005028 - 0x000000502f] size 0x00000008 gran 0x03 io PCI: 00:11.0 1c <- [0x0000005044 - 0x0000005047] size 0x00000004 gran 0x02 io PCI: 00:11.0 20 <- [0x0000005000 - 0x000000500f] size 0x00000010 gran 0x04 io PCI: 00:11.0 24 <- [0x00fcb0d000 - 0x00fcb0d3ff] size 0x00000400 gran 0x0a mem PCI: 00:12.0 10 <- [0x00fcb08000 - 0x00fcb08fff] size 0x00001000 gran 0x0c mem PCI: 00:12.1 10 <- [0x00fcb09000 - 0x00fcb09fff] size 0x00001000 gran 0x0c mem PCI: 00:12.2 10 <- [0x00fcb0e000 - 0x00fcb0e0ff] size 0x00000100 gran 0x08 mem PCI: 00:13.0 10 <- [0x00fcb0a000 - 0x00fcb0afff] size 0x00001000 gran 0x0c mem PCI: 00:13.1 10 <- [0x00fcb0b000 - 0x00fcb0bfff] size 0x00001000 gran 0x0c mem PCI: 00:13.2 10 <- [0x00fcb0f000 - 0x00fcb0f0ff] size 0x00000100 gran 0x08 mem PCI: 00:14.0 assign_resources, bus 1 link: 0 PCI: 00:14.0 assign_resources, bus 1 link: 0 PCI: 00:14.1 10 <- [0x0000005030 - 0x0000005037] size 0x00000008 gran 0x03 io PCI: 00:14.1 14 <- [0x0000005048 - 0x000000504b] size 0x00000004 gran 0x02 io PCI: 00:14.1 18 <- [0x0000005038 - 0x000000503f] size 0x00000008 gran 0x03 io PCI: 00:14.1 1c <- [0x000000504c - 0x000000504f] size 0x00000004 gran 0x02 io PCI: 00:14.1 20 <- [0x0000005010 - 0x000000501f] size 0x00000010 gran 0x04 io PCI: 00:14.2 10 <- [0x00fcb04000 - 0x00fcb07fff] size 0x00004000 gran 0x0e mem64 PCI: 00:14.3 a0 <- [0x00fcb10000 - 0x00fcb10000] size 0x00000001 gran 0x00 mem PCI: 00:14.3 assign_resources, bus 0 link: 0 PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq PNP: 002e.b 60 <- [0x0000000290 - 0x0000000291] size 0x00000002 gran 0x01 io ERROR: PNP: 002e.b 70 irq size: 0x0000000001 not assigned PCI: 00:14.3 assign_resources, bus 0 link: 0 PCI: 00:14.4 1c <- [0x0000004000 - 0x0000004fff] size 0x00001000 gran 0x0c bus 08 io PCI: 00:14.4 24 <- [0x00fcefffff - 0x00fceffffe] size 0x00000000 gran 0x14 bus 08 prefmem PCI: 00:14.4 20 <- [0x00fc000000 - 0x00fc8fffff] size 0x00900000 gran 0x14 bus 08 mem PCI: 00:14.4 assign_resources, bus 8 link: 0 PCI: 08:01.0 10 <- [0x00fc000000 - 0x00fc7fffff] size 0x00800000 gran 0x17 mem PCI: 08:01.0 14 <- [0x00fc800000 - 0x00fc81ffff] size 0x00020000 gran 0x11 mem PCI: 08:01.0 18 <- [0x0000004000 - 0x000000407f] size 0x00000080 gran 0x07 io PCI: 08:02.0 10 <- [0x00fc820000 - 0x00fc820fff] size 0x00001000 gran 0x0c mem PCI: 00:14.4 assign_resources, bus 8 link: 0 PCI: 00:14.5 10 <- [0x00fcb0c000 - 0x00fcb0cfff] size 0x00001000 gran 0x0c mem PCI: 00:18.0 assign_resources, bus 0 link: 1 PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem PCI: 00:19.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem PCI: 00:1a.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem PCI: 00:1b.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: 01 APIC: 02 APIC: 03 APIC: 04 APIC: 05 APIC: 06 APIC: 07 APIC: 08 APIC: 09 APIC: 0a APIC: 0b APIC: 0c APIC: 0d APIC: 0e APIC: 0f APIC: 20 APIC: 21 APIC: 22 APIC: 23 APIC: 24 APIC: 25 APIC: 26 APIC: 27 APIC: 28 APIC: 29 APIC: 2a APIC: 2b APIC: 2c APIC: 2d APIC: 2e APIC: 2f DOMAIN: 0000 child on link 0 PCI: 00:18.0 DOMAIN: 0000 resource base 1000 size 5000 align 12 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base f8000000 size 4f00000 align 26 gran 0 limit ffffffff flags 40040200 index 10000100 DOMAIN: 0000 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 DOMAIN: 0000 resource base 0 size c0000000 align 0 gran 0 limit 0 flags e0004200 index 7 DOMAIN: 0000 resource base 2038000000 size 8000000 align 0 gran 0 limit 0 flags f0004200 index 8 DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10 DOMAIN: 0000 resource base c0000 size bff40000 align 0 gran 0 limit 0 flags e0004200 index 20 DOMAIN: 0000 resource base 100000000 size 740000000 align 0 gran 0 limit 0 flags e0004200 index 30 DOMAIN: 0000 resource base 840000000 size 800000000 align 0 gran 0 limit 0 flags e0004200 index 41 DOMAIN: 0000 resource base 1040000000 size 800000000 align 0 gran 0 limit 0 flags e0004200 index 52 DOMAIN: 0000 resource base 1840000000 size 800000000 align 0 gran 0 limit 0 flags e0004200 index 63 PCI: 00:18.0 PCI: 00:18.0 resource base fcc00000 size 300000 align 20 gran 20 limit fcefffff flags 60081200 index 110b0 PCI: 00:18.0 resource base fc000000 size c00000 align 23 gran 20 limit fcbfffff flags 60080200 index 110b8 PCI: 00:18.0 resource base 1000 size 5000 align 12 gran 12 limit 5fff flags 60080100 index 110d8 PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags e0000200 index 111b8 PCI: 00:00.0 PCI: 00:00.0 resource base fce00000 size 100 align 12 gran 8 limit fce000ff flags 60001200 index fc PCI: 00:00.1 PCI: 00:00.2 PCI: 00:00.2 resource base fcb00000 size 4000 align 14 gran 14 limit fcb03fff flags 70000200 index 44 PCI: 00:02.0 PCI: 00:02.0 resource base 5fff size 0 align 12 gran 12 limit 5fff flags 60080102 index 1c PCI: 00:02.0 resource base fcefffff size 0 align 20 gran 20 limit fcefffff flags 60081202 index 24 PCI: 00:02.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20 PCI: 00:03.0 PCI: 00:04.0 PCI: 00:04.0 resource base 5fff size 0 align 12 gran 12 limit 5fff flags 60080102 index 1c PCI: 00:04.0 resource base fcefffff size 0 align 20 gran 20 limit fcefffff flags 60081202 index 24 PCI: 00:04.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20 PCI: 00:05.0 PCI: 00:06.0 PCI: 00:07.0 PCI: 00:08.0 PCI: 00:09.0 child on link 0 PCI: 03:00.0 PCI: 00:09.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c PCI: 00:09.0 resource base fcefffff size 0 align 20 gran 20 limit fcefffff flags 60081202 index 24 PCI: 00:09.0 resource base fc900000 size 100000 align 20 gran 20 limit fc9fffff flags 60080202 index 20 PCI: 03:00.0 PCI: 03:00.0 resource base fc900000 size 20000 align 17 gran 17 limit fc91ffff flags 60000200 index 10 PCI: 03:00.0 resource base 1000 size 20 align 5 gran 5 limit 101f flags 60000100 index 18 PCI: 03:00.0 resource base fc920000 size 4000 align 14 gran 14 limit fc923fff flags 60000200 index 1c PCI: 00:0a.0 child on link 0 PCI: 04:00.0 PCI: 00:0a.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c PCI: 00:0a.0 resource base fcefffff size 0 align 20 gran 20 limit fcefffff flags 60081202 index 24 PCI: 00:0a.0 resource base fca00000 size 100000 align 20 gran 20 limit fcafffff flags 60080202 index 20 PCI: 04:00.0 PCI: 04:00.0 resource base fca00000 size 20000 align 17 gran 17 limit fca1ffff flags 60000200 index 10 PCI: 04:00.0 resource base 2000 size 20 align 5 gran 5 limit 201f flags 60000100 index 18 PCI: 04:00.0 resource base fca20000 size 4000 align 14 gran 14 limit fca23fff flags 60000200 index 1c PCI: 00:0b.0 PCI: 00:0b.0 resource base 5fff size 0 align 12 gran 12 limit 5fff flags 60080102 index 1c PCI: 00:0b.0 resource base fcefffff size 0 align 20 gran 20 limit fcefffff flags 60081202 index 24 PCI: 00:0b.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20 PCI: 00:0c.0 PCI: 00:0c.0 resource base 5fff size 0 align 12 gran 12 limit 5fff flags 60080102 index 1c PCI: 00:0c.0 resource base fcefffff size 0 align 20 gran 20 limit fcefffff flags 60081202 index 24 PCI: 00:0c.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20 PCI: 00:0d.0 child on link 0 PCI: 07:00.0 PCI: 00:0d.0 resource base 3000 size 1000 align 12 gran 12 limit 3fff flags 60080102 index 1c PCI: 00:0d.0 resource base fcc00000 size 200000 align 20 gran 20 limit fcdfffff flags 60081202 index 24 PCI: 00:0d.0 resource base fcbfffff size 0 align 20 gran 20 limit fcbfffff flags 60080202 index 20 PCI: 07:00.0 PCI: 07:00.0 resource base fcc00000 size 80000 align 19 gran 19 limit fcc7ffff flags 60001201 index 10 PCI: 07:00.0 resource base 3000 size 20 align 5 gran 5 limit 301f flags 60000100 index 18 PCI: 07:00.0 resource base fcd00000 size 4000 align 14 gran 14 limit fcd03fff flags 60001201 index 20 PCI: 07:00.1 PCI: 07:00.1 resource base fcc80000 size 80000 align 19 gran 19 limit fccfffff flags 60001201 index 10 PCI: 07:00.1 resource base 3020 size 20 align 5 gran 5 limit 303f flags 60000100 index 18 PCI: 07:00.1 resource base fcd04000 size 4000 align 14 gran 14 limit fcd07fff flags 60001201 index 20 PCI: 00:11.0 PCI: 00:11.0 resource base 5020 size 8 align 3 gran 3 limit 5027 flags 60000100 index 10 PCI: 00:11.0 resource base 5040 size 4 align 2 gran 2 limit 5043 flags 60000100 index 14 PCI: 00:11.0 resource base 5028 size 8 align 3 gran 3 limit 502f flags 60000100 index 18 PCI: 00:11.0 resource base 5044 size 4 align 2 gran 2 limit 5047 flags 60000100 index 1c PCI: 00:11.0 resource base 5000 size 10 align 4 gran 4 limit 500f flags 60000100 index 20 PCI: 00:11.0 resource base fcb0d000 size 400 align 12 gran 10 limit fcb0d3ff flags 60000200 index 24 PCI: 00:12.0 PCI: 00:12.0 resource base fcb08000 size 1000 align 12 gran 12 limit fcb08fff flags 60000200 index 10 PCI: 00:12.1 PCI: 00:12.1 resource base fcb09000 size 1000 align 12 gran 12 limit fcb09fff flags 60000200 index 10 PCI: 00:12.2 PCI: 00:12.2 resource base fcb0e000 size 100 align 12 gran 8 limit fcb0e0ff flags 60000200 index 10 PCI: 00:13.0 PCI: 00:13.0 resource base fcb0a000 size 1000 align 12 gran 12 limit fcb0afff flags 60000200 index 10 PCI: 00:13.1 PCI: 00:13.1 resource base fcb0b000 size 1000 align 12 gran 12 limit fcb0bfff flags 60000200 index 10 PCI: 00:13.2 PCI: 00:13.2 resource base fcb0f000 size 100 align 12 gran 8 limit fcb0f0ff flags 60000200 index 10 PCI: 00:14.0 child on link 0 I2C: 01:50 PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 74 PCI: 00:14.0 resource base feb00000 size 1000 align 8 gran 8 limit ffffffff flags d0000200 index 9c PCI: 00:14.0 resource base fed00000 size 400 align 8 gran 8 limit ffffffff flags d0000200 index b4 PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags d0000100 index 90 PCI: 00:14.0 resource base b20 size 10 align 8 gran 8 limit ffff flags d0000100 index 58 I2C: 01:50 I2C: 01:51 I2C: 01:52 I2C: 01:53 I2C: 01:54 I2C: 01:55 I2C: 01:56 I2C: 01:57 I2C: 01:2f PCI: 00:14.1 PCI: 00:14.1 resource base 5030 size 8 align 3 gran 3 limit 5037 flags 60000100 index 10 PCI: 00:14.1 resource base 5048 size 4 align 2 gran 2 limit 504b flags 60000100 index 14 PCI: 00:14.1 resource base 5038 size 8 align 3 gran 3 limit 503f flags 60000100 index 18 PCI: 00:14.1 resource base 504c size 4 align 2 gran 2 limit 504f flags 60000100 index 1c PCI: 00:14.1 resource base 5010 size 10 align 4 gran 4 limit 501f flags 60000100 index 20 PCI: 00:14.2 PCI: 00:14.2 resource base fcb04000 size 4000 align 14 gran 14 limit fcb07fff flags 60000201 index 10 PCI: 00:14.3 child on link 0 PNP: 002e.0 PCI: 00:14.3 resource base fcb10000 size 1 align 12 gran 0 limit fcb10000 flags 60000200 index a0 PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PNP: 002e.0 PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 002e.1 PNP: 002e.1 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60 PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 002e.2 PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60 PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 002e.3 PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60 PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 002e.5 PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60 PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62 PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70 PNP: 002e.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72 PNP: 002e.106 PNP: 002e.106 resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 62 PNP: 002e.107 PNP: 002e.207 PNP: 002e.307 PNP: 002e.407 PNP: 002e.8 PNP: 002e.108 PNP: 002e.9 PNP: 002e.109 PNP: 002e.209 PNP: 002e.309 PNP: 002e.a PNP: 002e.b PNP: 002e.b resource base 290 size 2 align 1 gran 1 limit fff flags e0000100 index 60 PNP: 002e.b resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 002e.c PNP: 002e.d PNP: 002e.f PNP: 004e.0 PCI: 00:14.4 child on link 0 PCI: 08:01.0 PCI: 00:14.4 resource base 4000 size 1000 align 12 gran 12 limit 4fff flags 60080102 index 1c PCI: 00:14.4 resource base fcefffff size 0 align 20 gran 20 limit fcefffff flags 60081202 index 24 PCI: 00:14.4 resource base fc000000 size 900000 align 23 gran 20 limit fc8fffff flags 60080202 index 20 PCI: 08:01.0 PCI: 08:01.0 resource base fc000000 size 800000 align 23 gran 23 limit fc7fffff flags 60000200 index 10 PCI: 08:01.0 resource base fc800000 size 20000 align 17 gran 17 limit fc81ffff flags 60000200 index 14 PCI: 08:01.0 resource base 4000 size 80 align 7 gran 7 limit 407f flags 60000100 index 18 PCI: 08:01.0 resource base a0000 size 1fc00 align 0 gran 0 limit 0 flags f0000200 index 3 PCI: 08:02.0 PCI: 08:02.0 resource base fc820000 size 1000 align 12 gran 12 limit fc820fff flags 60000200 index 10 PCI: 08:03.0 PCI: 00:14.5 PCI: 00:14.5 resource base fcb0c000 size 1000 align 12 gran 12 limit fcb0cfff flags 60000200 index 10 PCI: 00:18.1 PCI: 00:18.2 PCI: 00:18.3 PCI: 00:18.3 resource base f8000000 size 4000000 align 26 gran 26 limit fbffffff flags 60000200 index 94 PCI: 00:18.4 PCI: 00:18.5 PCI: 00:19.0 PCI: 00:19.1 PCI: 00:19.2 PCI: 00:19.3 PCI: 00:19.4 PCI: 00:19.5 PCI: 00:1a.0 PCI: 00:1a.1 PCI: 00:1a.2 PCI: 00:1a.3 PCI: 00:1a.4 PCI: 00:1a.5 PCI: 00:1b.0 PCI: 00:1b.1 PCI: 00:1b.2 PCI: 00:1b.3 PCI: 00:1b.4 PCI: 00:1b.5 Done allocating resources. BS: BS_DEV_RESOURCES times (us): entry 0 run 3291960 exit 0 Enabling resources... PCI: 00:18.0 cmd <- 00 PCI: 00:18.1 subsystem <- 1043/8163 PCI: 00:18.1 cmd <- 00 PCI: 00:18.2 subsystem <- 1043/8163 PCI: 00:18.2 cmd <- 00 PCI: 00:18.3 cmd <- 00 PCI: 00:18.4 cmd <- 00 PCI: 00:18.5 cmd <- 00 PCI: 00:19.0 cmd <- 00 PCI: 00:19.1 subsystem <- 1043/8163 PCI: 00:19.1 cmd <- 00 PCI: 00:19.2 subsystem <- 1043/8163 PCI: 00:19.2 cmd <- 00 PCI: 00:19.3 cmd <- 00 PCI: 00:19.4 cmd <- 00 PCI: 00:19.5 cmd <- 00 PCI: 00:1a.0 cmd <- 00 PCI: 00:1a.1 subsystem <- 1043/8163 PCI: 00:1a.1 cmd <- 00 PCI: 00:1a.2 subsystem <- 1043/8163 PCI: 00:1a.2 cmd <- 00 PCI: 00:1a.3 cmd <- 00 PCI: 00:1a.4 cmd <- 00 PCI: 00:1a.5 cmd <- 00 PCI: 00:1b.0 cmd <- 00 PCI: 00:1b.1 subsystem <- 1043/8163 PCI: 00:1b.1 cmd <- 00 PCI: 00:1b.2 subsystem <- 1043/8163 PCI: 00:1b.2 cmd <- 00 PCI: 00:1b.3 cmd <- 00 PCI: 00:1b.4 cmd <- 00 PCI: 00:1b.5 cmd <- 00 PCI: 00:00.0 subsystem <- 1043/8163 PCI: 00:00.0 cmd <- 02 CBFS: 'Master Header Locator' located CBFS at [100:ffffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 2ad80 size e88 Initializing IOMMU PCI: 00:02.0 bridge ctrl <- 0003 PCI: 00:02.0 cmd <- 00 PCI: 00:04.0 bridge ctrl <- 0003 PCI: 00:04.0 cmd <- 00 PCI: 00:09.0 bridge ctrl <- 0003 PCI: 00:09.0 cmd <- 07 PCI: 00:0a.0 bridge ctrl <- 0003 PCI: 00:0a.0 cmd <- 07 PCI: 00:0b.0 bridge ctrl <- 0003 PCI: 00:0b.0 cmd <- 00 PCI: 00:0c.0 bridge ctrl <- 0003 PCI: 00:0c.0 cmd <- 00 PCI: 00:0d.0 bridge ctrl <- 0003 PCI: 00:0d.0 cmd <- 07 PCI: 00:11.0 subsystem <- 1043/8163 PCI: 00:11.0 cmd <- 03 PCI: 00:12.0 subsystem <- 1043/8163 PCI: 00:12.0 cmd <- 02 PCI: 00:12.1 subsystem <- 1043/8163 PCI: 00:12.1 cmd <- 02 PCI: 00:12.2 subsystem <- 1043/8163 PCI: 00:12.2 cmd <- 02 PCI: 00:13.0 subsystem <- 1043/8163 PCI: 00:13.0 cmd <- 02 PCI: 00:13.1 subsystem <- 1043/8163 PCI: 00:13.1 cmd <- 02 PCI: 00:13.2 subsystem <- 1043/8163 PCI: 00:13.2 cmd <- 02 PCI: 00:14.0 subsystem <- 1043/8163 PCI: 00:14.0 cmd <- 403 PCI: 00:14.1 subsystem <- 1043/8163 PCI: 00:14.1 cmd <- 01 PCI: 00:14.2 subsystem <- 1043/8163 PCI: 00:14.2 cmd <- 02 PCI: 00:14.3 subsystem <- 1043/8163 PCI: 00:14.3 cmd <- 0f sb700 lpc decode:PNP: 002e.2, base=0x000003f8, end=0x000003ff sb700 lpc decode:PNP: 002e.3, base=0x000002f8, end=0x000002ff sb700 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060 sb700 lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064 sb700 lpc decode:PNP: 002e.b, base=0x00000290, end=0x00000291 PCI: 00:14.4 bridge ctrl <- 000b PCI: 00:14.4 cmd <- 07 PCI: 00:14.5 subsystem <- 1043/8163 PCI: 00:14.5 cmd <- 02 PCI: 03:00.0 cmd <- 03 PCI: 04:00.0 cmd <- 03 PCI: 07:00.0 cmd <- 03 PCI: 07:00.1 cmd <- 03 PCI: 08:01.0 cmd <- 03 PCI: 08:02.0 subsystem <- 1043/8163 PCI: 08:02.0 cmd <- 02 done. BS: BS_DEV_ENABLE times (us): entry 0 run 178674 exit 0 Initializing devices... Root Device init ... Root Device init finished in 1398 usecs CPU_CLUSTER: 0 init ... CBFS: 'Master Header Locator' located CBFS at [100:ffffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 2ad80 size e88 Enabling probe filter Enabling ATM mode CBFS: 'Master Header Locator' located CBFS at [100:ffffc0) CBFS: Locating 'cmos_layout.bin' CBFS: Found @ offset 2ad80 size e88 start_eip=0x00001000, code_size=0x00000031 CPU1: stack_base 00151000, stack_end 00151ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 1. After apic_write. Initializing CPU #1 Startup point 1. Waiting for send to finish... +CPU: vendor AMD device 600f12 After Startup. CPU: family 15, model 01, stepping 02 CPU2: stack_base 00150000, stack_end 00150ff8 nodeid = 00, coreid = 01 Asserting INIT. Enabling cache Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 2. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU3: stack_base 0014f000, stack_end 0014fff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 3. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU4: stack_base 0014e000, stack_end 0014eff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 4. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU5: stack_base 0014d000, stack_end 0014dff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... + MTRR check Fixed MTRRs : #startup loops: 1. Sending STARTUP #1 to 5. Enabled Variable MTRRs: After apic_write. Enabled Startup point 1. Waiting for send to finish... +Setting up local APIC...After Startup. apic_id: 0x02 done. CPU6: stack_base 0014c000, stack_end 0014cff8 CPU model: AMD Opteron(tm) Processor 6278 Asserting INIT. siblings = 15, Waiting for send to finish... Disabling SMM ASeg memory + MTRR check Fixed MTRRs : Enabled Deasserting INIT. CPU #2 initialized Waiting for send to finish... +Variable MTRRs: #startup loops: 1. Sending STARTUP #1 to 6. Enabled After apic_write. Startup point 1. Waiting for send to finish... +Setting up local APIC...After Startup. CPU7: stack_base 0014b000, stack_end 0014bff8 apic_id: 0x03 done. Asserting INIT. CPU model: AMD Opteron(tm) Processor 6278 Waiting for send to finish... +siblings = 15, Deasserting INIT. Disabling SMM ASeg memory Waiting for send to finish... +CPU #3 initialized #startup loops: 1. Sending STARTUP #1 to 7. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU8: stack_base 0014a000, stack_end 0014aff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 8. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU9: stack_base 00149000, stack_end 00149ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 9. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU10: stack_base 00148000, stack_end 00148ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 10. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU11: stack_base 00147000, stack_end 00147ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 11. After apic_write. MTRR check Fixed MTRRs : Enabled Startup point 1. Waiting for send to finish... +Variable MTRRs: After Startup. Enabled CPU12: stack_base 00146000, stack_end 00146ff8 Setting up local APIC...Asserting INIT. Waiting for send to finish... + apic_id: 0x06 done. Deasserting INIT. Waiting for send to finish... +#startup loops: 1. CPU model: AMD Opteron(tm) Processor 6278 Sending STARTUP #1 to 12. After apic_write. siblings = 15, Startup point 1. Disabling SMM ASeg memory Waiting for send to finish... + MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled After Startup. CPU #6 initialized MTRR check CPU13: stack_base 00145000, stack_end 00145ff8 Asserting INIT. Fixed MTRRs : Enabled Setting up local APIC...Variable MTRRs: Enabled apic_id: 0x07 done. Waiting for send to finish... +Setting up local APIC...Deasserting INIT. CPU model: AMD Opteron(tm) Processor 6278 Waiting for send to finish... +siblings = 15, #startup loops: 1. Sending STARTUP #1 to 13. After apic_write. Disabling SMM ASeg memory Startup point 1. Waiting for send to finish... CPU #7 initialized + apic_id: 0x04 done. After Startup. CPU model: AMD Opteron(tm) Processor 6278 CPU14: stack_base 00144000, stack_end 00144ff8 siblings = 15, Asserting INIT. Disabling SMM ASeg memory Waiting for send to finish... +CPU #4 initialized Deasserting INIT. MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Waiting for send to finish... +Setting up local APIC...#startup loops: 1. Sending STARTUP #1 to 14. apic_id: 0x05 done. After apic_write. CPU model: AMD Opteron(tm) Processor 6278 Startup point 1. siblings = 15, Waiting for send to finish... +Disabling SMM ASeg memory After Startup. CPU #5 initialized CPU15: stack_base 00143000, stack_end 00143ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 15. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU16: stack_base 00142000, stack_end 00142ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 32. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU17: stack_base 00141000, stack_end 00141ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 33. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU18: stack_base 00140000, stack_end 00140ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 34. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU19: stack_base 0013f000, stack_end 0013fff8 Asserting INIT. MTRR check Waiting for send to finish... +Fixed MTRRs : Enabled Variable MTRRs: Enabled Deasserting INIT. Waiting for send to finish... +Setting up local APIC...#startup loops: 1. Sending STARTUP #1 to 35. After apic_write. apic_id: 0x08 done. Startup point 1. Waiting for send to finish... CPU model: AMD Opteron(tm) Processor 6278 +siblings = 15, After Startup. CPU20: stack_base 0013e000, stack_end 0013eff8 Disabling SMM ASeg memory Asserting INIT. CPU #8 initialized Waiting for send to finish... + MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Deasserting INIT. Waiting for send to finish... Setting up local APIC...+ apic_id: 0x09 done. #startup loops: 1. CPU model: AMD Opteron(tm) Processor 6278 Sending STARTUP #1 to 36. After apic_write. siblings = 15, Startup point 1. Disabling SMM ASeg memory Waiting for send to finish... +CPU #9 initialized After Startup. CPU21: stack_base 0013d000, stack_end 0013dff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 37. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU22: stack_base 0013c000, stack_end 0013cff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 38. After apic_write. MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Startup point 1. Waiting for send to finish... Setting up local APIC...+ apic_id: 0x0a done. After Startup. CPU23: stack_base 0013b000, stack_end 0013bff8 CPU model: AMD Opteron(tm) Processor 6278 Asserting INIT. siblings = 15, Waiting for send to finish... +Disabling SMM ASeg memory Deasserting INIT. MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Waiting for send to finish... +CPU #10 initialized #startup loops: 1. Sending STARTUP #1 to 39. Setting up local APIC...After apic_write. apic_id: 0x0b done. Startup point 1. CPU model: AMD Opteron(tm) Processor 6278 Waiting for send to finish... siblings = 15, +Disabling SMM ASeg memory After Startup. CPU24: stack_base 0013a000, stack_end 0013aff8 CPU #11 initialized Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 40. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU25: stack_base 00139000, stack_end 00139ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 41. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU26: stack_base 00138000, stack_end 00138ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 42. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU27: stack_base 00137000, stack_end 00137ff8 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Asserting INIT. Waiting for send to finish... +Setting up local APIC...Deasserting INIT. apic_id: 0x24 done. Waiting for send to finish... +CPU model: AMD Opteron(tm) Processor 6278 #startup loops: 1. Sending STARTUP #1 to 43. siblings = 15, After apic_write. Disabling SMM ASeg memory Startup point 1. Waiting for send to finish... +CPU #20 initialized After Startup. CPU28: stack_base 00136000, stack_end 00136ff8 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Asserting INIT. Waiting for send to finish... +Setting up local APIC...Deasserting INIT. apic_id: 0x25 done. Waiting for send to finish... +CPU model: AMD Opteron(tm) Processor 6278 #startup loops: 1. Sending STARTUP #1 to 44. After apic_write. siblings = 15, Startup point 1. Waiting for send to finish... +Disabling SMM ASeg memory After Startup. CPU #21 initialized CPU29: stack_base 00135000, stack_end 00135ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 45. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU30: stack_base 00134000, stack_end 00134ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 46. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU31: stack_base 00133000, stack_end 00133ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 1. Sending STARTUP #1 to 47. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #0 CPU: vendor AMD device 600f12 CPU: family 15, model 01, stepping 02 nodeid = 00, coreid = 00 Enabling cache CPU ID 0x80000001: 600f12 CPU is Fam 0Fh rev.F or later. We can use TOM2WB for any memory above 4GB MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled