coreboot-4.14-259-g078448296c Wed May 26 22:42:35 UTC 2021 bootblock starting (log level: 7)... FMAP: Found "FLASH" version 1.1 at 0x10000. FMAP: base = 0xfff00000 size = 0x100000 #areas = 4 FMAP: area COREBOOT found @ 10200 (982528 bytes) CBFS: mcache @0xfeffae00 built for 16 files, used 0x36c of 0x4000 bytes CBFS: Found 'fallback/romstage' @0x80 size 0xf018 in mcache @0xfeffae2c BS: bootblock times (exec / console): total (unknown) / 36 ms PROG_RUN: Setting MTRR to cache XIP stage. base: 0xfff10000, size: 0x00010000 coreboot-4.14-259-g078448296c Wed May 26 22:42:35 UTC 2021 romstage starting (log level: 7)... SMBus controller enabled Setting up static southbridge registers... done. Disabling Watchdog reboot... done. SB: Resume from S3 detected. Setting up RAM controller. FMAP: area RW_MRC_CACHE found @ 0 (65536 bytes) Using cached raminit settings 2 CPU cores iTPM enabled ME enabled AMT enabled Selected timings: FSB: 1334MHz DDR: 667MHz CAS: 5 tRAS: 15 tRP: 5 tRCD: 5 tWR: 5 tRFC: 65 tWTR: 3 tRRD: 3 tRTP: 3 Done clk crossing Done I/O clk Done launch Done timings Both dimms populated in channel 0 Both dimms populated in channel 1 RCOMP Done ODT Done RCOMP update Done pre-jedec Done jedec steps Done post-jedec Done dummy reads Done rcven Total memory: 6144 + 6144 = 12288MiB Done DRADRB Done memory map Done enhanced mode Done PRCOMP Done power settings Done raminit RAM initialization finished. FMAP: area COREBOOT found @ 10200 (982528 bytes) Memory initialized Done Egress Port Done DMI setup x4x late init complete SMM Memory Map SMRAM : 0x7fe00000 0x200000 Subregion 0: 0x7fe00000 0x100000 Subregion 1: 0x7ff00000 0x100000 Subregion 2: 0x80000000 0x0 MTRR Range: Start=7f400000 End=7f800000 (Size 400000) MTRR Range: Start=7f800000 End=7fc00000 (Size 400000) MTRR Range: Start=7fe00000 End=80000000 (Size 200000) MTRR Range: Start=fff00000 End=0 (Size 100000) S3 Resume BS: romstage times (exec / console): total (unknown) / 132 ms coreboot-4.14-259-g078448296c Wed May 26 22:42:35 UTC 2021 postcar starting (log level: 7)... S3 Resume Jumping to image. coreboot-4.14-259-g078448296c Wed May 26 22:42:35 UTC 2021 ramstage starting (log level: 7)... S3 Resume Initializing i82801jx southbridge... BS: BS_DEV_INIT_CHIPS run times (exec / console): 0 / 3 ms Enumerating buses... Root Device scanning... CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [8086/2e20] enabled PCI: 00:01.0 subordinate bus PCI Express PCI: 00:01.0 [8086/2e21] enabled PCI: 00:1a.0 [8086/3a37] enabled PCI: 00:1a.1 [8086/3a38] enabled PCI: 00:1a.2 [8086/3a39] enabled PCI: 00:1a.7 [8086/3a3c] enabled PCI: 00:1b.0 [8086/3a3e] enabled PCI: 00:1c.0 [8086/3a40] enabled PCI: 00:1c.1 [8086/3a42] enabled PCI: 00:1c.4 [8086/3a48] enabled PCI: 00:1c.5 [8086/3a4a] enabled PCI: 00:1d.0 [8086/3a34] enabled PCI: 00:1d.1 [8086/3a35] enabled PCI: 00:1d.2 [8086/3a36] enabled PCI: 00:1d.7 [8086/3a3a] enabled PCI: 00:1e.0 [8086/244e] enabled PCI: 00:1f.0 [8086/3a16] enabled PCI: 00:1f.2 [8086/3a20] enabled PCI: 00:1f.3 [8086/3a30] enabled PCI: Leftover static devices: PCI: 00:06.0 PCI: 00:19.0 PCI: 00:1c.2 PCI: 00:1c.3 PCI: 00:1f.4 PCI: 00:1f.5 PCI: 00:1f.6 PCI: Check your devicetree.cb. PCI: 00:01.0 scanning... PCI: 00:01.0: No LTR support PCI: pci_scan_bus for bus 01 PCI: 01:00.0 [1002/6811] enabled PCI: 01:00.1 [1002/aab0] enabled PCIe: Max_Payload_Size adjusted to 128 PCI: 01:00.0: No LTR support PCIe: Max_Payload_Size adjusted to 128 PCI: 01:00.1: No LTR support scan_bus: bus PCI: 00:01.0 finished in 23 msecs PCI: 00:1c.0 scanning... PCI: 00:1c.0: No LTR support PCI: pci_scan_bus for bus 02 scan_bus: bus PCI: 00:1c.0 finished in 5 msecs PCI: 00:1c.1 scanning... PCI: 00:1c.1: No LTR support PCI: pci_scan_bus for bus 03 scan_bus: bus PCI: 00:1c.1 finished in 5 msecs PCI: 00:1c.4 scanning... PCI: 00:1c.4: No LTR support PCI: pci_scan_bus for bus 04 PCI: 04:00.0 [11ab/6121] enabled PCIe: Max_Payload_Size adjusted to 128 PCI: 04:00.0: No LTR support scan_bus: bus PCI: 00:1c.4 finished in 14 msecs PCI: 00:1c.5 scanning... PCI: 00:1c.5: No LTR support PCI: pci_scan_bus for bus 05 PCI: 05:00.0 [1969/1026] enabled PCIe: Max_Payload_Size adjusted to 128 PCI: 05:00.0: No LTR support scan_bus: bus PCI: 00:1c.5 finished in 14 msecs PCI: 00:1e.0 scanning... PCI: pci_scan_bus for bus 06 PCI: 06:01.0 [1102/0002] enabled PCI: 06:01.1 [1102/7002] enabled PCI: 06:02.0 [9004/5078] enabled PCI: 06:03.0 [11c1/5811] enabled scan_bus: bus PCI: 00:1e.0 finished in 14 msecs PCI: 00:1f.0 scanning... PNP: 002e.0 enabled PNP: 002e.1 disabled PNP: 002e.2 enabled PNP: 002e.3 disabled PNP: 002e.5 enabled PNP: 002e.106 disabled PNP: 002e.107 disabled PNP: 002e.207 disabled PNP: 002e.307 enabled PNP: 002e.407 disabled PNP: 002e.8 disabled PNP: 002e.108 disabled PNP: 002e.9 disabled PNP: 002e.109 enabled PNP: 002e.209 enabled PNP: 002e.309 enabled PNP: 002e.a enabled PNP: 002e.b enabled PNP: 002e.c enabled PNP: 002e.d enabled PNP: 002e.f enabled scan_bus: bus PCI: 00:1f.0 finished in 41 msecs PCI: 00:1f.3 scanning... scan_bus: bus PCI: 00:1f.3 finished in 0 msecs scan_bus: bus DOMAIN: 0000 finished in 249 msecs scan_bus: bus Root Device finished in 260 msecs done BS: BS_DEV_ENUMERATE run times (exec / console): 1 / 268 ms FMAP: area RW_MRC_CACHE found @ 0 (65536 bytes) FMAP: area RW_MRC_CACHE found @ 0 (65536 bytes) MRC: Checking cached data update for 'RW_MRC_CACHE'. Manufacturer: c2 SF: Detected c2 2014 with sector size 0x1000, total 0x100000 MRC: 'RW_MRC_CACHE' does not need update. BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 24 ms found VGA at PCI: 01:00.0 Setting up VGA for PCI: 01:00.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... TOUUD 0x380000000 TOLUD 0x80000000 TOM 0x300000000 IGD decoded, subtracting 0M UMA and 0M GTT TSEG decoded, subtracting 2M Unused RAM between cbmem_top and TOM: 0x800K Available memory below 4GB: 2044M Available memory above 4GB: 10240M Adding UMA memory area base=0x7fc00000 size=0x00400000 Adding PCIe enhanced config space BAR 0xe0000000-0xf0000000. Done reading resources. ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) === PCI: 00:01.0 io: size: 0 align: 12 gran: 12 limit: ffff PCI: 01:00.0 20 * [0x0 - 0xff] io PCI: 00:01.0 io: size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:01.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff PCI: 01:00.0 18 * [0x0 - 0x3ffff] mem PCI: 01:00.0 30 * [0x40000 - 0x5ffff] mem PCI: 01:00.1 10 * [0x60000 - 0x63fff] mem PCI: 00:01.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:01.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 01:00.0 10 * [0x0 - 0xfffffff] prefmem PCI: 00:01.0 prefmem: size: 10000000 align: 28 gran: 20 limit: ffffffffffffffff done PCI: 00:1c.4 io: size: 0 align: 12 gran: 12 limit: ffff PCI: 04:00.0 20 * [0x0 - 0xf] io PCI: 04:00.0 10 * [0x10 - 0x17] io PCI: 04:00.0 18 * [0x18 - 0x1f] io PCI: 04:00.0 14 * [0x20 - 0x23] io PCI: 04:00.0 1c * [0x24 - 0x27] io PCI: 00:1c.4 io: size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:1c.4 mem: size: 0 align: 20 gran: 20 limit: ffffffff PCI: 04:00.0 24 * [0x0 - 0x3ff] mem PCI: 00:1c.4 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:1c.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1c.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1c.5 io: size: 0 align: 12 gran: 12 limit: ffff PCI: 05:00.0 18 * [0x0 - 0x7f] io PCI: 00:1c.5 io: size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:1c.5 mem: size: 0 align: 20 gran: 20 limit: ffffffff PCI: 05:00.0 10 * [0x0 - 0x3ffff] mem PCI: 00:1c.5 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:1c.5 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1c.5 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1e.0 io: size: 0 align: 12 gran: 12 limit: ffff PCI: 06:02.0 10 * [0x0 - 0xff] io PCI: 06:01.0 10 * [0x100 - 0x11f] io PCI: 06:01.1 10 * [0x120 - 0x127] io PCI: 00:1e.0 io: size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:1e.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff PCI: 06:02.0 14 * [0x0 - 0xfff] mem PCI: 06:03.0 10 * [0x1000 - 0x1fff] mem PCI: 00:1e.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:1e.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1e.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) === DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff update_constraints: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) update_constraints: PCI: 00:1f.0 10000200 base 00004700 limit 0000471b io (fixed) update_constraints: PNP: 002e.0 60 base 000003f0 limit 000003f7 io (fixed) update_constraints: PNP: 002e.2 60 base 000003f8 limit 000003ff io (fixed) update_constraints: PNP: 002e.5 60 base 00000060 limit 00000060 io (fixed) update_constraints: PNP: 002e.5 62 base 00000064 limit 00000064 io (fixed) update_constraints: PNP: 002e.b 60 base 00000290 limit 00000291 io (fixed) update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed) DOMAIN: 0000: Resource ranges: * Base: 1000, Size: 3700, Tag: 100 * Base: 471c, Size: b8e4, Tag: 100 PCI: 00:01.0 1c * [0x1000 - 0x1fff] limit: 1fff io PCI: 00:1c.4 1c * [0x2000 - 0x2fff] limit: 2fff io PCI: 00:1c.5 1c * [0x3000 - 0x3fff] limit: 3fff io PCI: 00:1e.0 1c * [0x5000 - 0x5fff] limit: 5fff io PCI: 00:1a.0 20 * [0x4000 - 0x401f] limit: 401f io PCI: 00:1a.1 20 * [0x4020 - 0x403f] limit: 403f io PCI: 00:1a.2 20 * [0x4040 - 0x405f] limit: 405f io PCI: 00:1d.0 20 * [0x4060 - 0x407f] limit: 407f io PCI: 00:1d.1 20 * [0x4080 - 0x409f] limit: 409f io PCI: 00:1d.2 20 * [0x40a0 - 0x40bf] limit: 40bf io PCI: 00:1f.2 20 * [0x40c0 - 0x40df] limit: 40df io PCI: 00:1f.2 10 * [0x40e0 - 0x40e7] limit: 40e7 io PCI: 00:1f.2 18 * [0x40e8 - 0x40ef] limit: 40ef io PCI: 00:1f.2 14 * [0x40f0 - 0x40f3] limit: 40f3 io PCI: 00:1f.2 1c * [0x40f4 - 0x40f7] limit: 40f7 io DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff update_constraints: DOMAIN: 0000 03 base 00000000 limit 0009ffff mem (fixed) update_constraints: DOMAIN: 0000 04 base 000a0000 limit 000bffff mem (fixed) update_constraints: DOMAIN: 0000 05 base 000c0000 limit 000fffff mem (fixed) update_constraints: DOMAIN: 0000 06 base 00100000 limit 7fbfffff mem (fixed) update_constraints: DOMAIN: 0000 07 base 100000000 limit 37fffffff mem (fixed) update_constraints: DOMAIN: 0000 08 base 7fc00000 limit 7fffffff mem (fixed) update_constraints: DOMAIN: 0000 09 base fed10000 limit ffffffff mem (fixed) update_constraints: DOMAIN: 0000 0a base e0000000 limit efffffff mem (fixed) update_constraints: PCI: 00:1f.0 10000100 base ff000000 limit ffffffff mem (fixed) update_constraints: PCI: 00:1f.0 03 base fec00000 limit fec00fff mem (fixed) DOMAIN: 0000: Resource ranges: * Base: 80000000, Size: 60000000, Tag: 200 * Base: f0000000, Size: ec00000, Tag: 200 * Base: fec01000, Size: 10f000, Tag: 200 * Base: 380000000, Size: c80000000, Tag: 100200 PCI: 00:01.0 24 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem PCI: 00:01.0 20 * [0x90000000 - 0x900fffff] limit: 900fffff mem PCI: 00:1c.4 20 * [0x90100000 - 0x901fffff] limit: 901fffff mem PCI: 00:1c.5 20 * [0x90200000 - 0x902fffff] limit: 902fffff mem PCI: 00:1e.0 20 * [0x90300000 - 0x903fffff] limit: 903fffff mem PCI: 00:1b.0 10 * [0x90400000 - 0x90403fff] limit: 90403fff mem PCI: 00:1f.2 24 * [0x90404000 - 0x904047ff] limit: 904047ff mem PCI: 00:1a.7 10 * [0x90405000 - 0x904053ff] limit: 904053ff mem PCI: 00:1d.7 10 * [0x90406000 - 0x904063ff] limit: 904063ff mem PCI: 00:1f.3 10 * [0x90407000 - 0x904070ff] limit: 904070ff mem DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff done PCI: 00:01.0 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff PCI: 00:01.0: Resource ranges: * Base: 1000, Size: 1000, Tag: 100 PCI: 01:00.0 20 * [0x1000 - 0x10ff] limit: 10ff io PCI: 00:01.0 io: base: 1000 size: 1000 align: 12 gran: 12 limit: 1fff done PCI: 00:01.0 prefmem: base: 80000000 size: 10000000 align: 28 gran: 20 limit: 8fffffff PCI: 00:01.0: Resource ranges: * Base: 80000000, Size: 10000000, Tag: 1200 PCI: 01:00.0 10 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem PCI: 00:01.0 prefmem: base: 80000000 size: 10000000 align: 28 gran: 20 limit: 8fffffff done PCI: 00:01.0 mem: base: 90000000 size: 100000 align: 20 gran: 20 limit: 900fffff PCI: 00:01.0: Resource ranges: * Base: 90000000, Size: 100000, Tag: 200 PCI: 01:00.0 18 * [0x90000000 - 0x9003ffff] limit: 9003ffff mem PCI: 01:00.0 30 * [0x90040000 - 0x9005ffff] limit: 9005ffff mem PCI: 01:00.1 10 * [0x90060000 - 0x90063fff] limit: 90063fff mem PCI: 00:01.0 mem: base: 90000000 size: 100000 align: 20 gran: 20 limit: 900fffff done PCI: 00:1c.4 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff PCI: 00:1c.4: Resource ranges: * Base: 2000, Size: 1000, Tag: 100 PCI: 04:00.0 20 * [0x2000 - 0x200f] limit: 200f io PCI: 04:00.0 10 * [0x2010 - 0x2017] limit: 2017 io PCI: 04:00.0 18 * [0x2018 - 0x201f] limit: 201f io PCI: 04:00.0 14 * [0x2020 - 0x2023] limit: 2023 io PCI: 04:00.0 1c * [0x2024 - 0x2027] limit: 2027 io PCI: 00:1c.4 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done PCI: 00:1c.4 mem: base: 90100000 size: 100000 align: 20 gran: 20 limit: 901fffff PCI: 00:1c.4: Resource ranges: * Base: 90100000, Size: 100000, Tag: 200 PCI: 04:00.0 24 * [0x90100000 - 0x901003ff] limit: 901003ff mem PCI: 00:1c.4 mem: base: 90100000 size: 100000 align: 20 gran: 20 limit: 901fffff done PCI: 00:1c.5 io: base: 3000 size: 1000 align: 12 gran: 12 limit: 3fff PCI: 00:1c.5: Resource ranges: * Base: 3000, Size: 1000, Tag: 100 PCI: 05:00.0 18 * [0x3000 - 0x307f] limit: 307f io PCI: 00:1c.5 io: base: 3000 size: 1000 align: 12 gran: 12 limit: 3fff done PCI: 00:1c.5 mem: base: 90200000 size: 100000 align: 20 gran: 20 limit: 902fffff PCI: 00:1c.5: Resource ranges: * Base: 90200000, Size: 100000, Tag: 200 PCI: 05:00.0 10 * [0x90200000 - 0x9023ffff] limit: 9023ffff mem PCI: 00:1c.5 mem: base: 90200000 size: 100000 align: 20 gran: 20 limit: 902fffff done PCI: 00:1e.0 io: base: 5000 size: 1000 align: 12 gran: 12 limit: 5fff PCI: 00:1e.0: Resource ranges: * Base: 5000, Size: 1000, Tag: 100 PCI: 06:02.0 10 * [0x5000 - 0x50ff] limit: 50ff io PCI: 06:01.0 10 * [0x5100 - 0x511f] limit: 511f io PCI: 06:01.1 10 * [0x5120 - 0x5127] limit: 5127 io PCI: 00:1e.0 io: base: 5000 size: 1000 align: 12 gran: 12 limit: 5fff done PCI: 00:1e.0 mem: base: 90300000 size: 100000 align: 20 gran: 20 limit: 903fffff PCI: 00:1e.0: Resource ranges: * Base: 90300000, Size: 100000, Tag: 200 PCI: 06:02.0 14 * [0x90300000 - 0x90300fff] limit: 90300fff mem PCI: 06:03.0 10 * [0x90301000 - 0x90301fff] limit: 90301fff mem PCI: 00:1e.0 mem: base: 90300000 size: 100000 align: 20 gran: 20 limit: 903fffff done === Resource allocator: DOMAIN: 0000 - resource allocation complete === DOMAIN: 0000 03 <- [0x0000000000 - 0x000009ffff] size 0x000a0000 gran 0x00 mem DOMAIN: 0000 04 <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran 0x00 mem DOMAIN: 0000 05 <- [0x00000c0000 - 0x00000fffff] size 0x00040000 gran 0x00 mem DOMAIN: 0000 06 <- [0x0000100000 - 0x007fbfffff] size 0x7fb00000 gran 0x00 mem DOMAIN: 0000 07 <- [0x0100000000 - 0x037fffffff] size 0x280000000 gran 0x00 mem DOMAIN: 0000 08 <- [0x007fc00000 - 0x007fffffff] size 0x00400000 gran 0x00 mem DOMAIN: 0000 09 <- [0x00fed10000 - 0x00ffffffff] size 0x012f0000 gran 0x00 mem DOMAIN: 0000 0a <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x00 mem PCI: 00:01.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io PCI: 00:01.0 24 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x14 bus 01 prefmem PCI: 00:01.0 20 <- [0x0090000000 - 0x00900fffff] size 0x00100000 gran 0x14 bus 01 mem PCI: 01:00.0 10 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64 PCI: 01:00.0 18 <- [0x0090000000 - 0x009003ffff] size 0x00040000 gran 0x12 mem64 PCI: 01:00.0 20 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io PCI: 01:00.0 30 <- [0x0090040000 - 0x009005ffff] size 0x00020000 gran 0x11 romem PCI: 01:00.1 10 <- [0x0090060000 - 0x0090063fff] size 0x00004000 gran 0x0e mem64 PCI: 00:1a.0 20 <- [0x0000004000 - 0x000000401f] size 0x00000020 gran 0x05 io PCI: 00:1a.1 20 <- [0x0000004020 - 0x000000403f] size 0x00000020 gran 0x05 io PCI: 00:1a.2 20 <- [0x0000004040 - 0x000000405f] size 0x00000020 gran 0x05 io PCI: 00:1a.7 10 <- [0x0090405000 - 0x00904053ff] size 0x00000400 gran 0x0a mem PCI: 00:1b.0 10 <- [0x0090400000 - 0x0090403fff] size 0x00004000 gran 0x0e mem64 PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem PCI: 00:1c.0 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 02 mem PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem PCI: 00:1c.1 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 03 mem PCI: 00:1c.4 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 04 io PCI: 00:1c.4 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 04 prefmem PCI: 00:1c.4 20 <- [0x0090100000 - 0x00901fffff] size 0x00100000 gran 0x14 bus 04 mem PCI: 04:00.0 10 <- [0x0000002010 - 0x0000002017] size 0x00000008 gran 0x03 io PCI: 04:00.0 14 <- [0x0000002020 - 0x0000002023] size 0x00000004 gran 0x02 io PCI: 04:00.0 18 <- [0x0000002018 - 0x000000201f] size 0x00000008 gran 0x03 io PCI: 04:00.0 1c <- [0x0000002024 - 0x0000002027] size 0x00000004 gran 0x02 io PCI: 04:00.0 20 <- [0x0000002000 - 0x000000200f] size 0x00000010 gran 0x04 io PCI: 04:00.0 24 <- [0x0090100000 - 0x00901003ff] size 0x00000400 gran 0x0a mem PCI: 00:1c.5 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 05 io PCI: 00:1c.5 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 05 prefmem PCI: 00:1c.5 20 <- [0x0090200000 - 0x00902fffff] size 0x00100000 gran 0x14 bus 05 mem PCI: 05:00.0 10 <- [0x0090200000 - 0x009023ffff] size 0x00040000 gran 0x12 mem64 PCI: 05:00.0 18 <- [0x0000003000 - 0x000000307f] size 0x00000080 gran 0x07 io PCI: 00:1d.0 20 <- [0x0000004060 - 0x000000407f] size 0x00000020 gran 0x05 io PCI: 00:1d.1 20 <- [0x0000004080 - 0x000000409f] size 0x00000020 gran 0x05 io PCI: 00:1d.2 20 <- [0x00000040a0 - 0x00000040bf] size 0x00000020 gran 0x05 io PCI: 00:1d.7 10 <- [0x0090406000 - 0x00904063ff] size 0x00000400 gran 0x0a mem PCI: 00:1e.0 1c <- [0x0000005000 - 0x0000005fff] size 0x00001000 gran 0x0c bus 06 io PCI: 00:1e.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 06 prefmem PCI: 00:1e.0 20 <- [0x0090300000 - 0x00903fffff] size 0x00100000 gran 0x14 bus 06 mem PCI: 06:01.0 10 <- [0x0000005100 - 0x000000511f] size 0x00000020 gran 0x05 io PCI: 06:01.1 10 <- [0x0000005120 - 0x0000005127] size 0x00000008 gran 0x03 io PCI: 06:02.0 10 <- [0x0000005000 - 0x00000050ff] size 0x00000100 gran 0x08 io PCI: 06:02.0 14 <- [0x0090300000 - 0x0090300fff] size 0x00001000 gran 0x0c mem PCI: 06:03.0 10 <- [0x0090301000 - 0x0090301fff] size 0x00001000 gran 0x0c mem PNP: 002e.0 2a <- [0x0000000000 - 0xffffffffffffffff] size 0x00000000 gran 0x00 irq PNP: 002e.0 2c <- [0x0000000022 - 0x0000000021] size 0x00000000 gran 0x00 irq PNP: 002e.0 2d <- [0x0000000000 - 0xffffffffffffffff] size 0x00000000 gran 0x00 irq PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io PNP: 002e.0 f0 <- [0x000000000e - 0x000000000d] size 0x00000000 gran 0x00 irq ERROR: PNP: 002e.0 70 irq size: 0x0000000001 not assigned in devicetree ERROR: PNP: 002e.0 74 drq size: 0x0000000001 not assigned in devicetree PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq PNP: 002e.307 e4 <- [0x00000000fb - 0x00000000fa] size 0x00000000 gran 0x00 irq PNP: 002e.209 f0 <- [0x000000007f - 0x000000007e] size 0x00000000 gran 0x00 irq PNP: 002e.209 fe <- [0x0000000007 - 0x0000000006] size 0x00000000 gran 0x00 irq PNP: 002e.a e4 <- [0x0000000010 - 0x000000000f] size 0x00000000 gran 0x00 irq PNP: 002e.a e5 <- [0x0000000002 - 0x0000000001] size 0x00000000 gran 0x00 irq PNP: 002e.a f2 <- [0x00000000fc - 0x00000000fb] size 0x00000000 gran 0x00 irq PNP: 002e.b 60 <- [0x0000000290 - 0x0000000291] size 0x00000002 gran 0x01 io PNP: 002e.b 70 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq PCI: 00:1f.2 10 <- [0x00000040e0 - 0x00000040e7] size 0x00000008 gran 0x03 io PCI: 00:1f.2 14 <- [0x00000040f0 - 0x00000040f3] size 0x00000004 gran 0x02 io PCI: 00:1f.2 18 <- [0x00000040e8 - 0x00000040ef] size 0x00000008 gran 0x03 io PCI: 00:1f.2 1c <- [0x00000040f4 - 0x00000040f7] size 0x00000004 gran 0x02 io PCI: 00:1f.2 20 <- [0x00000040c0 - 0x00000040df] size 0x00000020 gran 0x05 io PCI: 00:1f.2 24 <- [0x0090404000 - 0x00904047ff] size 0x00000800 gran 0x0b mem PCI: 00:1f.3 10 <- [0x0090407000 - 0x00904070ff] size 0x00000100 gran 0x08 mem64 Done setting resources. Done allocating resources. BS: BS_DEV_RESOURCES run times (exec / console): 1 / 1469 ms Enabling resources... PCI: 00:00.0 subsystem <- 8086/2e20 PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 bridge ctrl <- 001b PCI: 00:01.0 cmd <- 07 PCI: 00:1a.0 subsystem <- 8086/3a37 PCI: 00:1a.0 cmd <- 01 PCI: 00:1a.1 subsystem <- 8086/3a38 PCI: 00:1a.1 cmd <- 01 PCI: 00:1a.2 subsystem <- 8086/3a39 PCI: 00:1a.2 cmd <- 01 PCI: 00:1a.7 subsystem <- 8086/3a3c PCI: 00:1a.7 cmd <- 102 PCI: 00:1b.0 subsystem <- 8086/3a3e PCI: 00:1b.0 cmd <- 102 PCI: 00:1c.0 bridge ctrl <- 0013 PCI: 00:1c.0 subsystem <- 8086/3a40 PCI: 00:1c.0 cmd <- 100 PCI: 00:1c.1 bridge ctrl <- 0013 PCI: 00:1c.1 subsystem <- 8086/3a42 PCI: 00:1c.1 cmd <- 100 PCI: 00:1c.4 bridge ctrl <- 0013 PCI: 00:1c.4 subsystem <- 8086/3a48 PCI: 00:1c.4 cmd <- 107 PCI: 00:1c.5 bridge ctrl <- 0013 PCI: 00:1c.5 subsystem <- 8086/3a4a PCI: 00:1c.5 cmd <- 107 PCI: 00:1d.0 subsystem <- 8086/3a34 PCI: 00:1d.0 cmd <- 01 PCI: 00:1d.1 subsystem <- 8086/3a35 PCI: 00:1d.1 cmd <- 01 PCI: 00:1d.2 subsystem <- 8086/3a36 PCI: 00:1d.2 cmd <- 01 PCI: 00:1d.7 subsystem <- 8086/3a3a PCI: 00:1d.7 cmd <- 102 PCI: 00:1e.0 bridge ctrl <- 0013 PCI: 00:1e.0 subsystem <- 8086/244e PCI: 00:1e.0 cmd <- 107 PCI: 00:1f.0 subsystem <- 8086/3a16 PCI: 00:1f.0 cmd <- 107 PCI: 00:1f.2 subsystem <- 8086/3a22 PCI: 00:1f.2 cmd <- 03 PCI: 00:1f.3 subsystem <- 8086/3a30 PCI: 00:1f.3 cmd <- 103 PCI: 01:00.0 cmd <- 03 PCI: 01:00.1 cmd <- 02 PCI: 04:00.0 cmd <- 07 PCI: 05:00.0 cmd <- 03 PCI: 06:01.0 cmd <- 01 PCI: 06:01.1 cmd <- 01 PCI: 06:02.0 cmd <- 03 PCI: 06:03.0 cmd <- 02 done. BS: BS_DEV_ENABLE run times (exec / console): 0 / 137 ms Initializing devices... CPU_CLUSTER: 0 init FMAP: area COREBOOT found @ 10200 (982528 bytes) CBFS: Found 'cpu_microcode_blob.bin' @0xf140 size 0x2c000 in mcache @0x7fbfd0ac microcode: sig=0x1067a pf=0x1 revision=0xa0b microcode: Update skipped, already up-to-date MTRR: Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x000000007fc00000 size 0x7fb40000 type 6 0x000000007fc00000 - 0x0000000080000000 size 0x00400000 type 0 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0 0x0000000100000000 - 0x0000000380000000 size 0x280000000 type 6 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 CPU physical address size: 36 bits MTRR: default type WB/UC MTRR counts: 5/5. MTRR: UC selected as default type. MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6 MTRR: 1 base 0x000000007fc00000 mask 0x0000000fffc00000 type 0 MTRR: 2 base 0x0000000080000000 mask 0x0000000ff0000000 type 1 MTRR: 3 base 0x0000000100000000 mask 0x0000000f00000000 type 6 MTRR: 4 base 0x0000000200000000 mask 0x0000000e00000000 type 6 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled CPU has 2 cores. Setting up SMI for CPU Will perform SMM setup. CPU: Intel(R) Core(TM)2 Duo CPU E8600 @ 3.33GHz. Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170 Processing 16 relocs. Offset value of 0x00030000 Attempting to start 1 APs Waiting for 10ms after sending INIT. Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1, MCU rev: 0x00000a0b done. Waiting for 2nd SIPI to complete...done. smm_stub_place_stacks: cpus: 2 : stack space: needed -> 800 smm_stub_place_stacks: exit, stack_top 0x7fe00800 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1e0 memsize: 0x1e0 Processing 11 relocs. Offset value of 0x00038000 smm_module_setup_stub: stack_end = 0x7fe00000 smm_module_setup_stub: stack_top = 0x7fe00800 smm_module_setup_stub: stack_size = 0x400 smm_module_setup_stub: runtime.start32_offset = 0x4c smm_module_setup_stub: runtime.smm_size = 0x10000 SMM Module: stub loaded at 0x00038000. Will call 0x7fbaaf18 Installing permanent SMM handler to 0x7fe00000 smm_load_module: total_smm_space_needed 5240, available -> 100000 Loading module at 0x7fefc000 with entry 0x7fefc047. filesize: 0x630 memsize: 0x4640 Processing 26 relocs. Offset value of 0x7fefc000 smm_load_module: smram_start: 0x0x7fe00000 smm_load_module: smram_end: 0x7ff00000 smm_load_module: stack_top: 0x7fe00800 smm_load_module: handler start 0x7fefc047 smm_load_module: handler_size 5080 smm_load_module: fxsave_area 0x7feffc00 smm_load_module: fxsave_size 400 smm_load_module: CONFIG_MSEG_SIZE 0x0 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0 smm_load_module: handler_mod_params.smbase = 0x7fe00000 smm_load_module: per_cpu_save_state_size = 0x400 smm_load_module: num_cpus = 0x2 smm_load_module: total_save_state_size = 0x800 smm_load_module: cpu0 entry: 0x7feec000 smm_create_map: cpus allowed in one segment 30 smm_create_map: min # of segments needed 1 CPU 0x0 smbase 7feec000 entry 7fef4000 ss_start 7fefbc00 code_end 7fef41e0 CPU 0x1 smbase 7feebc00 entry 7fef3c00 ss_start 7fefb800 code_end 7fef3de0 smm_stub_place_stacks: cpus: 2 : stack space: needed -> 800 smm_stub_place_stacks: exit, stack_top 0x7fe00800 Loading module at 0x7fef4000 with entry 0x7fef4000. filesize: 0x1e0 memsize: 0x1e0 Processing 11 relocs. Offset value of 0x7fef4000 smm_place_entry_code: smbase 7feebc00, stack_top 7fe00800 SMM Module: placing smm entry code at 7fef3c00, cpu # 0x1 smm_place_entry_code: copying from 7fef4000 to 7fef3c00 0x1e0 bytes smm_module_setup_stub: stack_end = 0x7fe00000 smm_module_setup_stub: stack_top = 0x7fe00800 smm_module_setup_stub: stack_size = 0x400 smm_module_setup_stub: runtime.start32_offset = 0x4c smm_module_setup_stub: runtime.smm_size = 0x100000 SMM Module: stub loaded at 0x7fef4000. Will call 0x7fefc047 Initializing southbridge SMI... smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feec000, cpu = 0 In relocation handler: cpu 0 New SMBASE=0x7feec000 SMRR not enabled, skip writing SMRR... Relocation complete. VMX status: enabled VMX status: enabled smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feebc00, cpu = 1 In relocation handler: cpu 1 New SMBASE=0x7feebc00 Writing SMRR. base = 0x7fe00000, mask=0xffe00800 Relocation complete. Initializing CPU #0 CPU: vendor Intel device 1067a CPU: family 06, model 17, stepping 0a CPU: Intel(R) Core(TM)2 Duo CPU E8600 @ 3.33GHz. Setting up local APIC... apic_id: 0x0 done. writing P-State 2: 0, 0, 6, 0x16, 15000; encoded: 0x0616 writing P-State 2: 0, 0, 6, 0x16, 15000; encoded: 0x0616 writing P-State 2: 0, 0, 6, 0x16, 15000; encoded: 0x0616 writing P-State 2: 0, 0, 6, 0x16, 15000; encoded: 0x0616 writing P-State 1: 0, 0, 8, 0x1c, 25000; encoded: 0x081c writing P-State 0: 0, 0, 10, 0x22, 35000; encoded: 0x0a22 CPU #0 initialized Initializing CPU #1 CPU: vendor Intel device 1067a CPU: family 06, model 17, stepping 0a CPU: Intel(R) Core(TM)2 Duo CPU E8600 @ 3.33GHz. Setting up local APIC... apic_id: 0x1 done. writing P-State 2: 0, 0, 6, 0x16, 15000; encoded: 0x0616 writing P-State 2: 0, 0, 6, 0x16, 15000; encoded: 0x0616 writing P-State 2: 0, 0, 6, 0x16, 15000; encoded: 0x0616 writing P-State 2: 0, 0, 6, 0x16, 15000; encoded: 0x0616 writing P-State 1: 0, 0, 8, 0x1c, 25000; encoded: 0x081c writing P-State 0: 0, 0, 10, 0x22, 35000; encoded: 0x0a22 CPU #1 initialized bsp_do_flight_plan done after 353 msecs. CPU 1 going down... Initializing southbridge SMI... SMI_STS: GPE0 GPE0_STS: GPIO14 GPIO12 GPIO11 GPIO9 GPIO8 GPIO6 GPIO1 GPIO0 PME_B0 RI ALT_GP_SMI_STS: GPI14 GPI12 GPI11 GPI9 GPI8 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0 TCO_STS: Locking SMM. CPU_CLUSTER: 0 init finished in 592 msecs DOMAIN: 0000 init DOMAIN: 0000 init finished in 0 msecs PCI: 00:00.0 init PCI: 00:00.0 init finished in 0 msecs PCI: 00:1a.0 init PCI: 00:1a.0 init finished in 0 msecs PCI: 00:1a.1 init PCI: 00:1a.1 init finished in 0 msecs PCI: 00:1a.2 init PCI: 00:1a.2 init finished in 0 msecs PCI: 00:1a.7 init EHCI: Setting up controller.. done. PCI: 00:1a.7 init finished in 3 msecs PCI: 00:1b.0 init Azalia: base = 0x90400000 Azalia: codec_mask = 01 Azalia: Initializing codec #0 Azalia: codec viddid: 10ec0888 Azalia: verb_size: 52 Azalia: verb loaded. PCI: 00:1b.0 init finished in 18 msecs PCI: 00:1c.0 init Initializing ICH10 PCIe root port. PCI: 00:1c.0 init finished in 3 msecs PCI: 00:1c.1 init Initializing ICH10 PCIe root port. PCI: 00:1c.1 init finished in 3 msecs PCI: 00:1c.4 init Initializing ICH10 PCIe root port. PCI: 00:1c.4 init finished in 3 msecs PCI: 00:1c.5 init Initializing ICH10 PCIe root port. PCI: 00:1c.5 init finished in 3 msecs PCI: 00:1d.0 init PCI: 00:1d.0 init finished in 0 msecs PCI: 00:1d.1 init PCI: 00:1d.1 init finished in 0 msecs PCI: 00:1d.2 init PCI: 00:1d.2 init finished in 0 msecs PCI: 00:1d.7 init EHCI: Setting up controller.. done. PCI: 00:1d.7 init finished in 3 msecs PCI: 00:1e.0 init PCI: 00:1e.0 init finished in 0 msecs PCI: 00:1f.0 init i82801jx: lpc_init IOAPIC: Initializing IOAPIC at 0xfec00000 IOAPIC: Bootstrap Processor Local APIC = 0x00 IOAPIC: ID = 0x02 IOAPIC: 24 interrupts IOAPIC: Enabling interrupts on FSB Set power on after power failure. NMI sources disabled. rtc_failed = 0x0 apm_control: Enabling ACPI. APMC done. PCI: 00:1f.0 init finished in 27 msecs PCI: 00:1f.2 init i82801jx_sata: initializing... SATA controller in AHCI mode. ABAR: 0x90404000 PCI: 00:1f.2 init finished in 7 msecs PCI: 00:1f.3 init PCI: 00:1f.3 init finished in 0 msecs PCI: 01:00.0 init PCI: 01:00.0 init finished in 0 msecs PCI: 01:00.1 init PCI: 01:00.1 init finished in 0 msecs PCI: 04:00.0 init PCI: 04:00.0 init finished in 0 msecs PCI: 05:00.0 init CBFS: Found 'atl1e-macaddress' @0x50c80 size 0x11 in mcache @0x7fbfd1c4 atl1e: Programming MAC Address...done PCI: 05:00.0 init finished in 9 msecs PCI: 06:01.0 init PCI: 06:01.0 init finished in 0 msecs PCI: 06:01.1 init PCI: 06:01.1 init finished in 0 msecs PCI: 06:02.0 init PCI: 06:02.0 init finished in 0 msecs PCI: 06:03.0 init PCI: 06:03.0 init finished in 0 msecs PNP: 002e.0 init PNP: 002e.0 init finished in 0 msecs PNP: 002e.2 init PNP: 002e.2 init finished in 0 msecs PNP: 002e.5 init w83667hg_a_init: Disable mouse controller. PNP: 002e.5 init finished in 3 msecs PNP: 002e.307 init PNP: 002e.307 init finished in 0 msecs PNP: 002e.109 init PNP: 002e.109 init finished in 0 msecs PNP: 002e.209 init PNP: 002e.209 init finished in 0 msecs PNP: 002e.309 init PNP: 002e.309 init finished in 0 msecs PNP: 002e.a init set power off after power fail PNP: 002e.a init finished in 2 msecs PNP: 002e.b init PNP: 002e.b init finished in 0 msecs PNP: 002e.c init PNP: 002e.c init finished in 0 msecs PNP: 002e.d init PNP: 002e.d init finished in 0 msecs PNP: 002e.f init PNP: 002e.f init finished in 0 msecs Devices initialized BS: BS_DEV_INIT run times (exec / console): 97 / 792 ms Finalize devices... Devices finalized BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms Trying to find the wakeup vector... Looking on 0x000f6b90 for valid checksum Checksum 1 passed Checksum 2 passed all OK RSDP found at 0x000f6b90 RSDT found at 0x7fb5b030 ends at 0x7fb5b068 FADT found at 0x7fb5d100 FACS found at 0x7fb5b240 OS waking vector is 0x0009a1d0 BS: BS_OS_RESUME_CHECK run times (exec / console): 0 / 25 ms