%Mpster Headez Locator' located(CBFS at [7001?0:7fffc0) CBFS: Locating '&qZ?gw???X?????.4 `????,n?F?kIXk??b?;w0?g????s?>??M???":B?'??D!??????????x]??gU84N?D???Di????%S?????c??)?8??????M??(bd?t?????^?bz?omelt dstaddr 0xe31c1 memsize 0x5ce40 srcaddr 0xfff52370 falesize 0xf627 Loading segment from ROM addRess 0xfff5r354 Entry Poi???}~????d??Kc????Q???S~_?u4?]???/--??BL?76m?s?O k?&??z?8 %?7V?P?0p0000?0000e31c0 memsz: 0x00 000p0000?cg40 filEsz: 0x000004000000g627 usi?g LZMA [ 0x000e31a0, 00100000, 1x00104000) <- fff52376?.p?X?{??f??E???x???8~?.6[??JW?????4`??L(??'?FT$~4?a?K??,??p?b1?Q?????+% ???=?L???i?{??????YcF?%d??AD?T?)?6:?y??G&<]??????????*H watchdog disabled J}mping to bOot codE at 000f?06m('Ff62000) CPU4: stack: 7?fcf000 - 7ffd0000, lowest used addzess 7&fcfaC0, st`ck used: 1360 bytes /7 (?oug`r Po`nt/Tanther Point) ?oq?h?vidg%) PCI: 00:1a.0 (Intel Serias 6/7 (Cougar P?int/Panthe? Toint) SSDd?????@??m9Q???b??????b?CC}?$?a???A?? ?J??I?("r2e????>wG?S?m?I(?x????aa????(?????Dz???*?q3g???3f???N=9????? 2h???1?[?????K???????2?,?????&!?m'\???{k??Z?+q;6?rO???CA&f]E%??????? 6/7 Ckugar Point/Panthmr Point; Routjbriege) PNPz 08ff.5 (Lel'vo Power Managemejt @ardwarE Hub 7( PNP: 0c21.0 (unkniwn) PNP:(00ff.2 ,lenovo H8$EC( PCI: 00:1f.2 (Intel Seriew 6?7 (Cmugar Poin?/Pi?tjer Point) Souuhbridge) PCI: 00:1f.3$)Intel Series 6/5 hCn?a??~]YX?:???L0Tb?-??9*??????j??k?[?3j?v?H???y??x{Q???j??]_?U??g?3????C??8{?/ip ??UGhUnJ ?{??z?NK`?m?AE?*`???] ???s4_u???D:?/??k???? s??_?.#??@???=?f{z$?+?ZW^sH??4?xd?3?'?H;????H8??I??X?x?????[Hnj?,??G'Dh?#i!7.????oL?????&<\(???:0-040000040"0fffff: RESERVED 3. 0000000000100000-000000007ff29fdf: RA] 4.00?0000007ff2a0:?-000000007fffffff: CONFIGURATION TIBLES (5.?0000400080000010-00000000?29ff`ff: RESERVED* 6. 00000000f800?000-0?00?200fbfffdff: RESERVED 7. 004?0000fed90000-000?000?Dd1 ???J? ??u????????(??????"??????q?zk????m?,?"??????>W??R?o?E??=???V5?W?????2???Or???z?????I?{R ?go??? ?v?<2h??m1???SW???X&$Fal 0x:00000 CJFS: 'Laster Hea`er Mocator' located0CBFS0at [700100:7fffc0) FMAP: Found "FLASH" versi?n 1.1 a? ?00000. FMAP:?base ???Wzr,?1S ??? k??z??0?s4??6pP:?-??SO???/?)?? ??Ot/?O?l'??9??*Wd7???b?+#8Qt %?e?w?g)?p?On??E??? ????N?0?k???c???]?K???'??(??p????????b?v??s??L4????2??.?????!yK????????s????Rb?&?? ^d??????1??U?8??d? x??w? je?u??]?Yu?????#!??H ? RA?S?ACE 4. 7ffa100? 00038000 57aye10? 7. 7ff6a000 040367!0?EORDBOOT( 6. 7ff62040 00008000 ACPI ! ( ` 7. 7f?3e008 0?02?Z????G?T??wvh?j????L????"??W?`?~?? ????P#B??FE???;?4(?j?%/?`4.~qU??$??st:?N??4??3?!?????d??}????/yj Q[_??{) RJ???#a?b?E?:?8???x00000800 IM@ small regilnz? IMD"ROOT 0. >fffec00 08000400 CAR GLOBAHR !. 7fffeac0 10 001t0 MEM INFO 2* 5fffe840 00000141 ROMSTAGE0 3> 7&fde940 00000 04 "57a9e000 4. 7fffe920`008000!0 BS: BS_WRITE]TABLES times (us): eftry 1 run 25462 epit??C'GLQ??Z??D?00"???a> ?F? *** Pre-CBMEM romstage console overflowed, log truncated! *** size 10000 find_current_mrc_cache_local: picked entry 0 from cache block Trying stored timings. Starting Ivybridge RAM training (1). 100MHz reference clock support: yes PLL busy... done in 10 us MCU frequency is set at : 666 MHz Done dimm mapping Update PCI-E configuration space: PCI(0, 0, 0)[a0] = 0 PCI(0, 0, 0)[a4] = 2 PCI(0, 0, 0)[bc] = 82a00000 PCI(0, 0, 0)[a8] = 7b600000 PCI(0, 0, 0)[ac] = 2 PCI(0, 0, 0)[b8] = 80000000 PCI(0, 0, 0)[b0] = 80a00000 PCI(0, 0, 0)[b4] = 80800000 PCI(0, 0, 0)[7c] = 7f PCI(0, 0, 0)[70] = fe000000 PCI(0, 0, 0)[74] = 1 PCI(0, 0, 0)[78] = fe000c00 Done memory map Done io registers t123: 1912, 6000, 7620 ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : NO ME: Manufacturing Mode : NO ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Normal ME: Current Operation State : Bring up ME: Current Operation Mode : Normal ME: Error Code : No Error ME: Progress Phase : BUP Phase ME: Power Management Event : Moff->Mx wake after an error ME: Progress Phase State : 0x4e ME: FWS2: 0x114e0006 ME: Bist in progress: 0x0 ME: ICC Status : 0x3 ME: Invoke MEBx : 0x0 ME: CPU replaced : 0x0 ME: MBP ready : 0x0 ME: MFS failure : 0x0 ME: Warm reset req : 0x0 ME: CPU repl valid : 0x0 ME: (Reserved) : 0x0 ME: FW update req : 0x0 ME: (Reserved) : 0x0 ME: Current state : 0x4e ME: Current PM event: 0x1 ME: Progress code : 0x1 Waited long enough, or CPU was not replaced, continue... PASSED! Tell ME that DRAM is ready ME: FWS2: 0x11500006 ME: Bist in progress: 0x0 ME: ICC Status : 0x3 ME: Invoke MEBx : 0x0 ME: CPU replaced : 0x0 ME: MBP ready : 0x0 ME: MFS failure : 0x0 ME: Warm reset req : 0x0 ME: CPU repl valid : 0x0 ME: (Reserved) : 0x0 ME: FW update req : 0x0 ME: (Reserved) : 0x0 ME: Current state : 0x50 ME: Current PM event: 0x1 ME: Progress code : 0x1 ME: Requested BIOS Action: Continue to boot ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : NO ME: Manufacturing Mode : NO ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Normal ME: Current Operation State : Bring up ME: Current Operation Mode : Normal ME: Error Code : No Error ME: Progress Phase : BUP Phase ME: Power Management Event : Moff->Mx wake after an error ME: Progress Phase State : 0x50 memcfg DDR3 clock 1333 MHz memcfg channel assignment: A: 0, B 1, C 2 memcfg channel[0] config (00620010): ECC inactive enhanced interleave mode on rank interleave on DIMMA 4096 MB width x8 dual rank, selected DIMMB 0 MB width x8 single rank memcfg channel[1] config (00620010): ECC inactive enhanced interleave mode on rank interleave on DIMMA 4096 MB width x8 dual rank, selected DIMMB 0 MB width x8 single rank CBMEM: IMD: root @ 7ffff000 254 entries. IMD: root @ 7fffec00 62 entries. CBMEM entry for DIMM info: 0x7fffe960 MTRR Range: Start=ff800000 End=0 (Size 800000) MTRR Range: Start=0 End=1000000 (Size 1000000) MTRR Range: Start=7f800000 End=80000000 (Size 800000) MTRR Range: Start=80000000 End=80800000 (Size 800000) CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS: Locating 'fallback/ramstage' CBFS: Found @ offset 2ff00 size 12237 Decompressing stage fallback/ramstage @ 0x7ffa1fc0 (223056 bytes) Loading module at 7ffa2000 with entry 7ffa2000. filesize: 0x25bd0 memsize: 0x36710 Processing 2500 relocs. Offset value of 0x7fea2000 coreboot-4.6-335-g811d93af39-dirty Wed Jun 7 21:13:38 UTC 2017 ramstage starting... Normal boot. BS: BS_PRE_DEVICE times (us): entry 0 run 2 exit 0 BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 2 exit 0 Enumerating buses... Show all devs... Before device enumeration. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 APIC: acac: enabled 0 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:19.0: enabled 1 PCI: 00:1a.0: enabled 1 PCI: 00:1b.0: enabled 1 PCI: 00:1c.0: enabled 0 PCI: 00:1c.1: enabled 1 PCI: 00:1c.2: enabled 0 PCI: 00:1c.3: enabled 1 PCI: 00:1c.4: enabled 1 PCI: 00:1c.5: enabled 0 PCI: 00:1c.6: enabled 0 PCI: 00:1c.7: enabled 0 PCI: 00:1d.0: enabled 1 PCI: 00:1f.0: enabled 1 PNP: 00ff.1: enabled 1 PNP: 0c31.0: enabled 1 PNP: 00ff.2: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 I2C: 00:54: enabled 1 I2C: 00:55: enabled 1 I2C: 00:56: enabled 1 I2C: 00:57: enabled 1 I2C: 00:5c: enabled 1 I2C: 00:5d: enabled 1 I2C: 00:5e: enabled 1 I2C: 00:5f: enabled 1 Compare with tree... Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 APIC: acac: enabled 0 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:19.0: enabled 1 PCI: 00:1a.0: enabled 1 PCI: 00:1b.0: enabled 1 PCI: 00:1c.0: enabled 0 PCI: 00:1c.1: enabled 1 PCI: 00:1c.2: enabled 0 PCI: 00:1c.3: enabled 1 PCI: 00:1c.4: enabled 1 PCI: 00:1c.5: enabled 0 PCI: 00:1c.6: enabled 0 PCI: 00:1c.7: enabled 0 PCI: 00:1d.0: enabled 1 PCI: 00:1f.0: enabled 1 PNP: 00ff.1: enabled 1 PNP: 0c31.0: enabled 1 PNP: 00ff.2: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 I2C: 00:54: enabled 1 I2C: 00:55: enabled 1 I2C: 00:56: enabled 1 I2C: 00:57: enabled 1 I2C: 00:5c: enabled 1 I2C: 00:5d: enabled 1 I2C: 00:5e: enabled 1 I2C: 00:5f: enabled 1 Root Device scanning... root_dev_scan_bus for Root Device CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [8086/0154] ops PCI: 00:00.0 [8086/0154] enabled Capability: type 0x0d @ 0x88 Capability: type 0x01 @ 0x80 Capability: type 0x05 @ 0x90 Capability: type 0x10 @ 0xa0 Capability: type 0x0d @ 0x88 Capability: type 0x01 @ 0x80 Capability: type 0x05 @ 0x90 Capability: type 0x10 @ 0xa0 PCI: 00:01.0 subordinate bus PCI Express PCI: 00:01.0 [8086/0151] enabled PCI: 00:02.0 [8086/0000] ops PCI: 00:02.0 [8086/0166] enabled PCI: 00:04.0 [8086/0153] enabled PCI: 00:16.0 [8086/1c3a] ops PCI: 00:16.0 [8086/1c3a] enabled PCI: 00:16.1: Disabling device PCI: 00:16.1 [8086/1c3b] disabled No operations PCI: 00:16.2: Disabling device PCI: 00:16.2 [8086/1c3c] disabled No operations PCI: 00:16.3: Disabling device PCI: 00:16.3 [8086/1c3d] disabled No operations PCI: 00:19.0 [8086/1502] enabled PCI: 00:1a.0 [8086/0000] ops PCI: 00:1a.0 [8086/1c2d] enabled PCI: 00:1b.0 [8086/0000] ops PCI: 00:1b.0 [8086/1c20] enabled PCH: PCIe Root Port coalescing is enabled PCI: 00:1c.0: Disabling device PCI: 00:1c.0: check set enabled PCH: Remap PCIe function 1 to 0 PCI: 00:1c.1 [8086/0000] bus ops PCI: 00:1c.1 [8086/1c12] enabled PCI: 00:1c.2: Disabling device PCH: Remap PCIe function 3 to 0 PCI: 00:1c.3 [8086/0000] bus ops PCI: 00:1c.3 [8086/1c16] enabled PCH: Remap PCIe function 4 to 0 PCI: 00:1c.4 [8086/0000] bus ops PCI: 00:1c.4 [8086/1c18] enabled PCI: 00:1c.5: Disabling device PCI: 00:1c.6: Disabling device PCI: 00:1c.7: Disabling device PCH: RPFN 0x76543210 -> 0xfed31a0c PCH: PCIe map 1c.0 -> 1c.4 PCH: PCIe map 1c.1 -> 1c.0 PCH: PCIe map 1c.3 -> 1c.1 PCH: PCIe map 1c.4 -> 1c.3 PCI: 00:1d.0 [8086/0000] ops PCI: 00:1d.0 [8086/1c26] enabled PCI: 00:1f.0 [8086/0000] bus ops PCI: 00:1f.0 [8086/1c4f] enabled PCI: 00:1f.2 [8086/0000] ops PCI: 00:1f.2 [8086/1c01] enabled PCI: 00:1f.3 [8086/0000] bus ops PCI: 00:1f.3 [8086/1c22] enabled PCI: 00:1f.6 [8086/1c24] enabled PCI: 00:01.0 scanning... do_pci_scan_bridge for PCI: 00:01.0 PCI: pci_scan_bus for bus 01 scan_bus: scanning of bus PCI: 00:01.0 took 16 usecs PCI: 00:1c.0 scanning... do_pci_scan_bridge for PCI: 00:1c.0 PCI: pci_scan_bus for bus 02 PCI: 02:00.0 [8086/0000] ops PCI: 02:00.0 [8086/0085] enabled Capability: type 0x01 @ 0xc8 Capability: type 0x05 @ 0xd0 Capability: type 0x10 @ 0xe0 Capability: type 0x10 @ 0x40 Enabling Common Clock Configuration ASPM: Enabled L1 scan_bus: scanning of bus PCI: 00:1c.0 took 216 usecs PCI: 00:1c.1 scanning... do_pci_scan_bridge for PCI: 00:1c.1 PCI: pci_scan_bus for bus 03 PCH: Remap PCIe function 1 to 0 scan_bus: scanning of bus PCI: 00:1c.1 took 51 usecs PCI: 00:1c.3 scanning... do_pci_scan_bridge for PCI: 00:1c.3 PCI: pci_scan_bus for bus 04 PCI: 04:00.0 [1180/e823] enabled PCI: 04:00.1 [1180/e232] enabled PCI: 04:00.2 [1180/e852] enabled PCI: 04:00.3 [1180/e832] enabled Capability: type 0x05 @ 0x50 Capability: type 0x01 @ 0x78 Capability: type 0x10 @ 0x80 Capability: type 0x10 @ 0x40 Enabling Common Clock Configuration ASPM: Enabled L0s and L1 Capability: type 0x05 @ 0x50 Capability: type 0x01 @ 0x78 Capability: type 0x10 @ 0x80 Capability: type 0x10 @ 0x40 Enabling Common Clock Configuration ASPM: Enabled L0s and L1 Capability: type 0x05 @ 0x50 Capability: type 0x01 @ 0x78 Capability: type 0x10 @ 0x80 Capability: type 0x10 @ 0x40 Enabling Common Clock Configuration ASPM: Enabled L0s and L1 Capability: type 0x05 @ 0x50 Capability: type 0x01 @ 0x78 Capability: type 0x10 @ 0x80 Capability: type 0x10 @ 0x40 Enabling Common Clock Configuration ASPM: Enabled L0s and L1 scan_bus: scanning of bus PCI: 00:1c.3 took 736 usecs PCI: 00:1f.0 scanning... scan_lpc_bus for PCI: 00:1f.0 PNP: 00ff.1 enabled PNP: 0c31.0 enabled recv_ec_data: 0x38 recv_ec_data: 0x41 recv_ec_data: 0x48 recv_ec_data: 0x54 recv_ec_data: 0x33 recv_ec_data: 0x33 recv_ec_data: 0x57 recv_ec_data: 0x57 recv_ec_data: 0x14 recv_ec_data: 0x03 recv_ec_data: 0x50 recv_ec_data: 0x11 EC Firmware ID 8AHT33WW-3.20, Version 5.01B recv_ec_data: 0x00 recv_ec_data: 0x00 recv_ec_data: 0x10 recv_ec_data: 0x20 recv_ec_data: 0x30 recv_ec_data: 0x00 recv_ec_data: 0xa7 recv_ec_data: 0xa7 recv_ec_data: 0x70 PNP: 00ff.2 enabled scan_lpc_bus for PCI: 00:1f.0 done scan_bus: scanning of bus PCI: 00:1f.0 took 5344 usecs PCI: 00:1f.3 scanning... scan_generic_bus for PCI: 00:1f.3 bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled scan_generic_bus for PCI: 00:1f.3 done scan_bus: scanning of bus PCI: 00:1f.3 took 19 usecs scan_bus: scanning of bus DOMAIN: 0000 took 6675 usecs root_dev_scan_bus for Root Device done scan_bus: scanning of bus Root Device took 6681 usecs done BS: BS_DEV_ENUMERATE times (us): entry 0 run 6774 exit 0 found VGA at PCI: 00:02.0 Setting up VGA for PCI: 00:02.0 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000. PCI: 00:01.0 read_resources bus 1 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 done PCI: 00:1c.0 read_resources bus 2 link: 0 PCI: 00:1c.0 read_resources bus 2 link: 0 done PCI: 00:1c.1 read_resources bus 3 link: 0 PCI: 00:1c.1 read_resources bus 3 link: 0 done PCI: 00:1c.3 read_resources bus 4 link: 0 PCI: 00:1c.3 read_resources bus 4 link: 0 done PCI: 00:1f.0 read_resources bus 0 link: 0 PNP: 00ff.1 missing read_resources PNP: 0c31.0 missing read_resources PNP: 00ff.2 missing read_resources PCI: 00:1f.0 read_resources bus 0 link: 0 done PCI: 00:1f.3 read_resources bus 1 link: 0 PCI: 00:1f.3 read_resources bus 1 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: acac DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 PCI: 00:00.0 PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 PCI: 00:01.0 PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:02.0 PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 PCI: 00:04.0 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 PCI: 00:16.0 PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10 PCI: 00:16.1 PCI: 00:16.2 PCI: 00:16.3 PCI: 00:19.0 PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 PCI: 00:1a.0 PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 PCI: 00:1b.0 PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 PCI: 00:1c.4 PCI: 00:1c.0 child on link 0 PCI: 02:00.0 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 02:00.0 PCI: 02:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10 PCI: 00:1c.2 PCI: 00:1c.1 PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:1c.3 child on link 0 PCI: 04:00.0 PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 04:00.0 PCI: 04:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 PCI: 04:00.1 PCI: 04:00.1 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 PCI: 04:00.2 PCI: 04:00.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 PCI: 04:00.3 PCI: 04:00.3 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 10 Unknown device path type: 0 Unknown device path type: 0 resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 Unknown device path type: 0 resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 Unknown device path type: 0 resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 PCI: 00:1c.5 PCI: 00:1c.6 PCI: 00:1c.7 PCI: 00:1d.0 PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 PCI: 00:1f.0 child on link 0 PNP: 00ff.1 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 PNP: 00ff.1 PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 PNP: 0c31.0 PNP: 00ff.2 PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 PCI: 00:1f.2 PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 PCI: 00:1f.3 child on link 0 I2C: 01:54 PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 I2C: 01:54 I2C: 01:55 I2C: 01:56 I2C: 01:57 I2C: 01:5c I2C: 01:5d I2C: 01:5e I2C: 01:5f PCI: 00:1f.6 PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff Unknown device path type: 0 18 * [0x0 - 0xfff] io PCI: 00:1c.3 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:1c.3 1c * [0x0 - 0xfff] io PCI: 00:02.0 20 * [0x1000 - 0x103f] io PCI: 00:19.0 18 * [0x1040 - 0x105f] io PCI: 00:1f.2 20 * [0x1060 - 0x107f] io PCI: 00:1f.2 10 * [0x1080 - 0x1087] io PCI: 00:1f.2 18 * [0x1088 - 0x108f] io PCI: 00:1f.2 14 * [0x1090 - 0x1093] io PCI: 00:1f.2 1c * [0x1094 - 0x1097] io DOMAIN: 0000 io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 02:00.0 10 * [0x0 - 0x1fff] mem PCI: 00:1c.0 mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff Unknown device path type: 0 14 * [0x0 - 0x7fffff] prefmem PCI: 00:1c.3 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff Unknown device path type: 0 10 * [0x0 - 0x7fffff] mem PCI: 04:00.3 10 * [0x800000 - 0x8007ff] mem PCI: 04:00.0 10 * [0x801000 - 0x8010ff] mem PCI: 04:00.1 10 * [0x802000 - 0x8020ff] mem PCI: 04:00.2 10 * [0x803000 - 0x8030ff] mem PCI: 00:1c.3 mem: base: 803100 size: 900000 align: 22 gran: 20 limit: ffffffff done PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem PCI: 00:1c.3 20 * [0x10000000 - 0x108fffff] mem PCI: 00:1c.3 24 * [0x10c00000 - 0x113fffff] prefmem PCI: 00:02.0 10 * [0x11400000 - 0x117fffff] mem PCI: 00:1c.0 20 * [0x11800000 - 0x118fffff] mem PCI: 00:19.0 10 * [0x11900000 - 0x1191ffff] mem PCI: 00:04.0 10 * [0x11920000 - 0x11927fff] mem PCI: 00:1b.0 10 * [0x11928000 - 0x1192bfff] mem PCI: 00:19.0 14 * [0x1192c000 - 0x1192cfff] mem PCI: 00:1f.6 10 * [0x1192d000 - 0x1192dfff] mem PCI: 00:1f.2 24 * [0x1192e000 - 0x1192e7ff] mem PCI: 00:1a.0 10 * [0x1192f000 - 0x1192f3ff] mem PCI: 00:1d.0 10 * [0x11930000 - 0x119303ff] mem PCI: 00:1f.3 10 * [0x11931000 - 0x119310ff] mem PCI: 00:16.0 10 * [0x11932000 - 0x1193200f] mem DOMAIN: 0000 mem: base: 11932010 size: 11932010 align: 28 gran: 0 limit: ffffffff done avoid_fixed_resources: DOMAIN: 0000 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff constrain_resources: PCI: 00:00.0 60 base f8000000 limit fbffffff mem (fixed) constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) constrain_resources: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed) skipping PNP: 00ff.2@60 fixed resource, size=0! skipping PNP: 00ff.2@62 fixed resource, size=0! skipping PNP: 00ff.2@64 fixed resource, size=0! skipping PNP: 00ff.2@66 fixed resource, size=0! avoid_fixed_resources:@DOMAIN: 0000 10000000 base 0000167c limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff Setting resources... DOMAIN: 0000 io: base:167c size:1098 align:12 gran:0 limit:ffff PCI: 00:1c.3 1c * [0x2000 - 0x2fff] io PCI: 00:02.0 20 * [0x3000 - 0x303f] io PCI: 00:19.0 18 * [0x3040 - 0x305f] io PCI: 00:1f.2 20 * [0x3060 - 0x307f] io PCI: 00:1f.2 10 * [0x3080 - 0x3087] io PCI: 00:1f.2 18 * [0x3088 - 0x308f] io PCI: 00:1f.2 14 * [0x3090 - 0x3093] io PCI: 00:1f.2 1c * [0x3094 - 0x3097] io DOMAIN: 0000 io: next_base: 3098 size: 1098 align: 12 gran: 0 done PCI: 00:01.0 io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:01.0 io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:1c.3 io: base:2000 size:1000 align:12 gran:12 limit:2fff Unknown device path type: 0 18 * [0x2000 - 0x2fff] io PCI: 00:1c.3 io: next_base: 3000 size: 1000 align: 12 gran: 12 done DOMAIN: 0000 mem: base:e0000000 size:11932010 align:28 gran:0 limit:f7ffffff PCI: 00:02.0 18 * [0xe0000000 - 0xefffffff] prefmem PCI: 00:1c.3 20 * [0xf0000000 - 0xf08fffff] mem PCI: 00:1c.3 24 * [0xf0c00000 - 0xf13fffff] prefmem PCI: 00:02.0 10 * [0xf1400000 - 0xf17fffff] mem PCI: 00:1c.0 20 * [0xf1800000 - 0xf18fffff] mem PCI: 00:19.0 10 * [0xf1900000 - 0xf191ffff] mem PCI: 00:04.0 10 * [0xf1920000 - 0xf1927fff] mem PCI: 00:1b.0 10 * [0xf1928000 - 0xf192bfff] mem PCI: 00:19.0 14 * [0xf192c000 - 0xf192cfff] mem PCI: 00:1f.6 10 * [0xf192d000 - 0xf192dfff] mem PCI: 00:1f.2 24 * [0xf192e000 - 0xf192e7ff] mem PCI: 00:1a.0 10 * [0xf192f000 - 0xf192f3ff] mem PCI: 00:1d.0 10 * [0xf1930000 - 0xf19303ff] mem PCI: 00:1f.3 10 * [0xf1931000 - 0xf19310ff] mem PCI: 00:16.0 10 * [0xf1932000 - 0xf193200f] mem DOMAIN: 0000 mem: next_base: f1932010 size: 11932010 align: 28 gran: 0 done PCI: 00:01.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff PCI: 00:01.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done PCI: 00:01.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff PCI: 00:01.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff PCI: 00:1c.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.0 mem: base:f1800000 size:100000 align:20 gran:20 limit:f18fffff PCI: 02:00.0 10 * [0xf1800000 - 0xf1801fff] mem PCI: 00:1c.0 mem: next_base: f1802000 size: 100000 align: 20 gran: 20 done PCI: 00:1c.1 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff PCI: 00:1c.1 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.1 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff PCI: 00:1c.1 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.3 prefmem: base:f0c00000 size:800000 align:22 gran:20 limit:f13fffff Unknown device path type: 0 14 * [0xf0c00000 - 0xf13fffff] prefmem PCI: 00:1c.3 prefmem: next_base: f1400000 size: 800000 align: 22 gran: 20 done PCI: 00:1c.3 mem: base:f0000000 size:900000 align:22 gran:20 limit:f08fffff Unknown device path type: 0 10 * [0xf0000000 - 0xf07fffff] mem PCI: 04:00.3 10 * [0xf0800000 - 0xf08007ff] mem PCI: 04:00.0 10 * [0xf0801000 - 0xf08010ff] mem PCI: 04:00.1 10 * [0xf0802000 - 0xf08020ff] mem PCI: 04:00.2 10 * [0xf0803000 - 0xf08030ff] mem PCI: 00:1c.3 mem: next_base: f0803100 size: 900000 align: 22 gran: 20 done Root Device assign_resources, bus 0 link: 0 TOUUD 0x27b600000 TOLUD 0x82a00000 TOM 0x200000000 MEBASE 0x1fe000000 IGD decoded, subtracting 32M UMA and 2M GTT TSEG base 0x80000000 size 8M Available memory below 4GB: 2048M Available memory above 4GB: 6070M DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io PCI: 00:01.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem PCI: 00:01.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem PCI: 00:02.0 10 <- [0x00f1400000 - 0x00f17fffff] size 0x00400000 gran 0x16 mem64 PCI: 00:02.0 18 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64 PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io PCI: 00:04.0 10 <- [0x00f1920000 - 0x00f1927fff] size 0x00008000 gran 0x0f mem64 PCI: 00:16.0 10 <- [0x00f1932000 - 0x00f193200f] size 0x00000010 gran 0x04 mem64 PCI: 00:19.0 10 <- [0x00f1900000 - 0x00f191ffff] size 0x00020000 gran 0x11 mem PCI: 00:19.0 14 <- [0x00f192c000 - 0x00f192cfff] size 0x00001000 gran 0x0c mem PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io PCI: 00:1a.0 10 <- [0x00f192f000 - 0x00f192f3ff] size 0x00000400 gran 0x0a mem PCI: 00:1b.0 10 <- [0x00f1928000 - 0x00f192bfff] size 0x00004000 gran 0x0e mem64 PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io PCI: 00:1c.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem PCI: 00:1c.0 20 <- [0x00f1800000 - 0x00f18fffff] size 0x00100000 gran 0x14 bus 02 mem PCI: 00:1c.0 assign_resources, bus 2 link: 0 PCI: 02:00.0 10 <- [0x00f1800000 - 0x00f1801fff] size 0x00002000 gran 0x0d mem64 PCI: 00:1c.0 assign_resources, bus 2 link: 0 PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io PCI: 00:1c.1 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 prefmem PCI: 00:1c.1 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 mem PCI: 00:1c.3 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 04 io PCI: 00:1c.3 24 <- [0x00f0c00000 - 0x00f13fffff] size 0x00800000 gran 0x14 bus 04 prefmem PCI: 00:1c.3 20 <- [0x00f0000000 - 0x00f08fffff] size 0x00900000 gran 0x14 bus 04 mem PCI: 00:1c.3 assign_resources, bus 4 link: 0 PCI: 04:00.0 10 <- [0x00f0801000 - 0x00f08010ff] size 0x00000100 gran 0x08 mem PCI: 04:00.1 10 <- [0x00f0802000 - 0x00f08020ff] size 0x00000100 gran 0x08 mem PCI: 04:00.2 10 <- [0x00f0803000 - 0x00f08030ff] size 0x00000100 gran 0x08 mem PCI: 04:00.3 10 <- [0x00f0800000 - 0x00f08007ff] size 0x00000800 gran 0x0b mem Unknown device path type: 0 missing set_resources PCI: 00:1c.3 assign_resources, bus 4 link: 0 PCI: 00:1d.0 10 <- [0x00f1930000 - 0x00f19303ff] size 0x00000400 gran 0x0a mem PCI: 00:1f.0 assign_resources, bus 0 link: 0 PNP: 00ff.1 missing set_resources PNP: 00ff.2 missing set_resources PCI: 00:1f.0 assign_resources, bus 0 link: 0 PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io PCI: 00:1f.2 24 <- [0x00f192e000 - 0x00f192e7ff] size 0x00000800 gran 0x0b mem PCI: 00:1f.3 10 <- [0x00f1931000 - 0x00f19310ff] size 0x00000100 gran 0x08 mem64 PCI: 00:1f.3 assign_resources, bus 1 link: 0 PCI: 00:1f.3 assign_resources, bus 1 link: 0 PCI: 00:1f.6 10 <- [0x00f192d000 - 0x00f192dfff] size 0x00001000 gran 0x0c mem64 DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: acac DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 167c size 1098 align 12 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base e0000000 size 11932010 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100 DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 DOMAIN: 0000 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4 DOMAIN: 0000 resource base 100000000 size 17b600000 align 0 gran 0 limit 0 flags e0004200 index 5 DOMAIN: 0000 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6 DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8 DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9 DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a PCI: 00:00.0 PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 PCI: 00:01.0 PCI: 00:01.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:01.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 PCI: 00:01.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20 PCI: 00:02.0 PCI: 00:02.0 resource base f1400000 size 400000 align 22 gran 22 limit f17fffff flags 60000201 index 10 PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18 PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20 PCI: 00:04.0 PCI: 00:04.0 resource base f1920000 size 8000 align 15 gran 15 limit f1927fff flags 60000201 index 10 PCI: 00:16.0 PCI: 00:16.0 resource base f1932000 size 10 align 12 gran 4 limit f193200f flags 60000201 index 10 PCI: 00:16.1 PCI: 00:16.2 PCI: 00:16.3 PCI: 00:19.0 PCI: 00:19.0 resource base f1900000 size 20000 align 17 gran 17 limit f191ffff flags 60000200 index 10 PCI: 00:19.0 resource base f192c000 size 1000 align 12 gran 12 limit f192cfff flags 60000200 index 14 PCI: 00:19.0 resource base 3040 size 20 align 5 gran 5 limit 305f flags 60000100 index 18 PCI: 00:1a.0 PCI: 00:1a.0 resource base f192f000 size 400 align 12 gran 10 limit f192f3ff flags 60000200 index 10 PCI: 00:1b.0 PCI: 00:1b.0 resource base f1928000 size 4000 align 14 gran 14 limit f192bfff flags 60000201 index 10 PCI: 00:1c.4 PCI: 00:1c.0 child on link 0 PCI: 02:00.0 PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 PCI: 00:1c.0 resource base f1800000 size 100000 align 20 gran 20 limit f18fffff flags 60080202 index 20 PCI: 02:00.0 PCI: 02:00.0 resource base f1800000 size 2000 align 13 gran 13 limit f1801fff flags 60000201 index 10 PCI: 00:1c.2 PCI: 00:1c.1 PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:1c.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 PCI: 00:1c.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20 PCI: 00:1c.3 child on link 0 PCI: 04:00.0 PCI: 00:1c.3 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c PCI: 00:1c.3 resource base f0c00000 size 800000 align 22 gran 20 limit f13fffff flags 60081202 index 24 PCI: 00:1c.3 resource base f0000000 size 900000 align 22 gran 20 limit f08fffff flags 60080202 index 20 PCI: 04:00.0 PCI: 04:00.0 resource base f0801000 size 100 align 12 gran 8 limit f08010ff flags 60000200 index 10 PCI: 04:00.1 PCI: 04:00.1 resource base f0802000 size 100 align 12 gran 8 limit f08020ff flags 60000200 index 10 PCI: 04:00.2 PCI: 04:00.2 resource base f0803000 size 100 align 12 gran 8 limit f08030ff flags 60000200 index 10 PCI: 04:00.3 PCI: 04:00.3 resource base f0800000 size 800 align 12 gran 11 limit f08007ff flags 60000200 index 10 Unknown device path type: 0 Unknown device path type: 0 resource base f0000000 size 800000 align 22 gran 22 limit f07fffff flags 40000200 index 10 Unknown device path type: 0 resource base f0c00000 size 800000 align 22 gran 22 limit f13fffff flags 40001200 index 14 Unknown device path type: 0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 40000100 index 18 PCI: 00:1c.5 PCI: 00:1c.6 PCI: 00:1c.7 PCI: 00:1d.0 PCI: 00:1d.0 resource base f1930000 size 400 align 12 gran 10 limit f19303ff flags 60000200 index 10 PCI: 00:1f.0 child on link 0 PNP: 00ff.1 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 PNP: 00ff.1 PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 PNP: 0c31.0 PNP: 00ff.2 PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 PCI: 00:1f.2 PCI: 00:1f.2 resource base 3080 size 8 align 3 gran 3 limit 3087 flags 60000100 index 10 PCI: 00:1f.2 resource base 3090 size 4 align 2 gran 2 limit 3093 flags 60000100 index 14 PCI: 00:1f.2 resource base 3088 size 8 align 3 gran 3 limit 308f flags 60000100 index 18 PCI: 00:1f.2 resource base 3094 size 4 align 2 gran 2 limit 3097 flags 60000100 index 1c PCI: 00:1f.2 resource base 3060 size 20 align 5 gran 5 limit 307f flags 60000100 index 20 PCI: 00:1f.2 resource base f192e000 size 800 align 12 gran 11 limit f192e7ff flags 60000200 index 24 PCI: 00:1f.3 child on link 0 I2C: 01:54 PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 PCI: 00:1f.3 resource base f1931000 size 100 align 12 gran 8 limit f19310ff flags 60000201 index 10 I2C: 01:54 I2C: 01:55 I2C: 01:56 I2C: 01:57 I2C: 01:5c I2C: 01:5d I2C: 01:5e I2C: 01:5f PCI: 00:1f.6 PCI: 00:1f.6 resource base f192d000 size 1000 align 12 gran 12 limit f192dfff flags 60000201 index 10 Done allocating resources. BS: BS_DEV_RESOURCES times (us): entry 0 run 2832 exit 0 Enabling resources... PCI: 00:00.0 subsystem <- 8086/0154 PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 bridge ctrl <- 0003 PCI: 00:01.0 cmd <- 00 PCI: 00:02.0 subsystem <- 8086/0166 PCI: 00:02.0 cmd <- 03 PCI: 00:04.0 cmd <- 02 PCI: 00:16.0 subsystem <- 8086/1c3a PCI: 00:16.0 cmd <- 02 PCI: 00:19.0 subsystem <- 8086/1502 PCI: 00:19.0 cmd <- 103 PCI: 00:1a.0 subsystem <- 8086/1c2d PCI: 00:1a.0 cmd <- 102 PCI: 00:1b.0 subsystem <- 8086/1c20 PCI: 00:1b.0 cmd <- 102 PCI: 00:1c.0 bridge ctrl <- 0003 PCI: 00:1c.0 subsystem <- 8086/1c12 PCI: 00:1c.0 cmd <- 106 PCI: 00:1c.1 bridge ctrl <- 0003 PCI: 00:1c.1 subsystem <- 8086/1c16 PCI: 00:1c.1 cmd <- 100 PCI: 00:1c.3 bridge ctrl <- 0003 PCI: 00:1c.3 subsystem <- 8086/1c18 PCI: 00:1c.3 cmd <- 107 PCI: 00:1d.0 subsystem <- 8086/1c26 PCI: 00:1d.0 cmd <- 102 pch_decode_init PCI: 00:1f.0 subsystem <- 8086/1c4f PCI: 00:1f.0 cmd <- 107 PCI: 00:1f.2 subsystem <- 8086/1c03 PCI: 00:1f.2 cmd <- 03 PCI: 00:1f.3 subsystem <- 8086/1c22 PCI: 00:1f.3 cmd <- 103 PCI: 00:1f.6 cmd <- 02 PCI: 02:00.0 cmd <- 02 PCI: 04:00.0 cmd <- 06 PCI: 04:00.1 cmd <- 06 PCI: 04:00.2 cmd <- 06 PCI: 04:00.3 cmd <- 02 done. BS: BS_DEV_ENABLE times (us): entry 0 run 181 exit 0 Initializing devices... Root Device init ... Root Device init finished in 0 usecs CPU_CLUSTER: 0 init ... start_eip=0x00001000, code_size=0x00000031 Setting up SMI for CPU Loading module at 00038000 with entry 00038000. filesize: 0x160 memsize: 0x160 Processing 10 relocs. Offset value of 0x00038000 SMM Module: stub loaded at 00038000. Will call 7ffb67a2(7ffd4680) Installing SMM handler to 0x80000000 Loading module at 80010000 with entry 8001010a. filesize: 0x1198 memsize: 0x51b8 Processing 60 relocs. Offset value of 0x80010000 Loading module at 80008000 with entry 80008000. filesize: 0x160 memsize: 0x160 Processing 10 relocs. Offset value of 0x80008000 SMM Module: placing jmp sequence at 80007c00 rel16 0x03fd SMM Module: placing jmp sequence at 80007800 rel16 0x07fd SMM Module: placing jmp sequence at 80007400 rel16 0x0bfd SMM Module: stub loaded at 80008000. Will call 8001010a(00000000) Initializing southbridge SMI... ... pmbase = 0x0500 SMI_STS: MCSMI PM1 PM1_STS: PRBTNOR PWRBTN GPE0_STS: GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO1 GPIO0 TCO_SCI ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 TCO_STS: ... raise SMI# In relocation handler: cpu 0 New SMBASE=0x80000000 IEDBASE=0x80400000 @ 0003fc00 Writing SMRR. base = 0x80000006, mask=0xff800800 Relocation complete. Locking SMM. Initializing CPU #0 CPU: vendor Intel device 306a9 CPU: family 06, model 3a, stepping 09 Enabling cache CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: Found @ offset 12c40 size 5800 microcode: sig=0x306a9 pf=0x10 revision=0x1b CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. MTRR: Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6 0x0000000080000000 - 0x00000000e0000000 size 0x60000000 type 0 0x00000000e0000000 - 0x00000000f0000000 size 0x10000000 type 1 0x00000000f0000000 - 0x0000000100000000 size 0x10000000 type 0 0x0000000100000000 - 0x000000027b600000 size 0x17b600000 type 6 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() CPU physical address size: 36 bits MTRR: default type WB/UC MTRR counts: 4/10. MTRR: WB selected as default type. MTRR: 0 base 0x0000000080000000 mask 0x0000000fc0000000 type 0 MTRR: 1 base 0x00000000c0000000 mask 0x0000000fe0000000 type 0 MTRR: 2 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1 MTRR: 3 base 0x00000000f0000000 mask 0x0000000ff0000000 type 0 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local APIC... apic_id: 0x00 done. VMX status: enabled, locked model_x06ax: energy policy set to 6 model_x06ax: frequency set to 2600 Turbo is available but hidden Turbo has been enabled CPU: 0 has 2 cores, 2 threads per core CPU: 0 has core 1 CPU1: stack_base 7ffce000, stack_end 7ffceff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 1. After apic_write. In relocation handler: cpu 1 New SMBASE=0x7ffffc00 IEDBASE=0x80400000 @ 0003fc00 Writing SMRR. base = 0x80000006, mask=0xff800800 Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 1. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #1 CPU: 0 has core 2 CPU: vendor Intel device 306a9 CPU: family 06, model 3a, stepping 09 Enabling cache CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: Found @ offset 12c40 size 5800 microcode: sig=0x306a9 pf=0x10 revision=0x1b CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() CPU physical address size: 36 bits MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local APIC... apic_id: 0x01 done. VMX status: enabled, locked model_x06ax: energy policy set to 6 model_x06ax: frequency set to 2600 CPU #1 initialized CPU2: stack_base 7ffcd000, stack_end 7ffcdff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 2. After apic_write. In relocation handler: cpu 2 Startup point 1. Waiting for send to finish... +New SMBASE=0x7ffff800 IEDBASE=0x80400000 @ 0003fc00 Sending STARTUP #2 to 2. After apic_write. Writing SMRR. base = 0x80000006, mask=0xff800800 Startup point 1. Waiting for send to finish... +After Startup. CPU: 0 has core 3 Initializing CPU #2 CPU: vendor Intel device 306a9 CPU: family 06, model 3a, stepping 09 Enabling cache CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: Found @ offset 12c40 size 5800 microcode: sig=0x306a9 pf=0x10 revision=0x0 microcode: updated to revision 0x1b date=2014-05-29 CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() CPU physical address size: 36 bits MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local APIC... apic_id: 0x02 done. VMX status: enabled, locked model_x06ax: energy policy set to 6 model_x06ax: frequency set to 2600 CPU #2 initialized CPU3: stack_base 7ffcc000, stack_end 7ffccff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 3. After apic_write. In relocation handler: cpu 3 New SMBASE=0x7ffff400 IEDBASE=0x80400000 @ 0003fc00 Writing SMRR. base = 0x80000006, mask=0xff800800 Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 3. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU #0 initialized Waiting for 1 CPUS to stop Initializing CPU #3 CPU: vendor Intel device 306a9 CPU: family 06, model 3a, stepping 09 Enabling cache CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: Found @ offset 12c40 size 5800 microcode: sig=0x306a9 pf=0x10 revision=0x1b CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() CPU physical address size: 36 bits MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local APIC... apic_id: 0x03 done. VMX status: enabled, locked model_x06ax: energy policy set to 6 model_x06ax: frequency set to 2600 CPU #3 initialized All AP CPUs stopped (403 loops) CPU0: stack: 7ffcf000 - 7ffd0000, lowest used address 7ffcfab0, stack used: 1360 bytes CPU1: stack: 7ffce000 - 7ffcf000, lowest used address 7ffcec94, stack used: 876 bytes CPU2: stack: 7ffcd000 - 7ffce000, lowest used address 7ffcdc94, stack used: 876 bytes CPU3: stack: 7ffcc000 - 7ffcd000, lowest used address 7ffccc94, stack used: 876 bytes CPU_CLUSTER: 0 init finished in 47833 usecs PCI: 00:00.0 init ... Disabling PEG12. Disabling PEG11. Disabling PEG60. Disabling Device 7. Set BIOS_RESET_CPL CPU TDP: 35 Watts PCI: 00:00.0 init finished in 1013 usecs PCI: 00:02.0 init ... GT Power Management Init IVB GT2 25W-35W Power Meter Weights GT Power Management Init (post VBIOS) PCI: 00:02.0 init finished in 127 usecs PCI: 00:04.0 init ... PCI: 00:04.0 init finished in 0 usecs PCI: 00:16.0 init ... ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : NO ME: Manufacturing Mode : NO ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Normal ME: Current Operation State : M0 with UMA ME: Current Operation Mode : Normal ME: Error Code : No Error ME: Progress Phase : Policy Module ME: Power Management Event : Moff->Mx wake after an error ME: Progress Phase State : Entery into Policy Module ME: BIOS path: Normal ME: Extend SHA-256: 9dde6eb9d0486f3b7e39c847c30fb5e6cab3c007280854734503b4bbaaa464e5 ME: Firmware Version 7.1.1088.13 (code) 7.1.1088.13 (recovery) ME Capability: Full Network manageability : enabled ME Capability: Regular Network manageability : disabled ME Capability: Manageability : enabled ME Capability: Small business technology : disabled ME Capability: Level III manageability : disabled ME Capability: IntelR Anti-Theft (AT) : enabled ME Capability: IntelR Capability Licensing Service (CLS) : enabled ME Capability: IntelR Power Sharing Technology (MPC) : enabled ME Capability: ICC Over Clocking : enabled ME Capability: Protected Audio Video Path (PAVP) : enabled ME Capability: IPV6 : enabled ME Capability: KVM Remote Control (KVM) : enabled ME Capability: Outbreak Containment Heuristic (OCH) : disabled ME Capability: Virtual LAN (VLAN) : enabled ME Capability: TLS : enabled ME Capability: Wireless LAN (WLAN) : enabled PCI: 00:16.0 init finished in 95197 usecs PCI: 00:19.0 init ... PCI: 00:19.0 init finished in 0 usecs PCI: 00:1a.0 init ... EHCI: Setting up controller.. done. PCI: 00:1a.0 init finished in 12 usecs PCI: 00:1b.0 init ... Azalia: base = f1928000 Azalia: codec_mask = 09 Azalia: Initializing codec #3 Azalia: codec viddid: 80862805 Azalia: No verb! Azalia: Initializing codec #0 Azalia: codec viddid: 14f1506e Azalia: verb_size: 52 Azalia: verb loaded. PCI: 00:1b.0 init finished in 4303 usecs PCI: 00:1c.0 init ... Initializing PCH PCIe bridge. PCI: 00:1c.0 init finished in 8 usecs PCI: 00:1c.1 init ... Initializing PCH PCIe bridge. PCI: 00:1c.1 init finished in 8 usecs PCI: 00:1c.3 init ... Initializing PCH PCIe bridge. PCI: 00:1c.3 init finished in 13 usecs PCI: 00:1d.0 init ... EHCI: Setting up controller.. done. PCI: 00:1d.0 init finished in 12 usecs PCI: 00:1f.0 init ... pch: lpc_init IOAPIC: Initializing IOAPIC at 0xfec00000 IOAPIC: Bootstrap Processor Local APIC = 0x00 IOAPIC: ID = 0x02 IOAPIC: Dumping registers reg 0x0000: 0x02000000 reg 0x0001: 0x00170020 reg 0x0002: 0x00170020 Set power off after power failure. NMI sources disabled. CougarPoint PM init rtc_failed = 0x0 RTC Init Enabling BIOS updates outside of SMM... Disabling ACPI via APMC: done. pch_spi_init PCI: 00:1f.0 init finished in 424 usecs PCI: 00:1f.2 init ... SATA: Initializing... SATA: Controller in AHCI mode. ABAR: f192e000 PCI: 00:1f.2 init finished in 72 usecs PCI: 00:1f.3 init ... PCI: 00:1f.3 init finished in 7 usecs PCI: 00:1f.6 init ... PCI: 00:1f.6 init finished in 0 usecs PCI: 02:00.0 init ... PCI: 02:00.0 init finished in 0 usecs PCI: 04:00.0 init ... PCI: 04:00.0 init finished in 0 usecs PCI: 04:00.1 init ... PCI: 04:00.1 init finished in 0 usecs PCI: 04:00.2 init ... PCI: 04:00.2 init finished in 0 usecs PCI: 04:00.3 init ... PCI: 04:00.3 init finished in 0 usecs PNP: 00ff.2 init ... PNP: 00ff.2 init finished in 0 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ... I2C: 01:54 init finished in 1 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ... I2C: 01:55 init finished in 0 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ... I2C: 01:56 init finished in 0 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ... I2C: 01:57 init finished in 0 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ... Locking EEPROM RFID init EEPROM done I2C: 01:5c init finished in 23536 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ... I2C: 01:5d init finished in 0 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ... I2C: 01:5e init finished in 0 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ... I2C: 01:5f init finished in 0 usecs Devices initialized Show all devs... After init. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 APIC: acac: enabled 0 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:19.0: enabled 1 PCI: 00:1a.0: enabled 1 PCI: 00:1b.0: enabled 1 PCI: 00:1c.4: enabled 0 PCI: 00:1c.0: enabled 1 PCI: 00:1c.2: enabled 0 PCI: 00:1c.1: enabled 1 PCI: 00:1c.3: enabled 1 PCI: 00:1c.5: enabled 0 PCI: 00:1c.6: enabled 0 PCI: 00:1c.7: enabled 0 PCI: 00:1d.0: enabled 1 PCI: 00:1f.0: enabled 1 PNP: 00ff.1: enabled 1 PNP: 0c31.0: enabled 1 PNP: 00ff.2: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 I2C: 01:54: enabled 1 I2C: 01:55: enabled 1 I2C: 01:56: enabled 1 I2C: 01:57: enabled 1 I2C: 01:5c: enabled 1 I2C: 01:5d: enabled 1 I2C: 01:5e: enabled 1 I2C: 01:5f: enabled 1 PCI: 00:04.0: enabled 1 PCI: 00:1f.6: enabled 1 PCI: 02:00.0: enabled 1 PCI: 04:00.0: enabled 1 PCI: 04:00.1: enabled 1 PCI: 04:00.2: enabled 1 PCI: 04:00.3: enabled 1 Unknown device path type: 0 : enabled 1 APIC: 01: enabled 1 APIC: 02: enabled 1 APIC: 03: enabled 1 BS: BS_DEV_INIT times (us): entry 5 run 172715 exit 0 Finalize devices... PCI: 00:1f.0 final Devices finalized BS: BS_POST_DEVICE times (us): entry 0 run 4 exit 0 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3 exit 0 Updating MRC cache data. No MRC cache in cbmem. Can't update flash. CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS: Locating 'fallback/dsdt.aml' CBFS: Found @ offset 191c0 size 34fa CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS: Locating 'fallback/slic' CBFS: 'fallback/slic' not found. ACPI: Writing ACPI tables at 7ff3e000. ACPI: * FACS ACPI: * DSDT ACPI: * FADT ACPI: added table 1/32, length now 40 ACPI: * SSDT Found 1 CPU(s) with 4 core(s) each. PSS: 2601MHz power 35000 control 0x2100 status 0x2100 PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 PSS: 2400MHz power 31561 control 0x1800 status 0x1800 PSS: 2200MHz power 28247 control 0x1600 status 0x1600 PSS: 2000MHz power 25084 control 0x1400 status 0x1400 PSS: 1800MHz power 22064 control 0x1200 status 0x1200 PSS: 1600MHz power 19135 control 0x1000 status 0x1000 PSS: 1400MHz power 16344 control 0xe00 status 0xe00 PSS: 1200MHz power 13666 control 0xc00 status 0xc00 PSS: 2601MHz power 35000 control 0x2100 status 0x2100 PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 PSS: 2400MHz power 31561 control 0x1800 status 0x1800 PSS: 2200MHz power 28247 control 0x1600 status 0x1600 PSS: 2000MHz power 25084 control 0x1400 status 0x1400 PSS: 1800MHz power 22064 control 0x1200 status 0x1200 PSS: 1600MHz power 19135 control 0x1000 status 0x1000 PSS: 1400MHz power 16344 control 0xe00 status 0xe00 PSS: 1200MHz power 13666 control 0xc00 status 0xc00 PSS: 2601MHz power 35000 control 0x2100 status 0x2100 PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 PSS: 2400MHz power 31561 control 0x1800 status 0x1800 PSS: 2200MHz power 28247 control 0x1600 status 0x1600 PSS: 2000MHz power 25084 control 0x1400 status 0x1400 PSS: 1800MHz power 22064 control 0x1200 status 0x1200 PSS: 1600MHz power 19135 control 0x1000 status 0x1000 PSS: 1400MHz power 16344 control 0xe00 status 0xe00 PSS: 1200MHz power 13666 control 0xc00 status 0xc00 PSS: 2601MHz power 35000 control 0x2100 status 0x2100 PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 PSS: 2400MHz power 31561 control 0x1800 status 0x1800 PSS: 2200MHz power 28247 control 0x1600 status 0x1600 PSS: 2000MHz power 25084 control 0x1400 status 0x1400 PSS: 1800MHz power 22064 control 0x1200 status 0x1200 PSS: 1600MHz power 19135 control 0x1000 status 0x1000 PSS: 1400MHz power 16344 control 0xe00 status 0xe00 PSS: 1200MHz power 13666 control 0xc00 status 0xc00 ACPI: added table 2/32, length now 44 ACPI: * MCFG ACPI: added table 3/32, length now 48 ACPI: * TCPA TCPA log created at 7ff2d000 ACPI: added table 4/32, length now 52 ACPI: * MADT ACPI: added table 5/32, length now 56 current = 7ff430c0 ACPI: * DMAR ACPI: added table 6/32, length now 60 current = 7ff43170 ACPI: * IGD OpRegion GET_VBIOS: fa45 d49d 5f f0 db VBIOS not found. ACPI: * HPET ACPI: added table 7/32, length now 64 ACPI: done. ACPI tables: 20912 bytes. smbios_write_tables: 7ff2a000 recv_ec_data: 0x38 recv_ec_data: 0x41 recv_ec_data: 0x48 recv_ec_data: 0x54 recv_ec_data: 0x33 recv_ec_data: 0x33 recv_ec_data: 0x57 recv_ec_data: 0x57 recv_ec_data: 0x14 recv_ec_data: 0x03 Create SMBIOS type 17 Root Device (LENOVO ThinkPad T520) CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge) APIC: 00 (unknown) APIC: acac (Intel SandyBridge/IvyBridge CPU) DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge) PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge) PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge) PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge) PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7) PNP: 0c31.0 (unknown) PNP: 00ff.2 (Lenovo H8 EC) PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) I2C: 01:54 (AT24RF08C) I2C: 01:55 (AT24RF08C) I2C: 01:56 (AT24RF08C) I2C: 01:57 (AT24RF08C) I2C: 01:5c (AT24RF08C) I2C: 01:5d (AT24RF08C) I2C: 01:5e (AT24RF08C) I2C: 01:5f (AT24RF08C) PCI: 00:04.0 (unknown) PCI: 00:1f.6 (unknown) PCI: 02:00.0 (unknown) PCI: 04:00.0 (unknown) PCI: 04:00.1 (unknown) PCI: 04:00.2 (unknown) PCI: 04:00.3 (unknown) Unknown device path type: 0 (unknown) APIC: 01 (unknown) APIC: 02 (unknown) APIC: 03 (unknown) SMBIOS tables: 654 bytes. Writing table forward entry at 0x00000500 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 5fe8 Writing coreboot table at 0x7ff62000 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000a0000-00000000000fffff: RESERVED 3. 0000000000100000-000000007ff29fff: RAM 4. 000000007ff2a000-000000007fffffff: CONFIGURATION TABLES 5. 0000000080000000-00000000829fffff: RESERVED 6. 00000000f8000000-00000000fbffffff: RESERVED 7. 00000000fed90000-00000000fed91fff: RESERVED 8. 0000000100000000-000000027b5fffff: RAM Manufacturer: ef SF: Detected W25Q64 with sector size 0x1000, total 0x800000 CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) FMAP: Found "FLASH" version 1.1 at 700000. FMAP: base = ff800000 size = 800000 #areas = 3 Wrote coreboot table at: 7ff62000, 0x314 bytes, checksum edaa coreboot table: 812 bytes. IMD ROOT 0. 7ffff000 00001000 IMD SMALL 1. 7fffe000 00001000 CONSOLE 2. 7ffde000 00020000 ROMSTG STCK 3. 7ffd9000 00005000 RAMSTAGE 4. 7ffa1000 00038000 57a9e100 5. 7ff6a000 00036710 COREBOOT 6. 7ff62000 00008000 ACPI 7. 7ff3e000 00024000 ACPI GNVS 8. 7ff3d000 00001000 TCPA LOG 9. 7ff2d000 00010000 4f444749 10. 7ff2b000 00002000 SMBIOS 11. 7ff2a000 00000800 IMD small region: IMD ROOT 0. 7fffec00 00000400 CAR GLOBALS 1. 7fffeac0 00000140 MEM INFO 2. 7fffe960 00000141 ROMSTAGE 3. 7fffe940 00000004 57a9e000 4. 7fffe920 00000010 BS: BS_WRITE_TABLES times (us): entry 1 run 25305 exit 0 CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS: Locating 'fallback/payload' CBFS: Found @ offset 52200 size f65f Loading segment from ROM address 0xfff52338 code (compression=1) New segment dstaddr 0xe31c0 memsize 0x1ce40 srcaddr 0xfff52370 filesize 0xf627 Loading segment from ROM address 0xfff52354 Entry Point 0x000ff06e Payload being loaded at below 1MiB without region being marked as RAM usable. Loading Segment: addr: 0x00000000000e31c0 memsz: 0x000000000001ce40 filesz: 0x000000000000f627 lb: [0x000000007ffa2000, 0x000000007ffd8710) Post relocation: addr: 0x00000000000e31c0 memsz: 0x000000000001ce40 filesz: 0x000000000000f627 using LZMA [ 0x000e31c0, 00100000, 0x00100000) <- fff52370 dest 000e31c0, end 00100000, bouncebuffer ffffffff Loaded segments BS: BS_PAYLOAD_LOAD times (us): entry 0 run 27462 exit 0 PCH watchdog disabled Jumping to boot code at 000ff06e(7ff62000) CPU0: stack: 7ffcf000 - 7ffd0000, lowest used address 7ffcfab0, stack used: 1360 bytes ????Or?? T?C???9|Q?[?h^??\????b?~,Er?7M4A?B |?j????????&???el"Sev)es 6/w"(Cougar Point/Panuher Point) So}thbr)dge) PCI: 00:1f. ?Intel Sep)es 6/7 (?ougas point/Panther ?oint Southbridge)e???5??qtX???????6[???????%?igL??{c+2R[??p+)"BZ_?Ccc??]I?$o????:,h?^????w???t<`*\???K?t?k??5W??)???A?o??\YJ ????oK???? bKb??h`jts 6/7 (Cougar Poijt/Panther Point) SouThbridge) PCI: 00:1f,3 ,I*tel"SEries 6/7 (Co5gar?Point/PaNther Point) Southbridge) "C* 0?:5???AT24RF08C) I2C: 0q:5u (AT24RF08C)Ji2C?001:56 (AT24RF18C) I:C: 1:57 (AT24RF08C) I?C: 01:5c (AT24RB08C) I2C:`01:5d (AT24RF08?+]????;??Dg_tdLyi?????????)R?????u????8P?????$???jb*$???y??O?i???Aw_~4\?????? 8b????,k?D?O??k?Rs??G!?S??????<[am??{2r??74?@????.1 (tnk.own) RCI: 04:00?0 ,unknow?) XCI: 04:p0,3 (unknown) UnknOwn ?evice path uype: 0 (unkjown) EpIC: 01 (unknown) APIC: 0? (tm????(!?????K7????|x???????\?yu?~??2.?E?Z? ????r?9? EVyUJ???{???Y??}n?e???`? ????1Q????3?[u?????f?g???????????99@2???8 ???I????&???SU? ?|V?????1M?.D ??tGF?4?]????-!?t?N4??h$?? bJ?f?40|z ?6?Z#??????l?????h?s?KLy ?8?Ct??+4?t???oc??b?&??OF?g?-bV??Y?T[??S;???o 000p000000021440)000000000009ffff: RAM 2. 00p0000000a0000-00190?0q000fffff: RESERVED ?. 000000000010 00?-008000017ff29fff: S????6?I3??^T?1?????X?i?{?Pn?jj=? j>?bDj???C'B?}?@OD??L???>_????6?u???d?&?sh??y"$?????A?c+??e???n""l5????>??"R?w?P- 0ys1t bytes, checksum el9? coreboothtable: 812 b?tes.JIMD ROOT ? ?& 7ffff000 01001000* OD SMALL 1. 7nffe000 00001000 CONSOL?R??????93 ?'?L??%' ???~?c?V?? ???N???4?? ?????8??Z???2P+??OcE?d???s,hhC(?0??"???"Z??3S/.j????(????gb?m?i[(?? ??_F??j??7??y?????8???G????#Bn?>???N?4#??????.??4??4H?S??g??ng?w?Lt?Sp???)(?1"?? ???l??N???@2?F?\?[???:?? ??a^??]?Y?%d?f&M6??M??????"??????R?1????0 4f4647$9 10? 7ff2B000 0020r000 SMbMOS? 11? 7ff2a000 0 0008P0 Imd"small regyoo*? (HMD ROOT ?0.`7fffeg00 00000400 ?AR Gt\??4+?[?=??|????7???????4%? ?L?/?Y?B?_?+p?+"??W??"B?f_E?/o????[LX??????D??/4?`8??f?M?l?St??u???w??@?g???+b?>?u?w^??6,!B"?????z?0010 BS: BS_WRITE_TABLES times (us): %ntry 1 run 2?256 eXIt 0 CBFS? 'Master Header??occtor' located CBFS at [70?100:7fffc0) CBFS: Locavinc 'fadhback/payload' CBFS: Fouod @ o?fset 52?0$ size f65f?Loadin' segment from ROM adtress 0xfff52338 $ code0(compressi?????W?(???g=t2LH???r]?????)b????,u,???;?r?z??????bf?t;]?4? ?Jx?ZP?77T]P?H??U??0" ???<*a??OI?k?Cc?sR3f???????.:?m??s4:Bk7?6p????54 Entry P?int 0?000ff06e?Paylkad *** Pre-CBMEM romstage console overflowed, log truncated! *** 0T Selected tRRD : 4T Selected tRTP : 5T Selected tWTR : 5T Selected tRFC : 107T Done dimm mapping Update PCI-E configuration space: PCI(0, 0, 0)[a0] = 0 PCI(0, 0, 0)[a4] = 2 PCI(0, 0, 0)[bc] = 82a00000 PCI(0, 0, 0)[a8] = 7b600000 PCI(0, 0, 0)[ac] = 2 PCI(0, 0, 0)[b8] = 80000000 PCI(0, 0, 0)[b0] = 80a00000 PCI(0, 0, 0)[b4] = 80800000 PCI(0, 0, 0)[7c] = 7f PCI(0, 0, 0)[70] = fe000000 PCI(0, 0, 0)[74] = 1 PCI(0, 0, 0)[78] = fe000c00 Done memory map Done io registers Done jedec reset Done MRS commands t123: 1912, 6000, 7620 ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : YES ME: Manufacturing Mode : YES ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Normal ME: Current Operation State : M0 without UMA ME: Current Operation Mode : Normal ME: Error Code : No Error ME: Progress Phase : Policy Module ME: Power Management Event : Non-power cycle reset ME: Progress Phase State : Entery into Policy Module ME: FWS2: 0x39000006 ME: Bist in progress: 0x0 ME: ICC Status : 0x3 ME: Invoke MEBx : 0x0 ME: CPU replaced : 0x0 ME: MBP ready : 0x0 ME: MFS failure : 0x0 ME: Warm reset req : 0x0 ME: CPU repl valid : 0x0 ME: (Reserved) : 0x0 ME: FW update req : 0x0 ME: (Reserved) : 0x0 ME: Current state : 0x0 ME: Current PM event: 0x9 ME: Progress code : 0x3 Waited long enough, or CPU was not replaced, continue... PASSED! Tell ME that DRAM is ready ME: FWS2: 0x390b0006 ME: Bist in progress: 0x0 ME: ICC Status : 0x3 ME: Invoke MEBx : 0x0 ME: CPU replaced : 0x0 ME: MBP ready : 0x0 ME: MFS failure : 0x0 ME: Warm reset req : 0x0 ME: CPU repl valid : 0x0 ME: (Reserved) : 0x0 ME: FW update req : 0x0 ME: (Reserved) : 0x0 ME: Current state : 0xb ME: Current PM event: 0x9 ME: Progress code : 0x3 ME: Requested BIOS Action: Continue to boot ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : YES ME: Manufacturing Mode : YES ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Normal ME: Current Operation State : M0 without UMA ME: Current Operation Mode : Normal ME: Error Code : No Error ME: Progress Phase : Policy Module ME: Power Management Event : Non-power cycle reset ME: Progress Phase State : Received DRAM Init Done memcfg DDR3 ref clock 133 MHz memcfg DDR3 clock 1330 MHz memcfg channel assignment: A: 0, B 1, C 2 memcfg channel[0] config (00620010): ECC inactive enhanced interleave mode on rank interleave on DIMMA 4096 MB width x8 dual rank, selected DIMMB 0 MB width x8 single rank memcfg channel[1] config (00620010): ECC inactive enhanced interleave mode on rank interleave on DIMMA 4096 MB width x8 dual rank, selected DIMMB 0 MB width x8 single rank CBMEM: IMD: root @ 7ffff000 254 entries. IMD: root @ 7fffec00 62 entries. Relocate MRC DATA from fefff9fc to 7ffdc000 (1440 bytes) CBMEM entry for DIMM info: 0x7fffe960 MTRR Range: Start=ff800000 End=0 (Size 800000) MTRR Range: Start=0 End=1000000 (Size 1000000) MTRR Range: Start=7f800000 End=80000000 (Size 800000) MTRR Range: Start=80000000 End=80800000 (Size 800000) CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS: Locating 'fallback/ramstage' CBFS: Found @ offset 2ff00 size 1248a Decompressing stage fallback/ramstage @ 0x7ff9ffc0 (223280 bytes) Loading module at 7ffa0000 with entry 7ffa0000. filesize: 0x25f50 memsize: 0x367f0 Processing 2522 relocs. Offset value of 0x7fea0000 coreboot-4.6-344-g37afb270b4-dirty Thu Jun 8 21:29:15 UTC 2017 ramstage starting... Normal boot. BS: BS_PRE_DEVICE times (us): entry 0 run 2 exit 0 BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 2 exit 0 Enumerating buses... Show all devs... Before device enumeration. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 APIC: acac: enabled 0 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:19.0: enabled 1 PCI: 00:1a.0: enabled 1 PCI: 00:1b.0: enabled 1 PCI: 00:1c.0: enabled 0 PCI: 00:1c.1: enabled 1 PCI: 00:1c.2: enabled 0 PCI: 00:1c.3: enabled 1 PCI: 00:1c.4: enabled 1 PCI: 00:1c.5: enabled 0 PCI: 00:1c.6: enabled 0 PCI: 00:1c.7: enabled 0 PCI: 00:1d.0: enabled 1 PCI: 00:1f.0: enabled 1 PNP: 00ff.1: enabled 1 PNP: 0c31.0: enabled 1 PNP: 00ff.2: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 I2C: 00:54: enabled 1 I2C: 00:55: enabled 1 I2C: 00:56: enabled 1 I2C: 00:57: enabled 1 I2C: 00:5c: enabled 1 I2C: 00:5d: enabled 1 I2C: 00:5e: enabled 1 I2C: 00:5f: enabled 1 Compare with tree... Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 APIC: acac: enabled 0 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:19.0: enabled 1 PCI: 00:1a.0: enabled 1 PCI: 00:1b.0: enabled 1 PCI: 00:1c.0: enabled 0 PCI: 00:1c.1: enabled 1 PCI: 00:1c.2: enabled 0 PCI: 00:1c.3: enabled 1 PCI: 00:1c.4: enabled 1 PCI: 00:1c.5: enabled 0 PCI: 00:1c.6: enabled 0 PCI: 00:1c.7: enabled 0 PCI: 00:1d.0: enabled 1 PCI: 00:1f.0: enabled 1 PNP: 00ff.1: enabled 1 PNP: 0c31.0: enabled 1 PNP: 00ff.2: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 I2C: 00:54: enabled 1 I2C: 00:55: enabled 1 I2C: 00:56: enabled 1 I2C: 00:57: enabled 1 I2C: 00:5c: enabled 1 I2C: 00:5d: enabled 1 I2C: 00:5e: enabled 1 I2C: 00:5f: enabled 1 Root Device scanning... root_dev_scan_bus for Root Device CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [8086/0154] ops PCI: 00:00.0 [8086/0154] enabled Capability: type 0x0d @ 0x88 Capability: type 0x01 @ 0x80 Capability: type 0x05 @ 0x90 Capability: type 0x10 @ 0xa0 Capability: type 0x0d @ 0x88 Capability: type 0x01 @ 0x80 Capability: type 0x05 @ 0x90 Capability: type 0x10 @ 0xa0 PCI: 00:01.0 subordinate bus PCI Express PCI: 00:01.0 [8086/0151] enabled PCI: 00:02.0 [8086/0000] ops PCI: 00:02.0 [8086/0166] enabled PCI: 00:04.0 [8086/0153] enabled PCI: 00:16.0 [8086/1c3a] ops PCI: 00:16.0 [8086/1c3a] enabled PCI: 00:16.1: Disabling device PCI: 00:16.1 [8086/1c3b] disabled No operations PCI: 00:16.2: Disabling device PCI: 00:16.2 [8086/1c3c] disabled No operations PCI: 00:16.3: Disabling device PCI: 00:16.3 [8086/1c3d] disabled No operations PCI: 00:19.0 [8086/1502] enabled PCI: 00:1a.0 [8086/0000] ops PCI: 00:1a.0 [8086/1c2d] enabled PCI: 00:1b.0 [8086/0000] ops PCI: 00:1b.0 [8086/1c20] enabled PCH: PCIe Root Port coalescing is enabled PCI: 00:1c.0: Disabling device PCI: 00:1c.0: check set enabled PCH: Remap PCIe function 1 to 0 PCI: 00:1c.1 [8086/0000] bus ops PCI: 00:1c.1 [8086/1c12] enabled PCI: 00:1c.2: Disabling device PCH: Remap PCIe function 3 to 0 PCI: 00:1c.3 [8086/0000] bus ops PCI: 00:1c.3 [8086/1c16] enabled PCH: Remap PCIe function 4 to 0 PCI: 00:1c.4 [8086/0000] bus ops PCI: 00:1c.4 [8086/1c18] enabled PCI: 00:1c.5: Disabling device PCI: 00:1c.6: Disabling device PCI: 00:1c.7: Disabling device PCH: RPFN 0x76543210 -> 0xfed31a0c PCH: PCIe map 1c.0 -> 1c.4 PCH: PCIe map 1c.1 -> 1c.0 PCH: PCIe map 1c.3 -> 1c.1 PCH: PCIe map 1c.4 -> 1c.3 PCI: 00:1d.0 [8086/0000] ops PCI: 00:1d.0 [8086/1c26] enabled PCI: 00:1f.0 [8086/0000] bus ops PCI: 00:1f.0 [8086/1c4f] enabled PCI: 00:1f.2 [8086/0000] ops PCI: 00:1f.2 [8086/1c01] enabled PCI: 00:1f.3 [8086/0000] bus ops PCI: 00:1f.3 [8086/1c22] enabled PCI: 00:1f.6 [8086/1c24] enabled PCI: 00:01.0 scanning... do_pci_scan_bridge for PCI: 00:01.0 PCI: pci_scan_bus for bus 01 scan_bus: scanning of bus PCI: 00:01.0 took 15 usecs PCI: 00:1c.0 scanning... do_pci_scan_bridge for PCI: 00:1c.0 PCI: pci_scan_bus for bus 02 PCI: 02:00.0 [8086/0000] ops PCI: 02:00.0 [8086/0085] enabled Capability: type 0x01 @ 0xc8 Capability: type 0x05 @ 0xd0 Capability: type 0x10 @ 0xe0 Capability: type 0x10 @ 0x40 Enabling Common Clock Configuration ASPM: Enabled L1 scan_bus: scanning of bus PCI: 00:1c.0 took 213 usecs PCI: 00:1c.1 scanning... do_pci_scan_bridge for PCI: 00:1c.1 PCI: pci_scan_bus for bus 03 PCH: Remap PCIe function 1 to 0 scan_bus: scanning of bus PCI: 00:1c.1 took 39 usecs PCI: 00:1c.3 scanning... do_pci_scan_bridge for PCI: 00:1c.3 PCI: pci_scan_bus for bus 04 PCI: 04:00.0 [1180/e822] enabled PCI: 04:00.1 [1180/e232] enabled PCI: 04:00.3 [1180/e832] enabled Capability: type 0x05 @ 0x50 Capability: type 0x01 @ 0x78 Capability: type 0x10 @ 0x80 Capability: type 0x10 @ 0x40 Enabling Common Clock Configuration ASPM: Enabled L0s and L1 Capability: type 0x05 @ 0x50 Capability: type 0x01 @ 0x78 Capability: type 0x10 @ 0x80 Capability: type 0x10 @ 0x40 Enabling Common Clock Configuration ASPM: Enabled L0s and L1 Capability: type 0x05 @ 0x50 Capability: type 0x01 @ 0x78 Capability: type 0x10 @ 0x80 Capability: type 0x10 @ 0x40 Enabling Common Clock Configuration ASPM: Enabled L0s and L1 scan_bus: scanning of bus PCI: 00:1c.3 took 569 usecs PCI: 00:1f.0 scanning... scan_lpc_bus for PCI: 00:1f.0 PNP: 00ff.1 enabled PNP: 0c31.0 enabled recv_ec_data: 0x38 recv_ec_data: 0x41 recv_ec_data: 0x48 recv_ec_data: 0x54 recv_ec_data: 0x33 recv_ec_data: 0x33 recv_ec_data: 0x57 recv_ec_data: 0x57 recv_ec_data: 0x14 recv_ec_data: 0x03 recv_ec_data: 0x50 recv_ec_data: 0x11 EC Firmware ID 8AHT33WW-3.20, Version 5.01B recv_ec_data: 0x00 recv_ec_data: 0x70 recv_ec_data: 0x10 recv_ec_data: 0x70 recv_ec_data: 0x70 recv_ec_data: 0x00 recv_ec_data: 0xa7 recv_ec_data: 0xa7 recv_ec_data: 0x70 PNP: 00ff.2 enabled scan_lpc_bus for PCI: 00:1f.0 done scan_bus: scanning of bus PCI: 00:1f.0 took 5217 usecs PCI: 00:1f.3 scanning... scan_generic_bus for PCI: 00:1f.3 bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled scan_generic_bus for PCI: 00:1f.3 done scan_bus: scanning of bus PCI: 00:1f.3 took 20 usecs scan_bus: scanning of bus DOMAIN: 0000 took 6336 usecs root_dev_scan_bus for Root Device done scan_bus: scanning of bus Root Device took 6343 usecs done BS: BS_DEV_ENUMERATE times (us): entry 0 run 6439 exit 0 found VGA at PCI: 00:02.0 Setting up VGA for PCI: 00:02.0 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000. PCI: 00:01.0 read_resources bus 1 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 done PCI: 00:1c.0 read_resources bus 2 link: 0 PCI: 00:1c.0 read_resources bus 2 link: 0 done PCI: 00:1c.1 read_resources bus 3 link: 0 PCI: 00:1c.1 read_resources bus 3 link: 0 done PCI: 00:1c.3 read_resources bus 4 link: 0 PCI: 00:1c.3 read_resources bus 4 link: 0 done PCI: 00:1f.0 read_resources bus 0 link: 0 PNP: 00ff.1 missing read_resources PNP: 0c31.0 missing read_resources PNP: 00ff.2 missing read_resources PCI: 00:1f.0 read_resources bus 0 link: 0 done PCI: 00:1f.3 read_resources bus 1 link: 0 PCI: 00:1f.3 read_resources bus 1 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: acac DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 PCI: 00:00.0 PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 PCI: 00:01.0 PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:02.0 PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 PCI: 00:04.0 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 PCI: 00:16.0 PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10 PCI: 00:16.1 PCI: 00:16.2 PCI: 00:16.3 PCI: 00:19.0 PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 PCI: 00:1a.0 PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 PCI: 00:1b.0 PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 PCI: 00:1c.4 PCI: 00:1c.0 child on link 0 PCI: 02:00.0 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 02:00.0 PCI: 02:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10 PCI: 00:1c.2 PCI: 00:1c.1 PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:1c.3 child on link 0 PCI: 04:00.0 PCI: 00:1c.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 04:00.0 PCI: 04:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 PCI: 04:00.1 PCI: 04:00.1 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 PCI: 04:00.3 PCI: 04:00.3 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 10 Unknown device path type: 0 Unknown device path type: 0 resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 Unknown device path type: 0 resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 Unknown device path type: 0 resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 PCI: 00:1c.5 PCI: 00:1c.6 PCI: 00:1c.7 PCI: 00:1d.0 PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 PCI: 00:1f.0 child on link 0 PNP: 00ff.1 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 PNP: 00ff.1 PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 PNP: 0c31.0 PNP: 00ff.2 PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 PCI: 00:1f.2 PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 PCI: 00:1f.3 child on link 0 I2C: 01:54 PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 I2C: 01:54 I2C: 01:55 I2C: 01:56 I2C: 01:57 I2C: 01:5c I2C: 01:5d I2C: 01:5e I2C: 01:5f PCI: 00:1f.6 PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:1c.3 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff Unknown device path type: 0 18 * [0x0 - 0xfff] io PCI: 00:1c.3 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:1c.3 1c * [0x0 - 0xfff] io PCI: 00:02.0 20 * [0x1000 - 0x103f] io PCI: 00:19.0 18 * [0x1040 - 0x105f] io PCI: 00:1f.2 20 * [0x1060 - 0x107f] io PCI: 00:1f.2 10 * [0x1080 - 0x1087] io PCI: 00:1f.2 18 * [0x1088 - 0x108f] io PCI: 00:1f.2 14 * [0x1090 - 0x1093] io PCI: 00:1f.2 1c * [0x1094 - 0x1097] io DOMAIN: 0000 io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 02:00.0 10 * [0x0 - 0x1fff] mem PCI: 00:1c.0 mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:1c.3 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff Unknown device path type: 0 14 * [0x0 - 0x7fffff] prefmem PCI: 00:1c.3 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done PCI: 00:1c.3 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff Unknown device path type: 0 10 * [0x0 - 0x7fffff] mem PCI: 04:00.3 10 * [0x800000 - 0x8007ff] mem PCI: 04:00.0 10 * [0x801000 - 0x8010ff] mem PCI: 04:00.1 10 * [0x802000 - 0x8020ff] mem PCI: 00:1c.3 mem: base: 802100 size: 900000 align: 22 gran: 20 limit: ffffffff done PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem PCI: 00:1c.3 20 * [0x10000000 - 0x108fffff] mem PCI: 00:1c.3 24 * [0x10c00000 - 0x113fffff] prefmem PCI: 00:02.0 10 * [0x11400000 - 0x117fffff] mem PCI: 00:1c.0 20 * [0x11800000 - 0x118fffff] mem PCI: 00:19.0 10 * [0x11900000 - 0x1191ffff] mem PCI: 00:04.0 10 * [0x11920000 - 0x11927fff] mem PCI: 00:1b.0 10 * [0x11928000 - 0x1192bfff] mem PCI: 00:19.0 14 * [0x1192c000 - 0x1192cfff] mem PCI: 00:1f.6 10 * [0x1192d000 - 0x1192dfff] mem PCI: 00:1f.2 24 * [0x1192e000 - 0x1192e7ff] mem PCI: 00:1a.0 10 * [0x1192f000 - 0x1192f3ff] mem PCI: 00:1d.0 10 * [0x11930000 - 0x119303ff] mem PCI: 00:1f.3 10 * [0x11931000 - 0x119310ff] mem PCI: 00:16.0 10 * [0x11932000 - 0x1193200f] mem DOMAIN: 0000 mem: base: 11932010 size: 11932010 align: 28 gran: 0 limit: ffffffff done avoid_fixed_resources: DOMAIN: 0000 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff constrain_resources: PCI: 00:00.0 60 base f8000000 limit fbffffff mem (fixed) constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) constrain_resources: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed) skipping PNP: 00ff.2@60 fixed resource, size=0! skipping PNP: 00ff.2@62 fixed resource, size=0! skipping PNP: 00ff.2@64 fixed resource, size=0! skipping PNP: 00ff.2@66 fixed resource, size=0! avoid_fixed_resources:@DOMAIN: 0000 10000000 base 0000167c limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff Setting resources... DOMAIN: 0000 io: base:167c size:1098 align:12 gran:0 limit:ffff PCI: 00:1c.3 1c * [0x2000 - 0x2fff] io PCI: 00:02.0 20 * [0x3000 - 0x303f] io PCI: 00:19.0 18 * [0x3040 - 0x305f] io PCI: 00:1f.2 20 * [0x3060 - 0x307f] io PCI: 00:1f.2 10 * [0x3080 - 0x3087] io PCI: 00:1f.2 18 * [0x3088 - 0x308f] io PCI: 00:1f.2 14 * [0x3090 - 0x3093] io PCI: 00:1f.2 1c * [0x3094 - 0x3097] io DOMAIN: 0000 io: next_base: 3098 size: 1098 align: 12 gran: 0 done PCI: 00:01.0 io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:01.0 io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:1c.3 io: base:2000 size:1000 align:12 gran:12 limit:2fff Unknown device path type: 0 18 * [0x2000 - 0x2fff] io PCI: 00:1c.3 io: next_base: 3000 size: 1000 align: 12 gran: 12 done DOMAIN: 0000 mem: base:e0000000 size:11932010 align:28 gran:0 limit:f7ffffff PCI: 00:02.0 18 * [0xe0000000 - 0xefffffff] prefmem PCI: 00:1c.3 20 * [0xf0000000 - 0xf08fffff] mem PCI: 00:1c.3 24 * [0xf0c00000 - 0xf13fffff] prefmem PCI: 00:02.0 10 * [0xf1400000 - 0xf17fffff] mem PCI: 00:1c.0 20 * [0xf1800000 - 0xf18fffff] mem PCI: 00:19.0 10 * [0xf1900000 - 0xf191ffff] mem PCI: 00:04.0 10 * [0xf1920000 - 0xf1927fff] mem PCI: 00:1b.0 10 * [0xf1928000 - 0xf192bfff] mem PCI: 00:19.0 14 * [0xf192c000 - 0xf192cfff] mem PCI: 00:1f.6 10 * [0xf192d000 - 0xf192dfff] mem PCI: 00:1f.2 24 * [0xf192e000 - 0xf192e7ff] mem PCI: 00:1a.0 10 * [0xf192f000 - 0xf192f3ff] mem PCI: 00:1d.0 10 * [0xf1930000 - 0xf19303ff] mem PCI: 00:1f.3 10 * [0xf1931000 - 0xf19310ff] mem PCI: 00:16.0 10 * [0xf1932000 - 0xf193200f] mem DOMAIN: 0000 mem: next_base: f1932010 size: 11932010 align: 28 gran: 0 done PCI: 00:01.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff PCI: 00:01.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done PCI: 00:01.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff PCI: 00:01.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff PCI: 00:1c.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.0 mem: base:f1800000 size:100000 align:20 gran:20 limit:f18fffff PCI: 02:00.0 10 * [0xf1800000 - 0xf1801fff] mem PCI: 00:1c.0 mem: next_base: f1802000 size: 100000 align: 20 gran: 20 done PCI: 00:1c.1 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff PCI: 00:1c.1 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.1 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff PCI: 00:1c.1 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.3 prefmem: base:f0c00000 size:800000 align:22 gran:20 limit:f13fffff Unknown device path type: 0 14 * [0xf0c00000 - 0xf13fffff] prefmem PCI: 00:1c.3 prefmem: next_base: f1400000 size: 800000 align: 22 gran: 20 done PCI: 00:1c.3 mem: base:f0000000 size:900000 align:22 gran:20 limit:f08fffff Unknown device path type: 0 10 * [0xf0000000 - 0xf07fffff] mem PCI: 04:00.3 10 * [0xf0800000 - 0xf08007ff] mem PCI: 04:00.0 10 * [0xf0801000 - 0xf08010ff] mem PCI: 04:00.1 10 * [0xf0802000 - 0xf08020ff] mem PCI: 00:1c.3 mem: next_base: f0802100 size: 900000 align: 22 gran: 20 done Root Device assign_resources, bus 0 link: 0 TOUUD 0x27b600000 TOLUD 0x82a00000 TOM 0x200000000 MEBASE 0x1fe000000 IGD decoded, subtracting 32M UMA and 2M GTT TSEG base 0x80000000 size 8M Available memory below 4GB: 2048M Available memory above 4GB: 6070M DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io PCI: 00:01.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem PCI: 00:01.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem PCI: 00:02.0 10 <- [0x00f1400000 - 0x00f17fffff] size 0x00400000 gran 0x16 mem64 PCI: 00:02.0 18 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64 PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io PCI: 00:04.0 10 <- [0x00f1920000 - 0x00f1927fff] size 0x00008000 gran 0x0f mem64 PCI: 00:16.0 10 <- [0x00f1932000 - 0x00f193200f] size 0x00000010 gran 0x04 mem64 PCI: 00:19.0 10 <- [0x00f1900000 - 0x00f191ffff] size 0x00020000 gran 0x11 mem PCI: 00:19.0 14 <- [0x00f192c000 - 0x00f192cfff] size 0x00001000 gran 0x0c mem PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io PCI: 00:1a.0 10 <- [0x00f192f000 - 0x00f192f3ff] size 0x00000400 gran 0x0a mem PCI: 00:1b.0 10 <- [0x00f1928000 - 0x00f192bfff] size 0x00004000 gran 0x0e mem64 PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io PCI: 00:1c.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem PCI: 00:1c.0 20 <- [0x00f1800000 - 0x00f18fffff] size 0x00100000 gran 0x14 bus 02 mem PCI: 00:1c.0 assign_resources, bus 2 link: 0 PCI: 02:00.0 10 <- [0x00f1800000 - 0x00f1801fff] size 0x00002000 gran 0x0d mem64 PCI: 00:1c.0 assign_resources, bus 2 link: 0 PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io PCI: 00:1c.1 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 prefmem PCI: 00:1c.1 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 03 mem PCI: 00:1c.3 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 04 io PCI: 00:1c.3 24 <- [0x00f0c00000 - 0x00f13fffff] size 0x00800000 gran 0x14 bus 04 prefmem PCI: 00:1c.3 20 <- [0x00f0000000 - 0x00f08fffff] size 0x00900000 gran 0x14 bus 04 mem PCI: 00:1c.3 assign_resources, bus 4 link: 0 PCI: 04:00.0 10 <- [0x00f0801000 - 0x00f08010ff] size 0x00000100 gran 0x08 mem PCI: 04:00.1 10 <- [0x00f0802000 - 0x00f08020ff] size 0x00000100 gran 0x08 mem PCI: 04:00.3 10 <- [0x00f0800000 - 0x00f08007ff] size 0x00000800 gran 0x0b mem Unknown device path type: 0 missing set_resources PCI: 00:1c.3 assign_resources, bus 4 link: 0 PCI: 00:1d.0 10 <- [0x00f1930000 - 0x00f19303ff] size 0x00000400 gran 0x0a mem PCI: 00:1f.0 assign_resources, bus 0 link: 0 PNP: 00ff.1 missing set_resources PNP: 00ff.2 missing set_resources PCI: 00:1f.0 assign_resources, bus 0 link: 0 PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io PCI: 00:1f.2 24 <- [0x00f192e000 - 0x00f192e7ff] size 0x00000800 gran 0x0b mem PCI: 00:1f.3 10 <- [0x00f1931000 - 0x00f19310ff] size 0x00000100 gran 0x08 mem64 PCI: 00:1f.3 assign_resources, bus 1 link: 0 PCI: 00:1f.3 assign_resources, bus 1 link: 0 PCI: 00:1f.6 10 <- [0x00f192d000 - 0x00f192dfff] size 0x00001000 gran 0x0c mem64 DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: acac DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 167c size 1098 align 12 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base e0000000 size 11932010 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100 DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 DOMAIN: 0000 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4 DOMAIN: 0000 resource base 100000000 size 17b600000 align 0 gran 0 limit 0 flags e0004200 index 5 DOMAIN: 0000 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6 DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8 DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9 DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a PCI: 00:00.0 PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 PCI: 00:01.0 PCI: 00:01.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:01.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 PCI: 00:01.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20 PCI: 00:02.0 PCI: 00:02.0 resource base f1400000 size 400000 align 22 gran 22 limit f17fffff flags 60000201 index 10 PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18 PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20 PCI: 00:04.0 PCI: 00:04.0 resource base f1920000 size 8000 align 15 gran 15 limit f1927fff flags 60000201 index 10 PCI: 00:16.0 PCI: 00:16.0 resource base f1932000 size 10 align 12 gran 4 limit f193200f flags 60000201 index 10 PCI: 00:16.1 PCI: 00:16.2 PCI: 00:16.3 PCI: 00:19.0 PCI: 00:19.0 resource base f1900000 size 20000 align 17 gran 17 limit f191ffff flags 60000200 index 10 PCI: 00:19.0 resource base f192c000 size 1000 align 12 gran 12 limit f192cfff flags 60000200 index 14 PCI: 00:19.0 resource base 3040 size 20 align 5 gran 5 limit 305f flags 60000100 index 18 PCI: 00:1a.0 PCI: 00:1a.0 resource base f192f000 size 400 align 12 gran 10 limit f192f3ff flags 60000200 index 10 PCI: 00:1b.0 PCI: 00:1b.0 resource base f1928000 size 4000 align 14 gran 14 limit f192bfff flags 60000201 index 10 PCI: 00:1c.4 PCI: 00:1c.0 child on link 0 PCI: 02:00.0 PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 PCI: 00:1c.0 resource base f1800000 size 100000 align 20 gran 20 limit f18fffff flags 60080202 index 20 PCI: 02:00.0 PCI: 02:00.0 resource base f1800000 size 2000 align 13 gran 13 limit f1801fff flags 60000201 index 10 PCI: 00:1c.2 PCI: 00:1c.1 PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:1c.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24 PCI: 00:1c.1 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20 PCI: 00:1c.3 child on link 0 PCI: 04:00.0 PCI: 00:1c.3 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c PCI: 00:1c.3 resource base f0c00000 size 800000 align 22 gran 20 limit f13fffff flags 60081202 index 24 PCI: 00:1c.3 resource base f0000000 size 900000 align 22 gran 20 limit f08fffff flags 60080202 index 20 PCI: 04:00.0 PCI: 04:00.0 resource base f0801000 size 100 align 12 gran 8 limit f08010ff flags 60000200 index 10 PCI: 04:00.1 PCI: 04:00.1 resource base f0802000 size 100 align 12 gran 8 limit f08020ff flags 60000200 index 10 PCI: 04:00.3 PCI: 04:00.3 resource base f0800000 size 800 align 12 gran 11 limit f08007ff flags 60000200 index 10 Unknown device path type: 0 Unknown device path type: 0 resource base f0000000 size 800000 align 22 gran 22 limit f07fffff flags 40000200 index 10 Unknown device path type: 0 resource base f0c00000 size 800000 align 22 gran 22 limit f13fffff flags 40001200 index 14 Unknown device path type: 0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 40000100 index 18 PCI: 00:1c.5 PCI: 00:1c.6 PCI: 00:1c.7 PCI: 00:1d.0 PCI: 00:1d.0 resource base f1930000 size 400 align 12 gran 10 limit f19303ff flags 60000200 index 10 PCI: 00:1f.0 child on link 0 PNP: 00ff.1 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 PNP: 00ff.1 PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 PNP: 0c31.0 PNP: 00ff.2 PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 PCI: 00:1f.2 PCI: 00:1f.2 resource base 3080 size 8 align 3 gran 3 limit 3087 flags 60000100 index 10 PCI: 00:1f.2 resource base 3090 size 4 align 2 gran 2 limit 3093 flags 60000100 index 14 PCI: 00:1f.2 resource base 3088 size 8 align 3 gran 3 limit 308f flags 60000100 index 18 PCI: 00:1f.2 resource base 3094 size 4 align 2 gran 2 limit 3097 flags 60000100 index 1c PCI: 00:1f.2 resource base 3060 size 20 align 5 gran 5 limit 307f flags 60000100 index 20 PCI: 00:1f.2 resource base f192e000 size 800 align 12 gran 11 limit f192e7ff flags 60000200 index 24 PCI: 00:1f.3 child on link 0 I2C: 01:54 PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 PCI: 00:1f.3 resource base f1931000 size 100 align 12 gran 8 limit f19310ff flags 60000201 index 10 I2C: 01:54 I2C: 01:55 I2C: 01:56 I2C: 01:57 I2C: 01:5c I2C: 01:5d I2C: 01:5e I2C: 01:5f PCI: 00:1f.6 PCI: 00:1f.6 resource base f192d000 size 1000 align 12 gran 12 limit f192dfff flags 60000201 index 10 Done allocating resources. BS: BS_DEV_RESOURCES times (us): entry 0 run 2670 exit 0 Enabling resources... PCI: 00:00.0 subsystem <- 8086/0154 PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 bridge ctrl <- 0003 PCI: 00:01.0 cmd <- 00 PCI: 00:02.0 subsystem <- 8086/0166 PCI: 00:02.0 cmd <- 03 PCI: 00:04.0 cmd <- 02 PCI: 00:16.0 subsystem <- 8086/1c3a PCI: 00:16.0 cmd <- 02 PCI: 00:19.0 subsystem <- 8086/1502 PCI: 00:19.0 cmd <- 103 PCI: 00:1a.0 subsystem <- 8086/1c2d PCI: 00:1a.0 cmd <- 102 PCI: 00:1b.0 subsystem <- 8086/1c20 PCI: 00:1b.0 cmd <- 102 PCI: 00:1c.0 bridge ctrl <- 0003 PCI: 00:1c.0 subsystem <- 8086/1c12 PCI: 00:1c.0 cmd <- 106 PCI: 00:1c.1 bridge ctrl <- 0003 PCI: 00:1c.1 subsystem <- 8086/1c16 PCI: 00:1c.1 cmd <- 100 PCI: 00:1c.3 bridge ctrl <- 0003 PCI: 00:1c.3 subsystem <- 8086/1c18 PCI: 00:1c.3 cmd <- 107 PCI: 00:1d.0 subsystem <- 8086/1c26 PCI: 00:1d.0 cmd <- 102 pch_decode_init PCI: 00:1f.0 subsystem <- 8086/1c4f PCI: 00:1f.0 cmd <- 107 PCI: 00:1f.2 subsystem <- 8086/1c03 PCI: 00:1f.2 cmd <- 03 PCI: 00:1f.3 subsystem <- 8086/1c22 PCI: 00:1f.3 cmd <- 103 PCI: 00:1f.6 cmd <- 02 PCI: 02:00.0 cmd <- 02 PCI: 04:00.0 cmd <- 06 PCI: 04:00.1 cmd <- 06 PCI: 04:00.3 cmd <- 02 done. BS: BS_DEV_ENABLE times (us): entry 0 run 191 exit 0 Initializing devices... Root Device init ... Root Device init finished in 0 usecs CPU_CLUSTER: 0 init ... start_eip=0x00001000, code_size=0x00000031 Setting up SMI for CPU Loading module at 00038000 with entry 00038000. filesize: 0x160 memsize: 0x160 Processing 10 relocs. Offset value of 0x00038000 SMM Module: stub loaded at 00038000. Will call 7ffb4aa9(7ffd2760) Installing SMM handler to 0x80000000 Loading module at 80010000 with entry 8001010a. filesize: 0x1198 memsize: 0x51b8 Processing 60 relocs. Offset value of 0x80010000 Loading module at 80008000 with entry 80008000. filesize: 0x160 memsize: 0x160 Processing 10 relocs. Offset value of 0x80008000 SMM Module: placing jmp sequence at 80007c00 rel16 0x03fd SMM Module: placing jmp sequence at 80007800 rel16 0x07fd SMM Module: placing jmp sequence at 80007400 rel16 0x0bfd SMM Module: stub loaded at 80008000. Will call 8001010a(00000000) Initializing southbridge SMI... ... pmbase = 0x0500 SMI_STS: MCSMI PM1_STS: GPE0_STS: GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO1 GPIO0 TCO_SCI ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 TCO_STS: ... raise SMI# In relocation handler: cpu 0 New SMBASE=0x80000000 IEDBASE=0x80400000 @ 0003fc00 Writing SMRR. base = 0x80000006, mask=0xff800800 Relocation complete. Locking SMM. Initializing CPU #0 CPU: vendor Intel device 306a9 CPU: family 06, model 3a, stepping 09 Enabling cache CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: Found @ offset 13080 size 5800 microcode: sig=0x306a9 pf=0x10 revision=0x1b CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. MTRR: Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6 0x0000000080000000 - 0x00000000e0000000 size 0x60000000 type 0 0x00000000e0000000 - 0x00000000f0000000 size 0x10000000 type 1 0x00000000f0000000 - 0x0000000100000000 size 0x10000000 type 0 0x0000000100000000 - 0x000000027b600000 size 0x17b600000 type 6 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() CPU physical address size: 36 bits MTRR: default type WB/UC MTRR counts: 4/10. MTRR: WB selected as default type. MTRR: 0 base 0x0000000080000000 mask 0x0000000fc0000000 type 0 MTRR: 1 base 0x00000000c0000000 mask 0x0000000fe0000000 type 0 MTRR: 2 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1 MTRR: 3 base 0x00000000f0000000 mask 0x0000000ff0000000 type 0 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local APIC... apic_id: 0x00 done. VMX is locked, so set_vmx will do nothing model_x06ax: energy policy set to 6 model_x06ax: frequency set to 2600 Turbo is available but hidden Turbo has been enabled CPU: 0 has 2 cores, 2 threads per core CPU: 0 has core 1 CPU1: stack_base 7ffcc000, stack_end 7ffccff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 1. After apic_write. In relocation handler: cpu 1 New SMBASE=0x7ffffc00 IEDBASE=0x80400000 @ 0003fc00 Writing SMRR. base = 0x80000006, mask=0xff800800 Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 1. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #1 CPU: 0 has core 2 CPU: vendor Intel device 306a9 CPU: family 06, model 3a, stepping 09 Enabling cache CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: Found @ offset 13080 size 5800 microcode: sig=0x306a9 pf=0x10 revision=0x1b CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() CPU physical address size: 36 bits MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local APIC... apic_id: 0x01 done. VMX is locked, so set_vmx will do nothing model_x06ax: energy policy set to 6 model_x06ax: frequency set to 2600 CPU #1 initialized CPU2: stack_base 7ffcb000, stack_end 7ffcbff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 2. After apic_write. In relocation handler: cpu 2 Startup point 1. Waiting for send to finish... +New SMBASE=0x7ffff800 IEDBASE=0x80400000 @ 0003fc00 Sending STARTUP #2 to 2. After apic_write. Writing SMRR. base = 0x80000006, mask=0xff800800 Startup point 1. Waiting for send to finish... +After Startup. CPU: 0 has core 3 Initializing CPU #2 CPU: vendor Intel device 306a9 CPU: family 06, model 3a, stepping 09 Enabling cache CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: Found @ offset 13080 size 5800 microcode: sig=0x306a9 pf=0x10 revision=0x0 microcode: updated to revision 0x1b date=2014-05-29 CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() CPU physical address size: 36 bits MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local APIC... apic_id: 0x02 done. VMX is locked, so set_vmx will do nothing model_x06ax: energy policy set to 6 model_x06ax: frequency set to 2600 CPU #2 initialized CPU3: stack_base 7ffca000, stack_end 7ffcaff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 3. After apic_write. In relocation handler: cpu 3 New SMBASE=0x7ffff400 IEDBASE=0x80400000 @ 0003fc00 Writing SMRR. base = 0x80000006, mask=0xff800800 Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 3. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU #0 initialized Waiting for 1 CPUS to stop Initializing CPU #3 CPU: vendor Intel device 306a9 CPU: family 06, model 3a, stepping 09 Enabling cache CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: Found @ offset 13080 size 5800 microcode: sig=0x306a9 pf=0x10 revision=0x1b CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() CPU physical address size: 36 bits MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local APIC... apic_id: 0x03 done. VMX is locked, so set_vmx will do nothing model_x06ax: energy policy set to 6 model_x06ax: frequency set to 2600 CPU #3 initialized All AP CPUs stopped (402 loops) CPU0: stack: 7ffcd000 - 7ffce000, lowest used address 7ffcdab0, stack used: 1360 bytes CPU1: stack: 7ffcc000 - 7ffcd000, lowest used address 7ffccc94, stack used: 876 bytes CPU2: stack: 7ffcb000 - 7ffcc000, lowest used address 7ffcbc94, stack used: 876 bytes CPU3: stack: 7ffca000 - 7ffcb000, lowest used address 7ffcac94, stack used: 876 bytes CPU_CLUSTER: 0 init finished in 47777 usecs PCI: 00:00.0 init ... Disabling PEG12. Disabling PEG11. Disabling PEG60. Disabling Device 7. Set BIOS_RESET_CPL CPU TDP: 35 Watts PCI: 00:00.0 init finished in 1013 usecs PCI: 00:02.0 init ... GT Power Management Init IVB GT2 25W-35W Power Meter Weights GT Power Management Init (post VBIOS) PCI: 00:02.0 init finished in 340 usecs PCI: 00:04.0 init ... PCI: 00:04.0 init finished in 0 usecs PCI: 00:16.0 init ... ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : NO ME: Manufacturing Mode : YES ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Normal ME: Current Operation State : M0 with UMA ME: Current Operation Mode : Normal ME: Error Code : No Error ME: Progress Phase : Host Communication ME: Power Management Event : Non-power cycle reset ME: Progress Phase State : Host communication established ME: BIOS path: Normal ME: Extend SHA-256: 9dde6eb9d0486f3b7e39c847c30fb5e6cab3c007280854734503b4bbaaa464e5 ME: Firmware Version 7.1.1088.13 (code) 7.1.1088.13 (recovery) ME Capability: Full Network manageability : enabled ME Capability: Regular Network manageability : disabled ME Capability: Manageability : enabled ME Capability: Small business technology : disabled ME Capability: Level III manageability : disabled ME Capability: IntelR Anti-Theft (AT) : enabled ME Capability: IntelR Capability Licensing Service (CLS) : enabled ME Capability: IntelR Power Sharing Technology (MPC) : enabled ME Capability: ICC Over Clocking : enabled ME Capability: Protected Audio Video Path (PAVP) : enabled ME Capability: IPV6 : enabled ME Capability: KVM Remote Control (KVM) : enabled ME Capability: Outbreak Containment Heuristic (OCH) : disabled ME Capability: Virtual LAN (VLAN) : enabled ME Capability: TLS : enabled ME Capability: Wireless LAN (WLAN) : enabled PCI: 00:16.0 init finished in 54746 usecs PCI: 00:19.0 init ... PCI: 00:19.0 init finished in 0 usecs PCI: 00:1a.0 init ... EHCI: Setting up controller.. done. PCI: 00:1a.0 init finished in 12 usecs PCI: 00:1b.0 init ... Azalia: base = f1928000 Azalia: codec_mask = 09 Azalia: Initializing codec #3 Azalia: codec viddid: 80862805 Azalia: No verb! Azalia: Initializing codec #0 Azalia: codec viddid: 14f1506e Azalia: verb_size: 52 Azalia: verb loaded. PCI: 00:1b.0 init finished in 4302 usecs PCI: 00:1c.0 init ... Initializing PCH PCIe bridge. PCI: 00:1c.0 init finished in 8 usecs PCI: 00:1c.1 init ... Initializing PCH PCIe bridge. PCI: 00:1c.1 init finished in 7 usecs PCI: 00:1c.3 init ... Initializing PCH PCIe bridge. PCI: 00:1c.3 init finished in 13 usecs PCI: 00:1d.0 init ... EHCI: Setting up controller.. done. PCI: 00:1d.0 init finished in 12 usecs PCI: 00:1f.0 init ... pch: lpc_init IOAPIC: Initializing IOAPIC at 0xfec00000 IOAPIC: Bootstrap Processor Local APIC = 0x00 IOAPIC: ID = 0x02 IOAPIC: Dumping registers reg 0x0000: 0x02000000 reg 0x0001: 0x00170020 reg 0x0002: 0x00170020 Set power off after power failure. NMI sources disabled. CougarPoint PM init rtc_failed = 0x0 RTC Init Enabling BIOS updates outside of SMM... Disabling ACPI via APMC: done. pch_spi_init PCI: 00:1f.0 init finished in 356 usecs PCI: 00:1f.2 init ... SATA: Initializing... SATA: Controller in AHCI mode. ABAR: f192e000 PCI: 00:1f.2 init finished in 83 usecs PCI: 00:1f.3 init ... PCI: 00:1f.3 init finished in 7 usecs PCI: 00:1f.6 init ... PCI: 00:1f.6 init finished in 0 usecs PCI: 02:00.0 init ... PCI: 02:00.0 init finished in 0 usecs PCI: 04:00.0 init ... PCI: 04:00.0 init finished in 0 usecs PCI: 04:00.1 init ... PCI: 04:00.1 init finished in 0 usecs PCI: 04:00.3 init ... PCI: 04:00.3 init finished in 0 usecs PNP: 00ff.2 init ... PNP: 00ff.2 init finished in 0 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ... I2C: 01:54 init finished in 1 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ... I2C: 01:55 init finished in 1 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ... I2C: 01:56 init finished in 0 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ... I2C: 01:57 init finished in 0 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ... Locking EEPROM RFID init EEPROM done I2C: 01:5c init finished in 23435 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ... I2C: 01:5d init finished in 0 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ... I2C: 01:5e init finished in 0 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ... I2C: 01:5f init finished in 0 usecs Devices initialized Show all devs... After init. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 APIC: acac: enabled 0 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:02.0: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:19.0: enabled 1 PCI: 00:1a.0: enabled 1 PCI: 00:1b.0: enabled 1 PCI: 00:1c.4: enabled 0 PCI: 00:1c.0: enabled 1 PCI: 00:1c.2: enabled 0 PCI: 00:1c.1: enabled 1 PCI: 00:1c.3: enabled 1 PCI: 00:1c.5: enabled 0 PCI: 00:1c.6: enabled 0 PCI: 00:1c.7: enabled 0 PCI: 00:1d.0: enabled 1 PCI: 00:1f.0: enabled 1 PNP: 00ff.1: enabled 1 PNP: 0c31.0: enabled 1 PNP: 00ff.2: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 I2C: 01:54: enabled 1 I2C: 01:55: enabled 1 I2C: 01:56: enabled 1 I2C: 01:57: enabled 1 I2C: 01:5c: enabled 1 I2C: 01:5d: enabled 1 I2C: 01:5e: enabled 1 I2C: 01:5f: enabled 1 PCI: 00:04.0: enabled 1 PCI: 00:1f.6: enabled 1 PCI: 02:00.0: enabled 1 PCI: 04:00.0: enabled 1 PCI: 04:00.1: enabled 1 PCI: 04:00.3: enabled 1 Unknown device path type: 0 : enabled 1 APIC: 01: enabled 1 APIC: 02: enabled 1 APIC: 03: enabled 1 BS: BS_DEV_INIT times (us): entry 5 run 132260 exit 0 Finalize devices... PCI: 00:1f.0 final Devices finalized BS: BS_POST_DEVICE times (us): entry 0 run 4 exit 0 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3 exit 0 Updating MRC cache data. CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS: Locating 'mrc.cache' CBFS: Found @ offset 1fec0 size 10000 find_current_mrc_cache_local: No valid MRC cache found. Manufacturer: ef SF: Detected W25Q64 with sector size 0x1000, total 0x800000 Need to erase the MRC cache region of 65536 bytes at fff20000 SF: Successfully erased 65536 bytes @ 0x720000 Finally: write MRC cache update to flash at fff20000 Successfully wrote MRC cache CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS: Locating 'fallback/dsdt.aml' CBFS: Found @ offset 19640 size 34fa CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS: Locating 'fallback/slic' CBFS: 'fallback/slic' not found. ACPI: Writing ACPI tables at 7ff3c000. ACPI: * FACS ACPI: * DSDT ACPI: * FADT ACPI: added table 1/32, length now 40 ACPI: * SSDT Found 1 CPU(s) with 4 core(s) each. PSS: 2601MHz power 35000 control 0x2100 status 0x2100 PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 PSS: 2400MHz power 31561 control 0x1800 status 0x1800 PSS: 2200MHz power 28247 control 0x1600 status 0x1600 PSS: 2000MHz power 25084 control 0x1400 status 0x1400 PSS: 1800MHz power 22064 control 0x1200 status 0x1200 PSS: 1600MHz power 19135 control 0x1000 status 0x1000 PSS: 1400MHz power 16344 control 0xe00 status 0xe00 PSS: 1200MHz power 13666 control 0xc00 status 0xc00 PSS: 2601MHz power 35000 control 0x2100 status 0x2100 PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 PSS: 2400MHz power 31561 control 0x1800 status 0x1800 PSS: 2200MHz power 28247 control 0x1600 status 0x1600 PSS: 2000MHz power 25084 control 0x1400 status 0x1400 PSS: 1800MHz power 22064 control 0x1200 status 0x1200 PSS: 1600MHz power 19135 control 0x1000 status 0x1000 PSS: 1400MHz power 16344 control 0xe00 status 0xe00 PSS: 1200MHz power 13666 control 0xc00 status 0xc00 PSS: 2601MHz power 35000 control 0x2100 status 0x2100 PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 PSS: 2400MHz power 31561 control 0x1800 status 0x1800 PSS: 2200MHz power 28247 control 0x1600 status 0x1600 PSS: 2000MHz power 25084 control 0x1400 status 0x1400 PSS: 1800MHz power 22064 control 0x1200 status 0x1200 PSS: 1600MHz power 19135 control 0x1000 status 0x1000 PSS: 1400MHz power 16344 control 0xe00 status 0xe00 PSS: 1200MHz power 13666 control 0xc00 status 0xc00 PSS: 2601MHz power 35000 control 0x2100 status 0x2100 PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 PSS: 2400MHz power 31561 control 0x1800 status 0x1800 PSS: 2200MHz power 28247 control 0x1600 status 0x1600 PSS: 2000MHz power 25084 control 0x1400 status 0x1400 PSS: 1800MHz power 22064 control 0x1200 status 0x1200 PSS: 1600MHz power 19135 control 0x1000 status 0x1000 PSS: 1400MHz power 16344 control 0xe00 status 0xe00 PSS: 1200MHz power 13666 control 0xc00 status 0xc00 ACPI: added table 2/32, length now 44 ACPI: * MCFG ACPI: added table 3/32, length now 48 ACPI: * TCPA TCPA log created at 7ff2b000 ACPI: added table 4/32, length now 52 ACPI: * MADT ACPI: added table 5/32, length now 56 current = 7ff410c0 ACPI: * DMAR ACPI: added table 6/32, length now 60 current = 7ff41170 ACPI: * IGD OpRegion GET_VBIOS: aa55 8086 0 0 3 ... VBIOS found at 000c0000 VBT not found! ACPI: * HPET ACPI: added table 7/32, length now 64 ACPI: done. ACPI tables: 20912 bytes. smbios_write_tables: 7ff28000 recv_ec_data: 0x38 recv_ec_data: 0x41 recv_ec_data: 0x48 recv_ec_data: 0x54 recv_ec_data: 0x33 recv_ec_data: 0x33 recv_ec_data: 0x57 recv_ec_data: 0x57 recv_ec_data: 0x14 recv_ec_data: 0x03 Create SMBIOS type 17 Root Device (LENOVO ThinkPad T520) CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge) APIC: 00 (unknown) APIC: acac (Intel SandyBridge/IvyBridge CPU) DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge) PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge) PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge) PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge) PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7) PNP: 0c31.0 (unknown) PNP: 00ff.2 (Lenovo H8 EC) PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) I2C: 01:54 (AT24RF08C) I2C: 01:55 (AT24RF08C) I2C: 01:56 (AT24RF08C) I2C: 01:57 (AT24RF08C) I2C: 01:5c (AT24RF08C) I2C: 01:5d (AT24RF08C) I2C: 01:5e (AT24RF08C) I2C: 01:5f (AT24RF08C) PCI: 00:04.0 (unknown) PCI: 00:1f.6 (unknown) PCI: 02:00.0 (unknown) PCI: 04:00.0 (unknown) PCI: 04:00.1 (unknown) PCI: 04:00.3 (unknown) Unknown device path type: 0 (unknown) APIC: 01 (unknown) APIC: 02 (unknown) APIC: 03 (unknown) SMBIOS tables: 654 bytes. Writing table forward entry at 0x00000500 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 7fe8 Writing coreboot table at 0x7ff60000 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000a0000-00000000000fffff: RESERVED 3. 0000000000100000-000000007ff27fff: RAM 4. 000000007ff28000-000000007fffffff: CONFIGURATION TABLES 5. 0000000080000000-00000000829fffff: RESERVED 6. 00000000f8000000-00000000fbffffff: RESERVED 7. 00000000fed90000-00000000fed91fff: RESERVED 8. 0000000100000000-000000027b5fffff: RAM Manufacturer: ef SF: Detected W25Q64 with sector size 0x1000, total 0x800000 CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) FMAP: Found "FLASH" version 1.1 at 700000. FMAP: base = ff800000 size = 800000 #areas = 3 Wrote coreboot table at: 7ff60000, 0x354 bytes, checksum 3777 coreboot table: 876 bytes. IMD ROOT 0. 7ffff000 00001000 IMD SMALL 1. 7fffe000 00001000 CONSOLE 2. 7ffde000 00020000 TIME STAMP 3. 7ffdd000 00000400 MRC DATA 4. 7ffdc000 000005b0 ROMSTG STCK 5. 7ffd7000 00005000 RAMSTAGE 6. 7ff9f000 00038000 57a9e100 7. 7ff68000 000367f0 COREBOOT 8. 7ff60000 00008000 ACPI 9. 7ff3c000 00024000 ACPI GNVS 10. 7ff3b000 00001000 TCPA LOG 11. 7ff2b000 00010000 4f444749 12. 7ff29000 00002000 SMBIOS 13. 7ff28000 00000800 IMD small region: IMD ROOT 0. 7fffec00 00000400 CAR GLOBALS 1. 7fffeac0 00000140 MEM INFO 2. 7fffe960 00000141 ROMSTAGE 3. 7fffe940 00000004 57a9e000 4. 7fffe920 00000010 BS: BS_WRITE_TABLES times (us): entry 454711 run 25442 exit 0 CBFS: 'Master Header Locator' located CBFS at [700100:7fffc0) CBFS: Locating 'fallback/payload' CBFS: Found @ offset 52480 size f65f Loading segment from ROM address 0xfff525b8 code (compression=1) New segment dstaddr 0xe31c0 memsize 0x1ce40 srcaddr 0xfff525f0 filesize 0xf627 Loading segment from ROM address 0xfff525d4 Entry Point 0x000ff06e Payload being loaded at below 1MiB without region being marked as RAM usable. Loading Segment: addr: 0x00000000000e31c0 memsz: 0x000000000001ce40 filesz: 0x000000000000f627 lb: [0x000000007ffa0000, 0x000000007ffd67f0) Post relocation: addr: 0x00000000000e31c0 memsz: 0x000000000001ce40 filesz: 0x000000000000f627 using LZMA [ 0x000e31c0, 00100000, 0x00100000) <- fff525f0 dest 000e31c0, end 00100000, bouncebuffer ffffffff Loaded segments BS: BS_PAYLOAD_LOAD times (us): entry 0 run 26624 exit 0 PCH watchdog disabled Jumping to boot code at 000ff06e(7ff60000) CPU0: stack: 7ffcd000 - 7ffce000, lowest used address 7ffcdab0, stack used: 1360 bytes 6/7 (Cougar Poynt/PAnther Poinu) CouthBridge) PCI: 00:1c.6 (Intel Series 6/? (Cougar RointoPanvher Point9 Southbridge)???d?????AR??.XQZ?g?/? ?O?!???'????v?v|??o3M4???|????1=?????O????X??G?????brN????O,6?Q???8????5??|?){??C??ee q?????aR????+a(?v,?kint) ?m5thbridge) PCI: ?0:1f.p (?ntel Series?6/7 (Cougar Point/Panthez Point) Southbri`ge) PNP: 00fb.1 (Lenovo power ManagementNy(/???2u???D(pkP2??N?a?i???#????o???'B??sB?.N???????,#j"3???tGu\??\f ?rT^'.??$:???,??????-??5l??8s?CcC?/q?+&?K_???A?f}A? o????j?i????UMyZU??H82V?8?? ???Ug??z??l??wr?P "????.:?i???"*G?6?w0?+???#x???????D?_tp??L"??@Q??8?1"???:?d????zT?????6)???2?t7????Z??x?) M2C2 01:?60(AT2?RF28B+ I2C: 01:57 *AT24RB08C) I2C: 01:5c (QT24RF08?) I0C:(01:5d (QT24SF0 6u4 by?e{. Writing tqblm forward entry au 0x00020500 Wrote coreb?ot table at: ?00 0500, 0x10$fytes- ?????=_? ?8a`T?????"???C*ar?z(y?'?!?5v???o?????6? v@R q0???s??GA?@dN$Detuctef W25Q6t witx sector sizm 0x1?00- total 0x840000 SBFS: 'Master Haader Locator' lgcated CBFS"at [70010 ?7fffc0) FMAP: Found &FD@SH" version 1.1 at 700000. FMAP? base = ff80?004 size 9 80?0 0 #areas = 3 Wrote corgboot table c|: 7ffv20p0, 0x314 bytes,?P??IjcS=?l??]????p?H23b??????s?????KP??w?Aa ???7???y??F??$M???D5???M??????(:4?iM?7?)?!so??y?*bb?? ???.T????q9????0?L???[Q?w??~? ??Lu??!pL??{"?(??)?ff62000 00008 00 ACXI ?? 7. 7ff3e000 00020000 AC@I!GNVS( 0. 7ff3d080 00001000 TCPA LOG 9. 7ff2d000 00010000?4f44$749 1`{ >:???"?C?u(h?????\?|?Z?????a?7??@?g?U?)?#??}???Z??* f??5???o,t]&?t)@FD?????,??7?(????3w ?o'???q+?&:??'?=+"?K????kBnNG??n????saas0 00000140? (_EM YNFO 2.(7fffe960 000001$1* ROMSTAGE 3. 7f?fu940 00000004 57a9e000 4. 7nffe900 00000050?BS: BS?WRITE_TAB EQ times?(u{): entry 1 run 2556t ezit 0 CBFS: