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Bug #671 » program.txt

Gianluigi Tiesi, 11/06/2026 08:01 PM

 
flashrom v1.8.0 on Linux 6.18.60 (i586)
flashrom is free software, get the source code at https://flashrom.org

flashrom was built with GCC 14.4.0, little endian
Command line (11 args): ./flashrom-linutop -p internal -c Pm49FL004 -VV -l first-sector.layout -i probe -w probe-first-sector.rom
Added layout entry 00000000 - 00000fff named probe
Using region: "probe".
Initializing internal programmer
No coreboot table found.
Using External DMI decoder.
DMI string chassis-type: "Desktop"
DMI string system-manufacturer: "First International Computer, Inc. "
DMI string system-product-name: "ION603"
DMI string system-version: "VER 2.X"
DMI string baseboard-manufacturer: "First International Computer, Inc. "
DMI string baseboard-product-name: "ION603"
DMI string baseboard-version: "PCB 2.X"
Found chipset "AMD CS5536" with PCI ID 1022:2080.
Enabling flash write... OK.
Warning: unexpected second chipset match: "AMD CS5536"
ignoring, please report lspci and board URL to flashrom@flashrom.org
with 'CHIPSET: your board name' in the subject line.
The following protocols are supported: Non-SPI.
Probing for PMC Pm49FL004, 512 kB: probe_jedec: id1 0x9d, id2 0x6e
Added layout entry 00000000 - 0007ffff named complete flash
Found PMC flash chip "Pm49FL004" (512 kB, LPC, FWH) mapped at physical address 0xfff80000.
===
This flash part has status UNTESTED for operations: WP
The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom@flashrom.org if any of the above operations
work correctly for you with this flash chip. Please include the flashrom log
file for all operations you tested (see the man page for details), and mention
which mainboard or programmer you tested in the subject line.
You can also try to follow the instructions here:
https://www.flashrom.org/contrib_howtos/how_to_mark_chip_tested.html
Thanks for your help!
Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
Lock bits at 0xb7ba8002 not changed.
Lock bits at 0xb7bb8002 not changed.
Lock bits at 0xb7bc8002 not changed.
Lock bits at 0xb7bd8002 not changed.
Lock bits at 0xb7be8002 not changed.
Lock bits at 0xb7bf8002 not changed.
Lock bits at 0xb7c08002 not changed.
Lock bits at 0xb7c18002 not changed.
Reading old flash chip contents... read_flash: region (00000000..0x07ffff) is readable, reading range (00000000..0x07ffff).
done.
Updating flash chip contents... erase_write: region (00000000..0x07ffff) is writable, erasing range (00000000..0x000fff).
write_flash: region (00000000..0x07ffff) is writable, writing range (0x000800..0x0008ff).
W(800:8ff)Erase/write done from 0 to fff
Verifying flash... read_flash: region (00000000..0x07ffff) is readable, reading range (00000000..0x07ffff).
VERIFIED.
Runtime from programmer init to shutdown: 0min 3sec
(5-5/7)