|
*** Pre-CBMEM romstage console overflowed, log truncated! ***
|
|
m type: mobile
|
|
[DEBUG] Setting up static northbridge registers... done
|
|
[DEBUG] Initializing Graphics...
|
|
[DEBUG] Back from systemagent_early_init()
|
|
[INFO ] Intel ME early init
|
|
[INFO ] Intel ME firmware is ready
|
|
[DEBUG] ME: Requested 32MB UMA
|
|
[DEBUG] Starting native Platform init
|
|
[DEBUG] DMI: Running at X4 @ 5000MT/s
|
|
[DEBUG] FMAP: area RW_MRC_CACHE found @ 900000 (65536 bytes)
|
|
[DEBUG] Trying stored timings.
|
|
[DEBUG] Starting Sandy Bridge RAM training (fast boot).
|
|
[DEBUG] 100MHz reference clock support: no
|
|
[DEBUG] PLL_REF100_CFG value: 0x0
|
|
[DEBUG] Trying CAS 9, tCK 384.
|
|
[DEBUG] Found compatible clock, CAS pair.
|
|
[DEBUG] Selected DRAM frequency: 666 MHz
|
|
[DEBUG] Selected CAS latency : 9T
|
|
[DEBUG] MPLL busy... done in 70 us
|
|
[DEBUG] MPLL frequency is set at : 666 MHz
|
|
[DEBUG] Done dimm mapping
|
|
[DEBUG] Update PCI-E configuration space:
|
|
[DEBUG] PCI(0, 0, 0)[a0] = 0
|
|
[DEBUG] PCI(0, 0, 0)[a4] = 2
|
|
[DEBUG] PCI(0, 0, 0)[bc] = 82a00000
|
|
[DEBUG] PCI(0, 0, 0)[a8] = 7b600000
|
|
[DEBUG] PCI(0, 0, 0)[ac] = 2
|
|
[DEBUG] PCI(0, 0, 0)[b8] = 80000000
|
|
[DEBUG] PCI(0, 0, 0)[b0] = 80a00000
|
|
[DEBUG] PCI(0, 0, 0)[b4] = 80800000
|
|
[DEBUG] PCI(0, 0, 0)[7c] = 7f
|
|
[DEBUG] PCI(0, 0, 0)[70] = fe000000
|
|
[DEBUG] PCI(0, 0, 0)[74] = 1
|
|
[DEBUG] PCI(0, 0, 0)[78] = fe000c00
|
|
[DEBUG] Done memory map
|
|
[DEBUG] Done io registers
|
|
[DEBUG] t123: 1768, 9120, 500
|
|
[NOTE ] ME: FWS2: 0x3900016e
|
|
[NOTE ] ME: Bist in progress: 0x0
|
|
[NOTE ] ME: ICC Status : 0x3
|
|
[NOTE ] ME: Invoke MEBx : 0x1
|
|
[NOTE ] ME: CPU replaced : 0x0
|
|
[NOTE ] ME: MBP ready : 0x1
|
|
[NOTE ] ME: MFS failure : 0x1
|
|
[NOTE ] ME: Warm reset req : 0x0
|
|
[NOTE ] ME: CPU repl valid : 0x1
|
|
[NOTE ] ME: (Reserved) : 0x0
|
|
[NOTE ] ME: FW update req : 0x0
|
|
[NOTE ] ME: (Reserved) : 0x0
|
|
[NOTE ] ME: Current state : 0x0
|
|
[NOTE ] ME: Current PM event: 0x9
|
|
[NOTE ] ME: Progress code : 0x3
|
|
[NOTE ] PASSED! Tell ME that DRAM is ready
|
|
[NOTE ] ME: FWS2: 0x390b016e
|
|
[NOTE ] ME: Bist in progress: 0x0
|
|
[NOTE ] ME: ICC Status : 0x3
|
|
[NOTE ] ME: Invoke MEBx : 0x1
|
|
[NOTE ] ME: CPU replaced : 0x0
|
|
[NOTE ] ME: MBP ready : 0x1
|
|
[NOTE ] ME: MFS failure : 0x1
|
|
[NOTE ] ME: Warm reset req : 0x0
|
|
[NOTE ] ME: CPU repl valid : 0x1
|
|
[NOTE ] ME: (Reserved) : 0x0
|
|
[NOTE ] ME: FW update req : 0x0
|
|
[NOTE ] ME: (Reserved) : 0x0
|
|
[NOTE ] ME: Current state : 0xb
|
|
[NOTE ] ME: Current PM event: 0x9
|
|
[NOTE ] ME: Progress code : 0x3
|
|
[NOTE ] ME: Requested BIOS Action: Continue to boot
|
|
[DEBUG] ME: FW Partition Table : OK
|
|
[DEBUG] ME: Bringup Loader Failure : NO
|
|
[DEBUG] ME: Firmware Init Complete : NO
|
|
[DEBUG] ME: Manufacturing Mode : YES
|
|
[DEBUG] ME: Boot Options Present : NO
|
|
[DEBUG] ME: Update In Progress : NO
|
|
[DEBUG] ME: Current Working State : Normal
|
|
[DEBUG] ME: Current Operation State : M0 without UMA
|
|
[DEBUG] ME: Current Operation Mode : Normal
|
|
[DEBUG] ME: Error Code : No Error
|
|
[DEBUG] ME: Progress Phase : Policy Module
|
|
[DEBUG] ME: Power Management Event : Non-power cycle reset
|
|
[DEBUG] ME: Progress Phase State : Received DRAM Init Done
|
|
[DEBUG] memcfg DDR3 ref clock 133 MHz
|
|
[DEBUG] memcfg DDR3 clock 1330 MHz
|
|
[DEBUG] memcfg channel assignment: A: 0, B 1, C 2
|
|
[DEBUG] memcfg channel[0] config (00620010):
|
|
[DEBUG] ECC inactive
|
|
[DEBUG] enhanced interleave mode on
|
|
[DEBUG] rank interleave on
|
|
[DEBUG] DIMMA 4096 MB width x8 dual rank, selected
|
|
[DEBUG] DIMMB 0 MB width x8 single rank
|
|
[DEBUG] memcfg channel[1] config (00620010):
|
|
[DEBUG] ECC inactive
|
|
[DEBUG] enhanced interleave mode on
|
|
[DEBUG] rank interleave on
|
|
[DEBUG] DIMMA 4096 MB width x8 dual rank, selected
|
|
[DEBUG] DIMMB 0 MB width x8 single rank
|
|
[DEBUG] CBMEM:
|
|
[DEBUG] IMD: root @ 0x7ffff000 254 entries.
|
|
[DEBUG] IMD: root @ 0x7fffec00 62 entries.
|
|
[DEBUG] Starting cbfs_boot_device
|
|
[DEBUG] FMAP: area COREBOOT found @ 991000 (2551808 bytes)
|
|
[INFO ] Booting from COREBOOT region
|
|
[DEBUG] External stage cache:
|
|
[DEBUG] IMD: root @ 0x803ff000 254 entries.
|
|
[DEBUG] IMD: root @ 0x803fec00 62 entries.
|
|
[DEBUG] CBMEM entry for DIMM info: 0x7ffdb000
|
|
[DEBUG] SMM Memory Map
|
|
[DEBUG] SMRAM : 0x80000000 0x800000
|
|
[DEBUG] Subregion 0: 0x80000000 0x300000
|
|
[DEBUG] Subregion 1: 0x80300000 0x100000
|
|
[DEBUG] Subregion 2: 0x80400000 0x400000
|
|
[DEBUG] Normal boot
|
|
[DEBUG] Starting cbfs_boot_device
|
|
[INFO ] CBFS: Found 'fallback/postcar' @0x3f3c0 size 0x9d18 in mcache @0xfeff0fe4
|
|
[DEBUG] Loading module at 0x7ffcb000 with entry 0x7ffcb031. filesize: 0x9548 memsize: 0xf988
|
|
[DEBUG] Processing 484 relocs. Offset value of 0x7dfcb000
|
|
[DEBUG] BS: romstage times (exec / console): total (unknown) / 9 ms
|
|
|
|
|
|
[NOTE ] coreboot-25.12-669-gc940d20696b4-dirty Sun Mar 01 17:03:40 UTC 2026 x86_32 postcar starting (log level: 7)...
|
|
[DEBUG] Normal boot
|
|
[DEBUG] Starting cbfs_boot_device
|
|
[DEBUG] FMAP: area COREBOOT found @ 991000 (2551808 bytes)
|
|
[INFO ] Booting from COREBOOT region
|
|
[INFO ] CBFS: Found 'fallback/ramstage' @0x1db80 size 0x1d799 in mcache @0x7fffea1c
|
|
[DEBUG] Loading module at 0x7fe7f000 with entry 0x7fe7f000. filesize: 0x3b2a0 memsize: 0x14a470
|
|
[DEBUG] Processing 4055 relocs. Offset value of 0x7be7f000
|
|
[DEBUG] BS: postcar times (exec / console): total (unknown) / 0 ms
|
|
|
|
|
|
[NOTE ] coreboot-25.12-669-gc940d20696b4-dirty Sun Mar 01 17:03:40 UTC 2026 x86_32 ramstage starting (log level: 7)...
|
|
[DEBUG] Normal boot
|
|
[INFO ] Enumerating buses...
|
|
[DEBUG] Root Device scanning...
|
|
[DEBUG] CPU_CLUSTER: 0 enabled
|
|
[DEBUG] DOMAIN: 00000000 enabled
|
|
[DEBUG] DOMAIN: 00000000 scanning...
|
|
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 00
|
|
[DEBUG] PCI: 00:00:00.0 [8086/0104] enabled
|
|
[DEBUG] PCI: 00:00:01.0 [8086/0101] disabled
|
|
[DEBUG] PCI: 00:00:02.0 [8086/0116] enabled
|
|
[DEBUG] PCI: 00:00:04.0 [8086/0103] disabled
|
|
[DEBUG] PCI: 00:00:14.0 [8086/1e31] enabled
|
|
[DEBUG] PCI: 00:00:16.0 [8086/1e3a] enabled
|
|
[DEBUG] PCI: 00:00:16.1: Disabling device
|
|
[DEBUG] PCI: 00:00:16.1 [8086/1e3b] disabled No operations
|
|
[DEBUG] PCI: 00:00:16.2: Disabling device
|
|
[DEBUG] PCI: 00:00:16.2 [8086/1e3c] disabled No operations
|
|
[DEBUG] PCI: 00:00:16.3: Disabling device
|
|
[DEBUG] PCI: 00:00:16.3 [8086/1e3d] disabled No operations
|
|
[DEBUG] PCI: 00:00:19.0: Disabling device
|
|
[DEBUG] PCI: 00:00:1a.0 [8086/1e2d] enabled
|
|
[DEBUG] PCI: 00:00:1b.0 [8086/1e20] enabled
|
|
[DEBUG] PCI: 00:00:1c.0: No downstream device
|
|
[INFO ] PCH: PCIe Root Port coalescing is enabled
|
|
[DEBUG] PCI: 00:00:1c.0 [8086/1e10] enabled
|
|
[DEBUG] PCI: 00:00:1c.1: No downstream device
|
|
[DEBUG] PCI: 00:00:1c.1: Disabling device
|
|
[DEBUG] PCI: 00:00:1c.2: Found a downstream device
|
|
[DEBUG] PCH: Remap PCIe function 2 to 1
|
|
[DEBUG] PCI: 00:00:1c.2 [8086/1e14] enabled
|
|
[DEBUG] PCI: 00:00:1c.3: Found a downstream device
|
|
[DEBUG] PCH: Remap PCIe function 3 to 1
|
|
[DEBUG] PCI: 00:00:1c.3 [8086/1e16] enabled
|
|
[DEBUG] PCI: 00:00:1c.4: No downstream device
|
|
[DEBUG] PCI: 00:00:1c.4: Disabling device
|
|
[DEBUG] PCI: 00:00:1c.4: check set enabled
|
|
[DEBUG] PCI: 00:00:1c.5: Found a downstream device
|
|
[DEBUG] PCH: Remap PCIe function 5 to 1
|
|
[DEBUG] PCI: 00:00:1c.5 [8086/1e1a] enabled
|
|
[DEBUG] PCI: 00:00:1c.6: No downstream device
|
|
[DEBUG] PCH: Remap PCIe function 6 to 1
|
|
[DEBUG] PCI: 00:00:1c.6 [8086/1e1c] enabled
|
|
[DEBUG] PCI: 00:00:1c.7: No downstream device
|
|
[DEBUG] PCI: 00:00:1c.7: Disabling device
|
|
[DEBUG] PCH: PCIe map 1c.1 -> 1c.6
|
|
[DEBUG] PCH: PCIe map 1c.2 -> 1c.1
|
|
[DEBUG] PCH: PCIe map 1c.3 -> 1c.2
|
|
[DEBUG] PCH: PCIe map 1c.5 -> 1c.3
|
|
[DEBUG] PCH: PCIe map 1c.6 -> 1c.5
|
|
[DEBUG] PCI: 00:00:1d.0 [8086/1e26] enabled
|
|
[DEBUG] PCI: 00:00:1e.0: Disabling device
|
|
[DEBUG] PCI: 00:00:1e.0 [8086/2448] disabled
|
|
[DEBUG] PCI: 00:00:1f.0 [8086/1e57] enabled
|
|
[DEBUG] PCI: 00:00:1f.2 [8086/1e01] enabled
|
|
[DEBUG] PCI: 00:00:1f.3 [8086/1e22] enabled
|
|
[DEBUG] PCI: 00:00:1f.5: Disabling device
|
|
[DEBUG] PCI: 00:00:1f.5 [8086/1e09] disabled No operations
|
|
[DEBUG] PCI: 00:00:1f.6: Disabling device
|
|
[DEBUG] PCI: 00:00:1f.6 [8086/1e24] disabled No operations
|
|
[DEBUG] PCI: 00:00:1c.0 scanning...
|
|
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 01
|
|
[INFO ] PCI: 00:00:1c.0: ASPM enabled L0s and L1 (no endpoint)
|
|
[INFO ] PCI: 00:00:1c.0: Setting Max_Payload_Size to 128 for devices under this root port
|
|
[DEBUG] scan_bus: bus PCI: 00:00:1c.0 finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1c.1 scanning...
|
|
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 0a
|
|
[DEBUG] PCI: 00:0a:00.0 [10ec/5209] enabled
|
|
[INFO ] Enabling Common Clock Configuration
|
|
[INFO ] ASPM: Enabled None
|
|
[DEBUG] PCI: 00:0a:00.0: No LTR support
|
|
[INFO ] PCI: 00:00:1c.1: Setting Max_Payload_Size to 128 for devices under this root port
|
|
[DEBUG] scan_bus: bus PCI: 00:00:1c.1 finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1c.2 scanning...
|
|
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 13
|
|
[DEBUG] PCI: 00:13:00.0 [8086/088e] enabled
|
|
[INFO ] Enabling Common Clock Configuration
|
|
[INFO ] ASPM: Enabled L1
|
|
[DEBUG] PCI: 00:13:00.0: No LTR support
|
|
[INFO ] PCI: 00:00:1c.2: Setting Max_Payload_Size to 128 for devices under this root port
|
|
[DEBUG] scan_bus: bus PCI: 00:00:1c.2 finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1c.3 scanning...
|
|
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 1c
|
|
[DEBUG] PCI: 00:1c:00.0 [14e4/16b0] enabled
|
|
[INFO ] Enabling Common Clock Configuration
|
|
[INFO ] ASPM: Enabled L0s and L1
|
|
[DEBUG] PCI: 00:1c:00.0: No LTR support
|
|
[INFO ] PCI: 00:00:1c.3: Setting Max_Payload_Size to 128 for devices under this root port
|
|
[DEBUG] scan_bus: bus PCI: 00:00:1c.3 finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1c.5 scanning...
|
|
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 1d
|
|
[INFO ] PCI: 00:00:1c.5: ASPM enabled L0s and L1 (no endpoint)
|
|
[INFO ] PCI: 00:00:1c.5: Setting Max_Payload_Size to 128 for devices under this root port
|
|
[DEBUG] scan_bus: bus PCI: 00:00:1c.5 finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1f.0 scanning...
|
|
[DEBUG] scan_bus: bus PCI: 00:00:1f.0 finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1f.3 scanning...
|
|
[DEBUG] scan_bus: bus PCI: 00:00:1f.3 finished in 0 msecs
|
|
[DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 1 msecs
|
|
[DEBUG] scan_bus: bus Root Device finished in 1 msecs
|
|
[INFO ] done
|
|
[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 2 / 0 ms
|
|
[DEBUG] found VGA at PCI: 00:00:02.0
|
|
[DEBUG] Setting up VGA for PCI: 00:00:02.0
|
|
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000
|
|
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
|
|
[INFO ] Allocating resources...
|
|
[INFO ] Reading resources...
|
|
[DEBUG] Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
|
|
[DEBUG] TOUUD 0x27b600000 TOLUD 0x82a00000 TOM 0x200000000
|
|
[DEBUG] MEBASE 0x1fe000000
|
|
[DEBUG] IGD decoded, subtracting 32M UMA and 2M GTT
|
|
[DEBUG] TSEG base 0x80000000 size 8M
|
|
[INFO ] Available memory below 4GB: 2048M
|
|
[INFO ] Available memory above 4GB: 6070M
|
|
[INFO ] Done reading resources.
|
|
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) ===
|
|
[DEBUG] PCI: 00:00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
|
|
[DEBUG] NONE 18 * [0x0 - 0x7ff] io
|
|
[DEBUG] PCI: 00:00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
|
|
[DEBUG] PCI: 00:00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
|
|
[DEBUG] NONE 10 * [0x0 - 0x7fffff] mem
|
|
[DEBUG] PCI: 00:00:1c.0 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done
|
|
[DEBUG] PCI: 00:00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
|
[DEBUG] NONE 14 * [0x0 - 0xfffffff] prefmem
|
|
[DEBUG] PCI: 00:00:1c.0 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
|
|
[DEBUG] PCI: 00:00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
|
|
[DEBUG] NONE 18 * [0x0 - 0x7ff] io
|
|
[DEBUG] PCI: 00:00:1c.1 io: size: 1000 align: 12 gran: 12 limit: ffff done
|
|
[DEBUG] PCI: 00:00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
|
|
[DEBUG] NONE 10 * [0x0 - 0x7fffff] mem
|
|
[DEBUG] PCI: 00:0a:00.0 10 * [0x800000 - 0x800fff] mem
|
|
[DEBUG] PCI: 00:00:1c.1 mem: size: 900000 align: 20 gran: 20 limit: ffffffff done
|
|
[DEBUG] PCI: 00:00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
|
[DEBUG] NONE 14 * [0x0 - 0xfffffff] prefmem
|
|
[DEBUG] PCI: 00:00:1c.1 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
|
|
[DEBUG] PCI: 00:00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff
|
|
[DEBUG] NONE 18 * [0x0 - 0x7ff] io
|
|
[DEBUG] PCI: 00:00:1c.2 io: size: 1000 align: 12 gran: 12 limit: ffff done
|
|
[DEBUG] PCI: 00:00:1c.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
|
|
[DEBUG] PCI: 00:13:00.0 10 * [0x0 - 0x1fff] mem
|
|
[DEBUG] NONE 10 * [0x2000 - 0x801fff] mem
|
|
[DEBUG] PCI: 00:00:1c.2 mem: size: 900000 align: 20 gran: 20 limit: ffffffff done
|
|
[DEBUG] PCI: 00:00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
|
[DEBUG] NONE 14 * [0x0 - 0xfffffff] prefmem
|
|
[DEBUG] PCI: 00:00:1c.2 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
|
|
[DEBUG] PCI: 00:00:1c.3 io: size: 0 align: 12 gran: 12 limit: ffff
|
|
[DEBUG] PCI: 00:00:1c.3 io: size: 0 align: 12 gran: 12 limit: ffff done
|
|
[DEBUG] PCI: 00:00:1c.3 mem: size: 0 align: 20 gran: 20 limit: ffffffff
|
|
[DEBUG] PCI: 00:00:1c.3 mem: size: 0 align: 20 gran: 20 limit: ffffffff done
|
|
[DEBUG] PCI: 00:00:1c.3 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
|
[DEBUG] PCI: 00:1c:00.0 10 * [0x0 - 0xffff] prefmem
|
|
[DEBUG] PCI: 00:1c:00.0 18 * [0x10000 - 0x1ffff] prefmem
|
|
[DEBUG] PCI: 00:00:1c.3 prefmem: size: 100000 align: 20 gran: 20 limit: ffffffff done
|
|
[DEBUG] PCI: 00:00:1c.5 io: size: 0 align: 12 gran: 12 limit: ffff
|
|
[DEBUG] NONE 18 * [0x0 - 0x7ff] io
|
|
[DEBUG] PCI: 00:00:1c.5 io: size: 1000 align: 12 gran: 12 limit: ffff done
|
|
[DEBUG] PCI: 00:00:1c.5 mem: size: 0 align: 20 gran: 20 limit: ffffffff
|
|
[DEBUG] NONE 10 * [0x0 - 0x7fffff] mem
|
|
[DEBUG] PCI: 00:00:1c.5 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done
|
|
[DEBUG] PCI: 00:00:1c.5 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
|
[DEBUG] NONE 14 * [0x0 - 0xfffffff] prefmem
|
|
[DEBUG] PCI: 00:00:1c.5 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
|
|
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) ===
|
|
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000100 base fed40000 limit fed44fff io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.3 20 base 00000400 limit 0000041f io (fixed)
|
|
[INFO ] DOMAIN: 00000000: Resource ranges:
|
|
[INFO ] * Base: 1000, Size: f000, Tag: 100
|
|
[DEBUG] PCI: 00:00:1c.0 1c * [0xf000 - 0xffff] limit: ffff io
|
|
[DEBUG] PCI: 00:00:1c.1 1c * [0xe000 - 0xefff] limit: efff io
|
|
[DEBUG] PCI: 00:00:1c.2 1c * [0xd000 - 0xdfff] limit: dfff io
|
|
[DEBUG] PCI: 00:00:1c.5 1c * [0xc000 - 0xcfff] limit: cfff io
|
|
[DEBUG] PCI: 00:00:02.0 20 * [0xbfc0 - 0xbfff] limit: bfff io
|
|
[DEBUG] PCI: 00:00:1f.2 20 * [0xbfa0 - 0xbfbf] limit: bfbf io
|
|
[DEBUG] PCI: 00:00:1f.2 10 * [0xbf98 - 0xbf9f] limit: bf9f io
|
|
[DEBUG] PCI: 00:00:1f.2 18 * [0xbf90 - 0xbf97] limit: bf97 io
|
|
[DEBUG] PCI: 00:00:1f.2 14 * [0xbf8c - 0xbf8f] limit: bf8f io
|
|
[DEBUG] PCI: 00:00:1f.2 1c * [0xbf88 - 0xbf8b] limit: bf8b io
|
|
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
|
|
[DEBUG] DOMAIN: 00000000 mem: base: 80000000 size: 0 align: 0 gran: 0 limit: efffffff
|
|
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: fffffffff
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 03 base fed10000 limit fed17fff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 04 base fed18000 limit fed18fff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 05 base fed19000 limit fed19fff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 06 base 00000000 limit 0009ffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 07 base 00100000 limit 7fffffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 08 base 100000000 limit 27b5fffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 09 base 80000000 limit 829fffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0a base 000a0000 limit 000bffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0b base 000c0000 limit 000fffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0c base 20000000 limit 201fffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0d base 40000000 limit 401fffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 02 base ff000000 limit ffffffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 03 base fec00000 limit fec00fff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 04 base fed00000 limit fed00fff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 05 base fed20000 limit fed3ffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 06 base fed45000 limit fed8ffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 f0 base fed1c000 limit fed1ffff mem (fixed)
|
|
[INFO ] DOMAIN: 00000000: Resource ranges:
|
|
[INFO ] * Base: 82a00000, Size: 6d600000, Tag: 200
|
|
[INFO ] * Base: 27b600000, Size: d84a00000, Tag: 200
|
|
[DEBUG] PCI: 00:00:02.0 18 * [0xe0000000 - 0xefffffff] limit: efffffff prefmem
|
|
[DEBUG] PCI: 00:00:02.0 10 * [0xdfc00000 - 0xdfffffff] limit: dfffffff mem
|
|
[DEBUG] PCI: 00:00:1c.0 24 * [0xff0000000 - 0xfffffffff] limit: fffffffff prefmem
|
|
[DEBUG] PCI: 00:00:1c.1 24 * [0xfe0000000 - 0xfefffffff] limit: fefffffff prefmem
|
|
[DEBUG] PCI: 00:00:1c.2 24 * [0xfd0000000 - 0xfdfffffff] limit: fdfffffff prefmem
|
|
[DEBUG] PCI: 00:00:1c.5 24 * [0xfc0000000 - 0xfcfffffff] limit: fcfffffff prefmem
|
|
[DEBUG] PCI: 00:00:1c.1 20 * [0xdf300000 - 0xdfbfffff] limit: dfbfffff mem
|
|
[DEBUG] PCI: 00:00:1c.2 20 * [0xdea00000 - 0xdf2fffff] limit: df2fffff mem
|
|
[DEBUG] PCI: 00:00:1c.0 20 * [0xde200000 - 0xde9fffff] limit: de9fffff mem
|
|
[DEBUG] PCI: 00:00:1c.5 20 * [0xdda00000 - 0xde1fffff] limit: de1fffff mem
|
|
[DEBUG] PCI: 00:00:1c.3 24 * [0xdd900000 - 0xdd9fffff] limit: dd9fffff prefmem
|
|
[DEBUG] PCI: 00:00:14.0 10 * [0xdd8f0000 - 0xdd8fffff] limit: dd8fffff mem
|
|
[DEBUG] PCI: 00:00:1b.0 10 * [0xdd8ec000 - 0xdd8effff] limit: dd8effff mem
|
|
[DEBUG] PCI: 00:00:1f.2 24 * [0xdd8eb000 - 0xdd8eb7ff] limit: dd8eb7ff mem
|
|
[DEBUG] PCI: 00:00:1a.0 10 * [0xdd8ea000 - 0xdd8ea3ff] limit: dd8ea3ff mem
|
|
[DEBUG] PCI: 00:00:1d.0 10 * [0xdd8e9000 - 0xdd8e93ff] limit: dd8e93ff mem
|
|
[DEBUG] PCI: 00:00:1f.3 10 * [0xdd8e8000 - 0xdd8e80ff] limit: dd8e80ff mem
|
|
[DEBUG] PCI: 00:00:16.0 10 * [0xdd8e7000 - 0xdd8e700f] limit: dd8e700f mem
|
|
[DEBUG] DOMAIN: 00000000 mem: base: 80000000 size: 0 align: 0 gran: 0 limit: efffffff done
|
|
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: fffffffff done
|
|
[DEBUG] NONE 18 * [0xf000 - 0xf7ff] limit: f7ff io
|
|
[DEBUG] NONE 14 * [0xff0000000 - 0xfffffffff] limit: fffffffff prefmem
|
|
[DEBUG] NONE 10 * [0xde200000 - 0xde9fffff] limit: de9fffff mem
|
|
[DEBUG] NONE 18 * [0xe000 - 0xe7ff] limit: e7ff io
|
|
[DEBUG] NONE 14 * [0xfe0000000 - 0xfefffffff] limit: fefffffff prefmem
|
|
[DEBUG] PCI: 00:0a:00.0 10 * [0xdfb00000 - 0xdfb00fff] limit: dfb00fff mem
|
|
[DEBUG] NONE 10 * [0xdf300000 - 0xdfafffff] limit: dfafffff mem
|
|
[DEBUG] NONE 18 * [0xd000 - 0xd7ff] limit: d7ff io
|
|
[DEBUG] NONE 14 * [0xfd0000000 - 0xfdfffffff] limit: fdfffffff prefmem
|
|
[DEBUG] PCI: 00:13:00.0 10 * [0xdea00000 - 0xdea01fff] limit: dea01fff mem
|
|
[DEBUG] NONE 10 * [0xdea02000 - 0xdf201fff] limit: df201fff mem
|
|
[DEBUG] PCI: 00:1c:00.0 10 * [0xdd900000 - 0xdd90ffff] limit: dd90ffff prefmem
|
|
[DEBUG] PCI: 00:1c:00.0 18 * [0xdd910000 - 0xdd91ffff] limit: dd91ffff prefmem
|
|
[DEBUG] NONE 18 * [0xc000 - 0xc7ff] limit: c7ff io
|
|
[DEBUG] NONE 14 * [0xfc0000000 - 0xfcfffffff] limit: fcfffffff prefmem
|
|
[DEBUG] NONE 10 * [0xdda00000 - 0xde1fffff] limit: de1fffff mem
|
|
[INFO ] === Resource allocator: DOMAIN: 00000000 - resource allocation complete ===
|
|
[DEBUG] PCI: 00:00:02.0 10 <- [0x00000000dfc00000 - 0x00000000dfffffff] size 0x00400000 gran 0x16 mem64
|
|
[DEBUG] PCI: 00:00:02.0 18 <- [0x00000000e0000000 - 0x00000000efffffff] size 0x10000000 gran 0x1c prefmem64
|
|
[DEBUG] PCI: 00:00:02.0 20 <- [0x000000000000bfc0 - 0x000000000000bfff] size 0x00000040 gran 0x06 io
|
|
[DEBUG] PCI: 00:00:14.0 10 <- [0x00000000dd8f0000 - 0x00000000dd8fffff] size 0x00010000 gran 0x10 mem64
|
|
[DEBUG] PCI: 00:00:16.0 10 <- [0x00000000dd8e7000 - 0x00000000dd8e700f] size 0x00000010 gran 0x04 mem64
|
|
[DEBUG] PCI: 00:00:1a.0 10 <- [0x00000000dd8ea000 - 0x00000000dd8ea3ff] size 0x00000400 gran 0x0a mem
|
|
[DEBUG] PCI: 00:00:1b.0 10 <- [0x00000000dd8ec000 - 0x00000000dd8effff] size 0x00004000 gran 0x0e mem64
|
|
[DEBUG] PCI: 00:00:1c.0 1c <- [0x000000000000f000 - 0x000000000000ffff] size 0x00001000 gran 0x0c seg 00 bus 01 io
|
|
[DEBUG] PCI: 00:00:1c.0 24 <- [0x0000000ff0000000 - 0x0000000fffffffff] size 0x10000000 gran 0x14 seg 00 bus 01 prefmem
|
|
[DEBUG] PCI: 00:00:1c.0 20 <- [0x00000000de200000 - 0x00000000de9fffff] size 0x00800000 gran 0x14 seg 00 bus 01 mem
|
|
[DEBUG] PCI: 00:00:1c.1 1c <- [0x000000000000e000 - 0x000000000000efff] size 0x00001000 gran 0x0c seg 00 bus 0a io
|
|
[DEBUG] PCI: 00:00:1c.1 24 <- [0x0000000fe0000000 - 0x0000000fefffffff] size 0x10000000 gran 0x14 seg 00 bus 0a prefmem
|
|
[DEBUG] PCI: 00:00:1c.1 20 <- [0x00000000df300000 - 0x00000000dfbfffff] size 0x00900000 gran 0x14 seg 00 bus 0a mem
|
|
[DEBUG] PCI: 00:0a:00.0 10 <- [0x00000000dfb00000 - 0x00000000dfb00fff] size 0x00001000 gran 0x0c mem
|
|
[DEBUG] PCI: 00:00:1c.2 1c <- [0x000000000000d000 - 0x000000000000dfff] size 0x00001000 gran 0x0c seg 00 bus 13 io
|
|
[DEBUG] PCI: 00:00:1c.2 24 <- [0x0000000fd0000000 - 0x0000000fdfffffff] size 0x10000000 gran 0x14 seg 00 bus 13 prefmem
|
|
[DEBUG] PCI: 00:00:1c.2 20 <- [0x00000000dea00000 - 0x00000000df2fffff] size 0x00900000 gran 0x14 seg 00 bus 13 mem
|
|
[DEBUG] PCI: 00:13:00.0 10 <- [0x00000000dea00000 - 0x00000000dea01fff] size 0x00002000 gran 0x0d mem64
|
|
[DEBUG] PCI: 00:00:1c.3 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 1c io
|
|
[DEBUG] PCI: 00:00:1c.3 24 <- [0x00000000dd900000 - 0x00000000dd9fffff] size 0x00100000 gran 0x14 seg 00 bus 1c prefmem
|
|
[DEBUG] PCI: 00:00:1c.3 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 1c mem
|
|
[DEBUG] PCI: 00:1c:00.0 10 <- [0x00000000dd900000 - 0x00000000dd90ffff] size 0x00010000 gran 0x10 prefmem64
|
|
[DEBUG] PCI: 00:1c:00.0 18 <- [0x00000000dd910000 - 0x00000000dd91ffff] size 0x00010000 gran 0x10 prefmem64
|
|
[DEBUG] PCI: 00:00:1c.5 1c <- [0x000000000000c000 - 0x000000000000cfff] size 0x00001000 gran 0x0c seg 00 bus 1d io
|
|
[DEBUG] PCI: 00:00:1c.5 24 <- [0x0000000fc0000000 - 0x0000000fcfffffff] size 0x10000000 gran 0x14 seg 00 bus 1d prefmem
|
|
[DEBUG] PCI: 00:00:1c.5 20 <- [0x00000000dda00000 - 0x00000000de1fffff] size 0x00800000 gran 0x14 seg 00 bus 1d mem
|
|
[DEBUG] PCI: 00:00:1d.0 10 <- [0x00000000dd8e9000 - 0x00000000dd8e93ff] size 0x00000400 gran 0x0a mem
|
|
[DEBUG] PCI: 00:00:1f.2 10 <- [0x000000000000bf98 - 0x000000000000bf9f] size 0x00000008 gran 0x03 io
|
|
[DEBUG] PCI: 00:00:1f.2 14 <- [0x000000000000bf8c - 0x000000000000bf8f] size 0x00000004 gran 0x02 io
|
|
[DEBUG] PCI: 00:00:1f.2 18 <- [0x000000000000bf90 - 0x000000000000bf97] size 0x00000008 gran 0x03 io
|
|
[DEBUG] PCI: 00:00:1f.2 1c <- [0x000000000000bf88 - 0x000000000000bf8b] size 0x00000004 gran 0x02 io
|
|
[DEBUG] PCI: 00:00:1f.2 20 <- [0x000000000000bfa0 - 0x000000000000bfbf] size 0x00000020 gran 0x05 io
|
|
[DEBUG] PCI: 00:00:1f.2 24 <- [0x00000000dd8eb000 - 0x00000000dd8eb7ff] size 0x00000800 gran 0x0b mem
|
|
[DEBUG] PCI: 00:00:1f.3 10 <- [0x00000000dd8e8000 - 0x00000000dd8e80ff] size 0x00000100 gran 0x08 mem64
|
|
[INFO ] Done setting resources.
|
|
[INFO ] Done allocating resources.
|
|
[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 2 / 1 ms
|
|
[INFO ] Enabling resources...
|
|
[DEBUG] PCI: 00:00:00.0 subsystem <- 1025/0737
|
|
[DEBUG] PCI: 00:00:00.0 cmd <- 06
|
|
[DEBUG] PCI: 00:00:02.0 subsystem <- 1025/0737
|
|
[DEBUG] PCI: 00:00:02.0 cmd <- 03
|
|
[DEBUG] PCI: 00:00:14.0 subsystem <- 1025/0737
|
|
[DEBUG] PCI: 00:00:14.0 cmd <- 102
|
|
[DEBUG] PCI: 00:00:16.0 subsystem <- 1025/0737
|
|
[DEBUG] PCI: 00:00:16.0 cmd <- 02
|
|
[DEBUG] PCI: 00:00:1a.0 subsystem <- 1025/0737
|
|
[DEBUG] PCI: 00:00:1a.0 cmd <- 102
|
|
[DEBUG] PCI: 00:00:1b.0 subsystem <- 1025/0737
|
|
[DEBUG] PCI: 00:00:1b.0 cmd <- 102
|
|
[DEBUG] PCI: 00:00:1c.0 bridge ctrl <- 0013
|
|
[DEBUG] PCI: 00:00:1c.0 subsystem <- 1025/0737
|
|
[DEBUG] PCI: 00:00:1c.0 cmd <- 107
|
|
[DEBUG] PCI: 00:00:1c.1 bridge ctrl <- 0013
|
|
[DEBUG] PCI: 00:00:1c.1 subsystem <- 1025/0737
|
|
[DEBUG] PCI: 00:00:1c.1 cmd <- 107
|
|
[DEBUG] PCI: 00:00:1c.2 bridge ctrl <- 0013
|
|
[DEBUG] PCI: 00:00:1c.2 subsystem <- 1025/0737
|
|
[DEBUG] PCI: 00:00:1c.2 cmd <- 107
|
|
[DEBUG] PCI: 00:00:1c.3 bridge ctrl <- 0013
|
|
[DEBUG] PCI: 00:00:1c.3 subsystem <- 1025/0737
|
|
[DEBUG] PCI: 00:00:1c.3 cmd <- 106
|
|
[DEBUG] PCI: 00:00:1c.5 bridge ctrl <- 0013
|
|
[DEBUG] PCI: 00:00:1c.5 subsystem <- 1025/0737
|
|
[DEBUG] PCI: 00:00:1c.5 cmd <- 107
|
|
[DEBUG] PCI: 00:00:1d.0 subsystem <- 1025/0737
|
|
[DEBUG] PCI: 00:00:1d.0 cmd <- 102
|
|
[DEBUG] PCI: 00:00:1f.0 subsystem <- 1025/0737
|
|
[DEBUG] PCI: 00:00:1f.0 cmd <- 107
|
|
[DEBUG] PCI: 00:00:1f.2 subsystem <- 1025/0737
|
|
[DEBUG] PCI: 00:00:1f.2 cmd <- 03
|
|
[DEBUG] PCI: 00:00:1f.3 subsystem <- 1025/0737
|
|
[DEBUG] PCI: 00:00:1f.3 cmd <- 103
|
|
[DEBUG] PCI: 00:0a:00.0 cmd <- 02
|
|
[DEBUG] PCI: 00:13:00.0 cmd <- 02
|
|
[DEBUG] PCI: 00:1c:00.0 subsystem <- 1025/0737
|
|
[DEBUG] PCI: 00:1c:00.0 cmd <- 102
|
|
[INFO ] done.
|
|
[INFO ] Initializing devices...
|
|
[DEBUG] Root Device init
|
|
[DEBUG] Replaying EC dump ...done
|
|
[DEBUG] Root Device init finished in 24 msecs
|
|
[DEBUG] CPU_CLUSTER: 0 init
|
|
[DEBUG] microcode: sig=0x206a7 pf=0x10 revision=0x2f
|
|
[DEBUG] Starting cbfs_boot_device
|
|
[DEBUG] FMAP: area COREBOOT found @ 991000 (2551808 bytes)
|
|
[INFO ] Booting from COREBOOT region
|
|
[INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x80 size 0x6800 in mcache @0x7fffe98c
|
|
[INFO ] microcode: Update skipped, already up-to-date
|
|
[INFO ] LAPIC 0x0 in XAPIC mode.
|
|
[DEBUG] MTRR: Physical address space:
|
|
[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
|
|
[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
|
|
[DEBUG] 0x00000000000c0000 - 0x000000007fffffff size 0x7ff40000 type 6
|
|
[DEBUG] 0x0000000080000000 - 0x00000000dfffffff size 0x60000000 type 0
|
|
[DEBUG] 0x00000000e0000000 - 0x00000000efffffff size 0x10000000 type 1
|
|
[DEBUG] 0x00000000f0000000 - 0x00000000ffffffff size 0x10000000 type 0
|
|
[DEBUG] 0x0000000100000000 - 0x000000027b5fffff size 0x17b600000 type 6
|
|
[DEBUG] 0x0000000fc0000000 - 0x0000000fffffffff size 0x40000000 type 0
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
|
|
[DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 36 bits
|
|
[DEBUG] MTRR: default type WB/UC MTRR counts: 5/7.
|
|
[DEBUG] MTRR: WB selected as default type.
|
|
[DEBUG] MTRR: 0 base 0x0000000080000000 mask 0x0000000fc0000000 type 0
|
|
[DEBUG] MTRR: 1 base 0x00000000c0000000 mask 0x0000000fe0000000 type 0
|
|
[DEBUG] MTRR: 2 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1
|
|
[DEBUG] MTRR: 3 base 0x00000000f0000000 mask 0x0000000ff0000000 type 0
|
|
[DEBUG] MTRR: 4 base 0x0000000fc0000000 mask 0x0000000fc0000000 type 0
|
|
|
|
[DEBUG] MTRR check
|
|
[DEBUG] Fixed MTRRs : Enabled
|
|
[DEBUG] Variable MTRRs: Enabled
|
|
|
|
[DEBUG] CPU has 2 cores, 4 threads enabled.
|
|
[DEBUG] Setting up SMI for CPU
|
|
[INFO ] Will perform SMM setup.
|
|
[INFO ] CPU: Intel(R) Core(TM) i3-2370M CPU @ 2.40GHz.
|
|
[INFO ] LAPIC 0x0 in XAPIC mode.
|
|
[DEBUG] CPU: APIC: 00 enabled
|
|
[DEBUG] CPU: APIC: 01 enabled
|
|
[DEBUG] CPU: APIC: 02 enabled
|
|
[DEBUG] CPU: APIC: 03 enabled
|
|
[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
|
|
[DEBUG] Processing 16 relocs. Offset value of 0x00030000
|
|
[DEBUG] Attempting to start 3 APs
|
|
[DEBUG] Waiting for 10ms after sending INIT.
|
|
[DEBUG] Waiting for SIPI to complete...
|
|
[DEBUG] done.
|
|
[DEBUG] Waiting for SIPI to complete...
|
|
[INFO ] LAPIC 0x1 in XAPIC mode.
|
|
[DEBUG] done.
|
|
[INFO ] AP: slot 1 apic_id 1, MCU rev: 0x0000002f
|
|
[INFO ] LAPIC 0x3 in XAPIC mode.
|
|
[INFO ] LAPIC 0x2 in XAPIC mode.
|
|
[INFO ] AP: slot 3 apic_id 3, MCU rev: 0x0000002f
|
|
[INFO ] AP: slot 2 apic_id 2, MCU rev: 0x0000002f
|
|
[DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1a0 memsize: 0x1a0
|
|
[DEBUG] Processing 9 relocs. Offset value of 0x00038000
|
|
[DEBUG] smm_module_setup_stub: stack_top = 0x80001000
|
|
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
|
|
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000
|
|
[DEBUG] SMM Module: stub loaded at 38000. Will call 0x7fe9ee0d
|
|
[DEBUG] Installing permanent SMM handler to 0x80000000
|
|
[DEBUG] HANDLER [0x802fb000-0x802ff587]
|
|
|
|
[DEBUG] CPU 0
|
|
[DEBUG] ss0 [0x802fac00-0x802fafff]
|
|
[DEBUG] stub0 [0x802f3000-0x802f319f]
|
|
|
|
[DEBUG] CPU 1
|
|
[DEBUG] ss1 [0x802fa800-0x802fabff]
|
|
[DEBUG] stub1 [0x802f2c00-0x802f2d9f]
|
|
|
|
[DEBUG] CPU 2
|
|
[DEBUG] ss2 [0x802fa400-0x802fa7ff]
|
|
[DEBUG] stub2 [0x802f2800-0x802f299f]
|
|
|
|
[DEBUG] CPU 3
|
|
[DEBUG] ss3 [0x802fa000-0x802fa3ff]
|
|
[DEBUG] stub3 [0x802f2400-0x802f259f]
|
|
|
|
[DEBUG] stacks [0x80000000-0x80000fff]
|
|
[DEBUG] Loading module at 0x802fb000 with entry 0x802fb7a6. filesize: 0x4450 memsize: 0x4588
|
|
[DEBUG] Processing 272 relocs. Offset value of 0x802fb000
|
|
[DEBUG] FMAP: area SMMSTORE found @ 910000 (524288 bytes)
|
|
[DEBUG] smm store: 8 # blocks with size 0x10000
|
|
[DEBUG] Loading module at 0x802f3000 with entry 0x802f3000. filesize: 0x1a0 memsize: 0x1a0
|
|
[DEBUG] Processing 9 relocs. Offset value of 0x802f3000
|
|
[DEBUG] smm_module_setup_stub: stack_top = 0x80001000
|
|
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
|
|
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x300000
|
|
[DEBUG] SMM Module: placing smm entry code at 802f2c00, cpu # 0x1
|
|
[DEBUG] SMM Module: placing smm entry code at 802f2800, cpu # 0x2
|
|
[DEBUG] SMM Module: placing smm entry code at 802f2400, cpu # 0x3
|
|
[DEBUG] SMM Module: stub loaded at 802f3000. Will call 0x802fb7a6
|
|
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802eb000, cpu = 0
|
|
[DEBUG] In relocation handler: cpu 0
|
|
[DEBUG] New SMBASE=0x802eb000 IEDBASE=0x80400000
|
|
[DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800
|
|
[DEBUG] Relocation complete.
|
|
[INFO ] microcode: Update skipped, already up-to-date
|
|
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802eac00, cpu = 1
|
|
[DEBUG] In relocation handler: cpu 1
|
|
[DEBUG] New SMBASE=0x802eac00 IEDBASE=0x80400000
|
|
[DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800
|
|
[DEBUG] Relocation complete.
|
|
[INFO ] microcode: Update skipped, already up-to-date
|
|
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ea400, cpu = 3
|
|
[DEBUG] In relocation handler: cpu 3
|
|
[DEBUG] New SMBASE=0x802ea400 IEDBASE=0x80400000
|
|
[DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800
|
|
[DEBUG] Relocation complete.
|
|
[INFO ] microcode: Update skipped, already up-to-date
|
|
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ea800, cpu = 2
|
|
[DEBUG] In relocation handler: cpu 2
|
|
[DEBUG] New SMBASE=0x802ea800 IEDBASE=0x80400000
|
|
[DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800
|
|
[DEBUG] Relocation complete.
|
|
[INFO ] microcode: Update skipped, already up-to-date
|
|
[INFO ] Initializing CPU #0
|
|
[DEBUG] CPU: vendor Intel device 206a7
|
|
[DEBUG] CPU: family 06, model 2a, stepping 07
|
|
[INFO ] CPU: Intel(R) Core(TM) i3-2370M CPU @ 2.40GHz.
|
|
[INFO ] CPU: cpuid(1) 0x206a7
|
|
[INFO ] CPU: AES NOT supported
|
|
[INFO ] CPU: TXT NOT supported
|
|
[INFO ] CPU: VT supported
|
|
[DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled
|
|
[DEBUG] IA32_FEATURE_CONTROL already locked
|
|
[INFO ] APIC: 00: PP0 current limit not set in devicetree
|
|
[INFO ] APIC: 00: PP0 PSI0 not set in devicetree
|
|
[INFO ] APIC: 00: PP0 PSI1 not set in devicetree
|
|
[INFO ] APIC: 00: PP0 PSI2 not set in devicetree
|
|
[INFO ] APIC: 00: PP1 current limit not set in devicetree
|
|
[INFO ] APIC: 00: PP1 PSI0 not set in devicetree
|
|
[INFO ] APIC: 00: PP1 PSI1 not set in devicetree
|
|
[INFO ] APIC: 00: PP1 PSI2 not set in devicetree
|
|
[INFO ] APIC: 00: Programmable ratio limit for turbo mode is disabled
|
|
[DEBUG] cpu: energy policy set to 6
|
|
[DEBUG] model_x06ax: frequency set to 2400
|
|
[INFO ] Turbo is unavailable
|
|
[INFO ] CPU #0 initialized
|
|
[INFO ] Initializing CPU #1
|
|
[INFO ] Initializing CPU #2
|
|
[INFO ] Initializing CPU #3
|
|
[DEBUG] CPU: vendor Intel device 206a7
|
|
[DEBUG] CPU: family 06, model 2a, stepping 07
|
|
[DEBUG] CPU: vendor Intel device 206a7
|
|
[DEBUG] CPU: family 06, model 2a, stepping 07
|
|
[DEBUG] CPU: vendor Intel device 206a7
|
|
[DEBUG] CPU: family 06, model 2a, stepping 07
|
|
[INFO ] CPU: Intel(R) Core(TM) i3-2370M CPU @ 2.40GHz.
|
|
[INFO ] CPU: cpuid(1) 0x206a7
|
|
[INFO ] CPU: Intel(R) Core(TM) i3-2370M CPU @ 2.40GHz.
|
|
[INFO ] CPU: AES NOT supported
|
|
[INFO ] CPU: TXT NOT supported
|
|
[INFO ] CPU: VT supported
|
|
[INFO ] CPU: cpuid(1) 0x206a7
|
|
[DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled
|
|
[INFO ] CPU: AES NOT supported
|
|
[INFO ] CPU: TXT NOT supported
|
|
[INFO ] CPU: VT supported
|
|
[DEBUG] IA32_FEATURE_CONTROL already locked
|
|
[DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled
|
|
[INFO ] APIC: 02: Programmable ratio limit for turbo mode is disabled
|
|
[DEBUG] IA32_FEATURE_CONTROL already locked
|
|
[INFO ] CPU: Intel(R) Core(TM) i3-2370M CPU @ 2.40GHz.
|
|
[INFO ] APIC: 03: Programmable ratio limit for turbo mode is disabled
|
|
[DEBUG] cpu: energy policy set to 6
|
|
[INFO ] CPU: cpuid(1) 0x206a7
|
|
[DEBUG] cpu: energy policy set to 6
|
|
[DEBUG] model_x06ax: frequency set to 2400
|
|
[INFO ] CPU #2 initialized
|
|
[DEBUG] model_x06ax: frequency set to 2400
|
|
[INFO ] CPU #3 initialized
|
|
[INFO ] CPU: AES NOT supported
|
|
[INFO ] CPU: TXT NOT supported
|
|
[INFO ] CPU: VT supported
|
|
[DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled
|
|
[DEBUG] IA32_FEATURE_CONTROL already locked
|
|
[INFO ] APIC: 01: Programmable ratio limit for turbo mode is disabled
|
|
[DEBUG] cpu: energy policy set to 6
|
|
[DEBUG] model_x06ax: frequency set to 2400
|
|
[INFO ] CPU #1 initialized
|
|
[INFO ] bsp_do_flight_plan done after 12 msecs.
|
|
[DEBUG] SMI_STS:
|
|
[DEBUG] GPE0_STS: GPIO15 GPIO14 GPIO10 GPIO9 GPIO8 GPIO6 GPIO2 GPIO0
|
|
[DEBUG] ALT_GP_SMI_STS: GPI15 GPI14 GPI11 GPI10 GPI9 GPI8 GPI7 GPI6 GPI4 GPI3 GPI2 GPI1 GPI0
|
|
[DEBUG] TCO_STS:
|
|
[DEBUG] Locking SMM.
|
|
[DEBUG] MTRR: TEMPORARY Physical address space:
|
|
[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
|
|
[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
|
|
[DEBUG] 0x00000000000c0000 - 0x000000007fffffff size 0x7ff40000 type 6
|
|
[DEBUG] 0x0000000080000000 - 0x00000000feffffff size 0x7f000000 type 0
|
|
[DEBUG] 0x00000000ff000000 - 0x00000000ffffffff size 0x01000000 type 5
|
|
[DEBUG] 0x0000000100000000 - 0x000000027b5fffff size 0x17b600000 type 6
|
|
[DEBUG] 0x0000000fc0000000 - 0x0000000fffffffff size 0x40000000 type 0
|
|
[DEBUG] MTRR: default type WB/UC MTRR counts: 9/7.
|
|
[DEBUG] MTRR: UC selected as default type.
|
|
[DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
|
|
[DEBUG] MTRR: 1 base 0x00000000ff000000 mask 0x0000000fff000000 type 5
|
|
[DEBUG] MTRR: 2 base 0x0000000100000000 mask 0x0000000f00000000 type 6
|
|
[DEBUG] MTRR: 3 base 0x0000000200000000 mask 0x0000000f80000000 type 6
|
|
[DEBUG] MTRR: 4 base 0x000000027b600000 mask 0x0000000fffe00000 type 0
|
|
[DEBUG] MTRR: 5 base 0x000000027b800000 mask 0x0000000fff800000 type 0
|
|
[DEBUG] MTRR: 6 base 0x000000027c000000 mask 0x0000000ffc000000 type 0
|
|
[DEBUG] CPU_CLUSTER: 0 init finished in 24 msecs
|
|
[DEBUG] PCI: 00:00:00.0 init
|
|
[DEBUG] Disabling PEG12.
|
|
[DEBUG] Disabling PEG11.
|
|
[DEBUG] Disabling PEG10.
|
|
[DEBUG] Disabling Device 4.
|
|
[DEBUG] Disabling PEG60.
|
|
[DEBUG] Disabling Device 7.
|
|
[DEBUG] Disabling PEG IO clock.
|
|
[DEBUG] Set BIOS_RESET_CPL
|
|
[DEBUG] CPU TDP: 35 Watts
|
|
[DEBUG] PCI: 00:00:00.0 init finished in 1 msecs
|
|
[DEBUG] PCI: 00:00:02.0 init
|
|
[DEBUG] Starting cbfs_boot_device
|
|
[INFO ] CBFS: Found 'vbt.bin' @0x3edc0 size 0x5ab in mcache @0x7fffeb14
|
|
[INFO ] Found a VBT of 6144 bytes
|
|
[INFO ] GMA: Found VBT in CBFS
|
|
[INFO ] GMA: Found valid VBT in CBFS
|
|
[DEBUG] GT Power Management Init
|
|
[DEBUG] SNB GT2 Power Meter Weights
|
|
[DEBUG] GT Power Management Init (post VBIOS)
|
|
[INFO ] framebuffer_info: bytes_per_line: 5504, bits_per_pixel: 32
|
|
[INFO ] x_res x y_res: 1366 x 768, size: 4227072 at 0xe0000000
|
|
[DEBUG] PCI: 00:00:02.0 init finished in 116 msecs
|
|
[DEBUG] PCI: 00:00:14.0 init
|
|
[DEBUG] XHCI: Setting up controller.. done.
|
|
[DEBUG] PCI: 00:00:14.0 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:16.0 init
|
|
[DEBUG] ME: FW Partition Table : OK
|
|
[DEBUG] ME: Bringup Loader Failure : NO
|
|
[DEBUG] ME: Firmware Init Complete : NO
|
|
[DEBUG] ME: Manufacturing Mode : YES
|
|
[DEBUG] ME: Boot Options Present : NO
|
|
[DEBUG] ME: Update In Progress : NO
|
|
[DEBUG] ME: Current Working State : Normal
|
|
[DEBUG] ME: Current Operation State : M0 with UMA
|
|
[DEBUG] ME: Current Operation Mode : Normal
|
|
[DEBUG] ME: Error Code : No Error
|
|
[DEBUG] ME: Progress Phase : Host Communication
|
|
[DEBUG] ME: Power Management Event : Non-power cycle reset
|
|
[DEBUG] ME: Progress Phase State : Host communication established
|
|
[NOTE ] ME: BIOS path: Normal
|
|
[DEBUG] ME: me_state=0, me_state_prev=0
|
|
[DEBUG] ME: Extend SHA-256: 31d62f9651b63bdf7a0febf121c72aeae74b6e67e361889de27118b6f75474b4
|
|
[INFO ] ME: MBP item header 00020103
|
|
[INFO ] ME: MBP item header 00050102
|
|
[INFO ] ME: MBP item header 00020501
|
|
[INFO ] ME: MBP item header 00020201
|
|
[INFO ] ME: MBP item header 02030101
|
|
[INFO ] ME: MBP item header 02060301
|
|
[INFO ] ME: MBP item header 02090401
|
|
[INFO ] ME: MBP item header 02020601
|
|
[DEBUG] ME: found version 8.0.4.1441
|
|
[DEBUG] ME Capability: Full Network manageability : disabled
|
|
[DEBUG] ME Capability: Regular Network manageability : disabled
|
|
[DEBUG] ME Capability: Manageability : enabled
|
|
[DEBUG] ME Capability: Small business technology : enabled
|
|
[DEBUG] ME Capability: Level III manageability : disabled
|
|
[DEBUG] ME Capability: IntelR Anti-Theft (AT) : enabled
|
|
[DEBUG] ME Capability: IntelR Capability Licensing Service (CLS) : enabled
|
|
[DEBUG] ME Capability: IntelR Power Sharing Technology (MPC) : enabled
|
|
[DEBUG] ME Capability: ICC Over Clocking : enabled
|
|
[DEBUG] ME Capability: Protected Audio Video Path (PAVP) : enabled
|
|
[DEBUG] ME Capability: IPV6 : disabled
|
|
[DEBUG] ME Capability: KVM Remote Control (KVM) : disabled
|
|
[DEBUG] ME Capability: Outbreak Containment Heuristic (OCH) : disabled
|
|
[DEBUG] ME Capability: Virtual LAN (VLAN) : enabled
|
|
[DEBUG] ME Capability: TLS : enabled
|
|
[DEBUG] ME Capability: Wireless LAN (WLAN) : disabled
|
|
[DEBUG] PCI: 00:00:16.0 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1a.0 init
|
|
[DEBUG] EHCI: Setting up controller.. done.
|
|
[DEBUG] PCI: 00:00:1a.0 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1b.0 init
|
|
[DEBUG] Azalia: base = 0xdd8ec000
|
|
[DEBUG] Azalia: codec_mask = 09
|
|
[DEBUG] azalia_audio: initializing Conexant CX20588...
|
|
[DEBUG] azalia_audio: - vendor ID: 0x14f1506c
|
|
[DEBUG] azalia_audio: - subsystem ID: 0x10250737
|
|
[DEBUG] azalia_audio: - address: 0
|
|
[DEBUG] azalia_audio: done
|
|
[DEBUG] azalia_audio: initializing Intel PantherPoint HDMI...
|
|
[DEBUG] azalia_audio: - vendor ID: 0x80862806
|
|
[DEBUG] azalia_audio: - subsystem ID: 0x80860101
|
|
[DEBUG] azalia_audio: - address: 3
|
|
[DEBUG] azalia_audio: done
|
|
[DEBUG] PCI: 00:00:1b.0 init finished in 4 msecs
|
|
[DEBUG] PCI: 00:00:1c.0 init
|
|
[DEBUG] Initializing PCH PCIe bridge.
|
|
[DEBUG] PCI: 00:00:1c.0 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1c.1 init
|
|
[DEBUG] Initializing PCH PCIe bridge.
|
|
[DEBUG] PCI: 00:00:1c.1 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1c.2 init
|
|
[DEBUG] Initializing PCH PCIe bridge.
|
|
[DEBUG] PCI: 00:00:1c.2 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1c.3 init
|
|
[DEBUG] Initializing PCH PCIe bridge.
|
|
[DEBUG] PCI: 00:00:1c.3 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1c.5 init
|
|
[DEBUG] Initializing PCH PCIe bridge.
|
|
[DEBUG] PCI: 00:00:1c.5 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1d.0 init
|
|
[DEBUG] EHCI: Setting up controller.. done.
|
|
[DEBUG] PCI: 00:00:1d.0 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1f.0 init
|
|
[DEBUG] pch: lpc_init
|
|
[INFO ] PCH: detected HM77, device id: 0x1e57, rev id 0x4
|
|
[DEBUG] IOAPIC: Initializing IOAPIC at fec00000
|
|
[DEBUG] IOAPIC: ID = 0x00
|
|
[DEBUG] IOAPIC: 24 interrupts
|
|
[DEBUG] IOAPIC: Clearing IOAPIC at fec00000
|
|
[DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00
|
|
[INFO ] Set power off after power failure.
|
|
[INFO ] NMI sources disabled.
|
|
[DEBUG] PantherPoint PM init
|
|
[DEBUG] RTC: failed = 0x0
|
|
[DEBUG] RTC Init
|
|
[DEBUG] apm_control: Disabling ACPI.
|
|
[DEBUG] APMC done.
|
|
[DEBUG] pch_spi_init
|
|
[DEBUG] PCI: 00:00:1f.0 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1f.2 init
|
|
[DEBUG] SATA: Initializing...
|
|
[DEBUG] SATA: Controller in AHCI mode.
|
|
[DEBUG] ABAR: 0xdd8eb000
|
|
[DEBUG] PCI: 00:00:1f.2 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1f.3 init
|
|
[DEBUG] PCI: 00:00:1f.3 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:0a:00.0 init
|
|
[DEBUG] PCI: 00:0a:00.0 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:13:00.0 init
|
|
[DEBUG] PCI: 00:13:00.0 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:1c:00.0 init
|
|
[DEBUG] PCI: 00:1c:00.0 init finished in 0 msecs
|
|
[INFO ] Devices initialized
|
|
[DEBUG] BS: BS_DEV_INIT run times (exec / console): 171 / 1 ms
|
|
[INFO ] Finalize devices...
|
|
[DEBUG] PCI: 00:00:1f.0 final
|
|
[DEBUG] apm_control: Finalizing SMM.
|
|
[DEBUG] APMC done.
|
|
[INFO ] Devices finalized
|
|
[DEBUG] BS: BS_POST_DEVICE run times (exec / console): 1 / 0 ms
|
|
[DEBUG] Starting cbfs_boot_device
|
|
[INFO ] CBFS: Found 'fallback/dsdt.aml' @0x3c5c0 size 0x279e in mcache @0x7fffeae8
|
|
[DEBUG] Starting cbfs_boot_device
|
|
[WARN ] CBFS: 'fallback/slic' not found.
|
|
[INFO ] ACPI: Writing ACPI tables at 7fe2e000.
|
|
[DEBUG] ACPI: * FACS
|
|
[DEBUG] ACPI: * FACP
|
|
[DEBUG] ACPI: added table 1/32, length now 44
|
|
[DEBUG] Found 1 CPU(s) with 4 core(s) each.
|
|
[DEBUG] Supported C-states: C0 C1 C1E C3 C6 C7 C7S
|
|
[DEBUG] PSS: 2400MHz power 35000 control 0x1800 status 0x1800
|
|
[DEBUG] PSS: 2000MHz power 27813 control 0x1400 status 0x1400
|
|
[DEBUG] PSS: 1600MHz power 21235 control 0x1000 status 0x1000
|
|
[DEBUG] PSS: 1200MHz power 15190 control 0xc00 status 0xc00
|
|
[DEBUG] PSS: 800MHz power 9627 control 0x800 status 0x800
|
|
[DEBUG] Advertising ACPI C State type C1 as CPU C1
|
|
[DEBUG] Advertising ACPI C State type C2 as CPU C3
|
|
[DEBUG] Advertising ACPI C State type C3 as CPU C7
|
|
[DEBUG] PSS: 2400MHz power 35000 control 0x1800 status 0x1800
|
|
[DEBUG] PSS: 2000MHz power 27813 control 0x1400 status 0x1400
|
|
[DEBUG] PSS: 1600MHz power 21235 control 0x1000 status 0x1000
|
|
[DEBUG] PSS: 1200MHz power 15190 control 0xc00 status 0xc00
|
|
[DEBUG] PSS: 800MHz power 9627 control 0x800 status 0x800
|
|
[DEBUG] Advertising ACPI C State type C1 as CPU C1
|
|
[DEBUG] Advertising ACPI C State type C2 as CPU C3
|
|
[DEBUG] Advertising ACPI C State type C3 as CPU C7
|
|
[DEBUG] PSS: 2400MHz power 35000 control 0x1800 status 0x1800
|
|
[DEBUG] PSS: 2000MHz power 27813 control 0x1400 status 0x1400
|
|
[DEBUG] PSS: 1600MHz power 21235 control 0x1000 status 0x1000
|
|
[DEBUG] PSS: 1200MHz power 15190 control 0xc00 status 0xc00
|
|
[DEBUG] PSS: 800MHz power 9627 control 0x800 status 0x800
|
|
[DEBUG] Advertising ACPI C State type C1 as CPU C1
|
|
[DEBUG] Advertising ACPI C State type C2 as CPU C3
|
|
[DEBUG] Advertising ACPI C State type C3 as CPU C7
|
|
[DEBUG] PSS: 2400MHz power 35000 control 0x1800 status 0x1800
|
|
[DEBUG] PSS: 2000MHz power 27813 control 0x1400 status 0x1400
|
|
[DEBUG] PSS: 1600MHz power 21235 control 0x1000 status 0x1000
|
|
[DEBUG] PSS: 1200MHz power 15190 control 0xc00 status 0xc00
|
|
[DEBUG] PSS: 800MHz power 9627 control 0x800 status 0x800
|
|
[DEBUG] Advertising ACPI C State type C1 as CPU C1
|
|
[DEBUG] Advertising ACPI C State type C2 as CPU C3
|
|
[DEBUG] Advertising ACPI C State type C3 as CPU C7
|
|
[DEBUG] PCI space above 4GB MMIO is at 0x27b600000, len = 0xd84a00000
|
|
[DEBUG] Generating ACPI PIRQ entries
|
|
[DEBUG] ACPI: * SSDT
|
|
[DEBUG] ACPI: added table 2/32, length now 52
|
|
[DEBUG] ACPI: * MCFG
|
|
[DEBUG] ACPI: added table 3/32, length now 60
|
|
[DEBUG] IOAPIC: 24 interrupts
|
|
[DEBUG] ACPI: * APIC
|
|
[DEBUG] ACPI: added table 4/32, length now 68
|
|
[DEBUG] current = 7fe321b0
|
|
[DEBUG] ACPI: * HPET
|
|
[DEBUG] ACPI: added table 5/32, length now 76
|
|
[INFO ] ACPI: done.
|
|
[DEBUG] ACPI tables: 16880 bytes.
|
|
[DEBUG] smbios_write_tables: 7fe26000
|
|
[DEBUG] SMBIOS firmware version is set to coreboot_version: '25.12-669-gc940d20696b4-dirty'
|
|
[INFO ] Create SMBIOS type 16
|
|
[INFO ] Create SMBIOS type 17
|
|
[INFO ] Create SMBIOS type 20
|
|
[DEBUG] SMBIOS tables: 1091 bytes.
|
|
[DEBUG] Writing table forward entry at 0x00000500
|
|
[DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 5ff9
|
|
[DEBUG] Writing coreboot table at 0x7fe52000
|
|
[DEBUG] CFR: Written 2168 bytes of CFR structures at 0x7fe52018, with CRC32 0x7597b1f2
|
|
[DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
|
|
[DEBUG] 1. 0000000000001000-000000000009ffff: RAM
|
|
[DEBUG] 2. 00000000000a0000-00000000000f5fff: RESERVED
|
|
[DEBUG] 3. 00000000000f6000-00000000000f6fff: CONFIGURATION TABLES
|
|
[DEBUG] 4. 00000000000f7000-00000000000fffff: RESERVED
|
|
[DEBUG] 5. 0000000000100000-000000001fffffff: RAM
|
|
[DEBUG] 6. 0000000020000000-00000000201fffff: RESERVED
|
|
[DEBUG] 7. 0000000020200000-000000003fffffff: RAM
|
|
[DEBUG] 8. 0000000040000000-00000000401fffff: RESERVED
|
|
[DEBUG] 9. 0000000040200000-000000007fe25fff: RAM
|
|
[DEBUG] 10. 000000007fe26000-000000007fe7efff: CONFIGURATION TABLES
|
|
[DEBUG] 11. 000000007fe7f000-000000007ffc9fff: RAMSTAGE
|
|
[DEBUG] 12. 000000007ffca000-000000007fffffff: CONFIGURATION TABLES
|
|
[DEBUG] 13. 0000000080000000-00000000829fffff: RESERVED
|
|
[DEBUG] 14. 00000000f0000000-00000000f3ffffff: RESERVED
|
|
[DEBUG] 15. 00000000fec00000-00000000fec00fff: RESERVED
|
|
[DEBUG] 16. 00000000fed00000-00000000fed00fff: RESERVED
|
|
[DEBUG] 17. 00000000fed10000-00000000fed19fff: RESERVED
|
|
[DEBUG] 18. 00000000fed1c000-00000000fed3ffff: RESERVED
|
|
[DEBUG] 19. 00000000fed45000-00000000fed8ffff: RESERVED
|
|
[DEBUG] 20. 00000000ff000000-00000000ffffffff: RESERVED
|
|
[DEBUG] 21. 0000000100000000-000000027b5fffff: RAM
|
|
[DEBUG] FMAP: area SMMSTORE found @ 910000 (524288 bytes)
|
|
[DEBUG] smm store: 8 # blocks with size 0x10000
|
|
[DEBUG] Starting cbfs_boot_device
|
|
[DEBUG] Wrote coreboot table at: 0x7fe52000, 0xd44 bytes, checksum 6ddf
|
|
[DEBUG] coreboot table: 3420 bytes.
|
|
[DEBUG] IMD ROOT 0. 0x7ffff000 0x00001000
|
|
[DEBUG] IMD SMALL 1. 0x7fffe000 0x00001000
|
|
[DEBUG] CONSOLE 2. 0x7ffde000 0x00020000
|
|
[DEBUG] TIME STAMP 3. 0x7ffdd000 0x00000910
|
|
[DEBUG] MEM INFO 4. 0x7ffdb000 0x000010c8
|
|
[DEBUG] AFTER CAR 5. 0x7ffca000 0x00011000
|
|
[DEBUG] RAMSTAGE 6. 0x7fe7e000 0x0014c000
|
|
[DEBUG] SMM BACKUP 7. 0x7fe6e000 0x00010000
|
|
[DEBUG] SMM COMBUFFER 8. 0x7fe5e000 0x00010000
|
|
[DEBUG] IGD OPREGION 9. 0x7fe5a000 0x00003200
|
|
[DEBUG] COREBOOT 10. 0x7fe52000 0x00008000
|
|
[DEBUG] ACPI 11. 0x7fe2e000 0x00024000
|
|
[DEBUG] SMBIOS 12. 0x7fe26000 0x00008000
|
|
[DEBUG] IMD small region:
|
|
[DEBUG] IMD ROOT 0. 0x7fffec00 0x00000400
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[DEBUG] RO MCACHE 1. 0x7fffe960 0x00000298
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[DEBUG] FMAP 2. 0x7fffe840 0x0000010a
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[DEBUG] ROMSTAGE 3. 0x7fffe820 0x00000004
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[DEBUG] ROMSTG STCK 4. 0x7fffe760 0x000000a8
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[DEBUG] ACPI GNVS 5. 0x7fffe660 0x00000100
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[DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 3 / 0 ms
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[DEBUG] Starting cbfs_boot_device
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[INFO ] CBFS: Found 'fallback/payload' @0x49140 size 0x1e7059 in mcache @0x7fffeb88
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[DEBUG] Checking segment from ROM address 0xffdda16c
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[DEBUG] Checking segment from ROM address 0xffdda188
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[DEBUG] Loading segment from ROM address 0xffdda16c
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[DEBUG] code (compression=1)
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[DEBUG] New segment dstaddr 0x00800000 memsize 0x800000 srcaddr 0xffdda1a4 filesize 0x1e7021
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[DEBUG] Loading Segment: addr: 0x00800000 memsz: 0x0000000000800000 filesz: 0x00000000001e7021
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[DEBUG] using LZMA
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[DEBUG] Loading segment from ROM address 0xffdda188
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[DEBUG] Entry Point 0x008022a7
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[DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 613 / 0 ms
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[DEBUG] ICH-NM10-PCH: watchdog disabled
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[DEBUG] Jumping to boot code at 0x008022a7(0x7fe52000)
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