coreboot

[NOTE ] coreboot-25.03-519-ga2010cf5eeea Sun May 18 18:51:11 UTC 2025 x86_32 bootblock starting (log level: 7)...

[DEBUG] CPU: Intel(R) Core(TM) i3-6100 CPU @ 3.70GHz

[DEBUG] CPU: ID 506e3, Skylake H R0, ucode: 000000ef

[DEBUG] CPU: AES supported, TXT NOT supported, VT supported

[DEBUG] MCH: device id 190f (rev 07) is Skylake-S (2 Core)

[DEBUG] PCH: device id a146 (rev 31) is Q170

[DEBUG] IGD: device id 1912 (rev 06) is Skylake DT GT2

[WARN ] PMC: Duplicate GPE DW register values detected; using default GPE route from MISCCFG register

[DEBUG] FMAP: Found "FLASH" version 1.1 at 0x750000.

[DEBUG] FMAP: base = 0x0 size = 0x1000000 #areas = 8

[DEBUG] FMAP: area COREBOOT found @ 750200 (9108992 bytes)

[INFO ] CBFS: mcache @0xfef04e00 built for 17 files, used 0x38c of 0x4000 bytes

[INFO ] CBFS: Found 'fallback/romstage' @0x9d1c0 size 0xd350 in mcache @0xfef04e8c

[DEBUG] BS: bootblock times (exec / console): total (unknown) / 87 ms

[NOTE ] coreboot-25.03-519-ga2010cf5eeea Sun May 18 18:51:11 UTC 2025 x86_32 romstage starting (log level: 7)...

[WARN ] HECI: CSE device 16.0 is disabled

[DEBUG] pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00000000

[DEBUG] gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

[DEBUG] gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

[DEBUG] gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

[DEBUG] gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

[DEBUG] TCO_STS: 0000 0001

[DEBUG] GEN_PMCON: e0000200 00005003

[DEBUG] GBLRST_CAUSE: 00000000 00000000

[DEBUG] PM1_STS: WAK PWRBTN

[DEBUG] prev_sleep_state 0 (S0)

[INFO ] CBFS: Found 'fspm.bin' @0xcfdc0 size 0x63000 in mcache @0xfef0503c

[DEBUG] FMAP: area RW_MRC_CACHE found @ 700000 (65536 bytes)

[DEBUG] No CMOS option 'hyper_threading'.

[DEBUG] No CMOS option 'igd_dvmt_prealloc'.

[DEBUG] No CMOS option 'igd_aperture_size'.

[INFO ] No memory dimm at address A2

[INFO ] No memory dimm at address A6

[DEBUG] SPD @ 0x50

[INFO ] SPD: module type is DDR3

[INFO ] SPD: module part number is HMT41GU6MFR8C-PB

[INFO ] SPD: banks 8, ranks 2, rows 16, columns 10, density 4096 Mb

[INFO ] SPD: device width 8 bits, bus width 64 bits

[INFO ] SPD: module size is 8192 MB (per channel)

[DEBUG] SPD @ 0x52

[INFO ] SPD: module type is DDR3

[INFO ] SPD: module part number is HMT41GU6MFR8C-PB

[INFO ] SPD: banks 8, ranks 2, rows 16, columns 10, density 4096 Mb

[INFO ] SPD: device width 8 bits, bus width 64 bits

[INFO ] SPD: module size is 8192 MB (per channel)

[DEBUG] CBMEM:

[DEBUG] IMD: root @ 0x7afff000 254 entries.

[DEBUG] IMD: root @ 0x7affec00 62 entries.

[DEBUG] External stage cache:

[DEBUG] IMD: root @ 0x7b3ff000 254 entries.

[DEBUG] IMD: root @ 0x7b3fec00 62 entries.

[DEBUG] FMAP: area RW_MRC_CACHE found @ 700000 (65536 bytes)

[DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'.

[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

[DEBUG] MRC: 'RW_MRC_CACHE' does not need update.

[DEBUG] 2 DIMMs found

[DEBUG] SMM Memory Map

[DEBUG] SMRAM : 0x7b000000 0x800000

[DEBUG] Subregion 0: 0x7b000000 0x200000

[DEBUG] Subregion 1: 0x7b200000 0x200000

[DEBUG] Subregion 2: 0x7b400000 0x400000

[DEBUG] top_of_ram = 0x7b000000

[DEBUG] Normal boot

[INFO ] CBFS: Found 'fallback/postcar' @0x157140 size 0x5fa8 in mcache @0xfef050d8

[DEBUG] Loading module at 0x7abcf000 with entry 0x7abcf031. filesize: 0x5bc8 memsize: 0xbf18

[DEBUG] Processing 232 relocs. Offset value of 0x78bcf000

[DEBUG] BS: romstage times (exec / console): total (unknown) / 255 ms

[NOTE ] coreboot-25.03-519-ga2010cf5eeea Sun May 18 18:51:11 UTC 2025 x86_32 postcar starting (log level: 7)...

[DEBUG] Normal boot

[INFO ] CBFS: Found 'fallback/ramstage' @0xaa580 size 0x21317 in mcache @0x7abdd0ec

[DEBUG] Loading module at 0x7aa76000 with entry 0x7aa76000. filesize: 0x43a90 memsize: 0x157190

[DEBUG] Processing 4928 relocs. Offset value of 0x76a76000

[DEBUG] BS: postcar times (exec / console): total (unknown) / 37 ms

[NOTE ] coreboot-25.03-519-ga2010cf5eeea Sun May 18 18:51:11 UTC 2025 x86_32 ramstage starting (log level: 7)...

[DEBUG] Normal boot

[DEBUG] microcode: sig=0x506e3 pf=0x2 revision=0xef

[INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x80 size 0x9d000 in mcache @0x7abdd02c

[DEBUG] Skip microcode update

[INFO ] CBFS: Found 'fsps.bin' @0x132e00 size 0x23ff2 in mcache @0x7abdd27c

[DEBUG] Detected 2 core, 4 thread CPU.

[DEBUG] Setting up SMI for CPU

[DEBUG] IED base = 0x7b400000

[DEBUG] IED size = 0x00400000

[INFO ] Will perform SMM setup.

[INFO ] CPU: Intel(R) Core(TM) i3-6100 CPU @ 3.70GHz.

[INFO ] LAPIC 0x0 in XAPIC mode.

[DEBUG] CPU: APIC: 00 enabled

[DEBUG] CPU: APIC: 01 enabled

[DEBUG] CPU: APIC: 02 enabled

[DEBUG] CPU: APIC: 03 enabled

[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

[DEBUG] Processing 16 relocs. Offset value of 0x00030000

[DEBUG] Attempting to start 3 APs

[DEBUG] Waiting for 10ms after sending INIT.

[DEBUG] Waiting for SIPI to complete...

[DEBUG] done.

[INFO ] LAPIC 0x1 in XAPIC mode.

[DEBUG] Waiting for SIPI to complete...

[DEBUG] done.

[INFO ] AP: slot 3 apic_id 1, MCU rev: 0x000000ef

[INFO ] LAPIC 0x3 in XAPIC mode.

[INFO ] LAPIC 0x2 in XAPIC mode.

[INFO ] AP: slot 2 apic_id 3, MCU rev: 0x000000ef

[INFO ] AP: slot 1 apic_id 2, MCU rev: 0x000000ef

[DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b0 memsize: 0x1b0

[DEBUG] Processing 9 relocs. Offset value of 0x00038000

[DEBUG] smm_module_setup_stub: stack_top = 0x7b002000

[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800

[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000

[DEBUG] SMM Module: stub loaded at 38000. Will call 0x7aa98c15

[DEBUG] Installing permanent SMM handler to 0x7b000000

[DEBUG] HANDLER [0x7b1fd000-0x7b1ffbdf]

[DEBUG] CPU 0

[DEBUG] ss0 [0x7b1fcc00-0x7b1fcfff]

[DEBUG] stub0 [0x7b1f5000-0x7b1f51af]

[DEBUG] CPU 1

[DEBUG] ss1 [0x7b1fc800-0x7b1fcbff]

[DEBUG] stub1 [0x7b1f4c00-0x7b1f4daf]

[DEBUG] CPU 2

[DEBUG] ss2 [0x7b1fc400-0x7b1fc7ff]

[DEBUG] stub2 [0x7b1f4800-0x7b1f49af]

[DEBUG] CPU 3

[DEBUG] ss3 [0x7b1fc000-0x7b1fc3ff]

[DEBUG] stub3 [0x7b1f4400-0x7b1f45af]

[DEBUG] stacks [0x7b000000-0x7b001fff]

[DEBUG] Loading module at 0x7b1fd000 with entry 0x7b1fd90b. filesize: 0x2af0 memsize: 0x2be0

[DEBUG] Processing 179 relocs. Offset value of 0x7b1fd000

[DEBUG] FMAP: area SMMSTORE found @ 710000 (262144 bytes)

[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

[DEBUG] smm store: 4 # blocks with size 0x10000

[DEBUG] Loading module at 0x7b1f5000 with entry 0x7b1f5000. filesize: 0x1b0 memsize: 0x1b0

[DEBUG] Processing 9 relocs. Offset value of 0x7b1f5000

[DEBUG] smm_module_setup_stub: stack_top = 0x7b002000

[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800

[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x200000

[DEBUG] SMM Module: placing smm entry code at 7b1f4c00, cpu # 0x1

[DEBUG] SMM Module: placing smm entry code at 7b1f4800, cpu # 0x2

[DEBUG] SMM Module: placing smm entry code at 7b1f4400, cpu # 0x3

[DEBUG] SMM Module: stub loaded at 7b1f5000. Will call 0x7b1fd90b

[DEBUG] Clearing SMI status registers

[DEBUG] TCO_STS: INTRD_DET

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ed000, cpu = 0

[DEBUG] In relocation handler: CPU 0

[DEBUG] New SMBASE=0x7b1ed000 IEDBASE=0x7b400000

[DEBUG] Writing SMRR. base = 0x7b000006, mask=0xff800800

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ec400, cpu = 3

[DEBUG] In relocation handler: CPU 3

[DEBUG] New SMBASE=0x7b1ec400 IEDBASE=0x7b400000

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ecc00, cpu = 1

[DEBUG] In relocation handler: CPU 1

[DEBUG] New SMBASE=0x7b1ecc00 IEDBASE=0x7b400000

[DEBUG] Writing SMRR. base = 0x7b000006, mask=0xff800800

[DEBUG] Relocation complete.

[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ec800, cpu = 2

[DEBUG] In relocation handler: CPU 2

[DEBUG] New SMBASE=0x7b1ec800 IEDBASE=0x7b400000

[DEBUG] Relocation complete.

[INFO ] Initializing CPU #0

[DEBUG] CPU: vendor Intel device 506e3

[DEBUG] CPU: family 06, model 5e, stepping 03

[DEBUG] Clearing out pending MCEs

[DEBUG] cpu: energy policy set to 6

[INFO ] Turbo is unavailable

[DEBUG] Skip microcode update

[INFO ] CPU #0 initialized

[INFO ] Initializing CPU #3

[INFO ] Initializing CPU #1

[INFO ] Initializing CPU #2

[DEBUG] CPU: vendor Intel device 506e3

[DEBUG] CPU: family 06, model 5e, stepping 03

[DEBUG] CPU: vendor Intel device 506e3

[DEBUG] CPU: family 06, model 5e, stepping 03

[DEBUG] Clearing out pending MCEs

[DEBUG] Clearing out pending MCEs

[DEBUG] cpu: energy policy set to 6

[DEBUG] cpu: energy policy set to 6

[DEBUG] Skip microcode update

[INFO ] CPU #1 initialized

[DEBUG] CPU: vendor Intel device 506e3

[DEBUG] CPU: family 06, model 5e, stepping 03

[DEBUG] Skip microcode update

[INFO ] CPU #2 initialized

[DEBUG] Clearing out pending MCEs

[DEBUG] cpu: energy policy set to 6

[DEBUG] Skip microcode update

[INFO ] CPU #3 initialized

[INFO ] bsp_do_flight_plan done after 427 msecs.

[DEBUG] Enabling SMIs.

[DEBUG] Locking SMM.

[DEBUG] VMX status: enabled

[DEBUG] VMX status: enabled

[DEBUG] IA32_FEATURE_CONTROL status: locked

[DEBUG] VMX status: enabled

[DEBUG] VMX status: enabled

[DEBUG] IA32_FEATURE_CONTROL status: locked

[DEBUG] IA32_FEATURE_CONTROL status: locked

[DEBUG] IA32_FEATURE_CONTROL status: locked

[DEBUG] BS: BS_DEV_INIT_CHIPS entry times (exec / console): 203 / 377 ms

[DEBUG] No CMOS option 'legacy_8254_timer'.

[DEBUG] No CMOS option 's0ix_enable'.

[DEBUG] No CMOS option 'vtd'.

[INFO ] FSPS, status=0x00000000

[INFO ] ITSS IRQ Polarities Before:

[INFO ] IPC0: 0x00ff4000

[INFO ] IPC1: 0x00000007

[INFO ] IPC2: 0x00000000

[INFO ] IPC3: 0x00000000

[INFO ] ITSS IRQ Polarities After:

[INFO ] IPC0: 0x00ff4000

[INFO ] IPC1: 0x00000007

[INFO ] IPC2: 0x00000000

[INFO ] IPC3: 0x00000000

[INFO ] Found PCIe Root Port #9 at PCI: 00:1d.0.

[INFO ] Found PCIe Root Port #17 at PCI: 00:1b.0.

[DEBUG] BS: BS_DEV_INIT_CHIPS run times (exec / console): 24 / 58 ms

[INFO ] Enumerating buses...

[DEBUG] Root Device scanning...

[DEBUG] CPU_CLUSTER: 0 enabled

[DEBUG] DOMAIN: 00000000 enabled

[DEBUG] DOMAIN: 00000000 scanning...

[DEBUG] PCI: pci_scan_bus for segment group 00 bus 00

[DEBUG] PCI: 00:00:00.0 [8086/190f] enabled

[DEBUG] PCI: 00:00:01.0 subordinate bus PCI Express

[DEBUG] PCI: 00:00:01.0 [8086/1901] enabled

[DEBUG] PCI: 00:00:02.0 [8086/1912] enabled

[DEBUG] PCI: 00:00:14.0 [8086/a12f] enabled

[DEBUG] PCI: 00:00:17.0 [8086/a102] enabled

[DEBUG] PCI: 00:00:1b.0 [8086/a167] enabled

[DEBUG] PCI: 00:00:1d.0 [8086/a118] enabled

[DEBUG] PCI: 00:00:1e.0 [8086/a127] enabled

[DEBUG] PCI: 00:00:1f.0 [8086/a146] enabled

[DEBUG] PCI: 00:00:1f.1 [8086/a120] enabled

[DEBUG] PCI: 00:00:1f.2 [8086/a121] enabled

[DEBUG] PCI: 00:00:1f.3 [8086/a170] enabled

[DEBUG] PCI: 00:00:1f.4 [8086/a123] enabled

[DEBUG] PCI: 00:00:1f.6 [8086/15b8] enabled

[DEBUG] GPIO: 0 enabled

[WARN ] PCI: Leftover static devices:

[WARN ] PCI: 00:00:01.1

[WARN ] PCI: 00:00:01.2

[WARN ] PCI: 00:00:04.0

[WARN ] PCI: 00:00:05.0

[WARN ] PCI: 00:00:07.0

[WARN ] PCI: 00:00:08.0

[WARN ] PCI: 00:00:13.0

[WARN ] PCI: 00:00:14.1

[WARN ] PCI: 00:00:14.2

[WARN ] PCI: 00:00:14.3

[WARN ] PCI: 00:00:15.0

[WARN ] PCI: 00:00:15.1

[WARN ] PCI: 00:00:15.2

[WARN ] PCI: 00:00:15.3

[WARN ] PCI: 00:00:16.0

[WARN ] PCI: 00:00:16.1

[WARN ] PCI: 00:00:16.2

[WARN ] PCI: 00:00:16.3

[WARN ] PCI: 00:00:16.4

[WARN ] PCI: 00:00:19.0

[WARN ] PCI: 00:00:19.1

[WARN ] PCI: 00:00:19.2

[WARN ] PCI: 00:00:1e.1

[WARN ] PCI: 00:00:1e.2

[WARN ] PCI: 00:00:1e.3

[WARN ] PCI: 00:00:1e.4

[WARN ] PCI: 00:00:1e.5

[WARN ] PCI: 00:00:1e.6

[WARN ] PCI: 00:00:1f.5

[WARN ] PCI: 00:00:1f.7

[WARN ] PCI: Check your devicetree.cb.

[DEBUG] PCI: 00:00:01.0 scanning...

[DEBUG] PCI: pci_scan_bus for segment group 00 bus 01

[DEBUG] PCI: 00:01:00.0 [8086/10d3] enabled

[INFO ] Enabling Common Clock Configuration

[INFO ] PCIE CLK PM is not supported by endpoint

[INFO ] ASPM: Enabled L0s and L1

[DEBUG] PCI: 00:01:00.0: No LTR support

[INFO ] PCI: 00:00:01.0: Setting Max_Payload_Size to 256 for devices under this root port

[DEBUG] scan_bus: bus PCI: 00:00:01.0 finished in 36 msecs

[DEBUG] PCI: 00:00:02.0 scanning...

[DEBUG] scan_bus: bus PCI: 00:00:02.0 finished in 0 msecs

[DEBUG] PCI: 00:00:14.0 scanning...

[DEBUG] scan_bus: bus PCI: 00:00:14.0 finished in 0 msecs

[DEBUG] PCI: 00:00:1b.0 scanning...

[INFO ] PCI: 00:00:1b.0: Enabled LTR

[DEBUG] PCI: pci_scan_bus for segment group 00 bus 02

[INFO ] PCI: 00:00:1b.0: Setting Max_Payload_Size to 128 for devices under this root port

[DEBUG] scan_bus: bus PCI: 00:00:1b.0 finished in 18 msecs

[DEBUG] PCI: 00:00:1d.0 scanning...

[DEBUG] PCI: 00:00:1d.0: No LTR support

[DEBUG] PCI: pci_scan_bus for segment group 00 bus 03

[DEBUG] PCI: 00:03:00.0 [10ec/8125] enabled

[INFO ] PCIe: Common Clock Configuration already enabled

[INFO ] ASPM: Enabled L1

[INFO ] PCI: 00:00:1d.0: Setting Max_Payload_Size to 128 for devices under this root port

[DEBUG] scan_bus: bus PCI: 00:00:1d.0 finished in 32 msecs

[DEBUG] PCI: 00:00:1f.0 scanning...

[DEBUG] PNP: 002e.0 enabled

[DEBUG] PNP: 002e.1 enabled

[DEBUG] PNP: 002e.7 enabled

[DEBUG] PNP: 002e.8 disabled

[DEBUG] PNP: 002e.c enabled

[DEBUG] PNP: 002e.a enabled

[DEBUG] PNP: 002e.b disabled

[DEBUG] PNP: 002e.11 disabled

[INFO ] Found TPM 2.0 0x00fe by Nuvoton (0x1050)

[DEBUG] PNP: 0c31.0 enabled

[DEBUG] scan_bus: bus PCI: 00:00:1f.0 finished in 35 msecs

[DEBUG] PCI: 00:00:1f.2 scanning...

[DEBUG] scan_bus: bus PCI: 00:00:1f.2 finished in 0 msecs

[DEBUG] PCI: 00:00:1f.3 scanning...

[DEBUG] scan_bus: bus PCI: 00:00:1f.3 finished in 0 msecs

[DEBUG] PCI: 00:00:1f.4 scanning...

[DEBUG] scan_bus: bus PCI: 00:00:1f.4 finished in 0 msecs

[DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 393 msecs

[DEBUG] scan_bus: bus Root Device finished in 410 msecs

[INFO ] done

[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 2 / 424 ms

[INFO ] MRC: Could not find region 'UNIFIED_MRC_CACHE'

[DEBUG] FMAP: area RW_MRC_CACHE found @ 700000 (65536 bytes)

[INFO ] MRC: NOT enabling PRR for 'RW_MRC_CACHE'.

[DEBUG] BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 17 ms

[DEBUG] found VGA at PCI: 00:00:02.0

[DEBUG] Setting up VGA for PCI: 00:00:02.0

[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000

[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

[INFO ] Allocating resources...

[INFO ] Reading resources...

[DEBUG] SA MMIO resource: PCIEXBAR -> base = 0xe0000000, size = 0x10000000

[DEBUG] SA MMIO resource: MCHBAR -> base = 0xfed10000, size = 0x00008000

[DEBUG] SA MMIO resource: DMIBAR -> base = 0xfed18000, size = 0x00001000

[DEBUG] SA MMIO resource: EPBAR -> base = 0xfed19000, size = 0x00001000

[DEBUG] SA MMIO resource: GDXCBAR -> base = 0xfed84000, size = 0x00001000

[DEBUG] SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x00004000

[DEBUG] No CMOS option 'vtd'.

[DEBUG] SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x00001000

[DEBUG] SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x00001000

[INFO ] Available memory above 4GB: 14336M

[INFO ] Done reading resources.

[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) ===

[DEBUG] PCI: 00:00:01.0 io: size: 0 align: 12 gran: 12 limit: ffff

[DEBUG] PCI: 00:01:00.0 18 * [0x0 - 0x1f] io

[DEBUG] PCI: 00:00:01.0 io: size: 1000 align: 12 gran: 12 limit: ffff done

[DEBUG] PCI: 00:00:01.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

[DEBUG] PCI: 00:01:00.0 14 * [0x0 - 0x7ffff] mem

[DEBUG] PCI: 00:01:00.0 30 * [0x80000 - 0xbffff] mem

[DEBUG] PCI: 00:01:00.0 10 * [0xc0000 - 0xdffff] mem

[DEBUG] PCI: 00:01:00.0 1c * [0xe0000 - 0xe3fff] mem

[DEBUG] PCI: 00:00:01.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

[DEBUG] PCI: 00:00:01.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

[DEBUG] PCI: 00:00:01.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

[DEBUG] PCI: 00:00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

[DEBUG] PCI: 00:03:00.0 10 * [0x0 - 0xff] io

[DEBUG] PCI: 00:00:1d.0 io: size: 1000 align: 12 gran: 12 limit: ffff done

[DEBUG] PCI: 00:00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

[DEBUG] PCI: 00:03:00.0 18 * [0x0 - 0xffff] mem

[DEBUG] PCI: 00:03:00.0 20 * [0x10000 - 0x13fff] mem

[DEBUG] PCI: 00:00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

[DEBUG] PCI: 00:00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

[DEBUG] PCI: 00:00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) ===

[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 00 base 00000000 limit 00000fff io (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 84 base 00000a00 limit 00000a7f io (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 88 base 00000080 limit 0000008f io (fixed)

[DEBUG] avoid_fixed_resources: PNP: 002e.0 60 base 00000a00 limit 00000a0f io (fixed)

[DEBUG] avoid_fixed_resources: PNP: 002e.1 60 base 00000060 limit 00000060 io (fixed)

[DEBUG] avoid_fixed_resources: PNP: 002e.7 60 base 000003f8 limit 000003ff io (fixed)

[DEBUG] avoid_fixed_resources: PNP: 002e.c 60 base 0000002e limit 0000002f io (fixed)

[DEBUG] avoid_fixed_resources: PNP: 002e.a 60 base 00000a40 limit 00000a7f io (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.2 40 base 00001800 limit 000018ff io (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

[INFO ] DOMAIN: 00000000: Resource ranges:

[INFO ] * Base: 1000, Size: 800, Tag: 100

[INFO ] * Base: 1900, Size: d6a0, Tag: 100

[INFO ] * Base: efc0, Size: 1040, Tag: 100

[DEBUG] PCI: 00:00:01.0 1c * [0xf000 - 0xffff] limit: ffff io

[DEBUG] PCI: 00:00:1d.0 1c * [0xd000 - 0xdfff] limit: dfff io

[DEBUG] PCI: 00:00:02.0 20 * [0xefc0 - 0xefff] limit: efff io

[DEBUG] PCI: 00:00:17.0 20 * [0xef80 - 0xef9f] limit: ef9f io

[DEBUG] PCI: 00:00:17.0 18 * [0xef78 - 0xef7f] limit: ef7f io

[DEBUG] PCI: 00:00:17.0 1c * [0xef74 - 0xef77] limit: ef77 io

[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

[DEBUG] DOMAIN: 00000000 mem: base: 7b000000 size: 0 align: 0 gran: 0 limit: dfffffff

[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 00 base e0000000 limit efffffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 01 base fed10000 limit fed17fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 02 base fed18000 limit fed18fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 03 base fed19000 limit fed19fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 04 base fed84000 limit fed84fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 05 base fed80000 limit fed83fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 06 base fed90000 limit fed90fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 07 base fed91000 limit fed91fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 08 base 00000000 limit 0009ffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 09 base 000c0000 limit 7affffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0a base 7b000000 limit 7fffffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0b base 100000000 limit 47fffffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0c base 000a0000 limit 000bffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0d base 000c0000 limit 000fffff mem (fixed)

[DEBUG] avoid_fixed_resources: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.1 10 base fd000000 limit fdffffff mem (fixed)

[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.2 48 base fe000000 limit fe00ffff mem (fixed)

[INFO ] DOMAIN: 00000000: Resource ranges:

[INFO ] * Base: 80000000, Size: 60000000, Tag: 200

[INFO ] * Base: 480000000, Size: 7b80000000, Tag: 200

[DEBUG] PCI: 00:00:02.0 18 * [0x7ff0000000 - 0x7fffffffff] limit: 7fffffffff prefmem

[DEBUG] PCI: 00:00:02.0 10 * [0x7fef000000 - 0x7fefffffff] limit: 7fefffffff mem

[DEBUG] PCI: 00:00:01.0 20 * [0xdff00000 - 0xdfffffff] limit: dfffffff mem

[DEBUG] PCI: 00:00:1d.0 20 * [0xdfe00000 - 0xdfefffff] limit: dfefffff mem

[DEBUG] PCI: 00:00:1f.6 10 * [0xdfde0000 - 0xdfdfffff] limit: dfdfffff mem

[DEBUG] PCI: 00:00:14.0 10 * [0x7feeff0000 - 0x7feeffffff] limit: 7feeffffff mem

[DEBUG] PCI: 00:00:1f.3 20 * [0x7feefe0000 - 0x7feefeffff] limit: 7feefeffff mem

[DEBUG] PCI: 00:00:1f.2 10 * [0xdfddc000 - 0xdfddffff] limit: dfddffff mem

[DEBUG] PCI: 00:00:1f.3 10 * [0x7feefdc000 - 0x7feefdffff] limit: 7feefdffff mem

[DEBUG] PCI: 00:00:17.0 10 * [0xdfdda000 - 0xdfddbfff] limit: dfddbfff mem

[DEBUG] PCI: 00:00:1e.0 10 * [0x7feefdb000 - 0x7feefdbfff] limit: 7feefdbfff mem

[DEBUG] PCI: 00:00:17.0 24 * [0xdfdd9000 - 0xdfdd97ff] limit: dfdd97ff mem

[DEBUG] PCI: 00:00:17.0 14 * [0xdfdd8000 - 0xdfdd80ff] limit: dfdd80ff mem

[DEBUG] PCI: 00:00:1f.4 10 * [0x7feefda000 - 0x7feefda0ff] limit: 7feefda0ff mem

[DEBUG] DOMAIN: 00000000 mem: base: 7b000000 size: 0 align: 0 gran: 0 limit: dfffffff done

[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff done

[DEBUG] PCI: 00:01:00.0 18 * [0xf000 - 0xf01f] limit: f01f io

[DEBUG] PCI: 00:01:00.0 10 * [0xdffc0000 - 0xdffdffff] limit: dffdffff mem

[DEBUG] PCI: 00:01:00.0 14 * [0xdff00000 - 0xdff7ffff] limit: dff7ffff mem

[DEBUG] PCI: 00:01:00.0 1c * [0xdffe0000 - 0xdffe3fff] limit: dffe3fff mem

[DEBUG] PCI: 00:01:00.0 30 * [0xdff80000 - 0xdffbffff] limit: dffbffff mem

[DEBUG] PCI: 00:03:00.0 10 * [0xd000 - 0xd0ff] limit: d0ff io

[DEBUG] PCI: 00:03:00.0 18 * [0xdfe00000 - 0xdfe0ffff] limit: dfe0ffff mem

[DEBUG] PCI: 00:03:00.0 20 * [0xdfe10000 - 0xdfe13fff] limit: dfe13fff mem

[INFO ] === Resource allocator: DOMAIN: 00000000 - resource allocation complete ===

[DEBUG] PCI: 00:00:01.0 1c <- [0x000000000000f000 - 0x000000000000ffff] size 0x00001000 gran 0x0c seg 00 bus 01 io

[DEBUG] PCI: 00:00:01.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 01 prefmem

[DEBUG] PCI: 00:00:01.0 20 <- [0x00000000dff00000 - 0x00000000dfffffff] size 0x00100000 gran 0x14 seg 00 bus 01 mem

[DEBUG] PCI: 00:01:00.0 10 <- [0x00000000dffc0000 - 0x00000000dffdffff] size 0x00020000 gran 0x11 mem

[DEBUG] PCI: 00:01:00.0 14 <- [0x00000000dff00000 - 0x00000000dff7ffff] size 0x00080000 gran 0x13 mem

[DEBUG] PCI: 00:01:00.0 18 <- [0x000000000000f000 - 0x000000000000f01f] size 0x00000020 gran 0x05 io

[DEBUG] PCI: 00:01:00.0 1c <- [0x00000000dffe0000 - 0x00000000dffe3fff] size 0x00004000 gran 0x0e mem

[DEBUG] PCI: 00:01:00.0 30 <- [0x00000000dff80000 - 0x00000000dffbffff] size 0x00040000 gran 0x12 romem

[DEBUG] PCI: 00:00:02.0 10 <- [0x0000007fef000000 - 0x0000007fefffffff] size 0x01000000 gran 0x18 mem64

[DEBUG] PCI: 00:00:02.0 18 <- [0x0000007ff0000000 - 0x0000007fffffffff] size 0x10000000 gran 0x1c prefmem64

[DEBUG] PCI: 00:00:02.0 20 <- [0x000000000000efc0 - 0x000000000000efff] size 0x00000040 gran 0x06 io

[DEBUG] PCI: 00:00:14.0 10 <- [0x0000007feeff0000 - 0x0000007feeffffff] size 0x00010000 gran 0x10 mem64

[DEBUG] PCI: 00:00:17.0 10 <- [0x00000000dfdda000 - 0x00000000dfddbfff] size 0x00002000 gran 0x0d mem

[DEBUG] PCI: 00:00:17.0 14 <- [0x00000000dfdd8000 - 0x00000000dfdd80ff] size 0x00000100 gran 0x08 mem

[DEBUG] PCI: 00:00:17.0 18 <- [0x000000000000ef78 - 0x000000000000ef7f] size 0x00000008 gran 0x03 io

[DEBUG] PCI: 00:00:17.0 1c <- [0x000000000000ef74 - 0x000000000000ef77] size 0x00000004 gran 0x02 io

[DEBUG] PCI: 00:00:17.0 20 <- [0x000000000000ef80 - 0x000000000000ef9f] size 0x00000020 gran 0x05 io

[DEBUG] PCI: 00:00:17.0 24 <- [0x00000000dfdd9000 - 0x00000000dfdd97ff] size 0x00000800 gran 0x0b mem

[DEBUG] PCI: 00:00:1b.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 02 io

[DEBUG] PCI: 00:00:1b.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 02 prefmem

[DEBUG] PCI: 00:00:1b.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 02 mem

[DEBUG] PCI: 00:00:1d.0 1c <- [0x000000000000d000 - 0x000000000000dfff] size 0x00001000 gran 0x0c seg 00 bus 03 io

[DEBUG] PCI: 00:00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 03 prefmem

[DEBUG] PCI: 00:00:1d.0 20 <- [0x00000000dfe00000 - 0x00000000dfefffff] size 0x00100000 gran 0x14 seg 00 bus 03 mem

[DEBUG] PCI: 00:03:00.0 10 <- [0x000000000000d000 - 0x000000000000d0ff] size 0x00000100 gran 0x08 io

[DEBUG] PCI: 00:03:00.0 18 <- [0x00000000dfe00000 - 0x00000000dfe0ffff] size 0x00010000 gran 0x10 mem64

[DEBUG] PCI: 00:03:00.0 20 <- [0x00000000dfe10000 - 0x00000000dfe13fff] size 0x00004000 gran 0x0e mem64

[DEBUG] PCI: 00:00:1e.0 10 <- [0x0000007feefdb000 - 0x0000007feefdbfff] size 0x00001000 gran 0x0c mem64

[DEBUG] LPC: Opened IO window LGIR2: base a00 size 10

[DEBUG] LPC: enabling default decode range LPC_IOE_KBC_60_64

[DEBUG] LPC: enabling default decode range LPC_IOE_COMA_EN

[DEBUG] LPC: enabling default decode range LPC_IOE_SUPERIO_2E_2F

[DEBUG] LPC: Opened IO window LGIR3: base a40 size 40

[DEBUG] PCI: 00:00:1f.2 10 <- [0x00000000dfddc000 - 0x00000000dfddffff] size 0x00004000 gran 0x0e mem

[DEBUG] PCI: 00:00:1f.3 10 <- [0x0000007feefdc000 - 0x0000007feefdffff] size 0x00004000 gran 0x0e mem64

[DEBUG] PCI: 00:00:1f.3 20 <- [0x0000007feefe0000 - 0x0000007feefeffff] size 0x00010000 gran 0x10 mem64

[DEBUG] PCI: 00:00:1f.4 10 <- [0x0000007feefda000 - 0x0000007feefda0ff] size 0x00000100 gran 0x08 mem64

[DEBUG] PCI: 00:00:1f.6 10 <- [0x00000000dfde0000 - 0x00000000dfdfffff] size 0x00020000 gran 0x11 mem

[INFO ] Done setting resources.

[INFO ] Done allocating resources.

[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 3 / 1159 ms

[INFO ] Enabling resources...

[DEBUG] PCI: 00:00:00.0 subsystem <- 8086/190f

[DEBUG] PCI: 00:00:00.0 cmd <- 06

[DEBUG] PCI: 00:00:01.0 bridge ctrl <- 0013

[DEBUG] PCI: 00:00:01.0 cmd <- 07

[DEBUG] PCI: 00:00:02.0 subsystem <- 8086/1912

[DEBUG] PCI: 00:00:02.0 cmd <- 03

[DEBUG] PCI: 00:00:14.0 subsystem <- 8086/a12f

[DEBUG] PCI: 00:00:14.0 cmd <- 02

[DEBUG] PCI: 00:00:17.0 subsystem <- 8086/a102

[DEBUG] PCI: 00:00:17.0 cmd <- 03

[DEBUG] PCI: 00:00:1b.0 bridge ctrl <- 0013

[DEBUG] PCI: 00:00:1b.0 subsystem <- 8086/a167

[DEBUG] PCI: 00:00:1b.0 cmd <- 00

[DEBUG] PCI: 00:00:1d.0 bridge ctrl <- 0013

[DEBUG] PCI: 00:00:1d.0 subsystem <- 8086/a118

[DEBUG] PCI: 00:00:1d.0 cmd <- 07

[DEBUG] PCI: 00:00:1e.0 subsystem <- 8086/a127

[DEBUG] PCI: 00:00:1e.0 cmd <- 06

[DEBUG] PCI: 00:00:1f.0 subsystem <- 8086/a146

[DEBUG] PCI: 00:00:1f.0 cmd <- 07

[DEBUG] PCI: 00:00:1f.2 subsystem <- 8086/a121

[DEBUG] PCI: 00:00:1f.2 cmd <- 06

[DEBUG] PCI: 00:00:1f.3 subsystem <- 8086/a170

[DEBUG] PCI: 00:00:1f.3 cmd <- 02

[DEBUG] PCI: 00:00:1f.4 subsystem <- 8086/a123

[DEBUG] PCI: 00:00:1f.4 cmd <- 03

[DEBUG] PCI: 00:00:1f.6 subsystem <- 8086/15b8

[DEBUG] PCI: 00:00:1f.6 cmd <- 02

[DEBUG] PCI: 00:01:00.0 cmd <- 03

[DEBUG] PCI: 00:03:00.0 cmd <- 03

[INFO ] done.

[DEBUG] BS: BS_DEV_ENABLE run times (exec / console): 0 / 136 ms

[WARN ] HECI: CSE device 16.0 is disabled

[DEBUG] ME: Version: Unavailable

[DEBUG] BS: BS_DEV_ENABLE exit times (exec / console): 0 / 8 ms

[INFO ] Initializing devices...

[DEBUG] PCI: 00:00:00.0 init

[INFO ] CPU TDP = 51 Watts

[INFO ] CPU PL1 = 51 Watts

[INFO ] CPU PL2 = 63 Watts

[DEBUG] PCI: 00:00:00.0 init finished in 10 msecs

[DEBUG] PCI: 00:00:02.0 init

[INFO ] CBFS: Found 'vbt.bin' @0xcf780 size 0x48e in mcache @0x7abdd1e4

[INFO ] Found a VBT of 6144 bytes

[INFO ] GMA: Found VBT in CBFS

[INFO ] GMA: Found valid VBT in CBFS

[DEBUG] PCI: 00:00:02.0 init finished in 40 msecs

[DEBUG] PCI: 00:00:14.0 init

[DEBUG] PCI: 00:00:14.0 init finished in 0 msecs

[DEBUG] PCI: 00:00:1b.0 init

[DEBUG] Initializing PCH PCIe bridge.

[DEBUG] PCI: 00:00:1b.0 init finished in 4 msecs

[DEBUG] PCI: 00:00:1d.0 init

[DEBUG] Initializing PCH PCIe bridge.

[DEBUG] PCI: 00:00:1d.0 init finished in 4 msecs

[DEBUG] PCI: 00:00:1f.0 init

[DEBUG] IOAPIC: Initializing IOAPIC at fec00000

[DEBUG] IOAPIC: ID = 0x00

[DEBUG] IOAPIC: 120 interrupts

[DEBUG] IOAPIC: Clearing IOAPIC at fec00000

[DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00

[DEBUG] PCI: 00:00:1f.0 init finished in 22 msecs

[DEBUG] PCI: 00:00:1f.2 init

[DEBUG] RTC Init

[INFO ] Set power off after power failure.

[WARN ] PMC: Duplicate GPE DW register values detected; using default GPE route from MISCCFG register

[DEBUG] apm_control: Disabling ACPI.

[DEBUG] APMC done.

[DEBUG] Disabling Deep S3

[DEBUG] Disabling Deep S3

[DEBUG] Disabling Deep S4

[DEBUG] Disabling Deep S4

[DEBUG] Disabling Deep S5

[DEBUG] Disabling Deep S5

[DEBUG] PCI: 00:00:1f.2 init finished in 42 msecs

[DEBUG] PCI: 00:00:1f.3 init

[DEBUG] azalia_audio: base = 0xeefdc000

[DEBUG] azalia_audio: no codec!

[DEBUG] PCI: 00:00:1f.3 init finished in 109 msecs

[DEBUG] PCI: 00:00:1f.4 init

[DEBUG] PCI: 00:00:1f.4 init finished in 0 msecs

[DEBUG] PCI: 00:00:1f.6 init

[DEBUG] PCI: 00:00:1f.6 init finished in 0 msecs

[DEBUG] PCI: 00:01:00.0 init

[DEBUG] PCI: 00:01:00.0 init finished in 0 msecs

[DEBUG] PCI: 00:03:00.0 init

[DEBUG] PCI: 00:03:00.0 init finished in 0 msecs

[DEBUG] PNP: 002e.0 init

[DEBUG] PNP: 002e.0 init finished in 0 msecs

[DEBUG] PNP: 002e.1 init

[DEBUG] PNP: 002e.1 init finished in 0 msecs

[DEBUG] PNP: 002e.7 init

[DEBUG] PNP: 002e.7 init finished in 0 msecs

[DEBUG] PNP: 002e.c init

[DEBUG] PNP: 002e.c init finished in 0 msecs

[DEBUG] PNP: 002e.a init

[DEBUG] PNP: 002e.a init finished in 0 msecs

[INFO ] Devices initialized

[DEBUG] BS: BS_DEV_INIT run times (exec / console): 126 / 256 ms

[INFO ] tlcl2_send_startup: Startup return code is 0x0

[INFO ] TPM: setup succeeded

[DEBUG] BS: BS_DEV_INIT exit times (exec / console): 93 / 9 ms

[INFO ] Finalize devices...

[DEBUG] PCI: 00:00:02.0 final

[DEBUG] PCI: 00:00:17.0 final

[DEBUG] PCI: 00:00:1f.2 final

[DEBUG] PCI: 00:00:1f.4 final

[INFO ] Devices finalized

[DEBUG] BS: BS_POST_DEVICE run times (exec / console): 0 / 20 ms

[DEBUG] OptiPlex 5040 SFF late HWM init

[DEBUG] Form Factor ID = 0x1

[DEBUG] Temp target = 0x81

[DEBUG] Package power = 0x10

[DEBUG] CPU Core Count = 0x7

[DEBUG] BS: BS_POST_DEVICE exit times (exec / console): 8 / 17 ms

[INFO ] CBFS: Found 'fallback/dsdt.aml' @0xcce00 size 0x293e in mcache @0x7abdd1b8

[WARN ] CBFS: 'fallback/slic' not found.

[INFO ] ACPI: Writing ACPI tables at 7a9f7000.

[DEBUG] ACPI: * FACS

[DEBUG] SCI is IRQ 9, GSI 9

[DEBUG] ACPI: * FACP

[DEBUG] ACPI: added table 1/32, length now 44

[DEBUG] Found 1 CPU(s) with 2/4 physical/logical core(s) each.

[DEBUG] PSS: 3700MHz power 51000 control 0x2500 status 0x2500

[DEBUG] PSS: 3300MHz power 43350 control 0x2100 status 0x2100

[DEBUG] PSS: 2800MHz power 34700 control 0x1c00 status 0x1c00

[DEBUG] PSS: 2300MHz power 26825 control 0x1700 status 0x1700

[DEBUG] PSS: 1800MHz power 19704 control 0x1200 status 0x1200

[DEBUG] PSS: 1300MHz power 13336 control 0xd00 status 0xd00

[DEBUG] PSS: 800MHz power 7678 control 0x800 status 0x800

[DEBUG] PSS: 3700MHz power 51000 control 0x2500 status 0x2500

[DEBUG] PSS: 3300MHz power 43350 control 0x2100 status 0x2100

[DEBUG] PSS: 2800MHz power 34700 control 0x1c00 status 0x1c00

[DEBUG] PSS: 2300MHz power 26825 control 0x1700 status 0x1700

[DEBUG] PSS: 1800MHz power 19704 control 0x1200 status 0x1200

[DEBUG] PSS: 1300MHz power 13336 control 0xd00 status 0xd00

[DEBUG] PSS: 800MHz power 7678 control 0x800 status 0x800

[DEBUG] PSS: 3700MHz power 51000 control 0x2500 status 0x2500

[DEBUG] PSS: 3300MHz power 43350 control 0x2100 status 0x2100

[DEBUG] PSS: 2800MHz power 34700 control 0x1c00 status 0x1c00

[DEBUG] PSS: 2300MHz power 26825 control 0x1700 status 0x1700

[DEBUG] PSS: 1800MHz power 19704 control 0x1200 status 0x1200

[DEBUG] PSS: 1300MHz power 13336 control 0xd00 status 0xd00

[DEBUG] PSS: 800MHz power 7678 control 0x800 status 0x800

[DEBUG] PSS: 3700MHz power 51000 control 0x2500 status 0x2500

[DEBUG] PSS: 3300MHz power 43350 control 0x2100 status 0x2100

[DEBUG] PSS: 2800MHz power 34700 control 0x1c00 status 0x1c00

[DEBUG] PSS: 2300MHz power 26825 control 0x1700 status 0x1700

[DEBUG] PSS: 1800MHz power 19704 control 0x1200 status 0x1200

[DEBUG] PSS: 1300MHz power 13336 control 0xd00 status 0xd00

[DEBUG] PSS: 800MHz power 7678 control 0x800 status 0x800

[DEBUG] PCI space above 4GB MMIO is at 0x480000000, len = 0x7b80000000

[DEBUG] Empty min sleep state array returned

[INFO ] Returning default LPI constraint package

[INFO ] \_SB.PCI0.PEPD: Intel Power Engine Plug-in

[DEBUG] PPI: Pending OS request: 0x4671ca1 (0xd358804)

[DEBUG] PPI: OS response: CMD 0x24273ce1 = 0x2d358804

[INFO ] \_SB_.PCI0.TPM: LPC TPM PNP: 0c31.0

[DEBUG] ACPI: * SSDT

[DEBUG] ACPI: added table 2/32, length now 52

[DEBUG] ACPI: * MCFG

[DEBUG] ACPI: added table 3/32, length now 60

[DEBUG] TPM2 log created at 0x7a9e7000

[DEBUG] ACPI: * TPM2

[DEBUG] ACPI: added table 4/32, length now 68

[DEBUG] ACPI: * LPIT

[DEBUG] ACPI: added table 5/32, length now 76

[DEBUG] IOAPIC: 120 interrupts

[DEBUG] SCI is IRQ 9, GSI 9

[DEBUG] ACPI: * APIC

[DEBUG] ACPI: added table 6/32, length now 84

[DEBUG] ACPI: * SPCR

[DEBUG] ACPI: added table 7/32, length now 92

[DEBUG] current = 7a9fb120

[DEBUG] No CMOS option 'vtd'.

[DEBUG] ACPI: * DMAR

[DEBUG] ACPI: added table 8/32, length now 100

[DEBUG] acpi_write_dbg2_pci_uart: Device not found

[DEBUG] ACPI: * HPET

[DEBUG] ACPI: added table 9/32, length now 108

[INFO ] ACPI: done.

[DEBUG] ACPI tables: 16880 bytes.

[DEBUG] smbios_write_tables: 7a9df000

[DEBUG] SMBIOS firmware version is set to coreboot_version: '25.03-519-ga2010cf5eeea'

[INFO ] Create SMBIOS type 16

[INFO ] Create SMBIOS type 17

[INFO ] Create SMBIOS type 20

[DEBUG] SMBIOS tables: 1053 bytes.

[DEBUG] Writing table forward entry at 0x00000500

[DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d53c

[DEBUG] Writing coreboot table at 0x7aa1b000

[INFO ] CBFS: Found 'cmos_layout.bin' @0x156e40 size 0x2b8 in mcache @0x7abdd2b0

[DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

[DEBUG] 1. 0000000000001000-000000000009ffff: RAM

[DEBUG] 2. 00000000000a0000-00000000000f5fff: RESERVED

[DEBUG] 3. 00000000000f6000-00000000000f6fff: CONFIGURATION TABLES

[DEBUG] 4. 00000000000f7000-00000000000fffff: RESERVED

[DEBUG] 5. 0000000000100000-000000007a9defff: RAM

[DEBUG] 6. 000000007a9df000-000000007aa75fff: CONFIGURATION TABLES

[DEBUG] 7. 000000007aa76000-000000007abcdfff: RAMSTAGE

[DEBUG] 8. 000000007abce000-000000007affffff: CONFIGURATION TABLES

[DEBUG] 9. 000000007b000000-000000007fffffff: RESERVED

[DEBUG] 10. 00000000e0000000-00000000efffffff: RESERVED

[DEBUG] 11. 00000000fd000000-00000000fe00ffff: RESERVED

[DEBUG] 12. 00000000fed10000-00000000fed19fff: RESERVED

[DEBUG] 13. 00000000fed40000-00000000fed44fff: RESERVED

[DEBUG] 14. 00000000fed80000-00000000fed84fff: RESERVED

[DEBUG] 15. 00000000fed90000-00000000fed91fff: RESERVED

[DEBUG] 16. 0000000100000000-000000047fffffff: RAM

[DEBUG] FMAP: area SMMSTORE found @ 710000 (262144 bytes)

[DEBUG] smm store: 4 # blocks with size 0x10000

[DEBUG] Wrote coreboot table at: 0x7aa1b000, 0x804 bytes, checksum f104

[DEBUG] coreboot table: 2076 bytes.

[DEBUG] IMD ROOT 0. 0x7afff000 0x00001000

[DEBUG] IMD SMALL 1. 0x7affe000 0x00001000

[DEBUG] FSP MEMORY 2. 0x7abfe000 0x00400000

[DEBUG] CONSOLE 3. 0x7abde000 0x00020000

[DEBUG] RO MCACHE 4. 0x7abdd000 0x0000038c

[DEBUG] TIME STAMP 5. 0x7abdc000 0x00000910

[DEBUG] MEM INFO 6. 0x7abdb000 0x00000f48

[DEBUG] AFTER CAR 7. 0x7abce000 0x0000d000

[DEBUG] RAMSTAGE 8. 0x7aa75000 0x00159000

[DEBUG] REFCODE 9. 0x7aa47000 0x0002e000

[DEBUG] SMM BACKUP 10. 0x7aa37000 0x00010000

[DEBUG] SMM COMBUFFER11. 0x7aa27000 0x00010000

[DEBUG] IGD OPREGION12. 0x7aa23000 0x00003200

[DEBUG] COREBOOT 13. 0x7aa1b000 0x00008000

[DEBUG] ACPI 14. 0x7a9f7000 0x00024000

[DEBUG] TPM2 TCGLOG15. 0x7a9e7000 0x00010000

[DEBUG] SMBIOS 16. 0x7a9df000 0x00008000

[DEBUG] IMD small region:

[DEBUG] IMD ROOT 0. 0x7affec00 0x00000400

[DEBUG] FSP RUNTIME 1. 0x7affebe0 0x00000004

[DEBUG] FMAP 2. 0x7affea40 0x00000188

[DEBUG] POWER STATE 3. 0x7affea00 0x00000040

[DEBUG] FSPM VERSION 4. 0x7affe9e0 0x00000004

[DEBUG] ROMSTAGE 5. 0x7affe9c0 0x00000004

[DEBUG] ROMSTG STCK 6. 0x7affe900 0x000000a8

[DEBUG] ACPI GNVS 7. 0x7affe8c0 0x00000038

[DEBUG] TPM PPI 8. 0x7affe760 0x0000015a

[DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 1 / 644 ms

[INFO ] LAPIC 0x0 in XAPIC mode.

[DEBUG] MTRR: Physical address space:

[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6

[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0

[DEBUG] 0x00000000000c0000 - 0x000000007affffff size 0x7af40000 type 6

[DEBUG] 0x000000007b000000 - 0x00000000ffffffff size 0x85000000 type 0

[DEBUG] 0x0000000100000000 - 0x000000047fffffff size 0x380000000 type 6

[DEBUG] 0x0000007feefda000 - 0x0000007fefffffff size 0x01026000 type 0

[DEBUG] 0x0000007ff0000000 - 0x0000007fffffffff size 0x10000000 type 1

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 39 bits

[DEBUG] MTRR: default type WB/UC MTRR counts: 8/7.

[DEBUG] MTRR: UC selected as default type.

[DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

[DEBUG] MTRR: 1 base 0x000000007b000000 mask 0x0000007fff000000 type 0

[DEBUG] MTRR: 2 base 0x000000007c000000 mask 0x0000007ffc000000 type 0

[DEBUG] MTRR: 3 base 0x0000000100000000 mask 0x0000007f00000000 type 6

[DEBUG] MTRR: 4 base 0x0000000200000000 mask 0x0000007e00000000 type 6

[DEBUG] MTRR: 5 base 0x0000000400000000 mask 0x0000007f80000000 type 6

[DEBUG] MTRR: 6 base 0x0000007ff0000000 mask 0x0000007ff0000000 type 1

[INFO ] LAPIC 0x1 in XAPIC mode.

[INFO ] LAPIC 0x3 in XAPIC mode.

[INFO ] LAPIC 0x2 in XAPIC mode.

[DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x3: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26b 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26c 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26d 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26e 0x0606060606060606

[DEBUG] apic_id 0x1: MTRR: Fixed MSR 0x26f 0x0606060606060606

[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x250 0x0606060606060606

[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x258 0x0606060606060606

[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x259 0x0000000000000000

[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x268 0x0606060606060606

[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x269 0x0606060606060606

[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26a 0x0606060606060606

[DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26b 0x0606060606060606