|
[NOTE ] coreboot-24.12-869-g92d77dd2e385-dirty Sun Mar 16 05:25:07 UTC 2025 x86_32 bootblock starting (log level: 7)...
|
|
[DEBUG] FMAP: Found "FLASH" version 1.1 at 0xae0000.
|
|
[DEBUG] FMAP: base = 0xff000000 size = 0x1000000 #areas = 5
|
|
[DEBUG] FMAP: area COREBOOT found @ ae0200 (5373440 bytes)
|
|
[INFO ] CBFS: mcache @0xfeff0e00 built for 13 files, used 0x2c0 of 0x4000 bytes
|
|
[INFO ] CBFS: Found 'fallback/romstage' @0x68c0 size 0x17050 in mcache @0xfeff0e5c
|
|
[DEBUG] BS: bootblock times (exec / console): total (unknown) / 46 ms
|
|
|
|
|
|
[NOTE ] coreboot-24.12-869-g92d77dd2e385-dirty Sun Mar 16 05:25:07 UTC 2025 x86_32 romstage starting (log level: 7)...
|
|
[DEBUG] SMBus controller enabled
|
|
[INFO ] Detected system type: desktop
|
|
[DEBUG] Setting up static northbridge registers... done
|
|
[DEBUG] Initializing Graphics...
|
|
[DEBUG] Back from systemagent_early_init()
|
|
[INFO ] Intel ME early init
|
|
[INFO ] Intel ME firmware is ready
|
|
[DEBUG] ME: Requested 32MB UMA
|
|
[DEBUG] Starting native Platform init
|
|
[DEBUG] DMI: Running at X4 @ 5000MT/s
|
|
[DEBUG] FMAP: area RW_MRC_CACHE found @ a90000 (65536 bytes)
|
|
[DEBUG] Trying stored timings.
|
|
[DEBUG] Starting Ivy Bridge RAM training (fast boot).
|
|
[DEBUG] 100MHz reference clock support: yes
|
|
[DEBUG] PLL_REF100_CFG value: 0x2
|
|
[DEBUG] Trying CAS 11, tCK 320.
|
|
[DEBUG] Found compatible clock, CAS pair.
|
|
[DEBUG] Selected DRAM frequency: 800 MHz
|
|
[DEBUG] Selected CAS latency : 11T
|
|
[DEBUG] MPLL busy... done in 10 us
|
|
[DEBUG] MPLL frequency is set at : 800 MHz
|
|
[DEBUG] Done dimm mapping
|
|
[DEBUG] Update PCI-E configuration space:
|
|
[DEBUG] PCI(0, 0, 0)[a0] = 0
|
|
[DEBUG] PCI(0, 0, 0)[a4] = 6
|
|
[DEBUG] PCI(0, 0, 0)[bc] = 82a00000
|
|
[DEBUG] PCI(0, 0, 0)[a8] = 7b600000
|
|
[DEBUG] PCI(0, 0, 0)[ac] = 6
|
|
[DEBUG] PCI(0, 0, 0)[b8] = 80000000
|
|
[DEBUG] PCI(0, 0, 0)[b0] = 80a00000
|
|
[DEBUG] PCI(0, 0, 0)[b4] = 80800000
|
|
[DEBUG] PCI(0, 0, 0)[7c] = 7f
|
|
[DEBUG] PCI(0, 0, 0)[70] = fe000000
|
|
[DEBUG] PCI(0, 0, 0)[74] = 5
|
|
[DEBUG] PCI(0, 0, 0)[78] = fe000c00
|
|
[DEBUG] Done memory map
|
|
[DEBUG] Done io registers
|
|
[DEBUG] t123: 1767, 6000, 6120
|
|
[NOTE ] ME: FWS2: 0x3900012e
|
|
[NOTE ] ME: Bist in progress: 0x0
|
|
[NOTE ] ME: ICC Status : 0x3
|
|
[NOTE ] ME: Invoke MEBx : 0x1
|
|
[NOTE ] ME: CPU replaced : 0x0
|
|
[NOTE ] ME: MBP ready : 0x1
|
|
[NOTE ] ME: MFS failure : 0x0
|
|
[NOTE ] ME: Warm reset req : 0x0
|
|
[NOTE ] ME: CPU repl valid : 0x1
|
|
[NOTE ] ME: (Reserved) : 0x0
|
|
[NOTE ] ME: FW update req : 0x0
|
|
[NOTE ] ME: (Reserved) : 0x0
|
|
[NOTE ] ME: Current state : 0x0
|
|
[NOTE ] ME: Current PM event: 0x9
|
|
[NOTE ] ME: Progress code : 0x3
|
|
[NOTE ] PASSED! Tell ME that DRAM is ready
|
|
[NOTE ] ME: FWS2: 0x390b012e
|
|
[NOTE ] ME: Bist in progress: 0x0
|
|
[NOTE ] ME: ICC Status : 0x3
|
|
[NOTE ] ME: Invoke MEBx : 0x1
|
|
[NOTE ] ME: CPU replaced : 0x0
|
|
[NOTE ] ME: MBP ready : 0x1
|
|
[NOTE ] ME: MFS failure : 0x0
|
|
[NOTE ] ME: Warm reset req : 0x0
|
|
[NOTE ] ME: CPU repl valid : 0x1
|
|
[NOTE ] ME: (Reserved) : 0x0
|
|
[NOTE ] ME: FW update req : 0x0
|
|
[NOTE ] ME: (Reserved) : 0x0
|
|
[NOTE ] ME: Current state : 0xb
|
|
[NOTE ] ME: Current PM event: 0x9
|
|
[NOTE ] ME: Progress code : 0x3
|
|
[NOTE ] ME: Requested BIOS Action: Continue to boot
|
|
[DEBUG] ME: FW Partition Table : OK
|
|
[DEBUG] ME: Bringup Loader Failure : NO
|
|
[DEBUG] ME: Firmware Init Complete : NO
|
|
[DEBUG] ME: Manufacturing Mode : YES
|
|
[DEBUG] ME: Boot Options Present : NO
|
|
[DEBUG] ME: Update In Progress : NO
|
|
[DEBUG] ME: Current Working State : Normal
|
|
[DEBUG] ME: Current Operation State : M0 without UMA
|
|
[DEBUG] ME: Current Operation Mode : Normal
|
|
[DEBUG] ME: Error Code : No Error
|
|
[DEBUG] ME: Progress Phase : Policy Module
|
|
[DEBUG] ME: Power Management Event : Non-power cycle reset
|
|
[DEBUG] ME: Progress Phase State : Entry into Policy Module
|
|
[DEBUG] memcfg DDR3 ref clock 133 MHz
|
|
[DEBUG] memcfg DDR3 clock 1596 MHz
|
|
[DEBUG] memcfg channel assignment: A: 0, B 1, C 2
|
|
[DEBUG] memcfg channel[0] config (00631020):
|
|
[DEBUG] ECC inactive
|
|
[DEBUG] enhanced interleave mode on
|
|
[DEBUG] rank interleave on
|
|
[DEBUG] DIMMA 8192 MB width x8 dual rank
|
|
[DEBUG] DIMMB 4096 MB width x8 single rank, selected
|
|
[DEBUG] memcfg channel[1] config (00631020):
|
|
[DEBUG] ECC inactive
|
|
[DEBUG] enhanced interleave mode on
|
|
[DEBUG] rank interleave on
|
|
[DEBUG] DIMMA 8192 MB width x8 dual rank
|
|
[DEBUG] DIMMB 4096 MB width x8 single rank, selected
|
|
[DEBUG] CBMEM:
|
|
[DEBUG] IMD: root @ 0x7ffff000 254 entries.
|
|
[DEBUG] IMD: root @ 0x7fffec00 62 entries.
|
|
[DEBUG] FMAP: area COREBOOT found @ ae0200 (5373440 bytes)
|
|
[DEBUG] External stage cache:
|
|
[DEBUG] IMD: root @ 0x803ff000 254 entries.
|
|
[DEBUG] IMD: root @ 0x803fec00 62 entries.
|
|
[DEBUG] CBMEM entry for DIMM info: 0x7ffdc000
|
|
[DEBUG] SMM Memory Map
|
|
[DEBUG] SMRAM : 0x80000000 0x800000
|
|
[DEBUG] Subregion 0: 0x80000000 0x300000
|
|
[DEBUG] Subregion 1: 0x80300000 0x100000
|
|
[DEBUG] Subregion 2: 0x80400000 0x400000
|
|
[DEBUG] Normal boot
|
|
[INFO ] CBFS: Found 'fallback/postcar' @0x407c0 size 0x5e68 in mcache @0xfeff100c
|
|
[DEBUG] Loading module at 0x7ffd0000 with entry 0x7ffd0031. filesize: 0x5a88 memsize: 0xbdd8
|
|
[DEBUG] Processing 232 relocs. Offset value of 0x7dfd0000
|
|
[DEBUG] BS: romstage times (exec / console): total (unknown) / 499 ms
|
|
|
|
|
|
[NOTE ] coreboot-24.12-869-g92d77dd2e385-dirty Sun Mar 16 05:25:07 UTC 2025 x86_32 postcar starting (log level: 7)...
|
|
[DEBUG] Normal boot
|
|
[DEBUG] FMAP: area COREBOOT found @ ae0200 (5373440 bytes)
|
|
[INFO ] CBFS: Found 'fallback/ramstage' @0x1d980 size 0x1ec30 in mcache @0x7fffe9fc
|
|
[DEBUG] Loading module at 0x7fe81000 with entry 0x7fe81000. filesize: 0x3e560 memsize: 0x14d710
|
|
[DEBUG] Processing 4472 relocs. Offset value of 0x7be81000
|
|
[DEBUG] BS: postcar times (exec / console): total (unknown) / 44 ms
|
|
|
|
|
|
[NOTE ] coreboot-24.12-869-g92d77dd2e385-dirty Sun Mar 16 05:25:07 UTC 2025 x86_32 ramstage starting (log level: 7)...
|
|
[DEBUG] Normal boot
|
|
[INFO ] Enumerating buses...
|
|
[DEBUG] Root Device scanning...
|
|
[DEBUG] CPU_CLUSTER: 0 enabled
|
|
[DEBUG] DOMAIN: 00000000 enabled
|
|
[DEBUG] DOMAIN: 00000000 scanning...
|
|
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 00
|
|
[DEBUG] PCI: 00:00:00.0 [8086/0158] enabled
|
|
[DEBUG] PCI: 00:00:01.0 [8086/0151] enabled
|
|
[DEBUG] PCI: 00:00:02.0 [8086/016a] enabled
|
|
[DEBUG] PCI: 00:00:14.0 [8086/1e31] enabled
|
|
[DEBUG] PCI: 00:00:16.0 [8086/1e3a] enabled
|
|
[DEBUG] PCI: 00:00:16.1: Disabling device
|
|
[DEBUG] PCI: 00:00:16.1 [8086/1e3b] disabled No operations
|
|
[DEBUG] PCI: 00:00:16.2: Disabling device
|
|
[DEBUG] PCI: 00:00:16.2 [8086/1e3c] disabled No operations
|
|
[DEBUG] PCI: 00:00:16.3 [8086/1e3d] enabled
|
|
[DEBUG] PCI: 00:00:19.0 [8086/1502] enabled
|
|
[DEBUG] PCI: 00:00:1a.0 [8086/1e2d] enabled
|
|
[DEBUG] PCI: 00:00:1b.0 [8086/1e20] enabled
|
|
[DEBUG] PCI: 00:00:1c.0: No downstream device
|
|
[INFO ] PCH: PCIe Root Port coalescing is enabled
|
|
[DEBUG] PCI: 00:00:1c.0: Disabling device
|
|
[DEBUG] PCI: 00:00:1c.0: check set enabled
|
|
[DEBUG] PCI: 00:00:1c.1: Found a downstream device
|
|
[DEBUG] PCI: 00:00:1c.1: Disabling device
|
|
[DEBUG] PCI: 00:00:1c.2: Found a downstream device
|
|
[DEBUG] PCI: 00:00:1c.2: Disabling device
|
|
[DEBUG] PCI: 00:00:1c.3: Found a downstream device
|
|
[DEBUG] PCI: 00:00:1c.3: Disabling device
|
|
[DEBUG] PCI: 00:00:1c.4: No downstream device
|
|
[DEBUG] PCI: 00:00:1c.4: Disabling device
|
|
[DEBUG] PCI: 00:00:1c.4: check set enabled
|
|
[DEBUG] PCI: 00:00:1c.5: No downstream device
|
|
[DEBUG] PCI: 00:00:1c.5: Disabling device
|
|
[DEBUG] PCI: 00:00:1c.6: No downstream device
|
|
[DEBUG] PCI: 00:00:1c.6: Disabling device
|
|
[DEBUG] PCI: 00:00:1c.7: No downstream device
|
|
[DEBUG] PCI: 00:00:1c.7: Disabling device
|
|
[DEBUG] PCI: 00:00:1d.0 [8086/1e26] enabled
|
|
[DEBUG] PCI: 00:00:1e.0 [8086/244e] enabled
|
|
[DEBUG] PCI: 00:00:1f.0 [8086/1e48] enabled
|
|
[DEBUG] PCI: 00:00:1f.2 [8086/1e00] enabled
|
|
[DEBUG] PCI: 00:00:1f.3 [8086/1e22] enabled
|
|
[DEBUG] PCI: 00:00:1f.5: Disabling device
|
|
[DEBUG] PCI: 00:00:1f.5 [8086/1e08] disabled No operations
|
|
[DEBUG] PCI: 00:00:1f.6: Disabling device
|
|
[DEBUG] PCI: 00:00:1f.6 [8086/1e24] disabled No operations
|
|
[WARN ] PCI: Leftover static devices:
|
|
[WARN ] PCI: 00:00:01.1
|
|
[WARN ] PCI: 00:00:01.2
|
|
[WARN ] PCI: 00:00:04.0
|
|
[WARN ] PCI: 00:00:06.0
|
|
[WARN ] PCI: Check your devicetree.cb.
|
|
[DEBUG] PCI: 00:00:01.0 scanning...
|
|
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 01
|
|
[INFO ] PCI: 00:00:01.0: Setting Max_Payload_Size to 256 for devices under this root port
|
|
[DEBUG] scan_bus: bus PCI: 00:00:01.0 finished in 14 msecs
|
|
[DEBUG] PCI: 00:00:1e.0 scanning...
|
|
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 02
|
|
[DEBUG] scan_bus: bus PCI: 00:00:1e.0 finished in 5 msecs
|
|
[DEBUG] PCI: 00:00:1f.0 scanning...
|
|
[DEBUG] PNP: 002e.ff enabled
|
|
[INFO ] Found TPM 1.2 SLB9635 TT 1.2 (0x000b) by Infineon (0x15d1)
|
|
[DEBUG] PNP: 004e.0 enabled
|
|
[DEBUG] PNP: 002e.ff scanning...
|
|
[DEBUG] PNP: 002e.0 disabled
|
|
[DEBUG] PNP: 002e.1 enabled
|
|
[DEBUG] PNP: 002e.2 disabled
|
|
[DEBUG] PNP: 002e.3 enabled
|
|
[DEBUG] PNP: 002e.4 enabled
|
|
[DEBUG] PNP: 002e.5 enabled
|
|
[DEBUG] PNP: 002e.6 enabled
|
|
[DEBUG] PNP: 002e.7 enabled
|
|
[DEBUG] PNP: 002e.8 enabled
|
|
[DEBUG] PNP: 002e.f enabled
|
|
[DEBUG] PNP: 002e.15 enabled
|
|
[DEBUG] PNP: 002e.1c enabled
|
|
[DEBUG] PNP: 002e.1e enabled
|
|
[DEBUG] scan_bus: bus PNP: 002e.ff finished in 43 msecs
|
|
[DEBUG] scan_bus: bus PCI: 00:00:1f.0 finished in 66 msecs
|
|
[DEBUG] PCI: 00:00:1f.3 scanning...
|
|
[DEBUG] scan_bus: bus PCI: 00:00:1f.3 finished in 0 msecs
|
|
[DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 350 msecs
|
|
[DEBUG] scan_bus: bus Root Device finished in 367 msecs
|
|
[INFO ] done
|
|
[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 1 / 382 ms
|
|
[DEBUG] found VGA at PCI: 00:00:02.0
|
|
[DEBUG] Setting up VGA for PCI: 00:00:02.0
|
|
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000
|
|
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
|
|
[INFO ] Allocating resources...
|
|
[INFO ] Reading resources...
|
|
[DEBUG] Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
|
|
[DEBUG] TOUUD 0x67b600000 TOLUD 0x82a00000 TOM 0x600000000
|
|
[DEBUG] MEBASE 0x5fe000000
|
|
[DEBUG] IGD decoded, subtracting 32M UMA and 2M GTT
|
|
[DEBUG] TSEG base 0x80000000 size 8M
|
|
[INFO ] Available memory below 4GB: 2048M
|
|
[INFO ] Available memory above 4GB: 22454M
|
|
[INFO ] Done reading resources.
|
|
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) ===
|
|
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) ===
|
|
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 002e.ff 00 base 0000002e limit 0000002f io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 002e.1 60 base 00000378 limit 0000037f io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 002e.2 60 base 000002f8 limit 000002ff io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 002e.3 60 base 000003f8 limit 000003ff io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 002e.4 60 base 00000600 limit 00000607 io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 002e.4 62 base 00000610 limit 0000061f io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 002e.6 60 base 00000060 limit 00000060 io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 002e.6 62 base 00000064 limit 00000064 io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 002e.7 60 base 00000620 limit 0000063f io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 002e.8 60 base 00000800 limit 000008ff io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 002e.15 60 base 00000680 limit 0000068f io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 002e.15 62 base 00000690 limit 0000069f io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 002e.1c 60 base 00000640 limit 0000065f io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 002e.1e 60 base 00000660 limit 0000067f io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.3 20 base 00000400 limit 0000041f io (fixed)
|
|
[INFO ] DOMAIN: 00000000: Resource ranges:
|
|
[INFO ] * Base: 1000, Size: f000, Tag: 100
|
|
[DEBUG] PCI: 00:00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
|
|
[DEBUG] PCI: 00:00:19.0 18 * [0x1040 - 0x105f] limit: 105f io
|
|
[DEBUG] PCI: 00:00:1f.2 20 * [0x1060 - 0x107f] limit: 107f io
|
|
[DEBUG] PCI: 00:00:16.3 10 * [0x1080 - 0x1087] limit: 1087 io
|
|
[DEBUG] PCI: 00:00:1f.2 10 * [0x1088 - 0x108f] limit: 108f io
|
|
[DEBUG] PCI: 00:00:1f.2 18 * [0x1090 - 0x1097] limit: 1097 io
|
|
[DEBUG] PCI: 00:00:1f.2 14 * [0x1098 - 0x109b] limit: 109b io
|
|
[DEBUG] PCI: 00:00:1f.2 1c * [0x109c - 0x109f] limit: 109f io
|
|
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
|
|
[DEBUG] DOMAIN: 00000000 mem: base: 80000000 size: 0 align: 0 gran: 0 limit: efffffff
|
|
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: fffffffff
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 03 base 00000000 limit 0009ffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 04 base 00100000 limit 7fffffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 05 base 100000000 limit 67b5fffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 06 base 80000000 limit 829fffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 09 base fed90000 limit fed90fff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0a base fed91000 limit fed91fff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000100 base ff000000 limit ffffffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 03 base fec00000 limit fec00fff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 004e.0 00 base fed40000 limit fed44fff mem (fixed)
|
|
[INFO ] DOMAIN: 00000000: Resource ranges:
|
|
[INFO ] * Base: 82a00000, Size: 6d600000, Tag: 200
|
|
[INFO ] * Base: 67b600000, Size: 984a00000, Tag: 200
|
|
[DEBUG] PCI: 00:00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
|
|
[DEBUG] PCI: 00:00:02.0 10 * [0x82c00000 - 0x82ffffff] limit: 82ffffff mem
|
|
[DEBUG] PCI: 00:00:19.0 10 * [0x82a00000 - 0x82a1ffff] limit: 82a1ffff mem
|
|
[DEBUG] PCI: 00:00:14.0 10 * [0x82a20000 - 0x82a2ffff] limit: 82a2ffff mem
|
|
[DEBUG] PCI: 00:00:1b.0 10 * [0x82a30000 - 0x82a33fff] limit: 82a33fff mem
|
|
[DEBUG] PCI: 00:00:16.3 14 * [0x82a34000 - 0x82a34fff] limit: 82a34fff mem
|
|
[DEBUG] PCI: 00:00:19.0 14 * [0x82a35000 - 0x82a35fff] limit: 82a35fff mem
|
|
[DEBUG] PCI: 00:00:1f.2 24 * [0x82a36000 - 0x82a367ff] limit: 82a367ff mem
|
|
[DEBUG] PCI: 00:00:1a.0 10 * [0x82a37000 - 0x82a373ff] limit: 82a373ff mem
|
|
[DEBUG] PCI: 00:00:1d.0 10 * [0x82a38000 - 0x82a383ff] limit: 82a383ff mem
|
|
[DEBUG] PCI: 00:00:1f.3 10 * [0x82a39000 - 0x82a390ff] limit: 82a390ff mem
|
|
[DEBUG] PCI: 00:00:16.0 10 * [0x82a3a000 - 0x82a3a00f] limit: 82a3a00f mem
|
|
[DEBUG] DOMAIN: 00000000 mem: base: 80000000 size: 0 align: 0 gran: 0 limit: efffffff done
|
|
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: fffffffff done
|
|
[INFO ] === Resource allocator: DOMAIN: 00000000 - resource allocation complete ===
|
|
[DEBUG] PCI: 00:00:01.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 01 io
|
|
[DEBUG] PCI: 00:00:01.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 01 prefmem
|
|
[DEBUG] PCI: 00:00:01.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 01 mem
|
|
[DEBUG] PCI: 00:00:02.0 10 <- [0x0000000082c00000 - 0x0000000082ffffff] size 0x00400000 gran 0x16 mem64
|
|
[DEBUG] PCI: 00:00:02.0 18 <- [0x0000000090000000 - 0x000000009fffffff] size 0x10000000 gran 0x1c prefmem64
|
|
[DEBUG] PCI: 00:00:02.0 20 <- [0x0000000000001000 - 0x000000000000103f] size 0x00000040 gran 0x06 io
|
|
[DEBUG] PCI: 00:00:14.0 10 <- [0x0000000082a20000 - 0x0000000082a2ffff] size 0x00010000 gran 0x10 mem64
|
|
[DEBUG] PCI: 00:00:16.0 10 <- [0x0000000082a3a000 - 0x0000000082a3a00f] size 0x00000010 gran 0x04 mem64
|
|
[DEBUG] PCI: 00:00:16.3 10 <- [0x0000000000001080 - 0x0000000000001087] size 0x00000008 gran 0x03 io
|
|
[DEBUG] PCI: 00:00:16.3 14 <- [0x0000000082a34000 - 0x0000000082a34fff] size 0x00001000 gran 0x0c mem
|
|
[DEBUG] PCI: 00:00:19.0 10 <- [0x0000000082a00000 - 0x0000000082a1ffff] size 0x00020000 gran 0x11 mem
|
|
[DEBUG] PCI: 00:00:19.0 14 <- [0x0000000082a35000 - 0x0000000082a35fff] size 0x00001000 gran 0x0c mem
|
|
[DEBUG] PCI: 00:00:19.0 18 <- [0x0000000000001040 - 0x000000000000105f] size 0x00000020 gran 0x05 io
|
|
[DEBUG] PCI: 00:00:1a.0 10 <- [0x0000000082a37000 - 0x0000000082a373ff] size 0x00000400 gran 0x0a mem
|
|
[DEBUG] PCI: 00:00:1b.0 10 <- [0x0000000082a30000 - 0x0000000082a33fff] size 0x00004000 gran 0x0e mem64
|
|
[DEBUG] PCI: 00:00:1d.0 10 <- [0x0000000082a38000 - 0x0000000082a383ff] size 0x00000400 gran 0x0a mem
|
|
[DEBUG] PCI: 00:00:1e.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 02 io
|
|
[DEBUG] PCI: 00:00:1e.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 02 prefmem
|
|
[DEBUG] PCI: 00:00:1e.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bus 02 mem
|
|
[DEBUG] PNP: 002e.1 14 <- [0x000000000000009c - 0x000000000000009b] size 0x00000000 gran 0x00 irq
|
|
[DEBUG] PNP: 002e.1 1c <- [0x00000000000000a8 - 0x00000000000000a7] size 0x00000000 gran 0x00 irq
|
|
[DEBUG] PNP: 002e.1 1d <- [0x0000000000000008 - 0x0000000000000007] size 0x00000000 gran 0x00 irq
|
|
[DEBUG] PNP: 002e.1 22 <- [0x000000000000003f - 0x000000000000003e] size 0x00000000 gran 0x00 irq
|
|
[DEBUG] PNP: 002e.1 1a <- [0x00000000000000b0 - 0x00000000000000af] size 0x00000000 gran 0x00 irq
|
|
[DEBUG] PNP: 002e.1 1b <- [0x000000000000001e - 0x000000000000001d] size 0x00000000 gran 0x00 irq
|
|
[DEBUG] PNP: 002e.1 27 <- [0x0000000000000008 - 0x0000000000000007] size 0x00000000 gran 0x00 irq
|
|
[DEBUG] PNP: 002e.1 2a <- [0x0000000000000020 - 0x000000000000001f] size 0x00000000 gran 0x00 irq
|
|
[DEBUG] PNP: 002e.1 2d <- [0x0000000000000001 - 0x0000000000000000] size 0x00000000 gran 0x00 irq
|
|
[DEBUG] PNP: 002e.1 60 <- [0x0000000000000378 - 0x000000000000037f] size 0x00000008 gran 0x03 io
|
|
[DEBUG] PNP: 002e.1 70 <- [0x0000000000000007 - 0x0000000000000007] size 0x00000001 gran 0x00 irq
|
|
[DEBUG] PNP: 002e.1 74 <- [0x0000000000000001 - 0x0000000000000001] size 0x00000001 gran 0x00 drq
|
|
[DEBUG] PNP: 002e.3 60 <- [0x00000000000003f8 - 0x00000000000003ff] size 0x00000008 gran 0x03 io
|
|
[DEBUG] PNP: 002e.3 70 <- [0x0000000000000004 - 0x0000000000000004] size 0x00000001 gran 0x00 irq
|
|
[DEBUG] PNP: 002e.4 60 <- [0x0000000000000600 - 0x0000000000000607] size 0x00000008 gran 0x03 io
|
|
[DEBUG] PNP: 002e.4 62 <- [0x0000000000000610 - 0x000000000000061f] size 0x00000010 gran 0x04 io
|
|
[NOTE ] PNP: 002e.4 70 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.4 f0 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.4 f1 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.4 f2 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.4 f3 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.4 f4 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.4 f5 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.4 f6 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.4 f7 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.4 f8 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.4 f9 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.4 fa irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.4 fb irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.4 fc irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.4 fd irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.4 fe irq size: 0x0000000001 not assigned in devicetree
|
|
[DEBUG] PNP: 002e.5 70 <- [0x000000000000000c - 0x000000000000000c] size 0x00000001 gran 0x00 irq
|
|
[DEBUG] PNP: 002e.6 60 <- [0x0000000000000060 - 0x0000000000000060] size 0x00000001 gran 0x00 io
|
|
[DEBUG] PNP: 002e.6 62 <- [0x0000000000000064 - 0x0000000000000064] size 0x00000001 gran 0x00 io
|
|
[DEBUG] PNP: 002e.6 70 <- [0x0000000000000001 - 0x0000000000000001] size 0x00000001 gran 0x00 irq
|
|
[DEBUG] PNP: 002e.6 f0 <- [0x0000000000000040 - 0x000000000000003f] size 0x00000000 gran 0x00 drq
|
|
[DEBUG] PNP: 002e.7 60 <- [0x0000000000000620 - 0x000000000000063f] size 0x00000020 gran 0x05 io
|
|
[NOTE ] PNP: 002e.7 f8 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.7 f9 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.7 fa irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.7 fb irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.7 fc irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.7 fd irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.7 fe irq size: 0x0000000001 not assigned in devicetree
|
|
[DEBUG] PNP: 002e.8 60 <- [0x0000000000000800 - 0x00000000000008ff] size 0x00000100 gran 0x08 io
|
|
[DEBUG] PNP: 002e.8 f0 <- [0x0000000000000020 - 0x0000000000000020] size 0x00000001 gran 0x00 drq
|
|
[DEBUG] PNP: 002e.8 f1 <- [0x0000000000000001 - 0x0000000000000001] size 0x00000001 gran 0x00 drq
|
|
[DEBUG] PNP: 002e.8 f2 <- [0x0000000000000040 - 0x0000000000000040] size 0x00000001 gran 0x00 drq
|
|
[DEBUG] PNP: 002e.8 f3 <- [0x0000000000000001 - 0x0000000000000001] size 0x00000001 gran 0x00 drq
|
|
[DEBUG] PNP: 002e.8 f4 <- [0x0000000000000066 - 0x0000000000000066] size 0x00000001 gran 0x00 drq
|
|
[DEBUG] PNP: 002e.8 f5 <- [0x0000000000000067 - 0x0000000000000067] size 0x00000001 gran 0x00 drq
|
|
[DEBUG] PNP: 002e.8 f6 <- [0x0000000000000066 - 0x0000000000000066] size 0x00000001 gran 0x00 drq
|
|
[DEBUG] PNP: 002e.8 f7 <- [0x0000000000000001 - 0x0000000000000001] size 0x00000001 gran 0x00 drq
|
|
[NOTE ] PNP: 002e.8 70 irq size: 0x0000000001 not assigned in devicetree
|
|
[DEBUG] PNP: 002e.f f1 <- [0x0000000000000097 - 0x0000000000000097] size 0x00000001 gran 0x00 drq
|
|
[DEBUG] PNP: 002e.f f2 <- [0x0000000000000001 - 0x0000000000000001] size 0x00000001 gran 0x00 drq
|
|
[DEBUG] PNP: 002e.f f5 <- [0x0000000000000008 - 0x0000000000000008] size 0x00000001 gran 0x00 drq
|
|
[DEBUG] PNP: 002e.f fe <- [0x0000000000000080 - 0x0000000000000080] size 0x00000001 gran 0x00 drq
|
|
[NOTE ] PNP: 002e.f f0 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.f f3 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.f f4 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.f f6 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.f f7 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.f f8 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.f f9 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.f fa irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.f fb irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.f fc irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.f fd irq size: 0x0000000001 not assigned in devicetree
|
|
[DEBUG] PNP: 002e.15 60 <- [0x0000000000000680 - 0x000000000000068f] size 0x00000010 gran 0x04 io
|
|
[DEBUG] PNP: 002e.15 62 <- [0x0000000000000690 - 0x000000000000069f] size 0x00000010 gran 0x04 io
|
|
[NOTE ] PNP: 002e.15 70 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.15 f0 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.15 f1 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.15 f2 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.15 f3 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.15 f4 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.15 f5 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.15 f6 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.15 f7 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.15 f8 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.15 f9 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.15 fa irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.15 fb irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.15 fc irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.15 fd irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.15 fe irq size: 0x0000000001 not assigned in devicetree
|
|
[DEBUG] PNP: 002e.1c 60 <- [0x0000000000000640 - 0x000000000000065f] size 0x00000020 gran 0x05 io
|
|
[DEBUG] PNP: 002e.1e 60 <- [0x0000000000000660 - 0x000000000000067f] size 0x00000020 gran 0x05 io
|
|
[DEBUG] PNP: 002e.1e f4 <- [0x0000000000000001 - 0x0000000000000001] size 0x00000001 gran 0x00 drq
|
|
[NOTE ] PNP: 002e.1e f0 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.1e f1 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.1e f2 irq size: 0x0000000001 not assigned in devicetree
|
|
[NOTE ] PNP: 002e.1e f3 irq size: 0x0000000001 not assigned in devicetree
|
|
[DEBUG] PNP: 002e.ff 00 <- [0x000000000000002e - 0x000000000000002f] size 0x00000002 gran 0x00 io
|
|
[DEBUG] PCI: 00:00:1f.2 10 <- [0x0000000000001088 - 0x000000000000108f] size 0x00000008 gran 0x03 io
|
|
[DEBUG] PCI: 00:00:1f.2 14 <- [0x0000000000001098 - 0x000000000000109b] size 0x00000004 gran 0x02 io
|
|
[DEBUG] PCI: 00:00:1f.2 18 <- [0x0000000000001090 - 0x0000000000001097] size 0x00000008 gran 0x03 io
|
|
[DEBUG] PCI: 00:00:1f.2 1c <- [0x000000000000109c - 0x000000000000109f] size 0x00000004 gran 0x02 io
|
|
[DEBUG] PCI: 00:00:1f.2 20 <- [0x0000000000001060 - 0x000000000000107f] size 0x00000020 gran 0x05 io
|
|
[DEBUG] PCI: 00:00:1f.2 24 <- [0x0000000082a36000 - 0x0000000082a367ff] size 0x00000800 gran 0x0b mem
|
|
[DEBUG] PCI: 00:00:1f.3 10 <- [0x0000000082a39000 - 0x0000000082a390ff] size 0x00000100 gran 0x08 mem64
|
|
[INFO ] Done setting resources.
|
|
[INFO ] Done allocating resources.
|
|
[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 1 / 1599 ms
|
|
[INFO ] Enabling resources...
|
|
[DEBUG] PCI: 00:00:00.0 subsystem <- 103c/339a
|
|
[DEBUG] PCI: 00:00:00.0 cmd <- 06
|
|
[DEBUG] PCI: 00:00:01.0 bridge ctrl <- 0013
|
|
[DEBUG] PCI: 00:00:01.0 subsystem <- 103c/339a
|
|
[DEBUG] PCI: 00:00:01.0 cmd <- 00
|
|
[DEBUG] PCI: 00:00:02.0 subsystem <- 103c/339a
|
|
[DEBUG] PCI: 00:00:02.0 cmd <- 03
|
|
[DEBUG] PCI: 00:00:14.0 subsystem <- 103c/339a
|
|
[DEBUG] PCI: 00:00:14.0 cmd <- 102
|
|
[DEBUG] PCI: 00:00:16.0 subsystem <- 103c/339a
|
|
[DEBUG] PCI: 00:00:16.0 cmd <- 02
|
|
[DEBUG] PCI: 00:00:16.3 subsystem <- 103c/339a
|
|
[DEBUG] PCI: 00:00:16.3 cmd <- 03
|
|
[DEBUG] PCI: 00:00:19.0 subsystem <- 103c/339a
|
|
[DEBUG] PCI: 00:00:19.0 cmd <- 103
|
|
[DEBUG] PCI: 00:00:1a.0 subsystem <- 103c/339a
|
|
[DEBUG] PCI: 00:00:1a.0 cmd <- 102
|
|
[DEBUG] PCI: 00:00:1b.0 subsystem <- 103c/339a
|
|
[DEBUG] PCI: 00:00:1b.0 cmd <- 102
|
|
[DEBUG] PCI: 00:00:1d.0 subsystem <- 103c/339a
|
|
[DEBUG] PCI: 00:00:1d.0 cmd <- 102
|
|
[DEBUG] PCI: 00:00:1e.0 bridge ctrl <- 0013
|
|
[DEBUG] PCI: 00:00:1e.0 subsystem <- 103c/339a
|
|
[DEBUG] PCI: 00:00:1e.0 cmd <- 100
|
|
[DEBUG] PCI: 00:00:1f.0 subsystem <- 103c/339a
|
|
[DEBUG] PCI: 00:00:1f.0 cmd <- 107
|
|
[DEBUG] PCI: 00:00:1f.2 subsystem <- 103c/339a
|
|
[DEBUG] PCI: 00:00:1f.2 cmd <- 03
|
|
[DEBUG] PCI: 00:00:1f.3 subsystem <- 103c/339a
|
|
[DEBUG] PCI: 00:00:1f.3 cmd <- 103
|
|
[INFO ] done.
|
|
[DEBUG] BS: BS_DEV_ENABLE run times (exec / console): 0 / 138 ms
|
|
[INFO ] Initializing devices...
|
|
[DEBUG] CPU_CLUSTER: 0 init
|
|
[INFO ] LAPIC 0x0 in XAPIC mode.
|
|
[DEBUG] MTRR: Physical address space:
|
|
[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
|
|
[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
|
|
[DEBUG] 0x00000000000c0000 - 0x000000007fffffff size 0x7ff40000 type 6
|
|
[DEBUG] 0x0000000080000000 - 0x000000008fffffff size 0x10000000 type 0
|
|
[DEBUG] 0x0000000090000000 - 0x000000009fffffff size 0x10000000 type 1
|
|
[DEBUG] 0x00000000a0000000 - 0x00000000ffffffff size 0x60000000 type 0
|
|
[DEBUG] 0x0000000100000000 - 0x000000067b5fffff size 0x57b600000 type 6
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
|
|
[DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 36 bits
|
|
[DEBUG] MTRR: default type WB/UC MTRR counts: 4/5.
|
|
[DEBUG] MTRR: WB selected as default type.
|
|
[DEBUG] MTRR: 0 base 0x0000000080000000 mask 0x0000000ff0000000 type 0
|
|
[DEBUG] MTRR: 1 base 0x0000000090000000 mask 0x0000000ff0000000 type 1
|
|
[DEBUG] MTRR: 2 base 0x00000000a0000000 mask 0x0000000fe0000000 type 0
|
|
[DEBUG] MTRR: 3 base 0x00000000c0000000 mask 0x0000000fc0000000 type 0
|
|
|
|
[DEBUG] MTRR check
|
|
[DEBUG] Fixed MTRRs : Enabled
|
|
[DEBUG] Variable MTRRs: Enabled
|
|
|
|
[DEBUG] CPU has 4 cores, 4 threads enabled.
|
|
[DEBUG] Setting up SMI for CPU
|
|
[INFO ] Will perform SMM setup.
|
|
[DEBUG] microcode: sig=0x306a9 pf=0x2 revision=0x21
|
|
[DEBUG] FMAP: area COREBOOT found @ ae0200 (5373440 bytes)
|
|
[INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x80 size 0x6800 in mcache @0x7fffe96c
|
|
[INFO ] CPU: Intel(R) Xeon(R) CPU E3-1225 V2 @ 3.20GHz.
|
|
[INFO ] LAPIC 0x0 in XAPIC mode.
|
|
[DEBUG] CPU: APIC: 00 enabled
|
|
[DEBUG] CPU: APIC: 01 enabled
|
|
[DEBUG] CPU: APIC: 02 enabled
|
|
[DEBUG] CPU: APIC: 03 enabled
|
|
[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
|
|
[DEBUG] Processing 16 relocs. Offset value of 0x00030000
|
|
[DEBUG] Attempting to start 3 APs
|
|
[DEBUG] Waiting for 10ms after sending INIT.
|
|
[DEBUG] Waiting for SIPI to complete...
|
|
[DEBUG] done.
|
|
[DEBUG] Waiting for SIPI to complete...
|
|
[DEBUG] done.
|
|
[INFO ] LAPIC 0x2 in XAPIC mode.
|
|
[INFO ] AP: slot 1 apic_id 2, MCU rev: 0x00000021
|
|
[INFO ] LAPIC 0x6 in XAPIC mode.
|
|
[INFO ] AP: slot 3 apic_id 6, MCU rev: 0x00000021
|
|
[INFO ] LAPIC 0x4 in XAPIC mode.
|
|
[INFO ] AP: slot 2 apic_id 4, MCU rev: 0x00000021
|
|
[DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1a0 memsize: 0x1a0
|
|
[DEBUG] Processing 9 relocs. Offset value of 0x00038000
|
|
[DEBUG] smm_module_setup_stub: stack_top = 0x80001000
|
|
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
|
|
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000
|
|
[DEBUG] SMM Module: stub loaded at 38000. Will call 0x7fea226a
|
|
[DEBUG] Installing permanent SMM handler to 0x80000000
|
|
[DEBUG] HANDLER [0x802fc000-0x802fff47]
|
|
|
|
[DEBUG] CPU 0
|
|
[DEBUG] ss0 [0x802fbc00-0x802fbfff]
|
|
[DEBUG] stub0 [0x802f4000-0x802f419f]
|
|
|
|
[DEBUG] CPU 1
|
|
[DEBUG] ss1 [0x802fb800-0x802fbbff]
|
|
[DEBUG] stub1 [0x802f3c00-0x802f3d9f]
|
|
|
|
[DEBUG] CPU 2
|
|
[DEBUG] ss2 [0x802fb400-0x802fb7ff]
|
|
[DEBUG] stub2 [0x802f3800-0x802f399f]
|
|
|
|
[DEBUG] CPU 3
|
|
[DEBUG] ss3 [0x802fb000-0x802fb3ff]
|
|
[DEBUG] stub3 [0x802f3400-0x802f359f]
|
|
|
|
[DEBUG] stacks [0x80000000-0x80000fff]
|
|
[DEBUG] Loading module at 0x802fc000 with entry 0x802fc7a5. filesize: 0x3e10 memsize: 0x3f48
|
|
[DEBUG] Processing 257 relocs. Offset value of 0x802fc000
|
|
[DEBUG] FMAP: area SMMSTORE found @ aa0000 (262144 bytes)
|
|
[INFO ] Manufacturer: 20
|
|
[INFO ] SF: Detected 20 ba18 with sector size 0x1000, total 0x1000000
|
|
[DEBUG] smm store: 4 # blocks with size 0x10000
|
|
[DEBUG] Loading module at 0x802f4000 with entry 0x802f4000. filesize: 0x1a0 memsize: 0x1a0
|
|
[DEBUG] Processing 9 relocs. Offset value of 0x802f4000
|
|
[DEBUG] smm_module_setup_stub: stack_top = 0x80001000
|
|
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
|
|
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x300000
|
|
[DEBUG] SMM Module: placing smm entry code at 802f3c00, cpu # 0x1
|
|
[DEBUG] SMM Module: placing smm entry code at 802f3800, cpu # 0x2
|
|
[DEBUG] SMM Module: placing smm entry code at 802f3400, cpu # 0x3
|
|
[DEBUG] SMM Module: stub loaded at 802f4000. Will call 0x802fc7a5
|
|
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ec000, cpu = 0
|
|
[DEBUG] In relocation handler: cpu 0
|
|
[DEBUG] New SMBASE=0x802ec000 IEDBASE=0x80400000
|
|
[DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800
|
|
[DEBUG] Relocation complete.
|
|
[INFO ] microcode: Update skipped, already up-to-date
|
|
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802eb400, cpu = 3
|
|
[DEBUG] In relocation handler: cpu 3
|
|
[DEBUG] New SMBASE=0x802eb400 IEDBASE=0x80400000
|
|
[DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800
|
|
[DEBUG] Relocation complete.
|
|
[INFO ] microcode: Update skipped, already up-to-date
|
|
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ebc00, cpu = 1
|
|
[DEBUG] In relocation handler: cpu 1
|
|
[DEBUG] New SMBASE=0x802ebc00 IEDBASE=0x80400000
|
|
[DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800
|
|
[DEBUG] Relocation complete.
|
|
[INFO ] microcode: Update skipped, already up-to-date
|
|
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802eb800, cpu = 2
|
|
[DEBUG] In relocation handler: cpu 2
|
|
[DEBUG] New SMBASE=0x802eb800 IEDBASE=0x80400000
|
|
[DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800
|
|
[DEBUG] Relocation complete.
|
|
[INFO ] microcode: Update skipped, already up-to-date
|
|
[INFO ] Initializing CPU #0
|
|
[DEBUG] CPU: vendor Intel device 306a9
|
|
[DEBUG] CPU: family 06, model 3a, stepping 09
|
|
[INFO ] CPU: Intel(R) Xeon(R) CPU E3-1225 V2 @ 3.20GHz.
|
|
[INFO ] CPU: cpuid(1) 0x306a9
|
|
[INFO ] CPU: AES supported
|
|
[INFO ] CPU: TXT supported
|
|
[INFO ] CPU: VT supported
|
|
[DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled
|
|
[DEBUG] IA32_FEATURE_CONTROL already locked
|
|
[INFO ] APIC: 00: PP0 current limit not set in devicetree
|
|
[INFO ] APIC: 00: PP0 PSI0 not set in devicetree
|
|
[INFO ] APIC: 00: PP0 PSI1 not set in devicetree
|
|
[INFO ] APIC: 00: PP0 PSI2 not set in devicetree
|
|
[INFO ] APIC: 00: PP1 current limit not set in devicetree
|
|
[INFO ] APIC: 00: PP1 PSI0 not set in devicetree
|
|
[INFO ] APIC: 00: PP1 PSI1 not set in devicetree
|
|
[INFO ] APIC: 00: PP1 PSI2 not set in devicetree
|
|
[INFO ] APIC: 00: Programmable ratio limit for turbo mode is disabled
|
|
[DEBUG] cpu: energy policy set to 6
|
|
[DEBUG] model_x06ax: frequency set to 3200
|
|
[INFO ] Turbo is available but hidden
|
|
[INFO ] Turbo is available and visible
|
|
[INFO ] CPU #0 initialized
|
|
[INFO ] Initializing CPU #1
|
|
[INFO ] Initializing CPU #3
|
|
[INFO ] Initializing CPU #2
|
|
[DEBUG] CPU: vendor Intel device 306a9
|
|
[DEBUG] CPU: family 06, model 3a, stepping 09
|
|
[DEBUG] CPU: vendor Intel device 306a9
|
|
[DEBUG] CPU: family 06, model 3a, stepping 09
|
|
[DEBUG] CPU: vendor Intel device 306a9
|
|
[DEBUG] CPU: family 06, model 3a, stepping 09
|
|
[INFO ] CPU: Intel(R) Xeon(R) CPU E3-1225 V2 @ 3.20GHz.
|
|
[INFO ] CPU: Intel(R) Xeon(R) CPU E3-1225 V2 @ 3.20GHz.
|
|
[INFO ] CPU: cpuid(1) 0x306a9
|
|
[INFO ] CPU: cpuid(1) 0x306a9
|
|
[INFO ] CPU: AES supported
|
|
[INFO ] CPU: TXT supported
|
|
[INFO ] CPU: VT supported
|
|
[INFO ] CPU: Intel(R) Xeon(R) CPU E3-1225 V2 @ 3.20GHz.
|
|
[DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled
|
|
[INFO ] CPU: cpuid(1) 0x306a9
|
|
[DEBUG] IA32_FEATURE_CONTROL already locked
|
|
[INFO ] CPU: AES supported
|
|
[INFO ] CPU: TXT supported
|
|
[INFO ] CPU: VT supported
|
|
[INFO ] APIC: 04: Programmable ratio limit for turbo mode is disabled
|
|
[INFO ] CPU: AES supported
|
|
[INFO ] CPU: TXT supported
|
|
[INFO ] CPU: VT supported
|
|
[DEBUG] cpu: energy policy set to 6
|
|
[DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled
|
|
[DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled
|
|
[DEBUG] IA32_FEATURE_CONTROL already locked
|
|
[DEBUG] model_x06ax: frequency set to 3200
|
|
[INFO ] CPU #2 initialized
|
|
[INFO ] APIC: 02: Programmable ratio limit for turbo mode is disabled
|
|
[DEBUG] IA32_FEATURE_CONTROL already locked
|
|
[DEBUG] cpu: energy policy set to 6
|
|
[INFO ] APIC: 06: Programmable ratio limit for turbo mode is disabled
|
|
[DEBUG] model_x06ax: frequency set to 3200
|
|
[INFO ] CPU #1 initialized
|
|
[DEBUG] cpu: energy policy set to 6
|
|
[DEBUG] model_x06ax: frequency set to 3200
|
|
[INFO ] CPU #3 initialized
|
|
[INFO ] bsp_do_flight_plan done after 645 msecs.
|
|
[DEBUG] SMI_STS:
|
|
[DEBUG] GPE0_STS: GPIO14 GPIO10 GPIO9 GPIO7 GPIO0
|
|
[DEBUG] ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0
|
|
[DEBUG] TCO_STS:
|
|
[DEBUG] Locking SMM.
|
|
[DEBUG] CPU_CLUSTER: 0 init finished in 954 msecs
|
|
[DEBUG] PCI: 00:00:00.0 init
|
|
[DEBUG] Disabling PEG12.
|
|
[DEBUG] Disabling PEG11.
|
|
[DEBUG] Disabling Device 4.
|
|
[DEBUG] Disabling PEG60.
|
|
[DEBUG] Disabling Device 7.
|
|
[DEBUG] Set BIOS_RESET_CPL
|
|
[DEBUG] CPU TDP: 77 Watts
|
|
[DEBUG] PCI: 00:00:00.0 init finished in 22 msecs
|
|
[DEBUG] PCI: 00:00:01.0 init
|
|
[DEBUG] PCI: 00:00:01.0 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:02.0 init
|
|
[INFO ] CBFS: Found 'vbt.bin' @0x3fdc0 size 0x4c6 in mcache @0x7fffeaf4
|
|
[INFO ] Found a VBT of 3777 bytes
|
|
[INFO ] GMA: Found VBT in CBFS
|
|
[INFO ] GMA: Found valid VBT in CBFS
|
|
[DEBUG] GT Power Management Init
|
|
[DEBUG] IVB GT2 35W Power Meter Weights
|
|
[DEBUG] GT Power Management Init (post VBIOS)
|
|
[INFO ] framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
|
|
[INFO ] x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
|
|
[DEBUG] PCI: 00:00:02.0 init finished in 61 msecs
|
|
[DEBUG] PCI: 00:00:14.0 init
|
|
[DEBUG] XHCI: Setting up controller.. done.
|
|
[DEBUG] PCI: 00:00:14.0 init finished in 4 msecs
|
|
[DEBUG] PCI: 00:00:16.0 init
|
|
[DEBUG] ME: FW Partition Table : OK
|
|
[DEBUG] ME: Bringup Loader Failure : NO
|
|
[DEBUG] ME: Firmware Init Complete : YES
|
|
[DEBUG] ME: Manufacturing Mode : YES
|
|
[DEBUG] ME: Boot Options Present : NO
|
|
[DEBUG] ME: Update In Progress : NO
|
|
[DEBUG] ME: Current Working State : Normal
|
|
[DEBUG] ME: Current Operation State : M0 with UMA
|
|
[DEBUG] ME: Current Operation Mode : Normal
|
|
[DEBUG] ME: Error Code : No Error
|
|
[DEBUG] ME: Progress Phase : Host Communication
|
|
[DEBUG] ME: Power Management Event : Non-power cycle reset
|
|
[DEBUG] ME: Progress Phase State : Host communication established
|
|
[NOTE ] ME: BIOS path: Normal
|
|
[DEBUG] ME: me_state=0, me_state_prev=0
|
|
[DEBUG] ME: Extend SHA-256: 045ceae1a0ff1ada243973378d066f9de0186f2cf13911516038525e55fd66ad
|
|
[INFO ] ME: MBP item header 00020103
|
|
[INFO ] ME: MBP item header 00050102
|
|
[INFO ] ME: MBP item header 00020501
|
|
[INFO ] ME: MBP item header 00020201
|
|
[INFO ] ME: MBP item header 00020104
|
|
[ERROR] ME: unknown mbp item id 0x104! Skipping
|
|
[INFO ] ME: MBP item header 02030101
|
|
[INFO ] ME: MBP item header 02060301
|
|
[INFO ] ME: MBP item header 02090401
|
|
[DEBUG] ME: found version 8.1.31.1351
|
|
[DEBUG] ME Capability: Full Network manageability : disabled
|
|
[DEBUG] ME Capability: Regular Network manageability : enabled
|
|
[DEBUG] ME Capability: Manageability : enabled
|
|
[DEBUG] ME Capability: Small business technology : disabled
|
|
[DEBUG] ME Capability: Level III manageability : disabled
|
|
[DEBUG] ME Capability: IntelR Anti-Theft (AT) : disabled
|
|
[DEBUG] ME Capability: IntelR Capability Licensing Service (CLS) : enabled
|
|
[DEBUG] ME Capability: IntelR Power Sharing Technology (MPC) : enabled
|
|
[DEBUG] ME Capability: ICC Over Clocking : enabled
|
|
[DEBUG] ME Capability: Protected Audio Video Path (PAVP) : enabled
|
|
[DEBUG] ME Capability: IPV6 : enabled
|
|
[DEBUG] ME Capability: KVM Remote Control (KVM) : disabled
|
|
[DEBUG] ME Capability: Outbreak Containment Heuristic (OCH) : enabled
|
|
[DEBUG] ME Capability: Virtual LAN (VLAN) : enabled
|
|
[DEBUG] ME Capability: TLS : enabled
|
|
[DEBUG] ME Capability: Wireless LAN (WLAN) : disabled
|
|
[DEBUG] PCI: 00:00:16.0 init finished in 242 msecs
|
|
[DEBUG] PCI: 00:00:16.3 init
|
|
[DEBUG] PCI: 00:00:16.3 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:19.0 init
|
|
[DEBUG] PCI: 00:00:19.0 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1a.0 init
|
|
[DEBUG] EHCI: Setting up controller.. done.
|
|
[DEBUG] PCI: 00:00:1a.0 init finished in 4 msecs
|
|
[DEBUG] PCI: 00:00:1b.0 init
|
|
[DEBUG] Azalia: base = 0x82a30000
|
|
[DEBUG] Azalia: codec_mask = 09
|
|
[DEBUG] azalia_audio: initializing codec #3...
|
|
[DEBUG] azalia_audio: - vendor/device id: 0x80862806
|
|
[DEBUG] azalia_audio: - verb size: 16
|
|
[DEBUG] azalia_audio: - verb loaded
|
|
[DEBUG] azalia_audio: initializing codec #0...
|
|
[DEBUG] azalia_audio: - vendor/device id: 0x10ec0221
|
|
[DEBUG] azalia_audio: - verb size: 44
|
|
[DEBUG] azalia_audio: - verb loaded
|
|
[DEBUG] PCI: 00:00:1b.0 init finished in 48 msecs
|
|
[DEBUG] PCI: 00:00:1d.0 init
|
|
[DEBUG] EHCI: Setting up controller.. done.
|
|
[DEBUG] PCI: 00:00:1d.0 init finished in 4 msecs
|
|
[DEBUG] PCI: 00:00:1e.0 init
|
|
[DEBUG] PCI init.
|
|
[DEBUG] PCI: 00:00:1e.0 init finished in 2 msecs
|
|
[DEBUG] PCI: 00:00:1f.0 init
|
|
[DEBUG] pch: lpc_init
|
|
[INFO ] PCH: detected Q75, device id: 0x1e48, rev id 0x4
|
|
[DEBUG] IOAPIC: Initializing IOAPIC at fec00000
|
|
[DEBUG] IOAPIC: ID = 0x00
|
|
[DEBUG] IOAPIC: 24 interrupts
|
|
[DEBUG] IOAPIC: Clearing IOAPIC at fec00000
|
|
[DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00
|
|
[INFO ] Set power off after power failure.
|
|
[INFO ] NMI sources disabled.
|
|
[DEBUG] PantherPoint PM init
|
|
[DEBUG] RTC: failed = 0x0
|
|
[DEBUG] RTC Init
|
|
[DEBUG] apm_control: Disabling ACPI.
|
|
[DEBUG] APMC done.
|
|
[DEBUG] pch_spi_init
|
|
[DEBUG] PCI: 00:00:1f.0 init finished in 56 msecs
|
|
[DEBUG] PCI: 00:00:1f.2 init
|
|
[DEBUG] SATA: Initializing...
|
|
[DEBUG] SATA: Controller in AHCI mode.
|
|
[DEBUG] ABAR: 0x82a36000
|
|
[DEBUG] PCI: 00:00:1f.2 init finished in 10 msecs
|
|
[DEBUG] PCI: 00:00:1f.3 init
|
|
[DEBUG] PCI: 00:00:1f.3 init finished in 0 msecs
|
|
[DEBUG] PNP: 002e.1 init
|
|
[DEBUG] PNP: 002e.1 init finished in 0 msecs
|
|
[DEBUG] PNP: 002e.3 init
|
|
[DEBUG] PNP: 002e.3 init finished in 0 msecs
|
|
[DEBUG] PNP: 002e.4 init
|
|
[DEBUG] PNP: 002e.4 init finished in 0 msecs
|
|
[DEBUG] PNP: 002e.5 init
|
|
[DEBUG] PNP: 002e.5 init finished in 0 msecs
|
|
[DEBUG] PNP: 002e.6 init
|
|
[DEBUG] PNP: 002e.6 init finished in 0 msecs
|
|
[DEBUG] PNP: 002e.7 init
|
|
[DEBUG] PNP: 002e.7 init finished in 0 msecs
|
|
[DEBUG] PNP: 002e.8 init
|
|
[INFO ] NPCD378: PSU fan PWM 0x77
|
|
[DEBUG] PNP: 002e.8 init finished in 3 msecs
|
|
[DEBUG] PNP: 002e.f init
|
|
[DEBUG] PNP: 002e.f init finished in 0 msecs
|
|
[DEBUG] PNP: 002e.15 init
|
|
[DEBUG] PNP: 002e.15 init finished in 0 msecs
|
|
[DEBUG] PNP: 002e.1c init
|
|
[DEBUG] PNP: 002e.1c init finished in 0 msecs
|
|
[DEBUG] PNP: 002e.1e init
|
|
[DEBUG] PNP: 002e.1e init finished in 0 msecs
|
|
[INFO ] Devices initialized
|
|
[DEBUG] BS: BS_DEV_INIT run times (exec / console): 338 / 1302 ms
|
|
[DEBUG] TPM: Startup
|
|
[DEBUG] TPM: command 0x99 returned 0x0
|
|
[DEBUG] TPM: Asserting physical presence
|
|
[DEBUG] TPM: command 0x4000000a returned 0x0
|
|
[DEBUG] TPM: command 0x65 returned 0x0
|
|
[DEBUG] TPM: flags disable=0, deactivated=0, nvlocked=1
|
|
[INFO ] TPM: setup succeeded
|
|
[DEBUG] BS: BS_DEV_INIT exit times (exec / console): 50 / 29 ms
|
|
[INFO ] Finalize devices...
|
|
[DEBUG] PCI: 00:00:1f.0 final
|
|
[DEBUG] apm_control: Finalizing SMM.
|
|
[DEBUG] APMC done.
|
|
[INFO ] Devices finalized
|
|
[DEBUG] BS: BS_POST_DEVICE run times (exec / console): 46 / 16 ms
|
|
[INFO ] CBFS: Found 'fallback/dsdt.aml' @0x3d840 size 0x2537 in mcache @0x7fffeac8
|
|
[WARN ] CBFS: 'fallback/slic' not found.
|
|
[INFO ] ACPI: Writing ACPI tables at 7fe31000.
|
|
[DEBUG] ACPI: * FACS
|
|
[DEBUG] ACPI: * FACP
|
|
[DEBUG] ACPI: added table 1/32, length now 44
|
|
[DEBUG] Found 1 CPU(s) with 4 core(s) each.
|
|
[DEBUG] Supported C-states: C0 C1 C1E C3 C6
|
|
[DEBUG] PSS: 3201MHz power 77000 control 0x2400 status 0x2400
|
|
[DEBUG] PSS: 3200MHz power 77000 control 0x2000 status 0x2000
|
|
[DEBUG] PSS: 2800MHz power 64275 control 0x1c00 status 0x1c00
|
|
[DEBUG] PSS: 2400MHz power 52610 control 0x1800 status 0x1800
|
|
[DEBUG] PSS: 2000MHz power 41772 control 0x1400 status 0x1400
|
|
[DEBUG] PSS: 1600MHz power 31801 control 0x1000 status 0x1000
|
|
[INFO ] Requested C-state C7 not supported, using C6 instead
|
|
[DEBUG] Advertising ACPI C State type C1 as CPU C1
|
|
[DEBUG] Advertising ACPI C State type C2 as CPU C3
|
|
[DEBUG] Advertising ACPI C State type C3 as CPU C6
|
|
[DEBUG] PSS: 3201MHz power 77000 control 0x2400 status 0x2400
|
|
[DEBUG] PSS: 3200MHz power 77000 control 0x2000 status 0x2000
|
|
[DEBUG] PSS: 2800MHz power 64275 control 0x1c00 status 0x1c00
|
|
[DEBUG] PSS: 2400MHz power 52610 control 0x1800 status 0x1800
|
|
[DEBUG] PSS: 2000MHz power 41772 control 0x1400 status 0x1400
|
|
[DEBUG] PSS: 1600MHz power 31801 control 0x1000 status 0x1000
|
|
[INFO ] Requested C-state C7 not supported, using C6 instead
|
|
[DEBUG] Advertising ACPI C State type C1 as CPU C1
|
|
[DEBUG] Advertising ACPI C State type C2 as CPU C3
|
|
[DEBUG] Advertising ACPI C State type C3 as CPU C6
|
|
[DEBUG] PSS: 3201MHz power 77000 control 0x2400 status 0x2400
|
|
[DEBUG] PSS: 3200MHz power 77000 control 0x2000 status 0x2000
|
|
[DEBUG] PSS: 2800MHz power 64275 control 0x1c00 status 0x1c00
|
|
[DEBUG] PSS: 2400MHz power 52610 control 0x1800 status 0x1800
|
|
[DEBUG] PSS: 2000MHz power 41772 control 0x1400 status 0x1400
|
|
[DEBUG] PSS: 1600MHz power 31801 control 0x1000 status 0x1000
|
|
[INFO ] Requested C-state C7 not supported, using C6 instead
|
|
[DEBUG] Advertising ACPI C State type C1 as CPU C1
|
|
[DEBUG] Advertising ACPI C State type C2 as CPU C3
|
|
[DEBUG] Advertising ACPI C State type C3 as CPU C6
|
|
[DEBUG] PSS: 3201MHz power 77000 control 0x2400 status 0x2400
|
|
[DEBUG] PSS: 3200MHz power 77000 control 0x2000 status 0x2000
|
|
[DEBUG] PSS: 2800MHz power 64275 control 0x1c00 status 0x1c00
|
|
[DEBUG] PSS: 2400MHz power 52610 control 0x1800 status 0x1800
|
|
[DEBUG] PSS: 2000MHz power 41772 control 0x1400 status 0x1400
|
|
[DEBUG] PSS: 1600MHz power 31801 control 0x1000 status 0x1000
|
|
[INFO ] Requested C-state C7 not supported, using C6 instead
|
|
[DEBUG] Advertising ACPI C State type C1 as CPU C1
|
|
[DEBUG] Advertising ACPI C State type C2 as CPU C3
|
|
[DEBUG] Advertising ACPI C State type C3 as CPU C6
|
|
[DEBUG] PCI space above 4GB MMIO is at 0x67b600000, len = 0x984a00000
|
|
[DEBUG] Generating ACPI PIRQ entries
|
|
[DEBUG] \_SB.PCI0.LPCB.SIO0: PNP: 002e.ff
|
|
[DEBUG] PPI: Pending OS request: 0x0 (0x0)
|
|
[DEBUG] PPI: OS response: CMD 0xa5ac353f = 0x0
|
|
[INFO ] \_SB_.PCI0.TPM: LPC TPM PNP: 004e.0
|
|
[DEBUG] \_SB.PCI0.LPCB.SIO0.L010: PNP: 002e.1
|
|
[DEBUG] \_SB.PCI0.LPCB.SIO0.L030: PNP: 002e.3
|
|
[DEBUG] \_SB.PCI0.LPCB.SIO0.L040: PNP: 002e.4
|
|
[DEBUG] \_SB.PCI0.LPCB.SIO0.L050: PNP: 002e.5
|
|
[DEBUG] \_SB.PCI0.LPCB.SIO0.L060: PNP: 002e.6
|
|
[DEBUG] \_SB.PCI0.LPCB.SIO0.L070: PNP: 002e.7
|
|
[DEBUG] \_SB.PCI0.LPCB.SIO0.L080: PNP: 002e.8
|
|
[DEBUG] \_SB.PCI0.LPCB.SIO0.L0F0: PNP: 002e.f
|
|
[DEBUG] \_SB.PCI0.LPCB.SIO0.L150: PNP: 002e.15
|
|
[DEBUG] \_SB.PCI0.LPCB.SIO0.L1C0: PNP: 002e.1c
|
|
[DEBUG] \_SB.PCI0.LPCB.SIO0.L1E0: PNP: 002e.1e
|
|
[DEBUG] ACPI: * SSDT
|
|
[DEBUG] ACPI: added table 2/32, length now 52
|
|
[DEBUG] ACPI: * MCFG
|
|
[DEBUG] ACPI: added table 3/32, length now 60
|
|
[DEBUG] TCPA log created at 0x7fe21000
|
|
[DEBUG] ACPI: * TCPA
|
|
[DEBUG] ACPI: added table 4/32, length now 68
|
|
[DEBUG] IOAPIC: 24 interrupts
|
|
[DEBUG] ACPI: * APIC
|
|
[DEBUG] ACPI: added table 5/32, length now 76
|
|
[DEBUG] ACPI: * SPCR
|
|
[DEBUG] ACPI: added table 6/32, length now 84
|
|
[DEBUG] current = 7fe35fb0
|
|
[DEBUG] ACPI: * DMAR
|
|
[DEBUG] ACPI: added table 7/32, length now 92
|
|
[DEBUG] current = 7fe36070
|
|
[DEBUG] ACPI: * HPET
|
|
[DEBUG] ACPI: added table 8/32, length now 100
|
|
[INFO ] ACPI: done.
|
|
[DEBUG] ACPI tables: 20656 bytes.
|
|
[DEBUG] smbios_write_tables: 7fe19000
|
|
[DEBUG] SMBIOS firmware version is set to coreboot_version: '24.12-869-g92d77dd2e385-dirty'
|
|
[INFO ] Create SMBIOS type 16
|
|
[INFO ] Create SMBIOS type 17
|
|
[INFO ] Create SMBIOS type 20
|
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[INFO ] Root Device (HP HP Compaq Pro 6300 SFF/MT)
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[DEBUG] SMBIOS tables: 1366 bytes.
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[DEBUG] Writing table forward entry at 0x00000500
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[DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 2ff9
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[DEBUG] Writing coreboot table at 0x7fe55000
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[DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
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[DEBUG] 1. 0000000000001000-000000000009ffff: RAM
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[DEBUG] 2. 00000000000a0000-00000000000f5fff: RESERVED
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[DEBUG] 3. 00000000000f6000-00000000000f6fff: CONFIGURATION TABLES
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[DEBUG] 4. 00000000000f7000-00000000000fffff: RESERVED
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