|
|
|
|
|
[NOTE ] coreboot-24.05-5a0207e56a Mon Jul 15 05:41:57 UTC 2024 x86_32 bootblock starting (log level: 7)...
|
|
[INFO ] Timestamp - end of bootblock: 66455520
|
|
[INFO ] Timestamp - starting to load romstage: 66614560
|
|
[DEBUG] FMAP: Found "FLASH" version 1.1 at 0x710000.
|
|
[DEBUG] FMAP: base = 0xff800000 size = 0x800000 #areas = 4
|
|
[DEBUG] FMAP: area COREBOOT found @ 710200 (982528 bytes)
|
|
[INFO ] CBFS: mcache @0xfefc2e00 built for 19 files, used 0x3e0 of 0x4000 bytes
|
|
[INFO ] CBFS: Found 'fallback/romstage' @0x80 size 0x15fd8 in mcache @0xfefc2e2c
|
|
[INFO ] Timestamp - finished loading romstage: 69235096
|
|
[DEBUG] BS: bootblock times (exec / console): total (unknown) / 1 ms
|
|
|
|
|
|
[NOTE ] coreboot-24.05-5a0207e56a Mon Jul 15 05:41:57 UTC 2024 x86_32 romstage starting (log level: 7)...
|
|
[DEBUG] Setting up static southbridge registers... done.
|
|
[DEBUG] Disabling Watchdog reboot... done.
|
|
[DEBUG] Setting up static northbridge registers... done.
|
|
[DEBUG] SMBus controller enabled
|
|
[DEBUG] Setting up Chipset Initialization Registers (CIR)
|
|
[INFO ] Timestamp - before RAM initialization: 74804214
|
|
[INFO ] Intel ME early init
|
|
[INFO ] Intel ME firmware is ready
|
|
[DEBUG] ME: Requested 32MB UMA
|
|
[INFO ] Timestamp - end of postcar: 80781848
|
|
[INFO ] Timestamp - Unknown timestamp ID: 234267756
|
|
[DEBUG] CAPID0[0] = 0x010c0009
|
|
[DEBUG] CAPID0[1] = 0x00316126
|
|
[DEBUG] CAPID0[2] = 0x00440088
|
|
[DEBUG] Revision ID: 0x18
|
|
[DEBUG] Device ID: 0x44
|
|
[DEBUG] FMAP: area RW_MRC_CACHE found @ 700000 (65536 bytes)
|
|
[INFO ] Timestamp - Unknown timestamp ID: 257751682
|
|
[INFO ] Timestamp - Unknown timestamp ID: 401940823
|
|
[DEBUG] CBMEM:
|
|
[DEBUG] IMD: root @ 0x7f7ff000 254 entries.
|
|
[DEBUG] IMD: root @ 0x7f7fec00 62 entries.
|
|
[DEBUG] FMAP: area COREBOOT found @ 710200 (982528 bytes)
|
|
[DEBUG] External stage cache:
|
|
[DEBUG] IMD: root @ 0x7ffff000 254 entries.
|
|
[DEBUG] IMD: root @ 0x7fffec00 62 entries.
|
|
[DEBUG] FMAP: area RW_MRC_CACHE found @ 700000 (65536 bytes)
|
|
[DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'.
|
|
[INFO ] Manufacturer: c2
|
|
[INFO ] SF: Detected c2 2017 with sector size 0x1000, total 0x800000
|
|
[DEBUG] MRC: cache data 'RW_MRC_CACHE' needs update.
|
|
[DEBUG] MRC: updated 'RW_MRC_CACHE'.
|
|
[INFO ] Timestamp - after RAM initialization: 467606743
|
|
[DEBUG] ME: FW Partition Table : OK
|
|
[DEBUG] ME: Bringup Loader Failure : NO
|
|
[DEBUG] ME: Firmware Init Complete : NO
|
|
[DEBUG] ME: Manufacturing Mode : NO
|
|
[DEBUG] ME: Boot Options Present : NO
|
|
[DEBUG] ME: Update In Progress : NO
|
|
[DEBUG] ME: Current Working State : Normal
|
|
[DEBUG] ME: Current Operation State : Bring up
|
|
[DEBUG] ME: Current Operation Mode : Normal
|
|
[DEBUG] ME: Error Code : No Error
|
|
[DEBUG] ME: Progress Phase : BUP Phase
|
|
[DEBUG] ME: Power Management Event : Clean Moff->Mx wake
|
|
[DEBUG] ME: Progress Phase State : 0x41
|
|
[DEBUG] SMM Memory Map
|
|
[DEBUG] SMRAM : 0x7f800000 0x800000
|
|
[DEBUG] Subregion 0: 0x7f800000 0x700000
|
|
[DEBUG] Subregion 1: 0x7ff00000 0x100000
|
|
[DEBUG] Subregion 2: 0x80000000 0x0
|
|
[DEBUG] Normal boot
|
|
[INFO ] CBFS: Found 'fallback/postcar' @0x8dc00 size 0x8270 in mcache @0xfefc3084
|
|
[DEBUG] Loading module at 0x7f7ce000 with entry 0x7f7ce031. filesize: 0x7a48 memsize: 0xdd98
|
|
[DEBUG] Processing 506 relocs. Offset value of 0x7d7ce000
|
|
[INFO ] Timestamp - end of romstage: 498868685
|
|
[DEBUG] BS: romstage times (exec / console): total (unknown) / 2 ms
|
|
|
|
|
|
[NOTE ] coreboot-24.05-5a0207e56a Mon Jul 15 05:41:57 UTC 2024 x86_32 postcar starting (log level: 7)...
|
|
[INFO ] Timestamp - start of postcar: 499423196
|
|
[INFO ] Timestamp - end of postcar: 499427183
|
|
[DEBUG] Normal boot
|
|
[INFO ] Timestamp - starting to load ramstage: 499431242
|
|
[DEBUG] FMAP: area COREBOOT found @ 710200 (982528 bytes)
|
|
[INFO ] CBFS: Found 'fallback/ramstage' @0x19540 size 0x20f86 in mcache @0x7f7dd0dc
|
|
[INFO ] Timestamp - starting LZMA decompress (ignore for x86): 499445100
|
|
[INFO ] Timestamp - finished LZMA decompress (ignore for x86): 618261906
|
|
[DEBUG] Loading module at 0x7f678000 with entry 0x7f678000. filesize: 0x432a8 memsize: 0x1540c8
|
|
[DEBUG] Processing 4481 relocs. Offset value of 0x7b678000
|
|
[INFO ] Timestamp - finished loading ramstage: 618589756
|
|
[DEBUG] BS: postcar times (exec / console): total (unknown) / 0 ms
|
|
|
|
|
|
[NOTE ] coreboot-24.05-5a0207e56a Mon Jul 15 05:41:57 UTC 2024 x86_32 ramstage starting (log level: 7)...
|
|
[INFO ] Timestamp - start of ramstage: 618792719
|
|
[DEBUG] Normal boot
|
|
[INFO ] Timestamp - device enumeration: 618797845
|
|
[DEBUG] Disabling PEG10.
|
|
[INFO ] Enumerating buses...
|
|
[DEBUG] Root Device scanning...
|
|
[DEBUG] CPU_CLUSTER: 0 enabled
|
|
[DEBUG] DOMAIN: 00000000 enabled
|
|
[DEBUG] DOMAIN: 00000000 scanning...
|
|
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 00
|
|
[DEBUG] PCI: 00:00:00.0 [8086/0044] enabled
|
|
[DEBUG] PCI: 00:00:02.0 [8086/0046] enabled
|
|
[DEBUG] PCI: 00:00:16.0 [8086/3b64] enabled
|
|
[DEBUG] PCI: 00:00:16.1: Disabling device
|
|
[DEBUG] PCI: 00:00:16.2: Disabling device
|
|
[DEBUG] PCI: 00:00:16.3: Disabling device
|
|
[DEBUG] PCI: 00:00:19.0 [8086/10ea] enabled
|
|
[DEBUG] PCI: 00:00:1a.0 [8086/3b3c] enabled
|
|
[DEBUG] PCI: 00:00:1b.0 [8086/3b56] enabled
|
|
[DEBUG] PCI: 00:00:1c.0 subordinate bus PCI Express
|
|
[DEBUG] PCI: 00:00:1c.0 [8086/3b42] enabled
|
|
[DEBUG] PCI: 00:00:1c.1 subordinate bus PCI Express
|
|
[DEBUG] PCI: 00:00:1c.1 [8086/3b44] enabled
|
|
[DEBUG] PCI: 00:00:1c.2: Disabling device
|
|
[DEBUG] PCI: 00:00:1c.2 [8086/3b46] disabled No operations
|
|
[DEBUG] PCI: 00:00:1c.3 subordinate bus PCI Express
|
|
[DEBUG] PCI: 00:00:1c.3 [8086/3b48] enabled
|
|
[DEBUG] PCI: 00:00:1c.4 subordinate bus PCI Express
|
|
[DEBUG] PCI: 00:00:1c.4 [8086/3b4a] enabled
|
|
[DEBUG] PCI: 00:00:1c.5: Disabling device
|
|
[DEBUG] PCI: 00:00:1c.5 [8086/3b4c] disabled No operations
|
|
[DEBUG] PCI: 00:00:1c.6: Disabling device
|
|
[DEBUG] PCI: 00:00:1c.6 [8086/3b4e] disabled No operations
|
|
[DEBUG] PCI: 00:00:1c.7: Disabling device
|
|
[DEBUG] PCI: 00:00:1c.7 [8086/3b50] disabled No operations
|
|
[DEBUG] PCI: 00:00:1d.0 [8086/3b34] enabled
|
|
[DEBUG] PCI: 00:00:1e.0 [8086/2448] enabled
|
|
[DEBUG] PCI: 00:00:1f.0 [8086/3b07] enabled
|
|
[DEBUG] PCI: 00:00:1f.2 [8086/3b2e] enabled
|
|
[DEBUG] PCI: 00:00:1f.3 [8086/3b30] enabled
|
|
[DEBUG] PCI: 00:00:1f.4: Disabling device
|
|
[DEBUG] PCI: 00:00:1f.5: Disabling device
|
|
[DEBUG] PCI: 00:00:1f.5 [8086/3b2d] disabled No operations
|
|
[DEBUG] PCI: 00:00:1f.6 [8086/3b32] enabled
|
|
[WARN ] PCI: Leftover static devices:
|
|
[WARN ] PCI: 00:00:01.0
|
|
[WARN ] PCI: 00:00:16.1
|
|
[WARN ] PCI: 00:00:16.2
|
|
[WARN ] PCI: 00:00:16.3
|
|
[WARN ] PCI: 00:00:1f.4
|
|
[WARN ] PCI: Check your devicetree.cb.
|
|
[DEBUG] PCI: 00:00:1c.0 scanning...
|
|
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 01
|
|
[INFO ] PCI: 00:00:1c.0: Setting Max_Payload_Size to 128 for devices under this root port
|
|
[DEBUG] scan_bus: bus PCI: 00:00:1c.0 finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1c.1 scanning...
|
|
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 02
|
|
[INFO ] PCI: 00:00:1c.1: Setting Max_Payload_Size to 128 for devices under this root port
|
|
[DEBUG] scan_bus: bus PCI: 00:00:1c.1 finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1c.3 scanning...
|
|
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 03
|
|
[INFO ] PCI: 00:00:1c.3: Setting Max_Payload_Size to 128 for devices under this root port
|
|
[DEBUG] scan_bus: bus PCI: 00:00:1c.3 finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1c.4 scanning...
|
|
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 04
|
|
[DEBUG] PCI: 00:04:00.0 [8086/0085] enabled
|
|
[INFO ] Enabling Common Clock Configuration
|
|
[INFO ] ASPM: Enabled L1
|
|
[DEBUG] PCI: 00:04:00.0: No LTR support
|
|
[INFO ] PCI: 00:00:1c.4: Setting Max_Payload_Size to 128 for devices under this root port
|
|
[DEBUG] scan_bus: bus PCI: 00:00:1c.4 finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1e.0 scanning...
|
|
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 05
|
|
[DEBUG] scan_bus: bus PCI: 00:00:1e.0 finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1f.0 scanning...
|
|
[DEBUG] PNP: 164e.3 enabled
|
|
[DEBUG] PNP: 164e.2 disabled
|
|
[DEBUG] PNP: 164e.7 disabled
|
|
[DEBUG] PNP: 164e.19 disabled
|
|
[INFO ] Found TPM 1.2 ST33ZP24 (0x0000) by ST Microelectronics (0x104a)
|
|
[DEBUG] PNP: 0c31.0 enabled
|
|
[INFO ] PMH7: ID 04 Revision 20
|
|
[DEBUG] PNP: 00ff.1 enabled
|
|
[INFO ] H8: EC Firmware ID 6QHT33WW-3.18, Version 4.01B
|
|
[INFO ] H8: BDC not installed
|
|
[INFO ] H8: WWAN detection not implemented. Assuming WWAN installed
|
|
[DEBUG] dock is not connected
|
|
[DEBUG] PNP: 00ff.2 enabled
|
|
[DEBUG] scan_bus: bus PCI: 00:00:1f.0 finished in 6 msecs
|
|
[DEBUG] PCI: 00:00:1f.3 scanning...
|
|
[DEBUG] I2C: 01:54 enabled
|
|
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:55 enabled
|
|
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:56 enabled
|
|
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:57 enabled
|
|
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:5c enabled
|
|
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:5d enabled
|
|
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:5e enabled
|
|
[DEBUG] bus: PCI: 00:00:1f.3->I2C: 01:5f enabled
|
|
[DEBUG] bus: PCI: 00:00:1f.3->scan_bus: bus PCI: 00:00:1f.3 finished in 0 msecs
|
|
[DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 7 msecs
|
|
[DEBUG] scan_bus: bus Root Device finished in 7 msecs
|
|
[INFO ] done
|
|
[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 0 ms
|
|
[INFO ] Timestamp - device configuration: 639109900
|
|
[DEBUG] found VGA at PCI: 00:00:02.0
|
|
[DEBUG] Setting up VGA for PCI: 00:00:02.0
|
|
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000
|
|
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
|
|
[INFO ] Allocating resources...
|
|
[INFO ] Reading resources...
|
|
[DEBUG] Adding PCIe enhanced config space BAR 0xe0000000-0xf0000000.
|
|
[DEBUG] ram_before_4g_top: 0x7f800000
|
|
[DEBUG] TOUUD: 0x2780
|
|
[INFO ] Available memory above 4GB: 6016M
|
|
[ERROR] PNP: 00ff.1 missing read_resources
|
|
[ERROR] PNP: 00ff.2 missing read_resources
|
|
[INFO ] Done reading resources.
|
|
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) ===
|
|
[DEBUG] PCI: 00:00:1c.4 io: size: 0 align: 12 gran: 12 limit: ffff
|
|
[DEBUG] PCI: 00:00:1c.4 io: size: 0 align: 12 gran: 12 limit: ffff done
|
|
[DEBUG] PCI: 00:00:1c.4 mem: size: 0 align: 20 gran: 20 limit: ffffffff
|
|
[DEBUG] PCI: 00:04:00.0 10 * [0x0 - 0x1fff] mem
|
|
[DEBUG] PCI: 00:00:1c.4 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
|
|
[DEBUG] PCI: 00:00:1c.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
|
[DEBUG] PCI: 00:00:1c.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
|
|
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) ===
|
|
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000200 base 00001600 limit 0000167b io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000300 base 000015e0 limit 000015eb io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000400 base 00001680 limit 0000169b io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 164e.3 60 base 00000200 limit 00000207 io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.3 20 base 00000400 limit 0000041f io (fixed)
|
|
[INFO ] DOMAIN: 00000000: Resource ranges:
|
|
[INFO ] * Base: 1000, Size: 5e0, Tag: 100
|
|
[INFO ] * Base: 15f0, Size: 10, Tag: 100
|
|
[INFO ] * Base: 167c, Size: 4, Tag: 100
|
|
[INFO ] * Base: 169c, Size: e964, Tag: 100
|
|
[DEBUG] PCI: 00:00:19.0 18 * [0xffe0 - 0xffff] limit: ffff io
|
|
[DEBUG] PCI: 00:00:1f.2 20 * [0xffc0 - 0xffdf] limit: ffdf io
|
|
[DEBUG] PCI: 00:00:02.0 20 * [0xffb8 - 0xffbf] limit: ffbf io
|
|
[DEBUG] PCI: 00:00:1f.2 10 * [0xffb0 - 0xffb7] limit: ffb7 io
|
|
[DEBUG] PCI: 00:00:1f.2 18 * [0xffa8 - 0xffaf] limit: ffaf io
|
|
[DEBUG] PCI: 00:00:1f.2 14 * [0xffa4 - 0xffa7] limit: ffa7 io
|
|
[DEBUG] PCI: 00:00:1f.2 1c * [0xffa0 - 0xffa3] limit: ffa3 io
|
|
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
|
|
[DEBUG] DOMAIN: 00000000 mem: base: 7f800000 size: 0 align: 0 gran: 0 limit: fdffffff
|
|
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: fffffffff
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 50 base e0000000 limit efffffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 03 base 00000000 limit 0009ffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 04 base 00100000 limit 7f7fffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 05 base 7f800000 limit 7fffffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 06 base 80000000 limit 81bfffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 07 base 81c00000 limit 81ffffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 08 base 82000000 limit 83ffffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 09 base 100000000 limit 277ffffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0a base 1fc000000 limit 1ffffffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0b base fed00000 limit fedfffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0c base 000a0000 limit 000bffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0d base 000c0000 limit 000fffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:02.0 18 base d0000000 limit dfffffff prefmem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 10000100 base ff800000 limit ffffffff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 03 base fec00000 limit fec00fff mem (fixed)
|
|
[DEBUG] avoid_fixed_resources: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
|
|
[INFO ] DOMAIN: 00000000: Resource ranges:
|
|
[INFO ] * Base: 84000000, Size: 4c000000, Tag: 200
|
|
[INFO ] * Base: f0000000, Size: e000000, Tag: 200
|
|
[INFO ] * Base: 278000000, Size: d88000000, Tag: 200
|
|
[DEBUG] PCI: 00:00:02.0 10 * [0xfdc00000 - 0xfdffffff] limit: fdffffff mem
|
|
[DEBUG] PCI: 00:00:1c.4 20 * [0xfdb00000 - 0xfdbfffff] limit: fdbfffff mem
|
|
[DEBUG] PCI: 00:00:19.0 10 * [0xfdae0000 - 0xfdafffff] limit: fdafffff mem
|
|
[DEBUG] PCI: 00:00:1b.0 10 * [0xfdadc000 - 0xfdadffff] limit: fdadffff mem
|
|
[DEBUG] PCI: 00:00:19.0 14 * [0xfdadb000 - 0xfdadbfff] limit: fdadbfff mem
|
|
[DEBUG] PCI: 00:00:1f.6 10 * [0xfdada000 - 0xfdadafff] limit: fdadafff mem
|
|
[DEBUG] PCI: 00:00:1f.2 24 * [0xfdad9000 - 0xfdad97ff] limit: fdad97ff mem
|
|
[DEBUG] PCI: 00:00:1a.0 10 * [0xfdad8000 - 0xfdad83ff] limit: fdad83ff mem
|
|
[DEBUG] PCI: 00:00:1d.0 10 * [0xfdad7000 - 0xfdad73ff] limit: fdad73ff mem
|
|
[DEBUG] PCI: 00:00:1f.3 10 * [0xfdad6000 - 0xfdad60ff] limit: fdad60ff mem
|
|
[DEBUG] PCI: 00:00:16.0 10 * [0xfdad5000 - 0xfdad500f] limit: fdad500f mem
|
|
[DEBUG] DOMAIN: 00000000 mem: base: 7f800000 size: 0 align: 0 gran: 0 limit: fdffffff done
|
|
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: fffffffff done
|
|
[DEBUG] PCI: 00:04:00.0 10 * [0xfdb00000 - 0xfdb01fff] limit: fdb01fff mem
|
|
[INFO ] === Resource allocator: DOMAIN: 00000000 - resource allocation complete ===
|
|
[DEBUG] PCI: 00:00:02.0 10 <- [0x00000000fdc00000 - 0x00000000fdffffff] size 0x00400000 gran 0x16 mem64
|
|
[DEBUG] PCI: 00:00:02.0 20 <- [0x000000000000ffb8 - 0x000000000000ffbf] size 0x00000008 gran 0x03 io
|
|
[DEBUG] PCI: 00:00:16.0 10 <- [0x00000000fdad5000 - 0x00000000fdad500f] size 0x00000010 gran 0x04 mem64
|
|
[DEBUG] PCI: 00:00:19.0 10 <- [0x00000000fdae0000 - 0x00000000fdafffff] size 0x00020000 gran 0x11 mem
|
|
[DEBUG] PCI: 00:00:19.0 14 <- [0x00000000fdadb000 - 0x00000000fdadbfff] size 0x00001000 gran 0x0c mem
|
|
[DEBUG] PCI: 00:00:19.0 18 <- [0x000000000000ffe0 - 0x000000000000ffff] size 0x00000020 gran 0x05 io
|
|
[DEBUG] PCI: 00:00:1a.0 10 <- [0x00000000fdad8000 - 0x00000000fdad83ff] size 0x00000400 gran 0x0a mem
|
|
[DEBUG] PCI: 00:00:1b.0 10 <- [0x00000000fdadc000 - 0x00000000fdadffff] size 0x00004000 gran 0x0e mem64
|
|
[DEBUG] PCI: 00:00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 buio
|
|
[DEBUG] PCI: 00:00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
|
|
[DEBUG] PCI: 00:00:1c.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bumem
|
|
[DEBUG] PCI: 00:00:1c.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 buio
|
|
[DEBUG] PCI: 00:00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
|
|
[DEBUG] PCI: 00:00:1c.1 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bumem
|
|
[DEBUG] PCI: 00:00:1c.3 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 buio
|
|
[DEBUG] PCI: 00:00:1c.3 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
|
|
[DEBUG] PCI: 00:00:1c.3 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bumem
|
|
[DEBUG] PCI: 00:00:1c.4 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 buio
|
|
[DEBUG] PCI: 00:00:1c.4 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
|
|
[DEBUG] PCI: 00:00:1c.4 20 <- [0x00000000fdb00000 - 0x00000000fdbfffff] size 0x00100000 gran 0x14 seg 00 bumem
|
|
[DEBUG] PCI: 00:04:00.0 10 <- [0x00000000fdb00000 - 0x00000000fdb01fff] size 0x00002000 gran 0x0d mem64
|
|
[DEBUG] PCI: 00:00:1d.0 10 <- [0x00000000fdad7000 - 0x00000000fdad73ff] size 0x00000400 gran 0x0a mem
|
|
[DEBUG] PCI: 00:00:1e.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 buio
|
|
[DEBUG] PCI: 00:00:1e.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
|
|
[DEBUG] PCI: 00:00:1e.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bumem
|
|
[DEBUG] PNP: 164e.3 60 <- [0x0000000000000200 - 0x0000000000000207] size 0x00000008 gran 0x03 io
|
|
[DEBUG] PNP: 164e.3 29 <- [0x00000000000000b0 - 0x00000000000000af] size 0x00000000 gran 0x00 irq
|
|
[DEBUG] PNP: 164e.3 70 <- [0x0000000000000005 - 0x0000000000000005] size 0x00000001 gran 0x00 irq
|
|
[DEBUG] PNP: 164e.3 f0 <- [0x0000000000000082 - 0x0000000000000081] size 0x00000000 gran 0x00 irq
|
|
[ERROR] PNP: 00ff.1 missing set_resources
|
|
[ERROR] PNP: 00ff.2 missing set_resources
|
|
[DEBUG] PCI: 00:00:1f.2 10 <- [0x000000000000ffb0 - 0x000000000000ffb7] size 0x00000008 gran 0x03 io
|
|
[DEBUG] PCI: 00:00:1f.2 14 <- [0x000000000000ffa4 - 0x000000000000ffa7] size 0x00000004 gran 0x02 io
|
|
[DEBUG] PCI: 00:00:1f.2 18 <- [0x000000000000ffa8 - 0x000000000000ffaf] size 0x00000008 gran 0x03 io
|
|
[DEBUG] PCI: 00:00:1f.2 1c <- [0x000000000000ffa0 - 0x000000000000ffa3] size 0x00000004 gran 0x02 io
|
|
[DEBUG] PCI: 00:00:1f.2 20 <- [0x000000000000ffc0 - 0x000000000000ffdf] size 0x00000020 gran 0x05 io
|
|
[DEBUG] PCI: 00:00:1f.2 24 <- [0x00000000fdad9000 - 0x00000000fdad97ff] size 0x00000800 gran 0x0b mem
|
|
[DEBUG] PCI: 00:00:1f.3 10 <- [0x00000000fdad6000 - 0x00000000fdad60ff] size 0x00000100 gran 0x08 mem64
|
|
[DEBUG] PCI: 00:00:1f.6 10 <- [0x00000000fdada000 - 0x00000000fdadafff] size 0x00001000 gran 0x0c mem64
|
|
[INFO ] Done setting resources.
|
|
[INFO ] Done allocating resources.
|
|
[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 2 / 0 ms
|
|
[INFO ] Timestamp - device enable: 644306823
|
|
[INFO ] Enabling resources...
|
|
[DEBUG] PCI: 00:00:00.0 subsystem <- 17aa/2193
|
|
[DEBUG] PCI: 00:00:00.0 cmd <- 06
|
|
[DEBUG] PCI: 00:00:02.0 subsystem <- 17aa/215a
|
|
[DEBUG] PCI: 00:00:02.0 cmd <- 03
|
|
[DEBUG] PCI: 00:00:16.0 subsystem <- 8086/3b64
|
|
[DEBUG] PCI: 00:00:16.0 cmd <- 02
|
|
[DEBUG] PCI: 00:00:19.0 subsystem <- 17aa/2153
|
|
[DEBUG] PCI: 00:00:19.0 cmd <- 103
|
|
[DEBUG] PCI: 00:00:1a.0 subsystem <- 17aa/2163
|
|
[DEBUG] PCI: 00:00:1a.0 cmd <- 102
|
|
[DEBUG] PCI: 00:00:1b.0 subsystem <- 17aa/215e
|
|
[DEBUG] PCI: 00:00:1b.0 cmd <- 102
|
|
[DEBUG] PCI: 00:00:1c.0 bridge ctrl <- 0013
|
|
[DEBUG] PCI: 00:00:1c.0 cmd <- 100
|
|
[DEBUG] PCI: 00:00:1c.1 bridge ctrl <- 0013
|
|
[DEBUG] PCI: 00:00:1c.1 cmd <- 100
|
|
[DEBUG] PCI: 00:00:1c.3 bridge ctrl <- 0013
|
|
[DEBUG] PCI: 00:00:1c.3 cmd <- 100
|
|
[DEBUG] PCI: 00:00:1c.4 bridge ctrl <- 0013
|
|
[DEBUG] PCI: 00:00:1c.4 cmd <- 102
|
|
[DEBUG] PCI: 00:00:1d.0 subsystem <- 17aa/2163
|
|
[DEBUG] PCI: 00:00:1d.0 cmd <- 102
|
|
[DEBUG] PCI: 00:00:1e.0 bridge ctrl <- 0013
|
|
[DEBUG] PCI: 00:00:1e.0 cmd <- 100
|
|
[DEBUG] PCI: 00:00:1f.0 subsystem <- 17aa/2166
|
|
[DEBUG] PCI: 00:00:1f.0 cmd <- 107
|
|
[DEBUG] PCI: 00:00:1f.2 subsystem <- 17aa/2168
|
|
[DEBUG] PCI: 00:00:1f.2 cmd <- 03
|
|
[DEBUG] PCI: 00:00:1f.3 subsystem <- 17aa/2167
|
|
[DEBUG] PCI: 00:00:1f.3 cmd <- 103
|
|
[DEBUG] PCI: 00:00:1f.6 subsystem <- 8086/3b32
|
|
[DEBUG] PCI: 00:00:1f.6 cmd <- 02
|
|
[DEBUG] PCI: 00:04:00.0 cmd <- 02
|
|
[INFO ] done.
|
|
[INFO ] Timestamp - device initialization: 644796839
|
|
[INFO ] Initializing devices...
|
|
[DEBUG] CPU_CLUSTER: 0 init
|
|
[INFO ] LAPIC 0x0 in XAPIC mode.
|
|
[DEBUG] MTRR: Physical address space:
|
|
[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
|
|
[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
|
|
[DEBUG] 0x00000000000c0000 - 0x000000007f7fffff size 0x7f740000 type 6
|
|
[DEBUG] 0x000000007f800000 - 0x00000000cfffffff size 0x50800000 type 0
|
|
[DEBUG] 0x00000000d0000000 - 0x00000000dfffffff size 0x10000000 type 1
|
|
[DEBUG] 0x00000000e0000000 - 0x00000000ffffffff size 0x20000000 type 0
|
|
[DEBUG] 0x0000000100000000 - 0x0000000277ffffff size 0x178000000 type 6
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
|
|
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
|
|
[DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 36 bits
|
|
[DEBUG] MTRR: default type WB/UC MTRR counts: 5/5.
|
|
[DEBUG] MTRR: UC selected as default type.
|
|
[DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
|
|
[DEBUG] MTRR: 1 base 0x000000007f800000 mask 0x0000000fff800000 type 0
|
|
[DEBUG] MTRR: 2 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1
|
|
[DEBUG] MTRR: 3 base 0x0000000100000000 mask 0x0000000f00000000 type 6
|
|
[DEBUG] MTRR: 4 base 0x0000000200000000 mask 0x0000000f80000000 type 6
|
|
|
|
[DEBUG] MTRR check
|
|
[DEBUG] Fixed MTRRs : Enabled
|
|
[DEBUG] Variable MTRRs: Enabled
|
|
|
|
[DEBUG] CPU has 2 cores, 4 threads enabled.
|
|
[DEBUG] Setting up SMI for CPU
|
|
[INFO ] Will perform SMM setup.
|
|
[DEBUG] microcode: sig=0x20655 pf=0x10 revision=0x7
|
|
[DEBUG] FMAP: area COREBOOT found @ 710200 (982528 bytes)
|
|
[INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x16100 size 0x3400 in mcache @0x7f7dd0ac
|
|
[INFO ] CPU: Intel(R) Core(TM) i5 CPU M 560 @ 2.67GHz.
|
|
[INFO ] LAPIC 0x0 in XAPIC mode.
|
|
[DEBUG] CPU: APIC: 00 enabled
|
|
[DEBUG] CPU: APIC: 01 enabled
|
|
[DEBUG] CPU: APIC: 02 enabled
|
|
[DEBUG] CPU: APIC: 03 enabled
|
|
[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
|
|
[DEBUG] Processing 16 relocs. Offset value of 0x00030000
|
|
[DEBUG] Attempting to start 3 APs
|
|
[DEBUG] Waiting for 10ms after sending INIT.
|
|
[DEBUG] Waiting for SIPI to complete...
|
|
[DEBUG] done.
|
|
[DEBUG] Waiting for SIPI to complete...
|
|
[INFO ] LAPIC 0x1 in XAPIC mode.
|
|
[DEBUG] done.
|
|
[INFO ] AP: slot 1 apic_id 1, MCU rev: 0x00000007
|
|
[INFO ] LAPIC 0x5 in XAPIC mode.
|
|
[INFO ] LAPIC 0x4 in XAPIC mode.
|
|
[INFO ] AP: slot 2 apic_id 5, MCU rev: 0x00000007
|
|
[INFO ] AP: slot 3 apic_id 4, MCU rev: 0x00000007
|
|
[DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x198 memsize: 0x198
|
|
[DEBUG] Processing 9 relocs. Offset value of 0x00038000
|
|
[DEBUG] smm_module_setup_stub: stack_top = 0x7f801000
|
|
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
|
|
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000
|
|
[DEBUG] SMM Module: stub loaded at 38000. Will call 0x7f6a0f3c
|
|
[DEBUG] Installing permanent SMM handler to 0x7f800000
|
|
[DEBUG] HANDLER [0x7feff000-0x7feffee0]
|
|
|
|
[DEBUG] CPU 0
|
|
[DEBUG] ss0 [0x7fefec00-0x7feff000]
|
|
[DEBUG] stub0 [0x7fef7000-0x7fef7198]
|
|
|
|
[DEBUG] CPU 1
|
|
[DEBUG] ss1 [0x7fefe800-0x7fefec00]
|
|
[DEBUG] stub1 [0x7fef6c00-0x7fef6d98]
|
|
|
|
[DEBUG] CPU 2
|
|
[DEBUG] ss2 [0x7fefe400-0x7fefe800]
|
|
[DEBUG] stub2 [0x7fef6800-0x7fef6998]
|
|
|
|
[DEBUG] CPU 3
|
|
[DEBUG] ss3 [0x7fefe000-0x7fefe400]
|
|
[DEBUG] stub3 [0x7fef6400-0x7fef6598]
|
|
|
|
[DEBUG] stacks [0x7f800000-0x7f801000]
|
|
[DEBUG] Loading module at 0x7feff000 with entry 0x7feff358. filesize: 0xec8 memsize: 0xee0
|
|
[DEBUG] Processing 48 relocs. Offset value of 0x7feff000
|
|
[DEBUG] Loading module at 0x7fef7000 with entry 0x7fef7000. filesize: 0x198 memsize: 0x198
|
|
[DEBUG] Processing 9 relocs. Offset value of 0x7fef7000
|
|
[DEBUG] smm_module_setup_stub: stack_top = 0x7f801000
|
|
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
|
|
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x700000
|
|
[DEBUG] SMM Module: placing smm entry code at 7fef6c00, cpu # 0x1
|
|
[DEBUG] SMM Module: placing smm entry code at 7fef6800, cpu # 0x2
|
|
[DEBUG] SMM Module: placing smm entry code at 7fef6400, cpu # 0x3
|
|
[DEBUG] SMM Module: stub loaded at 7fef7000. Will call 0x7feff358
|
|
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feef000, cpu = 0
|
|
[DEBUG] In relocation handler: cpu 0
|
|
[DEBUG] New SMBASE=0x7feef000
|
|
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
|
|
[DEBUG] Relocation complete.
|
|
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feeec00, cpu = 1
|
|
[INFO ] microcode: Update skipped, already up-to-date
|
|
[DEBUG] In relocation handler: cpu 1
|
|
[DEBUG] New SMBASE=0x7feeec00
|
|
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
|
|
[DEBUG] Relocation complete.
|
|
[INFO ] microcode: Update skipped, already up-to-date
|
|
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feee800, cpu = 2
|
|
[DEBUG] In relocation handler: cpu 2
|
|
[DEBUG] New SMBASE=0x7feee800
|
|
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
|
|
[DEBUG] Relocation complete.
|
|
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7feee400, cpu = 3
|
|
[INFO ] microcode: Update skipped, already up-to-date
|
|
[DEBUG] In relocation handler: cpu 3
|
|
[DEBUG] New SMBASE=0x7feee400
|
|
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
|
|
[DEBUG] Relocation complete.
|
|
[INFO ] microcode: Update skipped, already up-to-date
|
|
[INFO ] Initializing CPU #0
|
|
[DEBUG] CPU: vendor Intel device 20655
|
|
[DEBUG] CPU: family 06, model 25, stepping 05
|
|
[INFO ] CPU: Intel(R) Core(TM) i5 CPU M 560 @ 2.67GHz.
|
|
[INFO ] CPU:lapic=0, boot_cpu=1
|
|
[DEBUG] VMX status: enabled
|
|
[DEBUG] IA32_FEATURE_CONTROL status: locked
|
|
[DEBUG] model_x065x: frequency set to 2660
|
|
[INFO ] Turbo is available and visible
|
|
[INFO ] CPU #0 initialized
|
|
[INFO ] Initializing CPU #1
|
|
[INFO ] Initializing CPU #2
|
|
[DEBUG] CPU: vendor Intel device 20655
|
|
[DEBUG] CPU: family 06, model 25, stepping 05
|
|
[INFO ] Initializing CPU #3
|
|
[DEBUG] CPU: vendor Intel device 20655
|
|
[DEBUG] CPU: vendor Intel device 20655
|
|
[DEBUG] CPU: family 06, model 25, stepping 05
|
|
[INFO ] CPU: Intel(R) Core(TM) i5 CPU M 560 @ 2.67GHz.
|
|
[INFO ] CPU:lapic=1, boot_cpu=0
|
|
[DEBUG] CPU: family 06, model 25, stepping 05
|
|
[DEBUG] VMX status: enabled
|
|
[INFO ] CPU: Intel(R) Core(TM) i5 CPU M 560 @ 2.67GHz.
|
|
[DEBUG] IA32_FEATURE_CONTROL status: locked
|
|
[INFO ] CPU: Intel(R) Core(TM) i5 CPU M 560 @ 2.67GHz.
|
|
[INFO ] CPU:lapic=4, boot_cpu=0
|
|
[INFO ] CPU:lapic=5, boot_cpu=0
|
|
[DEBUG] VMX status: enabled
|
|
[DEBUG] model_x065x: frequency set to 2660
|
|
[DEBUG] IA32_FEATURE_CONTROL status: locked
|
|
[DEBUG] VMX status: enabled
|
|
[INFO ] CPU #1 initialized
|
|
[DEBUG] IA32_FEATURE_CONTROL status: locked
|
|
[DEBUG] model_x065x: frequency set to 2660
|
|
[INFO ] CPU #3 initialized
|
|
[DEBUG] model_x065x: frequency set to 2660
|
|
[INFO ] CPU #2 initialized
|
|
[INFO ] bsp_do_flight_plan done after 4 msecs.
|
|
[DEBUG] SMI_STS:
|
|
[DEBUG] GPE0_STS: GPIO14 GPIO11 GPIO9 GPIO5 GPIO4 GPIO3 GPIO2 GPIO0
|
|
[DEBUG] ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI2 GPI1 GPI0
|
|
[DEBUG] TCO_STS:
|
|
[DEBUG] Locking SMM.
|
|
[DEBUG] CPU_CLUSTER: 0 init finished in 15 msecs
|
|
[DEBUG] PCI: 00:00:00.0 init
|
|
[DEBUG] PCI: 00:00:00.0 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:02.0 init
|
|
[INFO ] CBFS: Found 'vbt.bin' @0x8cf00 size 0x632 in mcache @0x7f7dd22c
|
|
[INFO ] Timestamp - starting LZMA decompress (ignore for x86): 685610104
|
|
[INFO ] Timestamp - finished LZMA decompress (ignore for x86): 687154988
|
|
[INFO ] Found a VBT of 4309 bytes
|
|
[INFO ] GMA: Found VBT in CBFS
|
|
[INFO ] GMA: Found valid VBT in CBFS
|
|
[INFO ] framebuffer_info: bytes_per_line: 5120, bits_per_pixel: 32
|
|
[INFO ] x_res x y_res: 1280 x 800, size: 4096000 at 0xd0000000
|
|
[DEBUG] GT Power Management Init (post VBIOS)
|
|
[DEBUG] PCI: 00:00:02.0 init finished in 219 msecs
|
|
[DEBUG] PCI: 00:00:16.0 init
|
|
[DEBUG] ME: FW Partition Table : OK
|
|
[DEBUG] ME: Bringup Loader Failure : NO
|
|
[DEBUG] ME: Firmware Init Complete : NO
|
|
[DEBUG] ME: Manufacturing Mode : YES
|
|
[DEBUG] ME: Boot Options Present : NO
|
|
[DEBUG] ME: Update In Progress : NO
|
|
[DEBUG] ME: Current Working State : Normal
|
|
[DEBUG] ME: Current Operation State : M0 with UMA
|
|
[DEBUG] ME: Current Operation Mode : Normal
|
|
[DEBUG] ME: Error Code : No Error
|
|
[DEBUG] ME: Progress Phase : Policy Module
|
|
[DEBUG] ME: Power Management Event : Clean Moff->Mx wake
|
|
[DEBUG] ME: Progress Phase State : Entry into Policy Module
|
|
[NOTE ] ME: BIOS path: Normal
|
|
[ERROR] ME: Extend Register not valid
|
|
[DEBUG] PCI: 00:00:16.0 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:19.0 init
|
|
[DEBUG] PCI: 00:00:19.0 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1a.0 init
|
|
[DEBUG] EHCI: Setting up controller.. done.
|
|
[DEBUG] PCI: 00:00:1a.0 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1b.0 init
|
|
[DEBUG] Azalia: base = 0xfdadc000
|
|
[DEBUG] Azalia: V1CTL disabled.
|
|
[DEBUG] Azalia: codec_mask = 09
|
|
[DEBUG] azalia_audio: Initializing codec #3
|
|
[DEBUG] azalia_audio: codec viddid: 80862804
|
|
[DEBUG] azalia_audio: verb_size: 16
|
|
[DEBUG] azalia_audio: verb loaded.
|
|
[DEBUG] azalia_audio: Initializing codec #0
|
|
[DEBUG] azalia_audio: codec viddid: 14f15069
|
|
[DEBUG] azalia_audio: verb_size: 44
|
|
[DEBUG] azalia_audio: verb loaded.
|
|
[DEBUG] PCI: 00:00:1b.0 init finished in 3 msecs
|
|
[DEBUG] PCI: 00:00:1d.0 init
|
|
[DEBUG] EHCI: Setting up controller.. done.
|
|
[DEBUG] PCI: 00:00:1d.0 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1f.0 init
|
|
[DEBUG] pch: lpc_init
|
|
[DEBUG] IOAPIC: Initializing IOAPIC at fec00000
|
|
[DEBUG] IOAPIC: ID = 0x00
|
|
[DEBUG] IOAPIC: 24 interrupts
|
|
[DEBUG] IOAPIC: Clearing IOAPIC at fec00000
|
|
[DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00
|
|
[INFO ] Set power off after power failure.
|
|
[INFO ] NMI sources disabled.
|
|
[DEBUG] Mobile 5 PM init
|
|
[DEBUG] rtc_failed = 0x0
|
|
[DEBUG] RTC Init
|
|
[DEBUG] apm_control: Disabling ACPI.
|
|
[DEBUG] APMC done.
|
|
[DEBUG] PCI: 00:00:1f.0 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1f.2 init
|
|
[DEBUG] SATA: Initializing...
|
|
[DEBUG] SATA: Controller in AHCI mode.
|
|
[DEBUG] ABAR: 0xfdad9000
|
|
[DEBUG] PCI: 00:00:1f.2 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1f.3 init
|
|
[DEBUG] PCI: 00:00:1f.3 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:00:1f.6 init
|
|
[DEBUG] Thermal init start.
|
|
[DEBUG] Thermal init done.
|
|
[DEBUG] PCI: 00:00:1f.6 init finished in 0 msecs
|
|
[DEBUG] PCI: 00:04:00.0 init
|
|
[DEBUG] PCI: 00:04:00.0 init finished in 0 msecs
|
|
[DEBUG] PNP: 164e.3 init
|
|
[DEBUG] PNP: 164e.3 init finished in 0 msecs
|
|
[DEBUG] PNP: 00ff.2 init
|
|
[DEBUG] PNP: 00ff.2 init finished in 0 msecs
|
|
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:54 init
|
|
[DEBUG] I2C: 01:54 init finished in 0 msecs
|
|
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:55 init
|
|
[DEBUG] I2C: 01:55 init finished in 0 msecs
|
|
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:56 init
|
|
[DEBUG] I2C: 01:56 init finished in 0 msecs
|
|
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:57 init
|
|
[DEBUG] I2C: 01:57 init finished in 0 msecs
|
|
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:5c init
|
|
[DEBUG] Locking EEPROM RFID
|
|
[DEBUG] init EEPROM done
|
|
[DEBUG] I2C: 01:5c init finished in 26 msecs
|
|
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:5d init
|
|
[DEBUG] I2C: 01:5d init finished in 0 msecs
|
|
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:5e init
|
|
[DEBUG] I2C: 01:5e init finished in 0 msecs
|
|
[DEBUG] smbus: PCI: 00:00:1f.3->I2C: 01:5f init
|
|
[DEBUG] I2C: 01:5f init finished in 0 msecs
|
|
[INFO ] Devices initialized
|
|
[DEBUG] BS: BS_DEV_INIT run times (exec / console): 264 / 1 ms
|
|
[DEBUG] TPM: Startup
|
|
[DEBUG] TPM: command 0x99 returned 0x0
|
|
[DEBUG] TPM: Asserting physical presence
|
|
[DEBUG] TPM: command 0x4000000a returned 0x0
|
|
[DEBUG] TPM: command 0x65 returned 0x0
|
|
[DEBUG] TPM: flags disable=0, deactivated=0, nvlocked=1
|
|
[INFO ] TPM: setup succeeded
|
|
[DEBUG] clear_memory: Clearing DRAM 0000000000000000-0000000000005000
|
|
[ERROR] Null dereference at eip: 0x7f6a4d7d
|
|
[DEBUG] clear_memory: Clearing DRAM 000000000000a000-00000000000a0000
|
|
[DEBUG] clear_memory: Clearing DRAM 00000000000c0000-000000007f663000
|
|
[DEBUG] clear_memory: Clearing DRAM 0000000100000000-0000000278000000
|
|
[DEBUG] memset_pae: Using virtual address 0x00200000 as scratchpad
|
|
[DEBUG] memset_pae: Using address 0x00005000 for page tables
|
|
[DEBUG] clear_memory: Clearing DRAM 0000000000005000-000000000000a000
|
|
[DEBUG] BS: BS_DEV_INIT exit times (exec / console): 1217 / 0 ms
|
|
[INFO ] Finalize devices...
|
|
[DEBUG] PCI: 00:00:1f.0 final
|
|
[INFO ] Manufacturer: c2
|
|
[INFO ] SF: Detected c2 2017 with sector size 0x1000, total 0x800000
|
|
[DEBUG] apm_control: Finalizing SMM.
|
|
[DEBUG] APMC done.
|
|
[INFO ] Devices finalized
|
|
[INFO ] Timestamp - device setup done: 4684727604
|
|
[INFO ] Timestamp - cbmem post: 4684734928
|
|
[INFO ] Timestamp - write tables: 4684738644
|
|
[INFO ] CBFS: Found 'fallback/dsdt.aml' @0x89680 size 0x3820 in mcache @0x7f7dd200
|
|
[WARN ] CBFS: 'fallback/slic' not found.
|
|
[INFO ] ACPI: Writing ACPI tables at 7f637000.
|
|
[DEBUG] ACPI: * FACS
|
|
[DEBUG] ACPI: * FACP
|
|
[DEBUG] ACPI: added table 1/32, length now 44
|
|
[INFO ] Super I/O probe failed, skipping wacom
|
|
[DEBUG] Found 1 CPU(s) with 4 core(s) each.
|
|
[DEBUG] PSS: 2667MHz power 25000 control 0x18 status 0x18
|
|
[DEBUG] PSS: 2666MHz power 25000 control 0x14 status 0x14
|
|
[DEBUG] PSS: 2533MHz power 23465 control 0x13 status 0x13
|
|
[DEBUG] PSS: 2400MHz power 21982 control 0x12 status 0x12
|
|
[DEBUG] PSS: 2266MHz power 20527 control 0x11 status 0x11
|
|
[DEBUG] PSS: 2133MHz power 19080 control 0x10 status 0x10
|
|
[DEBUG] PSS: 2000MHz power 17681 control 0xf status 0xf
|
|
[DEBUG] PSS: 1866MHz power 16310 control 0xe status 0xe
|
|
[DEBUG] PSS: 1733MHz power 14966 control 0xd status 0xd
|
|
[DEBUG] PSS: 1600MHz power 13665 control 0xc status 0xc
|
|
[DEBUG] PSS: 1466MHz power 12375 control 0xb status 0xb
|
|
[DEBUG] PSS: 1333MHz power 11112 control 0xa status 0xa
|
|
[DEBUG] PSS: 1200MHz power 9877 control 0x9 status 0x9
|
|
[DEBUG] PSS: 2667MHz power 25000 control 0x18 status 0x18
|
|
[DEBUG] PSS: 2666MHz power 25000 control 0x14 status 0x14
|
|
[DEBUG] PSS: 2533MHz power 23465 control 0x13 status 0x13
|
|
[DEBUG] PSS: 2400MHz power 21982 control 0x12 status 0x12
|
|
[DEBUG] PSS: 2266MHz power 20527 control 0x11 status 0x11
|
|
[DEBUG] PSS: 2133MHz power 19080 control 0x10 status 0x10
|
|
[DEBUG] PSS: 2000MHz power 17681 control 0xf status 0xf
|
|
[DEBUG] PSS: 1866MHz power 16310 control 0xe status 0xe
|
|
[DEBUG] PSS: 1733MHz power 14966 control 0xd status 0xd
|
|
[DEBUG] PSS: 1600MHz power 13665 control 0xc status 0xc
|
|
[DEBUG] PSS: 1466MHz power 12375 control 0xb status 0xb
|
|
[DEBUG] PSS: 1333MHz power 11112 control 0xa status 0xa
|
|
[DEBUG] PSS: 1200MHz power 9877 control 0x9 status 0x9
|
|
[DEBUG] PSS: 2667MHz power 25000 control 0x18 status 0x18
|
|
[DEBUG] PSS: 2666MHz power 25000 control 0x14 status 0x14
|
|
[DEBUG] PSS: 2533MHz power 23465 control 0x13 status 0x13
|
|
[DEBUG] PSS: 2400MHz power 21982 control 0x12 status 0x12
|
|
[DEBUG] PSS: 2266MHz power 20527 control 0x11 status 0x11
|
|
[DEBUG] PSS: 2133MHz power 19080 control 0x10 status 0x10
|
|
[DEBUG] PSS: 2000MHz power 17681 control 0xf status 0xf
|
|
[DEBUG] PSS: 1866MHz power 16310 control 0xe status 0xe
|
|
[DEBUG] PSS: 1733MHz power 14966 control 0xd status 0xd
|
|
[DEBUG] PSS: 1600MHz power 13665 control 0xc status 0xc
|
|
[DEBUG] PSS: 1466MHz power 12375 control 0xb status 0xb
|
|
[DEBUG] PSS: 1333MHz power 11112 control 0xa status 0xa
|
|
[DEBUG] PSS: 1200MHz power 9877 control 0x9 status 0x9
|
|
[DEBUG] PSS: 2667MHz power 25000 control 0x18 status 0x18
|
|
[DEBUG] PSS: 2666MHz power 25000 control 0x14 status 0x14
|
|
[DEBUG] PSS: 2533MHz power 23465 control 0x13 status 0x13
|
|
[DEBUG] PSS: 2400MHz power 21982 control 0x12 status 0x12
|
|
[DEBUG] PSS: 2266MHz power 20527 control 0x11 status 0x11
|
|
[DEBUG] PSS: 2133MHz power 19080 control 0x10 status 0x10
|
|
[DEBUG] PSS: 2000MHz power 17681 control 0xf status 0xf
|
|
[DEBUG] PSS: 1866MHz power 16310 control 0xe status 0xe
|
|
[DEBUG] PSS: 1733MHz power 14966 control 0xd status 0xd
|
|
[DEBUG] PSS: 1600MHz power 13665 control 0xc status 0xc
|
|
[DEBUG] PSS: 1466MHz power 12375 control 0xb status 0xb
|
|
[DEBUG] PSS: 1333MHz power 11112 control 0xa status 0xa
|
|
[DEBUG] PSS: 1200MHz power 9877 control 0x9 status 0x9
|
|
[DEBUG] Generating ACPI PIRQ entries
|
|
[INFO ] \_SB_.PCI0.TPM: LPC TPM PNP: 0c31.0
|
|
[INFO ] ACPI: * H8
|
|
[INFO ] H8: BDC not installed
|
|
[INFO ] H8: WWAN detection not implemented. Assuming WWAN installed
|
|
[DEBUG] ACPI: * SSDT
|
|
[DEBUG] ACPI: added table 2/32, length now 52
|
|
[DEBUG] ACPI: * MCFG
|
|
[DEBUG] ACPI: added table 3/32, length now 60
|
|
[DEBUG] TCPA log created at 0x7f627000
|
|
[DEBUG] ACPI: * TCPA
|
|
[DEBUG] ACPI: added table 4/32, length now 68
|
|
[DEBUG] IOAPIC: 24 interrupts
|
|
[DEBUG] ACPI: * APIC
|
|
[DEBUG] ACPI: added table 5/32, length now 76
|
|
[DEBUG] current = 7f63c140
|
|
[DEBUG] ACPI: * HPET
|
|
[DEBUG] ACPI: added table 6/32, length now 84
|
|
[INFO ] ACPI: done.
|
|
[DEBUG] ACPI tables: 20864 bytes.
|
|
[DEBUG] smbios_write_tables: 7f61f000
|
|
[INFO ] PCI: 00:04:00.0 (unknown)
|
|
[DEBUG] SMBIOS tables: 747 bytes.
|
|
[DEBUG] Writing table forward entry at 0x00000500
|
|
[DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d078
|
|
[DEBUG] Writing coreboot table at 0x7f65b000
|
|
[DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
|
|
[DEBUG] 1. 0000000000001000-000000000009ffff: RAM
|
|
[DEBUG] 2. 00000000000a0000-00000000000fffff: RESERVED
|
|
[DEBUG] 3. 0000000000100000-000000007f61efff: RAM
|
|
[DEBUG] 4. 000000007f61f000-000000007f677fff: CONFIGURATION TABLES
|
|
[DEBUG] 5. 000000007f678000-000000007f7ccfff: RAMSTAGE
|
|
[DEBUG] 6. 000000007f7cd000-000000007f7fffff: CONFIGURATION TABLES
|
|
[DEBUG] 7. 000000007f800000-0000000083ffffff: RESERVED
|
|
[DEBUG] 8. 00000000d0000000-00000000efffffff: RESERVED
|
|
[DEBUG] 9. 00000000fed00000-00000000fedfffff: RESERVED
|
|
[DEBUG] 10. 0000000100000000-00000001fbffffff: RAM
|
|
[DEBUG] 11. 00000001fc000000-00000001ffffffff: RESERVED
|
|
[DEBUG] 12. 0000000200000000-0000000277ffffff: RAM
|
|
[INFO ] Setting up bootsplash in 1280x800@32
|
|
[INFO ] CBFS: Found 'bootsplash.jpg' @0x42480 size 0x471d6 in mcache @0x7f7dd1d8
|
|
[DEBUG] Bootsplash image resolution: 1280x800
|
|
[ERROR] memalign(boundary=8, size=1536000): failed: Tried to round up free_mem_ptr 0x7f6cdc70 to 0x7f844c70
|
|
[ERROR] but free_mem_end_ptr is 0x7f7cc0c8
|
|
[ERROR] Error! memalign: Out of memory (free_mem_ptr >= free_mem_end_ptr)Bootsplash could not be decoded. jpeg_decode returned 1.
|
|
[DEBUG] Wrote coreboot table at: 0x7f65b000, 0x3a4 bytes, checksum 4e57
|
|
[DEBUG] coreboot table: 956 bytes.
|
|
[DEBUG] IMD ROOT 0. 0x7f7ff000 0x00001000
|
|
[DEBUG] IMD SMALL 1. 0x7f7fe000 0x00001000
|
|
[DEBUG] CONSOLE 2. 0x7f7de000 0x00020000
|
|
[DEBUG] RO MCACHE 3. 0x7f7dd000 0x000003e0
|
|
[DEBUG] TIME STAMP 4. 0x7f7dc000 0x00000910
|
|
[DEBUG] AFTER CAR 5. 0x7f7cd000 0x0000f000
|
|
[DEBUG] RAMSTAGE 6. 0x7f677000 0x00156000
|
|
[DEBUG] SMM BACKUP 7. 0x7f667000 0x00010000
|
|
[DEBUG] IGD OPREGION 8. 0x7f663000 0x000030d5
|
|
[DEBUG] COREBOOT 9. 0x7f65b000 0x00008000
|
|
[DEBUG] ACPI 10. 0x7f637000 0x00024000
|
|
[DEBUG] TCPA TCGLOG11. 0x7f627000 0x00010000
|
|
[DEBUG] SMBIOS 12. 0x7f61f000 0x00008000
|
|
[DEBUG] IMD small region:
|
|
[DEBUG] IMD ROOT 0. 0x7f7fec00 0x00000400
|
|
[DEBUG] FMAP 1. 0x7f7feb20 0x000000e0
|
|
[DEBUG] ROMSTAGE 2. 0x7f7feb00 0x00000004
|
|
[DEBUG] ROMSTG STCK 3. 0x7f7fea60 0x00000088
|
|
[INFO ] Timestamp - finalize chips: 4752331156
|
|
[DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 25 / 0 ms
|
|
[INFO ] Timestamp - starting to load payload: 4752339228
|
|
[INFO ] CBFS: Found 'fallback/payload' @0x95ec0 size 0x11836 in mcache @0x7f7dd2c8
|
|
[DEBUG] Checking segment from ROM address 0xfffa60ec
|
|
[DEBUG] Payload being loaded at below 1MiB without region being marked as RAM usable.
|
|
[DEBUG] Checking segment from ROM address 0xfffa6108
|
|
[DEBUG] Loading segment from ROM address 0xfffa60ec
|
|
[DEBUG] code (compression=1)
|
|
[DEBUG] New segment dstaddr 0x000de800 memsize 0x21800 srcaddr 0xfffa6124 filesize 0x117fe
|
|
[DEBUG] Loading Segment: addr: 0x000de800 memsz: 0x0000000000021800 filesz: 0x00000000000117fe
|
|
[DEBUG] using LZMA
|
|
[INFO ] Timestamp - starting LZMA decompress (ignore for x86): 4752522560
|
|
[INFO ] Timestamp - finished LZMA decompress (ignore for x86): 4833320300
|
|
[DEBUG] Loading segment from ROM address 0xfffa6108
|
|
[DEBUG] Entry Point 0x000fd25a
|
|
[DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 30 / 0 ms
|
|
[DEBUG] ICH-NM10-PCH: watchdog disabled
|
|
[DEBUG] Jumping to boot code at 0x000fd25a(0x7f65b000)
|
|
[INFO ] Timestamp - selfboot jump: 4833457856
|
|
SeaBIOS (version rel-1.16.3-0-ga6ed6b70)
|
|
BUILD: gcc: (coreboot toolchain v_) 13.2.0 binutils: (GNU Binutils) 2.42
|
|
Found coreboot cbmem console @ 7f7de000
|
|
Found mainboard LENOVO ThinkPad X201
|
|
Relocating init from 0x000dff60 to 0x7e611ba0 (size 54208)
|
|
Found CBFS header at 0xfff1022c
|
|
multiboot: eax=7f6ba89c, ebx=7f6ba864
|
|
Found 17 PCI devices (max PCI bus is 05)
|
|
Copying SMBIOS from 0x7f61f000 to 0x000f60a0
|
|
Copying SMBIOS 3.0 from 0x7f61f020 to 0x000f6080
|
|
Copying ACPI RSDP from 0x7f637000 to 0x000f6050
|
|
table(50434146)=0x7f63aaa0 (via xsdt)
|
|
Using pmtimer, ioport 0x508
|
|
table(41504354)=0x7f63c080 (via xsdt)
|
|
EHCI init on dev 00:1a.0 (regs=0xfdad8020)
|
|
EHCI init on dev 00:1d.0 (regs=0xfdad7020)
|
|
AHCI controller at 00:1f.2, iobase 0xfdad9000, irq 11
|
|
Searching bootorder for: HALT
|
|
Found 0 lpt ports
|
|
Found 0 serial ports
|
|
Scan for VGA option rom
|
|
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0
|
|
AHCI/0: Set transfer mode to UDMA-6
|
|
Searching bios-geometry for: /pci@i0cf8/*@1f,2/drive@0/disk@0
|
|
AHCI/0: registering: "AHCI/0: Samsung SSD 840 PRO Series ATA-9 Hard-Disk (238 GiBytes)"
|
|
Running option rom at c000:0003
|
|
pmm call arg1=0
|
|
Turning on vga text mode console
|
|
SeaBIOS (version rel-1.16.3-0-ga6ed6b70)
|
|
Machine UUID f3facce0-fc53-11df-800d-f9e053d930b0
|
|
Scan for option roms
|
|
|
|
Press ESC for boot menu.
|
|
|
|
Initialized USB HUB (0 ports used)
|
|
Initialized USB HUB (0 ports used)
|
|
Discarding ps2 data aa (status=11)
|
|
WARNING - Timeout at ps2_recvbyte:182!
|
|
PS2 keyboard initialized
|
|
All threads complete.
|
|
Turning on vga text mode console
|
|
SeaBIOS (version rel-1.16.3-0-ga6ed6b70)
|
|
Machine UUID f3facce0-fc53-11df-800d-f9e053d930b0
|
|
Searching bootorder for: HALT
|
|
drive 0x000f5fe0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=500118192
|
|
Space available for UMB: c7000-ec000, f58c0-f5fe0
|
|
Returned 16769024 bytes of ZoneHigh
|
|
e820 map has 10 items:
|
|
0: 0000000000000000 - 000000000009fc00 = 1 RAM
|
|
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
|
|
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
|
|
3: 0000000000100000 - 000000007f61d000 = 1 RAM
|
|
4: 000000007f61d000 - 0000000084000000 = 2 RESERVED
|
|
5: 00000000d0000000 - 00000000f0000000 = 2 RESERVED
|
|
6: 00000000fed00000 - 00000000fee00000 = 2 RESERVED
|
|
7: 0000000100000000 - 00000001fc000000 = 1 RAM
|
|
8: 00000001fc000000 - 0000000200000000 = 2 RESERVED
|
|
9: 0000000200000000 - 0000000278000000 = 1 RAM
|
|
enter handle_19:
|
|
NULL
|
|
Booting from Hard Disk...
|
|
Booting from 0000:7c00
|