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Bug #499 » cbmem_change_76199.txt

Oberon 4071, 07/02/2023 10:30 PM

 


[NOTE ] coreboot-4.20-522-g251491c9d7 Fri Jun 30 23:57:55 UTC 2023 x86_32 bootblock starting (log level: 7)...
[DEBUG] FMAP: Found "FLASH" version 1.1 at 0x810000.
[DEBUG] FMAP: base = 0xff400000 size = 0xc00000 #areas = 4
[DEBUG] FMAP: area COREBOOT found @ 810200 (4128256 bytes)
[INFO ] CBFS: mcache @0xff7c2e00 built for 21 files, used 0x468 of 0x4000 bytes
[WARN ] CBFS: 'coreboot-stages' not found.
[INFO ] CBFS: Found 'fallback/romstage' @0x80 size 0xc128 in mcache @0xff7c2e2c
[DEBUG] BS: bootblock times (exec / console): total (unknown) / 0 ms


[NOTE ] coreboot-4.20-522-g251491c9d7 Fri Jun 30 23:57:55 UTC 2023 x86_32 romstage starting (log level: 7)...
[DEBUG] Disabling Watchdog reboot... done.
[DEBUG] SMBus controller enabled
[DEBUG] Setting up static northbridge registers... done.
[DEBUG] Started PEG11 link training.
[DEBUG] Temporarily hiding PEG11.
[DEBUG] Started PEG10 link training.
[DEBUG] Temporarily hiding PEG10.
[DEBUG] Initializing IGD...
[DEBUG] Back from haswell_early_initialization()
[DEBUG] CPU id(306c3) ucode:00000028 Intel(R) Core(TM) i7-4600M CPU @ 2.90GHz
[DEBUG] AES supported, TXT supported, VT supported
[DEBUG] PCH type: QM87, device id: 8c4f, rev id 5
[DEBUG] Starting UEFI PEI System Agent
[DEBUG] FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes)
[NOTE ] MRC: no data in 'RW_MRC_CACHE'
[DEBUG] FMAP: area COREBOOT found @ 810200 (4128256 bytes)
[INFO ] CBFS: Found 'mrc.bin' @0x38fdc0 size 0x2e6e4 in mcache @0xff7c31e4
System Agent: Starting up...
System Agent: Initializing PCH
install_ppi: overwrite GUID {ed097352-9041-445a-80b6-b29d509e8845}
install_ppi: overwrite GUID {908c7f8b-5c48-47fb-8357-f5fd4e235276}
System Agent: Initializing PCH (SMBUS)
System Agent: Initializing PCH (USB)
System Agent: Initializing PCH (SA Init)
System Agent: Initializing PCH (Me UMA)
System Agent: Initializing Memory
System Agent: Done.
Sanity checking heap.
[DEBUG] MRC Version 1.6.1 Build 2
[DEBUG] memcfg DDR3 clock 1600 MHz
[DEBUG] memcfg channel assignment: A: 0, B 1, C 2
[DEBUG] memcfg channel[0] config (00620020):
[DEBUG] ECC inactive
[DEBUG] enhanced interleave mode on
[DEBUG] rank interleave on
[DEBUG] DIMMA 8192 MB width x8 or x32 dual rank, selected
[DEBUG] DIMMB 0 MB width x8 or x32 single rank
[DEBUG] memcfg channel[1] config (00620020):
[DEBUG] ECC inactive
[DEBUG] enhanced interleave mode on
[DEBUG] rank interleave on
[DEBUG] DIMMA 8192 MB width x8 or x32 dual rank, selected
[DEBUG] DIMMB 0 MB width x8 or x32 single rank
[DEBUG] ME: FW Partition Table : OK
[DEBUG] ME: Bringup Loader Failure : NO
[DEBUG] ME: Firmware Init Complete : NO
[DEBUG] ME: Manufacturing Mode : YES
[DEBUG] ME: Boot Options Present : NO
[DEBUG] ME: Update In Progress : NO
[DEBUG] ME: Current Working State : Initializing
[DEBUG] ME: Current Operation State : Bring up
[DEBUG] ME: Current Operation Mode : Debug
[DEBUG] ME: Error Code : No Error
[DEBUG] ME: Progress Phase : BUP Phase
[DEBUG] ME: Power Management Event : Clean Moff->Mx wake
[DEBUG] ME: Progress Phase State : 0x4d
[DEBUG] CBMEM:
[DEBUG] IMD: root @ 0x7f7ff000 254 entries.
[DEBUG] IMD: root @ 0x7f7fec00 62 entries.
[DEBUG] External stage cache:
[DEBUG] IMD: root @ 0x7fbff000 254 entries.
[DEBUG] IMD: root @ 0x7fbfec00 62 entries.
[DEBUG] FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes)
[DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'.
[DEBUG] flash size 0x2800000 bytes
[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x2800000
[ERROR] SF size 0x2800000 does not correspond to CONFIG_ROM_SIZE 0xc00000!!
[NOTE ] MRC: no data in 'RW_MRC_CACHE'
[DEBUG] MRC: cache data 'RW_MRC_CACHE' needs update.
[DEBUG] SF: Successfully written 2 bytes @ 0x800000
[DEBUG] SF: Successfully written 2 bytes @ 0x800002
[DEBUG] SF: Successfully written 20 bytes @ 0x800020
[DEBUG] SF: Successfully written 4052 bytes @ 0x800034
[DEBUG] MRC: updated 'RW_MRC_CACHE'.
[DEBUG] Unhiding PEG10.
[DEBUG] Unhiding PEG11.
[DEBUG] SMM Memory Map
[DEBUG] SMRAM : 0x7f800000 0x800000
[DEBUG] Subregion 0: 0x7f800000 0x300000
[DEBUG] Subregion 1: 0x7fb00000 0x100000
[DEBUG] Subregion 2: 0x7fc00000 0x400000
[DEBUG] Normal boot
[INFO ] CBFS: Found 'fallback/postcar' @0x3d700 size 0x5814 in mcache @0xff7c305c
[DEBUG] Loading module at 0x7f7cf000 with entry 0x7f7cf031. filesize: 0x5460 memsize: 0xb798
[DEBUG] Processing 221 relocs. Offset value of 0x7d7cf000
[DEBUG] BS: romstage times (exec / console): total (unknown) / 1 ms


[NOTE ] coreboot-4.20-522-g251491c9d7 Fri Jun 30 23:57:55 UTC 2023 x86_32 postcar starting (log level: 7)...
[DEBUG] Normal boot
[DEBUG] FMAP: area COREBOOT found @ 810200 (4128256 bytes)
[INFO ] CBFS: Found 'fallback/ramstage' @0x1bb40 size 0x1c882 in mcache @0x7f7dd10c
[DEBUG] Loading module at 0x7f784000 with entry 0x7f784000. filesize: 0x38038 memsize: 0x49170
[DEBUG] Processing 3976 relocs. Offset value of 0x7b784000
[DEBUG] BS: postcar times (exec / console): total (unknown) / 0 ms


[NOTE ] coreboot-4.20-522-g251491c9d7 Fri Jun 30 23:57:55 UTC 2023 x86_32 ramstage starting (log level: 7)...
[DEBUG] Normal boot
[INFO ] Enumerating buses...
[DEBUG] Root Device scanning...
[DEBUG] CPU_CLUSTER: 0 enabled
[DEBUG] DOMAIN: 0000 enabled
[DEBUG] DOMAIN: 0000 scanning...
[DEBUG] PCI: pci_scan_bus for bus 00
[DEBUG] PCI: 00:00.0 [8086/0c04] enabled
[INFO ] PCI: Static device PCI: 00:01.0 not found, disabling it.
[DEBUG] PCI: 00:01.1 [8086/0c05] enabled
[DEBUG] PCI: 00:02.0 [8086/0416] enabled
[DEBUG] PCI: 00:03.0 [8086/0c0c] enabled
[DEBUG] PCI: 00:04.0 [8086/0c03] enabled
[DEBUG] PCI: 00:14.0 [8086/8c31] enabled
[DEBUG] PCI: 00:16.0 [8086/8c3a] enabled
[DEBUG] PCI: 00:16.1: Disabling device
[DEBUG] PCI: 00:16.2: Disabling device
[DEBUG] PCI: 00:16.3: Disabling device
[DEBUG] PCI: 00:19.0 [8086/1502] enabled
[DEBUG] PCI: 00:1a.0 [8086/8c2d] enabled
[DEBUG] PCI: 00:1b.0 [8086/8c20] enabled
[DEBUG] PCIe Root Port 1 ASPM is disabled
[DEBUG] PCI: 00:1c.0 [8086/8c10] enabled
[DEBUG] PCIe Root Port 2 ASPM is disabled
[DEBUG] PCI: 00:1c.1 [8086/8c12] enabled
[DEBUG] PCI: 00:1c.2 [8086/8c14] disabled
[DEBUG] PCI: 00:1c.3 [8086/8c16] disabled
[DEBUG] Adjusted number of PCIe root ports to 5 as per strpfusecfg2
[DEBUG] PCI: 00:1c.2: Disabling device
[DEBUG] PCI: 00:1c.3: Disabling device
[DEBUG] PCI: 00:1c.4: Disabling device
[DEBUG] PCI: 00:1c.4 [8086/8c18] disabled
[DEBUG] PCI: 00:1d.0 [8086/8c26] enabled
[DEBUG] PCI: 00:1f.0 [8086/8c4f] enabled
[DEBUG] PCI: 00:1f.2 [8086/8c03] enabled
[DEBUG] PCI: 00:1f.3 [8086/8c22] enabled
[DEBUG] PCI: 00:1f.5: Disabling device
[DEBUG] PCI: 00:1f.6: Disabling device
[WARN ] PCI: Leftover static devices:
[WARN ] PCI: 00:01.0
[WARN ] PCI: 00:16.1
[WARN ] PCI: 00:16.2
[WARN ] PCI: 00:16.3
[WARN ] PCI: 00:1c.5
[WARN ] PCI: 00:1c.6
[WARN ] PCI: 00:1c.7
[WARN ] PCI: 00:1f.5
[WARN ] PCI: 00:1f.6
[WARN ] PCI: Check your devicetree.cb.
[DEBUG] PCI: 00:01.1 scanning...
[DEBUG] PCI: pci_scan_bus for bus 01
[DEBUG] scan_bus: bus PCI: 00:01.1 finished in 0 msecs
[DEBUG] PCI: 00:1c.0 scanning...
[DEBUG] PCI: pci_scan_bus for bus 02
[DEBUG] PCI: 02:00.0 [10ec/5227] enabled
[INFO ] Enabling Common Clock Configuration
[INFO ] ASPM: Enabled L0s and L1
[INFO ] PCIe: Max_Payload_Size adjusted to 128
[INFO ] PCI: 02:00.0: Enabled LTR
[DEBUG] scan_bus: bus PCI: 00:1c.0 finished in 0 msecs
[DEBUG] PCI: 00:1c.1 scanning...
[DEBUG] PCI: pci_scan_bus for bus 03
[DEBUG] PCI: 03:00.0 [8086/08b2] enabled
[INFO ] Enabling Common Clock Configuration
[INFO ] ASPM: Enabled L1
[INFO ] PCIe: Max_Payload_Size adjusted to 128
[INFO ] PCI: 03:00.0: Enabled LTR
[DEBUG] scan_bus: bus PCI: 00:1c.1 finished in 0 msecs
[DEBUG] PCI: 00:1f.0 scanning...
[INFO ] PMH7: ID 05 Revision 12
[DEBUG] PNP: 00ff.1 enabled
[INFO ] H8: EC Firmware ID GLHT30WW-3.23, Version 3.01B
[INFO ] H8: WWAN detection not implemented. Assuming WWAN installed
[DEBUG] PNP: 00ff.2 enabled
[DEBUG] PNP: 0c31.0 enabled
[DEBUG] scan_bus: bus PCI: 00:1f.0 finished in 3 msecs
[DEBUG] PCI: 00:1f.3 scanning...
[DEBUG] scan_bus: bus PCI: 00:1f.3 finished in 0 msecs
[DEBUG] scan_bus: bus DOMAIN: 0000 finished in 3 msecs
[DEBUG] scan_bus: bus Root Device finished in 3 msecs
[INFO ] done
[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 0 ms
[DEBUG] found VGA at PCI: 00:02.0
[DEBUG] Setting up VGA for PCI: 00:02.0
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
[INFO ] Allocating resources...
[INFO ] Reading resources...
[DEBUG] mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff.
[DEBUG] mc_add_fixed_mmio_resources: Adding DMIBAR @ 68 0xfed18000-0xfed18fff.
[DEBUG] mc_add_fixed_mmio_resources: Adding EPBAR @ 40 0xfed19000-0xfed19fff.
[DEBUG] mc_add_fixed_mmio_resources: Adding GDXCBAR @ 5420 0xfed84000-0xfed84fff.
[DEBUG] mc_add_fixed_mmio_resources: Adding EDRAMBAR @ 5408 0xfed80000-0xfed83fff.
[DEBUG] Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
[DEBUG] MC MAP: TOM: 0x400000000
[DEBUG] MC MAP: TOUUD: 0x47de00000
[DEBUG] MC MAP: MESEG_BASE: 0x7ffff00000
[DEBUG] MC MAP: MESEG_LIMIT: 0xfffff
[DEBUG] MC MAP: REMAP_BASE: 0x400000000
[DEBUG] MC MAP: REMAP_LIMIT: 0x47ddfffff
[DEBUG] MC MAP: TOLUD: 0x82200000
[DEBUG] MC MAP: BGSM: 0x80000000
[DEBUG] MC MAP: BDSM: 0x80200000
[DEBUG] MC MAP: TSEGMB: 0x7f800000
[DEBUG] MC MAP: GGC: 0x209
[DEBUG] MC MAP: DPR: 0x7f800001
[INFO ] Available memory above 4GB: 14302M
[ERROR] PNP: 00ff.1 missing read_resources
[ERROR] PNP: 00ff.2 missing read_resources
[INFO ] Done reading resources.
[INFO ] === Resource allocator: DOMAIN: 0000 - Pass 1 (relative placement) ===
[DEBUG] PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG] PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
[DEBUG] PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG] PCI: 02:00.0 10 * [0x0 - 0xfff] mem
[DEBUG] PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG] PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG] PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[DEBUG] PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG] PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done
[DEBUG] PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG] PCI: 03:00.0 10 * [0x0 - 0x1fff] mem
[DEBUG] PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG] PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG] PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[INFO ] === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
[DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 84 base 00001600 limit 0000167f io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 88 base 000015e0 limit 000015ef io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed)
[INFO ] DOMAIN: 0000: Resource ranges:
[INFO ] * Base: 1000, Size: 5e0, Tag: 100
[INFO ] * Base: 15f0, Size: 10, Tag: 100
[INFO ] * Base: 1680, Size: e980, Tag: 100
[DEBUG] PCI: 00:02.0 20 * [0xffc0 - 0xffff] limit: ffff io
[DEBUG] PCI: 00:19.0 18 * [0xffa0 - 0xffbf] limit: ffbf io
[DEBUG] PCI: 00:1f.2 20 * [0xff80 - 0xff9f] limit: ff9f io
[DEBUG] PCI: 00:1f.2 10 * [0xff78 - 0xff7f] limit: ff7f io
[DEBUG] PCI: 00:1f.2 18 * [0xff70 - 0xff77] limit: ff77 io
[DEBUG] PCI: 00:1f.2 14 * [0xff6c - 0xff6f] limit: ff6f io
[DEBUG] PCI: 00:1f.2 1c * [0xff68 - 0xff6b] limit: ff6b io
[DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
[DEBUG] DOMAIN: 0000 mem: base: 7f800000 size: 0 align: 0 gran: 0 limit: efffffff
[DEBUG] DOMAIN: 0000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 48 base fed10000 limit fed17fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 68 base fed18000 limit fed18fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 40 base fed19000 limit fed19fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 5420 base fed84000 limit fed84fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 5408 base fed80000 limit fed83fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 00 base fed90000 limit fed90fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 01 base fed91000 limit fed91fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 02 base 00000000 limit 0009ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 03 base 000c0000 limit 7f7fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 04 base 7f800000 limit 7fffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 05 base 80000000 limit 821fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 06 base 100000000 limit 47ddfffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 31fe base fec00000 limit ffffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
[INFO ] DOMAIN: 0000: Resource ranges:
[INFO ] * Base: 82200000, Size: 6de00000, Tag: 200
[INFO ] * Base: 47de00000, Size: 7b82200000, Tag: 200
[DEBUG] PCI: 00:02.0 18 * [0xe0000000 - 0xefffffff] limit: efffffff prefmem
[DEBUG] PCI: 00:02.0 10 * [0xdfc00000 - 0xdfffffff] limit: dfffffff mem
[DEBUG] PCI: 00:1c.0 20 * [0xdfb00000 - 0xdfbfffff] limit: dfbfffff mem
[DEBUG] PCI: 00:1c.1 20 * [0xdfa00000 - 0xdfafffff] limit: dfafffff mem
[DEBUG] PCI: 00:19.0 10 * [0xdf9e0000 - 0xdf9fffff] limit: df9fffff mem
[DEBUG] PCI: 00:14.0 10 * [0xdf9d0000 - 0xdf9dffff] limit: df9dffff mem
[DEBUG] PCI: 00:04.0 10 * [0xdf9c8000 - 0xdf9cffff] limit: df9cffff mem
[DEBUG] PCI: 00:03.0 10 * [0xdf9c4000 - 0xdf9c7fff] limit: df9c7fff mem
[DEBUG] PCI: 00:1b.0 10 * [0xdf9c0000 - 0xdf9c3fff] limit: df9c3fff mem
[DEBUG] PCI: 00:19.0 14 * [0xdf9bf000 - 0xdf9bffff] limit: df9bffff mem
[DEBUG] PCI: 00:1f.2 24 * [0xdf9be000 - 0xdf9be7ff] limit: df9be7ff mem
[DEBUG] PCI: 00:1a.0 10 * [0xdf9bd000 - 0xdf9bd3ff] limit: df9bd3ff mem
[DEBUG] PCI: 00:1d.0 10 * [0xdf9bc000 - 0xdf9bc3ff] limit: df9bc3ff mem
[DEBUG] PCI: 00:1f.3 10 * [0xdf9bb000 - 0xdf9bb0ff] limit: df9bb0ff mem
[DEBUG] PCI: 00:16.0 10 * [0xdf9ba000 - 0xdf9ba00f] limit: df9ba00f mem
[DEBUG] DOMAIN: 0000 mem: base: 7f800000 size: 0 align: 0 gran: 0 limit: efffffff done
[DEBUG] DOMAIN: 0000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff done
[DEBUG] PCI: 02:00.0 10 * [0xdfb00000 - 0xdfb00fff] limit: dfb00fff mem
[DEBUG] PCI: 03:00.0 10 * [0xdfa00000 - 0xdfa01fff] limit: dfa01fff mem
[INFO ] === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
[DEBUG] PCI: 00:01.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 01 io
[DEBUG] PCI: 00:01.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
[DEBUG] PCI: 00:01.1 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 bus 01 mem
[DEBUG] PCI: 00:02.0 10 <- [0x00000000dfc00000 - 0x00000000dfffffff] size 0x00400000 gran 0x16 mem64
[DEBUG] PCI: 00:02.0 18 <- [0x00000000e0000000 - 0x00000000efffffff] size 0x10000000 gran 0x1c prefmem64
[DEBUG] PCI: 00:02.0 20 <- [0x000000000000ffc0 - 0x000000000000ffff] size 0x00000040 gran 0x06 io
[DEBUG] PCI: 00:03.0 10 <- [0x00000000df9c4000 - 0x00000000df9c7fff] size 0x00004000 gran 0x0e mem64
[DEBUG] PCI: 00:04.0 10 <- [0x00000000df9c8000 - 0x00000000df9cffff] size 0x00008000 gran 0x0f mem64
[DEBUG] PCI: 00:14.0 10 <- [0x00000000df9d0000 - 0x00000000df9dffff] size 0x00010000 gran 0x10 mem64
[DEBUG] PCI: 00:16.0 10 <- [0x00000000df9ba000 - 0x00000000df9ba00f] size 0x00000010 gran 0x04 mem64
[DEBUG] PCI: 00:19.0 10 <- [0x00000000df9e0000 - 0x00000000df9fffff] size 0x00020000 gran 0x11 mem
[DEBUG] PCI: 00:19.0 14 <- [0x00000000df9bf000 - 0x00000000df9bffff] size 0x00001000 gran 0x0c mem
[DEBUG] PCI: 00:19.0 18 <- [0x000000000000ffa0 - 0x000000000000ffbf] size 0x00000020 gran 0x05 io
[DEBUG] PCI: 00:1a.0 10 <- [0x00000000df9bd000 - 0x00000000df9bd3ff] size 0x00000400 gran 0x0a mem
[DEBUG] PCI: 00:1b.0 10 <- [0x00000000df9c0000 - 0x00000000df9c3fff] size 0x00004000 gran 0x0e mem64
[DEBUG] PCI: 00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 02 io
[DEBUG] PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
[DEBUG] PCI: 00:1c.0 20 <- [0x00000000dfb00000 - 0x00000000dfbfffff] size 0x00100000 gran 0x14 bus 02 mem
[DEBUG] PCI: 02:00.0 10 <- [0x00000000dfb00000 - 0x00000000dfb00fff] size 0x00001000 gran 0x0c mem
[DEBUG] PCI: 00:1c.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 03 io
[DEBUG] PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
[DEBUG] PCI: 00:1c.1 20 <- [0x00000000dfa00000 - 0x00000000dfafffff] size 0x00100000 gran 0x14 bus 03 mem
[DEBUG] PCI: 03:00.0 10 <- [0x00000000dfa00000 - 0x00000000dfa01fff] size 0x00002000 gran 0x0d mem64
[DEBUG] PCI: 00:1d.0 10 <- [0x00000000df9bc000 - 0x00000000df9bc3ff] size 0x00000400 gran 0x0a mem
[ERROR] PNP: 00ff.1 missing set_resources
[ERROR] PNP: 00ff.2 missing set_resources
[DEBUG] PCI: 00:1f.2 10 <- [0x000000000000ff78 - 0x000000000000ff7f] size 0x00000008 gran 0x03 io
[DEBUG] PCI: 00:1f.2 14 <- [0x000000000000ff6c - 0x000000000000ff6f] size 0x00000004 gran 0x02 io
[DEBUG] PCI: 00:1f.2 18 <- [0x000000000000ff70 - 0x000000000000ff77] size 0x00000008 gran 0x03 io
[DEBUG] PCI: 00:1f.2 1c <- [0x000000000000ff68 - 0x000000000000ff6b] size 0x00000004 gran 0x02 io
[DEBUG] PCI: 00:1f.2 20 <- [0x000000000000ff80 - 0x000000000000ff9f] size 0x00000020 gran 0x05 io
[DEBUG] PCI: 00:1f.2 24 <- [0x00000000df9be000 - 0x00000000df9be7ff] size 0x00000800 gran 0x0b mem
[DEBUG] PCI: 00:1f.3 10 <- [0x00000000df9bb000 - 0x00000000df9bb0ff] size 0x00000100 gran 0x08 mem64
[INFO ] Done setting resources.
[INFO ] Done allocating resources.
[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 2 / 0 ms
[INFO ] Enabling resources...
[DEBUG] PCI: 00:00.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:00.0 cmd <- 06
[DEBUG] PCI: 00:01.1 bridge ctrl <- 0013
[DEBUG] PCI: 00:01.1 subsystem <- 17aa/220e
[DEBUG] PCI: 00:01.1 cmd <- 00
[DEBUG] PCI: 00:02.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:02.0 cmd <- 03
[DEBUG] PCI: 00:03.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:03.0 cmd <- 02
[DEBUG] PCI: 00:04.0 cmd <- 02
[DEBUG] PCI: 00:14.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:14.0 cmd <- 102
[DEBUG] PCI: 00:16.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:16.0 cmd <- 02
[DEBUG] PCI: 00:19.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:19.0 cmd <- 103
[DEBUG] PCI: 00:1a.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1a.0 cmd <- 102
[DEBUG] PCI: 00:1b.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1b.0 cmd <- 102
[DEBUG] PCI: 00:1c.0 bridge ctrl <- 0013
[DEBUG] PCI: 00:1c.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1c.0 cmd <- 06
[DEBUG] PCI: 00:1c.1 bridge ctrl <- 0013
[DEBUG] PCI: 00:1c.1 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1c.1 cmd <- 06
[DEBUG] PCI: 00:1d.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1d.0 cmd <- 102
[DEBUG] PCI: 00:1f.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1f.0 cmd <- 107
[DEBUG] PCI: 00:1f.2 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1f.2 cmd <- 103
[DEBUG] PCI: 00:1f.3 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1f.3 cmd <- 103
[DEBUG] PCI: 02:00.0 cmd <- 02
[DEBUG] PCI: 03:00.0 cmd <- 02
[INFO ] done.
[INFO ] Initializing devices...
[DEBUG] CPU_CLUSTER: 0 init
[DEBUG] MTRR: Physical address space:
[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
[DEBUG] 0x00000000000c0000 - 0x000000007fffffff size 0x7ff40000 type 6
[DEBUG] 0x0000000080000000 - 0x00000000dfffffff size 0x60000000 type 0
[DEBUG] 0x00000000e0000000 - 0x00000000efffffff size 0x10000000 type 1
[DEBUG] 0x00000000f0000000 - 0x00000000ffffffff size 0x10000000 type 0
[DEBUG] 0x0000000100000000 - 0x000000047ddfffff size 0x37de00000 type 6
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
[DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 39 bits
[DEBUG] MTRR: default type WB/UC MTRR counts: 4/5.
[DEBUG] MTRR: WB selected as default type.
[DEBUG] MTRR: 0 base 0x0000000080000000 mask 0x0000007fc0000000 type 0
[DEBUG] MTRR: 1 base 0x00000000c0000000 mask 0x0000007fe0000000 type 0
[DEBUG] MTRR: 2 base 0x00000000e0000000 mask 0x0000007ff0000000 type 1
[DEBUG] MTRR: 3 base 0x00000000f0000000 mask 0x0000007ff0000000 type 0

[DEBUG] MTRR check
[DEBUG] Fixed MTRRs : Enabled
[DEBUG] Variable MTRRs: Enabled

[DEBUG] Initializing VR config.
[DEBUG] CPU has 2 cores, 4 threads enabled.
[DEBUG] Setting up SMI for CPU
[INFO ] Will perform SMM setup.
[DEBUG] FMAP: area COREBOOT found @ 810200 (4128256 bytes)
[INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0xc240 size 0xf800 in mcache @0x7f7dd0ac
[DEBUG] microcode: sig=0x306c3 pf=0x10 revision=0x28
[INFO ] CPU: Intel(R) Core(TM) i7-4600M CPU @ 2.90GHz.
[INFO ] LAPIC 0x0 in XAPIC mode.
[DEBUG] CPU: APIC: 00 enabled
[DEBUG] CPU: APIC: 01 enabled
[DEBUG] CPU: APIC: 02 enabled
[DEBUG] CPU: APIC: 03 enabled
[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
[DEBUG] Processing 16 relocs. Offset value of 0x00030000
[DEBUG] Attempting to start 3 APs
[DEBUG] Waiting for 10ms after sending INIT.
[DEBUG] Waiting for SIPI to complete...
[DEBUG] done.
[DEBUG] Waiting for SIPI to complete...
[DEBUG] done.
[INFO ] LAPIC 0x1 in XAPIC mode.
[INFO ] AP: slot 1 apic_id 1, MCU rev: 0x00000028
[INFO ] LAPIC 0x3 in XAPIC mode.
[INFO ] LAPIC 0x2 in XAPIC mode.
[INFO ] AP: slot 3 apic_id 3, MCU rev: 0x00000028
[INFO ] AP: slot 2 apic_id 2, MCU rev: 0x00000028
[DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1a0 memsize: 0x1a0
[DEBUG] Processing 9 relocs. Offset value of 0x00038000
[DEBUG] smm_module_setup_stub: stack_top = 0x7f801000
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000
[DEBUG] SMM Module: stub loaded at 38000. Will call 0x7f7a2ecd
[DEBUG] Installing permanent SMM handler to 0x7f800000
[DEBUG] HANDLER [0x7faff000-0x7faffea8]

[DEBUG] CPU 0
[DEBUG] ss0 [0x7fafec00-0x7faff000]
[DEBUG] stub0 [0x7faf7000-0x7faf71a0]

[DEBUG] CPU 1
[DEBUG] ss1 [0x7fafe800-0x7fafec00]
[DEBUG] stub1 [0x7faf6c00-0x7faf6da0]

[DEBUG] CPU 2
[DEBUG] ss2 [0x7fafe400-0x7fafe800]
[DEBUG] stub2 [0x7faf6800-0x7faf69a0]

[DEBUG] CPU 3
[DEBUG] ss3 [0x7fafe000-0x7fafe400]
[DEBUG] stub3 [0x7faf6400-0x7faf65a0]

[DEBUG] stacks [0x7f800000-0x7f801000]
[DEBUG] Loading module at 0x7faff000 with entry 0x7faff2a4. filesize: 0xe90 memsize: 0xea8
[DEBUG] Processing 54 relocs. Offset value of 0x7faff000
[DEBUG] Loading module at 0x7faf7000 with entry 0x7faf7000. filesize: 0x1a0 memsize: 0x1a0
[DEBUG] Processing 9 relocs. Offset value of 0x7faf7000
[DEBUG] smm_module_setup_stub: stack_top = 0x7f801000
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x300000
[DEBUG] SMM Module: placing smm entry code at 7faf6c00, cpu # 0x1
[DEBUG] SMM Module: placing smm entry code at 7faf6800, cpu # 0x2
[DEBUG] SMM Module: placing smm entry code at 7faf6400, cpu # 0x3
[DEBUG] SMM Module: stub loaded at 7faf7000. Will call 0x7faff2a4
[DEBUG] SMI_STS: MCSMI PM1
[DEBUG] WAK PWRBTN TMROF TCO_STS: INTRD_DET
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7faef000, cpu = 0
[DEBUG] In relocation handler: CPU 0
[DEBUG] New SMBASE=0x7faef000 IEDBASE=0x7fc00000
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7faeec00, cpu = 1
[DEBUG] In relocation handler: CPU 1
[DEBUG] New SMBASE=0x7faeec00 IEDBASE=0x7fc00000
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7faee400, cpu = 3
[DEBUG] In relocation handler: CPU 3
[DEBUG] New SMBASE=0x7faee400 IEDBASE=0x7fc00000
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7faee800, cpu = 2
[DEBUG] In relocation handler: CPU 2
[DEBUG] New SMBASE=0x7faee800 IEDBASE=0x7fc00000
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] Initializing CPU #0
[DEBUG] CPU: vendor Intel device 306c3
[DEBUG] CPU: family 06, model 3c, stepping 03
[DEBUG] VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] cpu: energy policy set to 6
[INFO ] Turbo is available but hidden
[INFO ] Turbo is available and visible
[INFO ] CPU #0 initialized
[INFO ] Initializing CPU #1
[INFO ] Initializing CPU #2
[INFO ] Initializing CPU #3
[DEBUG] CPU: vendor Intel device 306c3
[DEBUG] CPU: family 06, model 3c, stepping 03
[DEBUG] CPU: vendor Intel device 306c3
[DEBUG] CPU: family 06, model 3c, stepping 03
[DEBUG] CPU: vendor Intel device 306c3
[DEBUG] CPU: family 06, model 3c, stepping 03
[DEBUG] VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] VMX status: enabled
[DEBUG] VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] cpu: energy policy set to 6
[DEBUG] cpu: energy policy set to 6
[INFO ] CPU #1 initialized
[DEBUG] cpu: energy policy set to 6
[INFO ] CPU #2 initialized
[INFO ] CPU #3 initialized
[INFO ] bsp_do_flight_plan done after 2 msecs.
[DEBUG] CPU: frequency set to 3600
[DEBUG] Enabling SMIs.
[DEBUG] Locking SMM.
[DEBUG] CPU_CLUSTER: 0 init finished in 12 msecs
[DEBUG] PCI: 00:00.0 init
[DEBUG] Disabling PEG12.
[DEBUG] Disabling PEG10.
[DEBUG] Disabling "device 7".
[DEBUG] Set BIOS_RESET_CPL
[DEBUG] CPU TDP: 37 Watts
[DEBUG] PCI: 00:00.0 init finished in 1 msecs
[DEBUG] PCI: 00:01.1 init
[DEBUG] PCI: 00:01.1 init finished in 0 msecs
[DEBUG] PCI: 00:02.0 init
[INFO ] CBFS: Found 'vbt.bin' @0x3cc00 size 0x582 in mcache @0x7f7dd204
[INFO ] Found a VBT of 4608 bytes after decompression
[INFO ] GMA: Found VBT in CBFS
[INFO ] GMA: Found valid VBT in CBFS
[DEBUG] GT Power Management Init
[INFO ] GMA: Setting backlight PWM frequency to 135MHz / 128 / 4794 = 220Hz
[DEBUG] GT Power Management Init (post VBIOS)
[DEBUG] PCI: 00:02.0 init finished in 222 msecs
[DEBUG] PCI: 00:03.0 init
[DEBUG] Mini-HD: base = 0xdf9c4000
[DEBUG] azalia_audio: Initializing codec #0
[DEBUG] azalia_audio: codec viddid: 80862807
[DEBUG] azalia_audio: verb_size: 16
[DEBUG] azalia_audio: verb loaded.
[DEBUG] PCI: 00:03.0 init finished in 3 msecs
[DEBUG] PCI: 00:04.0 init
[DEBUG] PCI: 00:04.0 init finished in 0 msecs
[DEBUG] PCI: 00:14.0 init
[DEBUG] PCI: 00:14.0 init finished in 0 msecs
[DEBUG] PCI: 00:16.0 init
[DEBUG] ME: FW Partition Table : OK
[DEBUG] ME: Bringup Loader Failure : NO
[DEBUG] ME: Firmware Init Complete : NO
[DEBUG] ME: Manufacturing Mode : YES
[DEBUG] ME: Boot Options Present : NO
[DEBUG] ME: Update In Progress : NO
[DEBUG] ME: Current Working State : Initializing
[DEBUG] ME: Current Operation State : Bring up
[DEBUG] ME: Current Operation Mode : Debug
[DEBUG] ME: Error Code : No Error
[DEBUG] ME: Progress Phase : BUP Phase
[DEBUG] ME: Power Management Event : Clean Moff->Mx wake
[DEBUG] ME: Progress Phase State : 0x4d
[CRIT ] intel_me_path: mbp is not ready!
[NOTE ] ME: BIOS path: Error
[ERROR] ME: MBP not ready
[DEBUG] PCI: 00:16.0 init finished in 0 msecs
[DEBUG] PCI: 00:19.0 init
[DEBUG] PCI: 00:19.0 init finished in 0 msecs
[DEBUG] PCI: 00:1a.0 init
[DEBUG] EHCI: Setting up controller.. done.
[DEBUG] PCI: 00:1a.0 init finished in 0 msecs
[DEBUG] PCI: 00:1b.0 init
[DEBUG] Azalia: base = 0xdf9c0000
[DEBUG] Azalia: codec_mask = 01
[DEBUG] azalia_audio: Initializing codec #0
[DEBUG] azalia_audio: codec viddid: 10ec0292
[DEBUG] azalia_audio: verb_size: 128
[DEBUG] azalia_audio: verb loaded.
[DEBUG] PCI: 00:1b.0 init finished in 7 msecs
[DEBUG] PCI: 00:1c.0 init
[DEBUG] Initializing PCH PCIe bridge.
[DEBUG] PCI: 00:1c.0 init finished in 0 msecs
[DEBUG] PCI: 00:1c.1 init
[DEBUG] Initializing PCH PCIe bridge.
[DEBUG] PCI: 00:1c.1 init finished in 0 msecs
[DEBUG] PCI: 00:1d.0 init
[DEBUG] EHCI: Setting up controller.. done.
[DEBUG] PCI: 00:1d.0 init finished in 0 msecs
[DEBUG] PCI: 00:1f.0 init
[DEBUG] pch: lpc_init
[DEBUG] IOAPIC: Initializing IOAPIC at 0xfec00000
[DEBUG] IOAPIC: ID = 0x00
[DEBUG] IOAPIC: 24 interrupts
[DEBUG] IOAPIC: Clearing IOAPIC at 0xfec00000
[DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00
[INFO ] Set power off after power failure.
[INFO ] NMI sources disabled.
[DEBUG] LynxPoint H PM init
[DEBUG] RTC: failed = 0x0
[DEBUG] RTC Init
[DEBUG] apm_control: Disabling ACPI.
[DEBUG] APMC done.
[DEBUG] PCI: 00:1f.0 init finished in 0 msecs
[DEBUG] PCI: 00:1f.2 init
[DEBUG] SATA: Initializing...
[DEBUG] SATA: Controller in AHCI mode.
[DEBUG] ABAR: 0xdf9be000
[DEBUG] PCI: 00:1f.2 init finished in 0 msecs
[DEBUG] PCI: 00:1f.3 init
[DEBUG] PCI: 00:1f.3 init finished in 0 msecs
[DEBUG] PCI: 02:00.0 init
[DEBUG] PCI: 02:00.0 init finished in 0 msecs
[DEBUG] PCI: 03:00.0 init
[DEBUG] PCI: 03:00.0 init finished in 0 msecs
[DEBUG] PNP: 00ff.2 init
[DEBUG] PNP: 00ff.2 init finished in 0 msecs
[INFO ] Devices initialized
[DEBUG] BS: BS_DEV_INIT run times (exec / console): 248 / 0 ms
[INFO ] Found TPM ST33ZP24 by ST Microelectronics
[DEBUG] TPM: Startup
[DEBUG] TPM: command 0x99 returned 0x0
[DEBUG] TPM: Asserting physical presence
[DEBUG] TPM: command 0x4000000a returned 0x0
[DEBUG] TPM: command 0x65 returned 0x0
[DEBUG] TPM: flags disable=0, deactivated=0, nvlocked=1
[INFO ] TPM: setup succeeded
[DEBUG] BS: BS_DEV_INIT exit times (exec / console): 57 / 0 ms
[INFO ] Finalize devices...
[DEBUG] PCI: 00:00.0 final
[DEBUG] PCI: 00:16.0 final
[INFO ] ME: MBP cleared
[DEBUG] PCI: 00:1b.0 final
[DEBUG] PCI: 00:1f.0 final
[DEBUG] flash size 0x2800000 bytes
[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x2800000
[ERROR] SF size 0x2800000 does not correspond to CONFIG_ROM_SIZE 0xc00000!!
[DEBUG] apm_control: Finalizing SMM.
[DEBUG] APMC done.
[INFO ] Devices finalized
[INFO ] CBFS: Found 'fallback/dsdt.aml' @0x39500 size 0x36a1 in mcache @0x7f7dd1d8
[WARN ] CBFS: 'fallback/slic' not found.
[INFO ] ACPI: Writing ACPI tables at 7f743000.
[DEBUG] ACPI: * FACS
[DEBUG] ACPI: * DSDT
[DEBUG] ACPI: * FADT
[DEBUG] ACPI: added table 1/32, length now 40
[DEBUG] ACPI: * SSDT
[DEBUG] Found 1 CPU(s) with 4 core(s) each.
[DEBUG] PSS: 2901MHz power 37000 control 0x2400 status 0x2400
[DEBUG] PSS: 2900MHz power 37000 control 0x1d00 status 0x1d00
[DEBUG] PSS: 2400MHz power 28854 control 0x1800 status 0x1800
[DEBUG] PSS: 2000MHz power 22943 control 0x1400 status 0x1400
[DEBUG] PSS: 1600MHz power 17471 control 0x1000 status 0x1000
[DEBUG] PSS: 1200MHz power 12469 control 0xc00 status 0xc00
[DEBUG] PSS: 800MHz power 7885 control 0x800 status 0x800
[DEBUG] PSS: 2901MHz power 37000 control 0x2400 status 0x2400
[DEBUG] PSS: 2900MHz power 37000 control 0x1d00 status 0x1d00
[DEBUG] PSS: 2400MHz power 28854 control 0x1800 status 0x1800
[DEBUG] PSS: 2000MHz power 22943 control 0x1400 status 0x1400
[DEBUG] PSS: 1600MHz power 17471 control 0x1000 status 0x1000
[DEBUG] PSS: 1200MHz power 12469 control 0xc00 status 0xc00
[DEBUG] PSS: 800MHz power 7885 control 0x800 status 0x800
[DEBUG] PSS: 2901MHz power 37000 control 0x2400 status 0x2400
[DEBUG] PSS: 2900MHz power 37000 control 0x1d00 status 0x1d00
[DEBUG] PSS: 2400MHz power 28854 control 0x1800 status 0x1800
[DEBUG] PSS: 2000MHz power 22943 control 0x1400 status 0x1400
[DEBUG] PSS: 1600MHz power 17471 control 0x1000 status 0x1000
[DEBUG] PSS: 1200MHz power 12469 control 0xc00 status 0xc00
[DEBUG] PSS: 800MHz power 7885 control 0x800 status 0x800
[DEBUG] PSS: 2901MHz power 37000 control 0x2400 status 0x2400
[DEBUG] PSS: 2900MHz power 37000 control 0x1d00 status 0x1d00
[DEBUG] PSS: 2400MHz power 28854 control 0x1800 status 0x1800
[DEBUG] PSS: 2000MHz power 22943 control 0x1400 status 0x1400
[DEBUG] PSS: 1600MHz power 17471 control 0x1000 status 0x1000
[DEBUG] PSS: 1200MHz power 12469 control 0xc00 status 0xc00
[DEBUG] PSS: 800MHz power 7885 control 0x800 status 0x800
[DEBUG] Generating ACPI PIRQ entries
[INFO ] ACPI: * H8
[INFO ] H8: BDC detection not implemented. Assuming BDC installed
[INFO ] H8: WWAN detection not implemented. Assuming WWAN installed
[INFO ] \_SB_.PCI0.TPM: LPC TPM PNP: 0c31.0
[DEBUG] ACPI: added table 2/32, length now 44
[DEBUG] ACPI: * MCFG
[DEBUG] ACPI: added table 3/32, length now 48
[DEBUG] ACPI: * TCPA
[DEBUG] TCPA log created at 0x7f733000
[DEBUG] ACPI: added table 4/32, length now 52
[DEBUG] ACPI: * MADT
[DEBUG] IOAPIC: 24 interrupts
[DEBUG] ACPI: added table 5/32, length now 56
[DEBUG] ACPI: * SPCR
[DEBUG] current = 7f7482f0
[DEBUG] ACPI: * DMAR
[DEBUG] ACPI: added table 6/32, length now 60
[DEBUG] ACPI: * HPET
[DEBUG] ACPI: added table 7/32, length now 64
[DEBUG] current = 7f7483f0
[INFO ] ACPI: done.
[DEBUG] ACPI tables: 21488 bytes.
[DEBUG] smbios_write_tables: 7f72b000
[DEBUG] SMBIOS firmware version is set to coreboot_version: '4.20-522-g251491c9d7'
[INFO ] Create SMBIOS type 16
[INFO ] Create SMBIOS type 17
[INFO ] Create SMBIOS type 20
[INFO ] PCI: 03:00.0 (unknown)
[DEBUG] SMBIOS tables: 1119 bytes.
[DEBUG] Writing table forward entry at 0x00000500
[DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 1068
[DEBUG] Writing coreboot table at 0x7f767000
[DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
[DEBUG] 1. 0000000000001000-000000000009ffff: RAM
[DEBUG] 2. 00000000000a0000-00000000000fffff: RESERVED
[DEBUG] 3. 0000000000100000-000000007f72afff: RAM
[DEBUG] 4. 000000007f72b000-000000007f783fff: CONFIGURATION TABLES
[DEBUG] 5. 000000007f784000-000000007f7cdfff: RAMSTAGE
[DEBUG] 6. 000000007f7ce000-000000007f7fffff: CONFIGURATION TABLES
[DEBUG] 7. 000000007f800000-00000000821fffff: RESERVED
[DEBUG] 8. 00000000f0000000-00000000f3ffffff: RESERVED
[DEBUG] 9. 00000000fed10000-00000000fed19fff: RESERVED
[DEBUG] 10. 00000000fed40000-00000000fed44fff: RESERVED
[DEBUG] 11. 00000000fed80000-00000000fed84fff: RESERVED
[DEBUG] 12. 00000000fed90000-00000000fed91fff: RESERVED
[DEBUG] 13. 0000000100000000-000000047ddfffff: RAM
[DEBUG] Wrote coreboot table at: 0x7f767000, 0x3d4 bytes, checksum a815
[DEBUG] coreboot table: 1004 bytes.
[DEBUG] IMD ROOT 0. 0x7f7ff000 0x00001000
[DEBUG] IMD SMALL 1. 0x7f7fe000 0x00001000
[DEBUG] CONSOLE 2. 0x7f7de000 0x00020000
[DEBUG] RO MCACHE 3. 0x7f7dd000 0x00000468
[DEBUG] TIME STAMP 4. 0x7f7dc000 0x00000910
[DEBUG] MEM INFO 5. 0x7f7db000 0x000007a8
[DEBUG] AFTER CAR 6. 0x7f7ce000 0x0000d000
[DEBUG] RAMSTAGE 7. 0x7f783000 0x0004b000
[DEBUG] SMM BACKUP 8. 0x7f773000 0x00010000
[DEBUG] IGD OPREGION 9. 0x7f76f000 0x00003130
[DEBUG] COREBOOT 10. 0x7f767000 0x00008000
[DEBUG] ACPI 11. 0x7f743000 0x00024000
[DEBUG] TCPA TCGLOG12. 0x7f733000 0x00010000
[DEBUG] SMBIOS 13. 0x7f72b000 0x00008000
[DEBUG] IMD small region:
[DEBUG] IMD ROOT 0. 0x7f7fec00 0x00000400
[DEBUG] FMAP 1. 0x7f7feb20 0x000000e0
[DEBUG] ROMSTAGE 2. 0x7f7feb00 0x00000004
[DEBUG] ROMSTG STCK 3. 0x7f7fea40 0x000000a8
[DEBUG] ACPI GNVS 4. 0x7f7fe980 0x000000b0
[DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 4 / 0 ms
[INFO ] CBFS: Found 'fallback/payload' @0x42f80 size 0x11897 in mcache @0x7f7dd2a0
[DEBUG] Checking segment from ROM address 0xffc531ac
[DEBUG] Payload being loaded at below 1MiB without region being marked as RAM usable.
[DEBUG] Checking segment from ROM address 0xffc531c8
[DEBUG] Loading segment from ROM address 0xffc531ac
[DEBUG] code (compression=1)
[DEBUG] New segment dstaddr 0x000deda0 memsize 0x21260 srcaddr 0xffc531e4 filesize 0x1185f
[DEBUG] Loading Segment: addr: 0x000deda0 memsz: 0x0000000000021260 filesz: 0x000000000001185f
[DEBUG] using LZMA
[DEBUG] Loading segment from ROM address 0xffc531c8
[DEBUG] Entry Point 0x000fd25b
[DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 0 ms
[DEBUG] ICH-NM10-PCH: watchdog disabled
[DEBUG] Jumping to boot code at 0x000fd25b(0x7f767000)
SeaBIOS (version rel-1.16.2-0-gea1b7a0)
BUILD: gcc: (coreboot toolchain v2023-06-24_2b4d2edfd6) 11.3.0 binutils: (GNU Binutils) 2.40
Found coreboot cbmem console @ 7f7de000
Found mainboard LENOVO ThinkPad T440p
Relocating init from 0x000e0500 to 0x7e71da80 (size 54496)
Found CBFS header at 0xffc1022c
multiboot: eax=7f7bb49c, ebx=7f7bb464
Found 17 PCI devices (max PCI bus is 03)
Copying SMBIOS from 0x7f72b000 to 0x000f67c0
Copying SMBIOS 3.0 from 0x7f72b020 to 0x000f67a0
Copying ACPI RSDP from 0x7f743000 to 0x000f6770
table(50434146)=0x7f746940 (via xsdt)
Using pmtimer, ioport 0x508
table(41504354)=0x7f748230 (via xsdt)
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.16.2-0-gea1b7a0)
PCI: XHCI at 00:14.0 (mmio 0xdf9d0000)
XHCI init: regs @ 0xdf9d0000, 21 ports, 32 slots, 32 byte contexts
XHCI protocol USB 2.00, 15 ports (offset 1), def 3001
XHCI protocol USB 3.00, 6 ports (offset 16), def 1000
XHCI extcap 0xc1 @ 0xdf9d8040
XHCI extcap 0xc0 @ 0xdf9d8070
XHCI extcap 0x1 @ 0xdf9d846c
EHCI init on dev 00:1a.0 (regs=0xdf9bd020)
EHCI init on dev 00:1d.0 (regs=0xdf9bc020)
AHCI controller at 00:1f.2, iobase 0xdf9be000, irq 10
Searching bootorder for: HALT
Found 0 lpt ports
Found 0 serial ports
Discarding ps2 data aa (status=11)
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@5/disk@0
AHCI/5: Set transfer mode to UDMA-6
Searching bios-geometry for: /pci@i0cf8/*@1f,2/drive@5/disk@0
AHCI/5: registering: "AHCI/5: Samsung SSD 840 EVO 120GB ATA-9 Hard-Disk (111 GiBytes)"
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0
AHCI/0: Set transfer mode to UDMA-6
Searching bios-geometry for: /pci@i0cf8/*@1f,2/drive@0/disk@0
AHCI/0: registering: "AHCI/0: SK hynix SC311 SATA 128GB ATA-10 Hard-Disk (119 GiBytes)"
XHCI no devices found
Initialized USB HUB (0 ports used)
Initialized USB HUB (0 ports used)
PS2 keyboard initialized
All threads complete.
Scan for option roms

Press ESC for boot menu.



[NOTE ] coreboot-4.20-522-g251491c9d7 Fri Jun 30 23:57:55 UTC 2023 x86_32 bootblock starting (log level: 7)...
[DEBUG] FMAP: Found "FLASH" version 1.1 at 0x810000.
[DEBUG] FMAP: base = 0xff400000 size = 0xc00000 #areas = 4
[DEBUG] FMAP: area COREBOOT found @ 810200 (4128256 bytes)
[INFO ] CBFS: mcache @0xff7c2e00 built for 21 files, used 0x468 of 0x4000 bytes
[WARN ] CBFS: 'coreboot-stages' not found.
[INFO ] CBFS: Found 'fallback/romstage' @0x80 size 0xc128 in mcache @0xff7c2e2c
[DEBUG] BS: bootblock times (exec / console): total (unknown) / 0 ms


[NOTE ] coreboot-4.20-522-g251491c9d7 Fri Jun 30 23:57:55 UTC 2023 x86_32 romstage starting (log level: 7)...
[DEBUG] Disabling Watchdog reboot... done.
[DEBUG] SMBus controller enabled
[DEBUG] Setting up static northbridge registers... done.
[DEBUG] Started PEG11 link training.
[DEBUG] Temporarily hiding PEG11.
[DEBUG] Started PEG10 link training.
[DEBUG] Temporarily hiding PEG10.
[DEBUG] Initializing IGD...
[DEBUG] Back from haswell_early_initialization()
[DEBUG] CPU id(306c3) ucode:00000028 Intel(R) Core(TM) i7-4600M CPU @ 2.90GHz
[DEBUG] AES supported, TXT supported, VT supported
[DEBUG] PCH type: QM87, device id: 8c4f, rev id 5
[DEBUG] Starting UEFI PEI System Agent
[DEBUG] FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes)
[DEBUG] prepare_mrc_cache: at 0xffc00034, size fd4
[DEBUG] FMAP: area COREBOOT found @ 810200 (4128256 bytes)
[INFO ] CBFS: Found 'mrc.bin' @0x38fdc0 size 0x2e6e4 in mcache @0xff7c31e4
System Agent: Starting up...
System Agent: Initializing PCH
install_ppi: overwrite GUID {ed097352-9041-445a-80b6-b29d509e8845}
install_ppi: overwrite GUID {908c7f8b-5c48-47fb-8357-f5fd4e235276}
System Agent: Initializing PCH (SMBUS)
System Agent: Initializing PCH (USB)
System Agent: Initializing PCH (SA Init)
System Agent: Initializing PCH (Me UMA)
System Agent: Initializing Memory
System Agent: Done.
Sanity checking heap.
[DEBUG] MRC Version 1.6.1 Build 2
[DEBUG] memcfg DDR3 clock 1600 MHz
[DEBUG] memcfg channel assignment: A: 0, B 1, C 2
[DEBUG] memcfg channel[0] config (00620020):
[DEBUG] ECC inactive
[DEBUG] enhanced interleave mode on
[DEBUG] rank interleave on
[DEBUG] DIMMA 8192 MB width x8 or x32 dual rank, selected
[DEBUG] DIMMB 0 MB width x8 or x32 single rank
[DEBUG] memcfg channel[1] config (00620020):
[DEBUG] ECC inactive
[DEBUG] enhanced interleave mode on
[DEBUG] rank interleave on
[DEBUG] DIMMA 8192 MB width x8 or x32 dual rank, selected
[DEBUG] DIMMB 0 MB width x8 or x32 single rank
[DEBUG] ME: FW Partition Table : OK
[DEBUG] ME: Bringup Loader Failure : NO
[DEBUG] ME: Firmware Init Complete : NO
[DEBUG] ME: Manufacturing Mode : YES
[DEBUG] ME: Boot Options Present : NO
[DEBUG] ME: Update In Progress : NO
[DEBUG] ME: Current Working State : Initializing
[DEBUG] ME: Current Operation State : Bring up
[DEBUG] ME: Current Operation Mode : Debug
[DEBUG] ME: Error Code : No Error
[DEBUG] ME: Progress Phase : BUP Phase
[DEBUG] ME: Power Management Event : Pseudo-global reset
[DEBUG] ME: Progress Phase State : 0x4d
[DEBUG] CBMEM:
[DEBUG] IMD: root @ 0x7f7ff000 254 entries.
[DEBUG] IMD: root @ 0x7f7fec00 62 entries.
[DEBUG] External stage cache:
[DEBUG] IMD: root @ 0x7fbff000 254 entries.
[DEBUG] IMD: root @ 0x7fbfec00 62 entries.
[DEBUG] FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes)
[DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'.
[DEBUG] flash size 0x2800000 bytes
[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x2800000
[ERROR] SF size 0x2800000 does not correspond to CONFIG_ROM_SIZE 0xc00000!!
[DEBUG] MRC: 'RW_MRC_CACHE' does not need update.
[DEBUG] Unhiding PEG10.
[DEBUG] Unhiding PEG11.
[DEBUG] SMM Memory Map
[DEBUG] SMRAM : 0x7f800000 0x800000
[DEBUG] Subregion 0: 0x7f800000 0x300000
[DEBUG] Subregion 1: 0x7fb00000 0x100000
[DEBUG] Subregion 2: 0x7fc00000 0x400000
[DEBUG] Normal boot
[INFO ] CBFS: Found 'fallback/postcar' @0x3d700 size 0x5814 in mcache @0xff7c305c
[DEBUG] Loading module at 0x7f7cf000 with entry 0x7f7cf031. filesize: 0x5460 memsize: 0xb798
[DEBUG] Processing 221 relocs. Offset value of 0x7d7cf000
[DEBUG] BS: romstage times (exec / console): total (unknown) / 1 ms


[NOTE ] coreboot-4.20-522-g251491c9d7 Fri Jun 30 23:57:55 UTC 2023 x86_32 postcar starting (log level: 7)...
[DEBUG] Normal boot
[DEBUG] FMAP: area COREBOOT found @ 810200 (4128256 bytes)
[INFO ] CBFS: Found 'fallback/ramstage' @0x1bb40 size 0x1c882 in mcache @0x7f7dd10c
[DEBUG] Loading module at 0x7f784000 with entry 0x7f784000. filesize: 0x38038 memsize: 0x49170
[DEBUG] Processing 3976 relocs. Offset value of 0x7b784000
[DEBUG] BS: postcar times (exec / console): total (unknown) / 0 ms


[NOTE ] coreboot-4.20-522-g251491c9d7 Fri Jun 30 23:57:55 UTC 2023 x86_32 ramstage starting (log level: 7)...
[DEBUG] Normal boot
[INFO ] Enumerating buses...
[DEBUG] Root Device scanning...
[DEBUG] CPU_CLUSTER: 0 enabled
[DEBUG] DOMAIN: 0000 enabled
[DEBUG] DOMAIN: 0000 scanning...
[DEBUG] PCI: pci_scan_bus for bus 00
[DEBUG] PCI: 00:00.0 [8086/0c04] enabled
[INFO ] PCI: Static device PCI: 00:01.0 not found, disabling it.
[DEBUG] PCI: 00:01.1 [8086/0c05] enabled
[DEBUG] PCI: 00:02.0 [8086/0416] enabled
[DEBUG] PCI: 00:03.0 [8086/0c0c] enabled
[DEBUG] PCI: 00:04.0 [8086/0c03] enabled
[DEBUG] PCI: 00:14.0 [8086/8c31] enabled
[DEBUG] PCI: 00:16.0 [8086/8c3a] enabled
[DEBUG] PCI: 00:16.1: Disabling device
[DEBUG] PCI: 00:16.2: Disabling device
[DEBUG] PCI: 00:16.3: Disabling device
[DEBUG] PCI: 00:19.0 [8086/1502] enabled
[DEBUG] PCI: 00:1a.0 [8086/8c2d] enabled
[DEBUG] PCI: 00:1b.0 [8086/8c20] enabled
[DEBUG] PCIe Root Port 1 ASPM is disabled
[DEBUG] PCI: 00:1c.0 [8086/8c10] enabled
[DEBUG] PCIe Root Port 2 ASPM is disabled
[DEBUG] PCI: 00:1c.1 [8086/8c12] enabled
[DEBUG] PCI: 00:1c.2 [8086/8c14] disabled
[DEBUG] PCI: 00:1c.3 [8086/8c16] disabled
[DEBUG] Adjusted number of PCIe root ports to 5 as per strpfusecfg2
[DEBUG] PCI: 00:1c.2: Disabling device
[DEBUG] PCI: 00:1c.3: Disabling device
[DEBUG] PCI: 00:1c.4: Disabling device
[DEBUG] PCI: 00:1c.4 [8086/8c18] disabled
[DEBUG] PCI: 00:1d.0 [8086/8c26] enabled
[DEBUG] PCI: 00:1f.0 [8086/8c4f] enabled
[DEBUG] PCI: 00:1f.2 [8086/8c03] enabled
[DEBUG] PCI: 00:1f.3 [8086/8c22] enabled
[DEBUG] PCI: 00:1f.5: Disabling device
[DEBUG] PCI: 00:1f.6: Disabling device
[WARN ] PCI: Leftover static devices:
[WARN ] PCI: 00:01.0
[WARN ] PCI: 00:16.1
[WARN ] PCI: 00:16.2
[WARN ] PCI: 00:16.3
[WARN ] PCI: 00:1c.5
[WARN ] PCI: 00:1c.6
[WARN ] PCI: 00:1c.7
[WARN ] PCI: 00:1f.5
[WARN ] PCI: 00:1f.6
[WARN ] PCI: Check your devicetree.cb.
[DEBUG] PCI: 00:01.1 scanning...
[DEBUG] PCI: pci_scan_bus for bus 01
[DEBUG] scan_bus: bus PCI: 00:01.1 finished in 0 msecs
[DEBUG] PCI: 00:1c.0 scanning...
[DEBUG] PCI: pci_scan_bus for bus 02
[DEBUG] PCI: 02:00.0 [10ec/5227] enabled
[INFO ] Enabling Common Clock Configuration
[INFO ] ASPM: Enabled L0s and L1
[INFO ] PCIe: Max_Payload_Size adjusted to 128
[INFO ] PCI: 02:00.0: Enabled LTR
[DEBUG] scan_bus: bus PCI: 00:1c.0 finished in 0 msecs
[DEBUG] PCI: 00:1c.1 scanning...
[DEBUG] PCI: pci_scan_bus for bus 03
[DEBUG] PCI: 03:00.0 [8086/08b2] enabled
[INFO ] Enabling Common Clock Configuration
[INFO ] ASPM: Enabled L1
[INFO ] PCIe: Max_Payload_Size adjusted to 128
[INFO ] PCI: 03:00.0: Enabled LTR
[DEBUG] scan_bus: bus PCI: 00:1c.1 finished in 0 msecs
[DEBUG] PCI: 00:1f.0 scanning...
[INFO ] PMH7: ID 05 Revision 12
[DEBUG] PNP: 00ff.1 enabled
[INFO ] H8: EC Firmware ID GLHT30WW-3.23, Version 3.01B
[INFO ] H8: WWAN detection not implemented. Assuming WWAN installed
[DEBUG] PNP: 00ff.2 enabled
[DEBUG] PNP: 0c31.0 enabled
[DEBUG] scan_bus: bus PCI: 00:1f.0 finished in 3 msecs
[DEBUG] PCI: 00:1f.3 scanning...
[DEBUG] scan_bus: bus PCI: 00:1f.3 finished in 0 msecs
[DEBUG] scan_bus: bus DOMAIN: 0000 finished in 3 msecs
[DEBUG] scan_bus: bus Root Device finished in 3 msecs
[INFO ] done
[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 0 ms
[DEBUG] found VGA at PCI: 00:02.0
[DEBUG] Setting up VGA for PCI: 00:02.0
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
[INFO ] Allocating resources...
[INFO ] Reading resources...
[DEBUG] mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff.
[DEBUG] mc_add_fixed_mmio_resources: Adding DMIBAR @ 68 0xfed18000-0xfed18fff.
[DEBUG] mc_add_fixed_mmio_resources: Adding EPBAR @ 40 0xfed19000-0xfed19fff.
[DEBUG] mc_add_fixed_mmio_resources: Adding GDXCBAR @ 5420 0xfed84000-0xfed84fff.
[DEBUG] mc_add_fixed_mmio_resources: Adding EDRAMBAR @ 5408 0xfed80000-0xfed83fff.
[DEBUG] Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
[DEBUG] MC MAP: TOM: 0x400000000
[DEBUG] MC MAP: TOUUD: 0x47de00000
[DEBUG] MC MAP: MESEG_BASE: 0x7ffff00000
[DEBUG] MC MAP: MESEG_LIMIT: 0xfffff
[DEBUG] MC MAP: REMAP_BASE: 0x400000000
[DEBUG] MC MAP: REMAP_LIMIT: 0x47ddfffff
[DEBUG] MC MAP: TOLUD: 0x82200000
[DEBUG] MC MAP: BGSM: 0x80000000
[DEBUG] MC MAP: BDSM: 0x80200000
[DEBUG] MC MAP: TSEGMB: 0x7f800000
[DEBUG] MC MAP: GGC: 0x209
[DEBUG] MC MAP: DPR: 0x7f800001
[INFO ] Available memory above 4GB: 14302M
[ERROR] PNP: 00ff.1 missing read_resources
[ERROR] PNP: 00ff.2 missing read_resources
[INFO ] Done reading resources.
[INFO ] === Resource allocator: DOMAIN: 0000 - Pass 1 (relative placement) ===
[DEBUG] PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG] PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
[DEBUG] PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG] PCI: 02:00.0 10 * [0x0 - 0xfff] mem
[DEBUG] PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG] PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG] PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[DEBUG] PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG] PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done
[DEBUG] PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG] PCI: 03:00.0 10 * [0x0 - 0x1fff] mem
[DEBUG] PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG] PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG] PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[INFO ] === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
[DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 84 base 00001600 limit 0000167f io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 88 base 000015e0 limit 000015ef io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed)
[INFO ] DOMAIN: 0000: Resource ranges:
[INFO ] * Base: 1000, Size: 5e0, Tag: 100
[INFO ] * Base: 15f0, Size: 10, Tag: 100
[INFO ] * Base: 1680, Size: e980, Tag: 100
[DEBUG] PCI: 00:02.0 20 * [0xffc0 - 0xffff] limit: ffff io
[DEBUG] PCI: 00:19.0 18 * [0xffa0 - 0xffbf] limit: ffbf io
[DEBUG] PCI: 00:1f.2 20 * [0xff80 - 0xff9f] limit: ff9f io
[DEBUG] PCI: 00:1f.2 10 * [0xff78 - 0xff7f] limit: ff7f io
[DEBUG] PCI: 00:1f.2 18 * [0xff70 - 0xff77] limit: ff77 io
[DEBUG] PCI: 00:1f.2 14 * [0xff6c - 0xff6f] limit: ff6f io
[DEBUG] PCI: 00:1f.2 1c * [0xff68 - 0xff6b] limit: ff6b io
[DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
[DEBUG] DOMAIN: 0000 mem: base: 7f800000 size: 0 align: 0 gran: 0 limit: efffffff
[DEBUG] DOMAIN: 0000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 48 base fed10000 limit fed17fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 68 base fed18000 limit fed18fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 40 base fed19000 limit fed19fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 5420 base fed84000 limit fed84fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 5408 base fed80000 limit fed83fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 00 base fed90000 limit fed90fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 01 base fed91000 limit fed91fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 02 base 00000000 limit 0009ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 03 base 000c0000 limit 7f7fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 04 base 7f800000 limit 7fffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 05 base 80000000 limit 821fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 06 base 100000000 limit 47ddfffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 31fe base fec00000 limit ffffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
[INFO ] DOMAIN: 0000: Resource ranges:
[INFO ] * Base: 82200000, Size: 6de00000, Tag: 200
[INFO ] * Base: 47de00000, Size: 7b82200000, Tag: 200
[DEBUG] PCI: 00:02.0 18 * [0xe0000000 - 0xefffffff] limit: efffffff prefmem
[DEBUG] PCI: 00:02.0 10 * [0xdfc00000 - 0xdfffffff] limit: dfffffff mem
[DEBUG] PCI: 00:1c.0 20 * [0xdfb00000 - 0xdfbfffff] limit: dfbfffff mem
[DEBUG] PCI: 00:1c.1 20 * [0xdfa00000 - 0xdfafffff] limit: dfafffff mem
[DEBUG] PCI: 00:19.0 10 * [0xdf9e0000 - 0xdf9fffff] limit: df9fffff mem
[DEBUG] PCI: 00:14.0 10 * [0xdf9d0000 - 0xdf9dffff] limit: df9dffff mem
[DEBUG] PCI: 00:04.0 10 * [0xdf9c8000 - 0xdf9cffff] limit: df9cffff mem
[DEBUG] PCI: 00:03.0 10 * [0xdf9c4000 - 0xdf9c7fff] limit: df9c7fff mem
[DEBUG] PCI: 00:1b.0 10 * [0xdf9c0000 - 0xdf9c3fff] limit: df9c3fff mem
[DEBUG] PCI: 00:19.0 14 * [0xdf9bf000 - 0xdf9bffff] limit: df9bffff mem
[DEBUG] PCI: 00:1f.2 24 * [0xdf9be000 - 0xdf9be7ff] limit: df9be7ff mem
[DEBUG] PCI: 00:1a.0 10 * [0xdf9bd000 - 0xdf9bd3ff] limit: df9bd3ff mem
[DEBUG] PCI: 00:1d.0 10 * [0xdf9bc000 - 0xdf9bc3ff] limit: df9bc3ff mem
[DEBUG] PCI: 00:1f.3 10 * [0xdf9bb000 - 0xdf9bb0ff] limit: df9bb0ff mem
[DEBUG] PCI: 00:16.0 10 * [0xdf9ba000 - 0xdf9ba00f] limit: df9ba00f mem
[DEBUG] DOMAIN: 0000 mem: base: 7f800000 size: 0 align: 0 gran: 0 limit: efffffff done
[DEBUG] DOMAIN: 0000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff done
[DEBUG] PCI: 02:00.0 10 * [0xdfb00000 - 0xdfb00fff] limit: dfb00fff mem
[DEBUG] PCI: 03:00.0 10 * [0xdfa00000 - 0xdfa01fff] limit: dfa01fff mem
[INFO ] === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
[DEBUG] PCI: 00:01.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 01 io
[DEBUG] PCI: 00:01.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
[DEBUG] PCI: 00:01.1 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 bus 01 mem
[DEBUG] PCI: 00:02.0 10 <- [0x00000000dfc00000 - 0x00000000dfffffff] size 0x00400000 gran 0x16 mem64
[DEBUG] PCI: 00:02.0 18 <- [0x00000000e0000000 - 0x00000000efffffff] size 0x10000000 gran 0x1c prefmem64
[DEBUG] PCI: 00:02.0 20 <- [0x000000000000ffc0 - 0x000000000000ffff] size 0x00000040 gran 0x06 io
[DEBUG] PCI: 00:03.0 10 <- [0x00000000df9c4000 - 0x00000000df9c7fff] size 0x00004000 gran 0x0e mem64
[DEBUG] PCI: 00:04.0 10 <- [0x00000000df9c8000 - 0x00000000df9cffff] size 0x00008000 gran 0x0f mem64
[DEBUG] PCI: 00:14.0 10 <- [0x00000000df9d0000 - 0x00000000df9dffff] size 0x00010000 gran 0x10 mem64
[DEBUG] PCI: 00:16.0 10 <- [0x00000000df9ba000 - 0x00000000df9ba00f] size 0x00000010 gran 0x04 mem64
[DEBUG] PCI: 00:19.0 10 <- [0x00000000df9e0000 - 0x00000000df9fffff] size 0x00020000 gran 0x11 mem
[DEBUG] PCI: 00:19.0 14 <- [0x00000000df9bf000 - 0x00000000df9bffff] size 0x00001000 gran 0x0c mem
[DEBUG] PCI: 00:19.0 18 <- [0x000000000000ffa0 - 0x000000000000ffbf] size 0x00000020 gran 0x05 io
[DEBUG] PCI: 00:1a.0 10 <- [0x00000000df9bd000 - 0x00000000df9bd3ff] size 0x00000400 gran 0x0a mem
[DEBUG] PCI: 00:1b.0 10 <- [0x00000000df9c0000 - 0x00000000df9c3fff] size 0x00004000 gran 0x0e mem64
[DEBUG] PCI: 00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 02 io
[DEBUG] PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
[DEBUG] PCI: 00:1c.0 20 <- [0x00000000dfb00000 - 0x00000000dfbfffff] size 0x00100000 gran 0x14 bus 02 mem
[DEBUG] PCI: 02:00.0 10 <- [0x00000000dfb00000 - 0x00000000dfb00fff] size 0x00001000 gran 0x0c mem
[DEBUG] PCI: 00:1c.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 03 io
[DEBUG] PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
[DEBUG] PCI: 00:1c.1 20 <- [0x00000000dfa00000 - 0x00000000dfafffff] size 0x00100000 gran 0x14 bus 03 mem
[DEBUG] PCI: 03:00.0 10 <- [0x00000000dfa00000 - 0x00000000dfa01fff] size 0x00002000 gran 0x0d mem64
[DEBUG] PCI: 00:1d.0 10 <- [0x00000000df9bc000 - 0x00000000df9bc3ff] size 0x00000400 gran 0x0a mem
[ERROR] PNP: 00ff.1 missing set_resources
[ERROR] PNP: 00ff.2 missing set_resources
[DEBUG] PCI: 00:1f.2 10 <- [0x000000000000ff78 - 0x000000000000ff7f] size 0x00000008 gran 0x03 io
[DEBUG] PCI: 00:1f.2 14 <- [0x000000000000ff6c - 0x000000000000ff6f] size 0x00000004 gran 0x02 io
[DEBUG] PCI: 00:1f.2 18 <- [0x000000000000ff70 - 0x000000000000ff77] size 0x00000008 gran 0x03 io
[DEBUG] PCI: 00:1f.2 1c <- [0x000000000000ff68 - 0x000000000000ff6b] size 0x00000004 gran 0x02 io
[DEBUG] PCI: 00:1f.2 20 <- [0x000000000000ff80 - 0x000000000000ff9f] size 0x00000020 gran 0x05 io
[DEBUG] PCI: 00:1f.2 24 <- [0x00000000df9be000 - 0x00000000df9be7ff] size 0x00000800 gran 0x0b mem
[DEBUG] PCI: 00:1f.3 10 <- [0x00000000df9bb000 - 0x00000000df9bb0ff] size 0x00000100 gran 0x08 mem64
[INFO ] Done setting resources.
[INFO ] Done allocating resources.
[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 2 / 0 ms
[INFO ] Enabling resources...
[DEBUG] PCI: 00:00.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:00.0 cmd <- 06
[DEBUG] PCI: 00:01.1 bridge ctrl <- 0013
[DEBUG] PCI: 00:01.1 subsystem <- 17aa/220e
[DEBUG] PCI: 00:01.1 cmd <- 00
[DEBUG] PCI: 00:02.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:02.0 cmd <- 03
[DEBUG] PCI: 00:03.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:03.0 cmd <- 02
[DEBUG] PCI: 00:04.0 cmd <- 02
[DEBUG] PCI: 00:14.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:14.0 cmd <- 102
[DEBUG] PCI: 00:16.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:16.0 cmd <- 02
[DEBUG] PCI: 00:19.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:19.0 cmd <- 103
[DEBUG] PCI: 00:1a.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1a.0 cmd <- 102
[DEBUG] PCI: 00:1b.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1b.0 cmd <- 102
[DEBUG] PCI: 00:1c.0 bridge ctrl <- 0013
[DEBUG] PCI: 00:1c.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1c.0 cmd <- 06
[DEBUG] PCI: 00:1c.1 bridge ctrl <- 0013
[DEBUG] PCI: 00:1c.1 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1c.1 cmd <- 06
[DEBUG] PCI: 00:1d.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1d.0 cmd <- 102
[DEBUG] PCI: 00:1f.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1f.0 cmd <- 107
[DEBUG] PCI: 00:1f.2 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1f.2 cmd <- 103
[DEBUG] PCI: 00:1f.3 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1f.3 cmd <- 103
[DEBUG] PCI: 02:00.0 cmd <- 02
[DEBUG] PCI: 03:00.0 cmd <- 02
[INFO ] done.
[INFO ] Initializing devices...
[DEBUG] CPU_CLUSTER: 0 init
[DEBUG] MTRR: Physical address space:
[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
[DEBUG] 0x00000000000c0000 - 0x000000007fffffff size 0x7ff40000 type 6
[DEBUG] 0x0000000080000000 - 0x00000000dfffffff size 0x60000000 type 0
[DEBUG] 0x00000000e0000000 - 0x00000000efffffff size 0x10000000 type 1
[DEBUG] 0x00000000f0000000 - 0x00000000ffffffff size 0x10000000 type 0
[DEBUG] 0x0000000100000000 - 0x000000047ddfffff size 0x37de00000 type 6
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
[DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 39 bits
[DEBUG] MTRR: default type WB/UC MTRR counts: 4/5.
[DEBUG] MTRR: WB selected as default type.
[DEBUG] MTRR: 0 base 0x0000000080000000 mask 0x0000007fc0000000 type 0
[DEBUG] MTRR: 1 base 0x00000000c0000000 mask 0x0000007fe0000000 type 0
[DEBUG] MTRR: 2 base 0x00000000e0000000 mask 0x0000007ff0000000 type 1
[DEBUG] MTRR: 3 base 0x00000000f0000000 mask 0x0000007ff0000000 type 0

[DEBUG] MTRR check
[DEBUG] Fixed MTRRs : Enabled
[DEBUG] Variable MTRRs: Enabled

[DEBUG] Initializing VR config.
[DEBUG] CPU has 2 cores, 4 threads enabled.
[DEBUG] Setting up SMI for CPU
[INFO ] Will perform SMM setup.
[DEBUG] FMAP: area COREBOOT found @ 810200 (4128256 bytes)
[INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0xc240 size 0xf800 in mcache @0x7f7dd0ac
[DEBUG] microcode: sig=0x306c3 pf=0x10 revision=0x28
[INFO ] CPU: Intel(R) Core(TM) i7-4600M CPU @ 2.90GHz.
[INFO ] LAPIC 0x0 in XAPIC mode.
[DEBUG] CPU: APIC: 00 enabled
[DEBUG] CPU: APIC: 01 enabled
[DEBUG] CPU: APIC: 02 enabled
[DEBUG] CPU: APIC: 03 enabled
[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
[DEBUG] Processing 16 relocs. Offset value of 0x00030000
[DEBUG] Attempting to start 3 APs
[DEBUG] Waiting for 10ms after sending INIT.
[DEBUG] Waiting for SIPI to complete...
[DEBUG] done.
[DEBUG] Waiting for SIPI to complete...
[INFO ] LAPIC 0x1 in XAPIC mode.
[DEBUG] done.
[INFO ] AP: slot 1 apic_id 1, MCU rev: 0x00000028
[INFO ] LAPIC 0x3 in XAPIC mode.
[INFO ] LAPIC 0x2 in XAPIC mode.
[INFO ] AP: slot 3 apic_id 3, MCU rev: 0x00000028
[INFO ] AP: slot 2 apic_id 2, MCU rev: 0x00000028
[DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1a0 memsize: 0x1a0
[DEBUG] Processing 9 relocs. Offset value of 0x00038000
[DEBUG] smm_module_setup_stub: stack_top = 0x7f801000
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000
[DEBUG] SMM Module: stub loaded at 38000. Will call 0x7f7a2ecd
[DEBUG] Installing permanent SMM handler to 0x7f800000
[DEBUG] HANDLER [0x7faff000-0x7faffea8]

[DEBUG] CPU 0
[DEBUG] ss0 [0x7fafec00-0x7faff000]
[DEBUG] stub0 [0x7faf7000-0x7faf71a0]

[DEBUG] CPU 1
[DEBUG] ss1 [0x7fafe800-0x7fafec00]
[DEBUG] stub1 [0x7faf6c00-0x7faf6da0]

[DEBUG] CPU 2
[DEBUG] ss2 [0x7fafe400-0x7fafe800]
[DEBUG] stub2 [0x7faf6800-0x7faf69a0]

[DEBUG] CPU 3
[DEBUG] ss3 [0x7fafe000-0x7fafe400]
[DEBUG] stub3 [0x7faf6400-0x7faf65a0]

[DEBUG] stacks [0x7f800000-0x7f801000]
[DEBUG] Loading module at 0x7faff000 with entry 0x7faff2a4. filesize: 0xe90 memsize: 0xea8
[DEBUG] Processing 54 relocs. Offset value of 0x7faff000
[DEBUG] Loading module at 0x7faf7000 with entry 0x7faf7000. filesize: 0x1a0 memsize: 0x1a0
[DEBUG] Processing 9 relocs. Offset value of 0x7faf7000
[DEBUG] smm_module_setup_stub: stack_top = 0x7f801000
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x300000
[DEBUG] SMM Module: placing smm entry code at 7faf6c00, cpu # 0x1
[DEBUG] SMM Module: placing smm entry code at 7faf6800, cpu # 0x2
[DEBUG] SMM Module: placing smm entry code at 7faf6400, cpu # 0x3
[DEBUG] SMM Module: stub loaded at 7faf7000. Will call 0x7faff2a4
[DEBUG] SMI_STS: MCSMI
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7faef000, cpu = 0
[DEBUG] In relocation handler: CPU 0
[DEBUG] New SMBASE=0x7faef000 IEDBASE=0x7fc00000
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7faeec00, cpu = 1
[DEBUG] In relocation handler: CPU 1
[DEBUG] New SMBASE=0x7faeec00 IEDBASE=0x7fc00000
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7faee400, cpu = 3
[DEBUG] In relocation handler: CPU 3
[DEBUG] New SMBASE=0x7faee400 IEDBASE=0x7fc00000
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7faee800, cpu = 2
[DEBUG] In relocation handler: CPU 2
[DEBUG] New SMBASE=0x7faee800 IEDBASE=0x7fc00000
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] Initializing CPU #0
[DEBUG] CPU: vendor Intel device 306c3
[DEBUG] CPU: family 06, model 3c, stepping 03
[DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL already locked
[DEBUG] cpu: energy policy set to 6
[INFO ] Turbo is available but hidden
[INFO ] Turbo is available and visible
[INFO ] CPU #0 initialized
[INFO ] Initializing CPU #1
[INFO ] Initializing CPU #3
[INFO ] Initializing CPU #2
[DEBUG] CPU: vendor Intel device 306c3
[DEBUG] CPU: family 06, model 3c, stepping 03
[DEBUG] CPU: vendor Intel device 306c3
[DEBUG] CPU: family 06, model 3c, ste?R-)??5J2U??????$?????????Nu??V[DEBUG] ?;?q???????c???RQ?????x"?&?E t?l3c, stepping 03
[DEBUG] IA32_FEATURE_CONTROL already locked; VMX statusE
??]i&?d??[INFO ] ?\???1??X?[CRIT ] ??|l???]M?H?L?L?Lf???f?F?'??[WARN ] ??d%2 Q?`?x TROL already locked; VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL a?????u?[INFO ] y????S??
?X?q9?k????e?TI?[NOTE ] _%?<??o?!)??????d[ALERT] ??? ?9?!???k locked
[DEBUG] IA32_FEATURE_CONTROL already locked
[DEBUG] cpu: energy policyK??K0??????????????Ft[WARN ] >=??9??8!fZ_?&j???<?G???$?<?[NOTE ] =?o?G?4?W[ERROR] f?~ energy policy set to 6
[INFO ] CPU #2 initialized
[INFO ] CPU #1 initialized
q?q?q?q?????[CRIT ] ????F??S?z=????? p[??????????s??/k?%?c??X1??;n?_sG8600
[DEBUG] Enabling SMIs.
[DEBUG] Locking SMM.
[DEBUG] CPU_CLUSTER: 0 init finished ?^B?[EMERG] ?9%[WARN ] "???[ERROR] %?????D??c?xM2d????????u??n??
w??????M{?1????d??[DEBUG] 0.
[DEBUG] Disabling "device 7".
[DEBUG] Set BIOS_RESET_CPL
[DEBUG] CPU TDP: 37 Watts
[DEBUG] PCI: 00:00.0 init finished in 1 msecs
[DEBUG] PCI: 00:01.1 init
[DEBUG] PCI:??]??[INFO ] ??[NOTE ] /_?????T????t??w??{o?[WARN ] J??????????[WARN ] X?+%?1?#?J%?w 1?J8??)d 'vbt.bin' @0x3cc00 size 0x582 in mcache @0x7f7dd204
[INFO ] Found a VBT of 4608 bytes after decompression
[INFO ] GMA: Found VBT in CBFS
[INFO ] GMA: Found valid VBT in CBFS
[DEBUG] GT Power Management Init
[INFO ] GMA: Setting backlight PWM frequency to 135MHz / 128 / 4794 = 220Hz
[DEBUG] GT Power Management Init (post VBIOS)
[DEBUG] PCI: 00:02.0 init finished in 223 msecs
[DEBUG] PCI: 00:03.0 init
[DEBUG] Mini-HD: base = 0xdf9c4000
[DEBUG] azalia_audio: Initializing codec #0
[DEBUG] azalia_audio: codec viddid: 80862807
[DEBUG] azalia_audio: verb_size: 16
[DEBUG] azalia_audio: verb loaded.
[DEBUG] PCI: 00:03.0 init finished in 3 msecs
[DEBUG] PCI: 00:04.0 init
[DEBUG] PCI: 00:04.0 init finished in 0 msecs
[DEBUG] PCI: 00:14.0 init
[DEBUG] PCI: 00:14.0 init finished in 0 msecs
[DEBUG] PCI: 00:16.0 init
[DEBUG] ME: FW Partition Table : OK
[DEBUG] ME: Bringup Loader Failure : NO
[DEBUG] ME: Firmware Init Complete : NO
[DEBUG] ME: Manufacturing Mode : YES
[DEBUG] ME: Boot Options Present : NO
[DEBUG] ME: Update In Progress : NO
[DEBUG] ME: Current Working State : Initializing
[DEBUG] ME: Current Operation State : Bring up
[DEBUG] ME: Current Operation Mode : Debug
[DEBUG] ME: Error Code&?>???t?%???^ ?R???s????[SPEW ] 8??? )?m??????O????E6[DEBUG] ~.oU??w6 ?)?
l[?ce
[DEBUG] ME: Power Management Event : Pseudo-global reset
[DEBUG] ME: Progress Phase State : 0x4d
[CRIT ] intel_me_path: mbp is not ready!
[NOTE ] ME: BIOS path: Error
[ERROR] ME: MBP not ready
[DEBUG] PCI: 00:16.0 init finished .????u??'6????[INFO ] ?Mg?????5? ? ? ? ?)={wR??lq]?E????????|???l?tb?S>secs
[DEBUG] PCI: 00:1a.0 init
[DEBUG] EHCI: Setting up controller.. done.
[DEBUG] PC????T????x1?)????|??/?e?d??O????Pca?9???i?;?[CRIT ] M?_????????tU??????base = 0xdf9c0000
[DEBUG] Azalia: codec_mask = 01
[DEBUG] azalia_audio: Initializing codec #0
[DEBUG] azalia_audio: codec viddid: 10ec0292
[DEBUG] azalia_audio: verb_size: 128
[DEBUG] azalia_audio: verb loaded.
[DEBUG] PCI: 00:1b.0 in???u?[INFO ] r'5????n???????[ERROR] wA?W?WvW???|?6??l??5?5?5?5????????LJD)?[SPEW ] ?? bridge.
[DEBUG] PCI: 00:1c.0 init finished in 0 msecs
[DEBUG] PCI: 00:1c.1 inA???p[NOTE ] ????Z?s[? '[ERROR] ?h[INFO ] ?? ???t???E??W/?7???T????x?????P??????)[DEBUG] {]R 0 msecs
[DEBUG] PCI: 00:1d.0 init
[DEBUG] EHCI: Setting up controller.. done.LX??/??i??*??}2??y???3?P??xO2f???????a???f.<??[ERROR] ?[ERROR] ?????H?*?>?t???r??o??Ks??k?!??7??J??mR??<;$X?in![ALERT] s[Z??,A?[ERROR] ?:K????mx?#\??"?pUY?? = 0x00
[DEBUG] IOAPIC: 24 interrupts
[DEBUG] IOAPIC: Clearing IOAPIC at 0xfec???8?[;j??R,)??4?AH??"??W?G??????
?P?? ?'[NOTE ] ???$????????Q??"??X???off after power failure.
[INFO ] NMI sources disabled.
[DEBUG] LynxPoint H PM .????+??g??
kmV[CRIT ] ?9?ZNc?s???k???9?????l^>,A??O??pY+Y+Y Y+?%???o? [DEBUG] APMC done.
[DEBUG] PCI: 00:1f.0 init finished in 0 msecs
[DEBUG] PCI: 00:1f.2 init
[DEBUG] SATA: Initializing...
[DEBUG] SATA: Controller in AHCI mode.
[DEBUG] ABAR: 0xdf9be000
[DEBUG] PCI: 00:1f.2 init finished in 0 msecs
[DEBUG] PCI: 00:1f.3 init
[DEBUG] PCI: 00:1f.3 init finished in 0 msecs
[DEBUG] PCI: 02:00.0 init
[DEBUG] PCI: 02:00.0 init finished in 0 msecs
[DEBUG] PCI: 03:00.0 init
[DEBUG] PCI: 03:00.0 init finished in 0 msecs
[DEBUG] PNP: 00ff.2 init
[DEBUG] PNP: 00ff.2 init finished in 0 msecs
[INFO ] Devices initialized
[DEBUG] BS: BS_DEV_INIT run times (exec / console): 249 / 0 ms
[INFO ] Found TPM ST33ZP24 by ST Microelectronics
[DEBUG] TPM: Startup
[DEBUG] TPM: command 0x99 returned 0x0
[DEBUG] TPM: Asserting physical presence
[DEBUG] TPM: command 0x4000000a returned 0x0
[DEBUG] TPM: command 0x65 returned 0x0
[DEBUG] TPM: flags disable=0, deactivated=0, nvlocked=1
[INFO ] TPM: setup succeeded
[DEBUG] BS: BS_DEV_INIT exit times (exec / console): 56 / 0 ms
[INFO ] Finalize devices...
[DEBUG] PCI: 00:00.0 final
[DEBUG] PCI: 00:16.0 final
[INFO ] ME: MBP cleared
[DEBUG] PCI: 00:1b.0 final
[DEBUG] PCI: 00:1f.0 final
[DEBUG] flash size 0x2800000 bytes
[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x2800000
[ERROR] SF size 0x2800000 does not correspond to CONFIG_ROM_SIZE 0xc00000!!
[DEBUG] apm_control: Finalizing SMM.
[DEBUG] APMC done.
[INFO ] Devices finalized
[INFO ] CBFS: Found 'fallback/dsdt.aml' @0x39500 size 0x36a1 in mcache @0x7f7dd1d8
[WARN ] CBFS: 'fallback/slic' not found.
[INFO ] ACPI: Writing ACPI tables at 7f743000.
[DEBUG] ACPI: * FACS
[DEBUG] ACPI: * DSDT
[DEBUG] ACPI: * FADT
[DEBUG] ACPI: added table 1/32, length now 40
[DEBUG] ACPI: * SSDT
[DEBUG] Found 1 CPU(s) with 4 core(s) each.
[DEBUG] PSS: 2901MHz power 37000 control 0x2400 status 0x2400
[DEBUG] PSS: 2900MHz power 37000 control 0x1d00 status 0x1d00
[DEBUG] PSS: 2400MHz power 28854 control 0x1800 status 0x1800
[DEBUG] PSS: 2000MHz power 22943 control 0x1400 status 0x1400
[DEBUG] PSS: 1600MHz power 17471 control 0x1000 status 0x1000
[DEBUG] PSS: 1200MHz power 12469 control 0xc00 status 0xc00
[DEBUG] PSS: 800MHz power 7885 control 0x800 status 0x800
[DEBUG] PSS: 2901MHz power 37000 control 0x2400 status 0x2400
[DEBUG] PSS: 2900MHz power 37000 control 0x1d00 status 0x1d00
[DEBUG] PSS: 2400MHz power 28854 control 0x1800 status 0x1800
[DEBUG] PSS: 2000MHz power 22943 control 0x1400 status 0x1400
[DEBUG] PSS: 1600MHz power 17471 control 0x1000 status 0x1000
[DEBUG] PSS: 1200MHz power 12469 control 0xc00 status 0xc00
[DEBUG] PSS: 800MHz power 7885 control 0x800 status 0x800
[DEBUG] PSS: 2901MHz power 37000 control 0x2400 status 0x2400
[DEBUG] PSS: 2900MHz power 37000 control 0x1d00 status 0x1d00
[DEBUG] PSS: 2400MHz power 28854 control 0x1800 status 0x1800
[DEBUG] PSS: 2000MHz power 22943 control 0x1400 status 0x1400
[DEBUG] PSS: 1600MHz power 17471 control 0x1000 status 0x1000
[DEBUG] PSS: 1200MHz power 12469 control 0xc00 status 0xc00
[DEBUG] PSS: 800MHz power 7885 control 0x800 status 0x800
[DEBUG] PSS: 2901MHz power 37000 control 0x2400 status 0x2400
[DEBUG] PSS: 2900MHz power 37000 control 0x1d00 status 0x1d00
[DEBUG] PSS: 2400MHz power 28854 control 0x1800 status 0x1800
[DEBUG] PSS: 2000MHz power 22943 control 0x1400 status 0x1400
[DEBUG] PSS: 1600MHz power 17471 control 0x1000 status 0x1000
[DEBUG] PSS: 1200MHz power 12469 control 0xc00 status 0xc00
[DEBUG] PSS: 800MHz power 7885 control 0x800 status 0x800
[DEBUG] Generating ACPI PIRQ entries
[INFO ] ACPI: * H8
[INFO ] H8: BDC detection not implemented. Assuming BDC installed
[INFO ] H8: WWAN detection not implemented. Assuming WWAN installed
[INFO ] \_SB_.PCI0.TPM: LPC TPM PNP: 0c31.0
[DEBUG] ACPI: added table 2/32, length now 44
[DEBUG] ACPI: * MCFG
[DEBUG] ACPI: added table 3/32, length now 48
[DEBUG] ACPI: * TCPA
[DEBUG] TCPA log created at 0x7f733000
[DEBUG] ACPI: added table 4/32, length now 52
[DEBUG] ACPI: * MADT
[DEBUG] IOAPIC: 24 interrupts
[DEBUG] ACPI: added table 5/32, length now 56
[DEBUG] ACPI: * SPCR
[DEBUG] current = 7f7482f0
[DEBUG] ACPI: * DMAR
[DEBUG] ACPI: added table 6/32, length now 60
[DEBUG] ACPI: * HPET
[DEBUG] ACPI: added table 7/32, length now 64
[DEBUG] current = 7f7483f0
[INFO ] ACPI: done.
[DEBUG] ACPI tables: 21488 bytes.
[DEBUG] smbios_write_tables: 7f72b000
[DEBUG] SMBIOS firmware version is set to coreboot_version: '4.20-522-g251491c9d7'
[INFO ] Create SMBIOS type 16
[INFO ] Create SMBIOS type 17
[INFO ] Create SMBIOS type 20
[INFO ] PCI: 03:00.0 (unknown)
[DEBUG] SMBIOS tables: 1119 bytes.
[DEBUG] Writing table forward entry at 0x00000500
[DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 1068
[DEBUG] Writing coreboot table at 0x7f767000
[DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
[DEBUG] 1. 0000000000001000-000000000009ffff: RAM
[DEBUG] 2. 00000000000a0000-00000000000fffff: RESERVED
[DEBUG] 3. 0000000000100000-000000007f72afff: RAM
[DEBUG] 4. 000000007f72b000-000000007f783fff: CONFIGURATION TABLES
[DEBUG] 5. 000000007f784000-000000007f7cdfff: RAMSTAGE
[DEBUG] 6. 000000007f7ce000-000000007f7fffff: CONFIGURATION TABLES
[DEBUG] 7. 000000007f800000-00000000821fffff: RESERVED
[DEBUG] 8. 00000000f0000000-00000000f3ffffff: RESERVED
[DEBUG] 9. 00000000fed10000-00000000fed19fff: RESERVED
[DEBUG] 10. 00000000fed40000-00000000fed44fff: RESERVED
[DEBUG] 11. 00000000fed80000-00000000fed84fff: RESERVED
[DEBUG] 12. 00000000fed90000-00000000fed91fff: RESERVED
[DEBUG] 13. 0000000100000000-000000047ddfffff: RAM
[DEBUG] Wrote coreboot table at: 0x7f767000, 0x3d4 bytes, checksum a815
[DEBUG] coreboot table: 1004 bytes.
[DEBUG] IMD ROOT 0. 0x7f7ff000 0x00001000
[DEBUG] IMD SMALL 1. 0x7f7fe000 0x00001000
[DEBUG] CONSOLE 2. 0x7f7de000 0x00020000
[DEBUG] RO MCACHE 3. 0x7f7dd000 0x00000468
[DEBUG] TIME STAMP 4. 0x7f7dc000 0x00000910
[DEBUG] MEM INFO 5. 0x7f7db000 0x000007a8
[DEBUG] AFTER CAR 6. 0x7f7ce000 0x0000d000
[DEBUG] RAMSTAGE 7. 0x7f783000 0x0004b000
[DEBUG] SMM BACKUP 8. 0x7f773000 0x00010000
[DEBUG] IGD OPREGION 9. 0x7f76f000 0x00003130
[DEBUG] COREBOOT 10. 0x7f767000 0x00008000
[DEBUG] ACPI 11. 0x7f743000 0x00024000
[DEBUG] TCPA TCGLOG12. 0x7f733000 0x00010000
[DEBUG] SMBIOS 13. 0x7f72b000 0x00008000
[DEBUG] IMD small region:
[DEBUG] IMD ROOT 0. 0x7f7fec00 0x00000400
[DEBUG] FMAP 1. 0x7f7feb20 0x000000e0
[DEBUG] ROMSTAGE 2. 0x7f7feb00 0x00000004
[DEBUG] ROMSTG STCK 3. 0x7f7fea40 0x000000a8
[DEBUG] ACPI GNVS 4. 0x7f7fe980 0x000000b0
[DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 4 / 0 ms
[INFO ] CBFS: Found 'fallback/payload' @0x42f80 size 0x11897 in mcache @0x7f7dd2a0
[DEBUG] Checking segment from ROM address 0xffc531ac
[DEBUG] Payload being loaded at below 1MiB without region being marked as RAM usable.
[DEBUG] Checking segment from ROM address 0xffc531c8
[DEBUG] Loading segment from ROM address 0xffc531ac
[DEBUG] code (compression=1)
[DEBUG] New segment dstaddr 0x000deda0 memsize 0x21260 srcaddr 0xffc531e4 filesize 0x1185f
[DEBUG] Loading Segment: addr: 0x000deda0 memsz: 0x0000000000021260 filesz: 0x000000000001185f
[DEBUG] using LZMA
[DEBUG] Loading segment from ROM address 0xffc531c8
[DEBUG] Entry Point 0x000fd25b
[DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 0 ms
[DEBUG] ICH-NM10-PCH: watchdog disabled
[DEBUG] Jumping to boot code at 0x000fd25b(0x7f767000)
SeaBIOS (version rel-1.16.2-0-gea1b7a0)
BUILD: gcc: (coreboot toolchain v2023-06-24_2b4d2edfd6) 11.3.0 binutils: (GNU Binutils) 2.40
Found coreboot cbmem console @ 7f7de000
Found mainboard LENOVO ThinkPad T440p
Relocating init from 0x000e0500 to 0x7e71da80 (size 54496)
Found CBFS header at 0xffc1022c
multiboot: eax=7f7bb49c, ebx=7f7bb464
Found 17 PCI devices (max PCI bus is 03)
Copying SMBIOS from 0x7f72b000 to 0x000f67c0
Copying SMBIOS 3.0 from 0x7f72b020 to 0x000f67a0
Copying ACPI RSDP from 0x7f743000 to 0x000f6770
table(50434146)=0x7f746940 (via xsdt)
Using pmtimer, ioport 0x508
table(41504354)=0x7f748230 (via xsdt)
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.16.2-0-gea1b7a0)
PCI: XHCI at 00:14.0 (mmio 0xdf9d0000)
XHCI init: regs @ 0xdf9d0000, 21 ports, 32 slots, 32 byte contexts
XHCI protocol USB 2.00, 15 ports (offset 1), def 3001
XHCI protocol USB 3.00, 6 ports (offset 16), def 1000
XHCI extcap 0xc1 @ 0xdf9d8040
XHCI extcap 0xc0 @ 0xdf9d8070
XHCI extcap 0x1 @ 0xdf9d846c
EHCI init on dev 00:1a.0 (regs=0xdf9bd020)
EHCI init on dev 00:1d.0 (regs=0xdf9bc020)
AHCI controller at 00:1f.2, iobase 0xdf9be000, irq 10
Searching bootorder for: HALT
Found 0 lpt ports
Found 0 serial ports
Discarding ps2 data f0 (status=11)
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@5/disk@0
AHCI/5: Set transfer mode to UDMA-6
Searching bios-geometry for: /pci@i0cf8/*@1f,2/drive@5/disk@0
AHCI/5: registering: "AHCI/5: Samsung SSD 840 EVO 120GB ATA-9 Hard-Disk (111 GiBytes)"
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0
AHCI/0: Set transfer mode to UDMA-6
Searching bios-geometry for: /pci@i0cf8/*@1f,2/drive@0/disk@0
AHCI/0: registering: "AHCI/0: SK hynix SC311 SATA 128GB ATA-10 Hard-Disk (119 GiBytes)"
XHCI no devices found
Initialized USB HUB (0 ports used)
Initialized USB HUB (0 ports used)
PS2 keyboard initialized
All threads complete.
Scan for option roms

Press ESC for boot menu.



[NOTE ] coreboot-4.20-522-g251491c9d7 Fri Jun 30 23:57:55 UTC 2023 x86_32 bootblock starting (log level: 7)...
[DEBUG] FMAP: Found "FLASH" version 1.1 at 0x810000.
[DEBUG] FMAP: base = 0xff400000 size = 0xc00000 #areas = 4
[DEBUG] FMAP: area COREBOOT found @ 810200 (4128256 bytes)
[INFO ] CBFS: mcache @0xff7c2e00 built for 21 files, used 0x468 of 0x4000 bytes
[WARN ] CBFS: 'coreboot-stages' not found.
[INFO ] CBFS: Found 'fallback/romstage' @0x80 size 0xc128 in mcache @0xff7c2e2c
[DEBUG] BS: bootblock times (exec / console): total (unknown) / 0 ms


[NOTE ] coreboot-4.20-522-g251491c9d7 Fri Jun 30 23:57:55 UTC 2023 x86_32 romstage starting (log level: 7)...
[DEBUG] Disabling Watchdog reboot... done.
[DEBUG] SMBus controller enabled
[DEBUG] Setting up static northbridge registers... done.
[DEBUG] Started PEG11 link training.
[DEBUG] Temporarily hiding PEG11.
[DEBUG] Started PEG10 link training.
[DEBUG] Temporarily hiding PEG10.
[DEBUG] Initializing IGD...
[DEBUG] Back from haswell_early_initialization()
[DEBUG] CPU id(306c3) ucode:00000028 Intel(R) Core(TM) i7-4600M CPU @ 2.90GHz
[DEBUG] AES supported, TXT supported, VT supported
[DEBUG] PCH type: QM87, device id: 8c4f, rev id 5
[DEBUG] Starting UEFI PEI System Agent
[DEBUG] FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes)
[DEBUG] prepare_mrc_cache: at 0xffc00034, size fd4
[DEBUG] FMAP: area COREBOOT found @ 810200 (4128256 bytes)
[INFO ] CBFS: Found 'mrc.bin' @0x38fdc0 size 0x2e6e4 in mcache @0xff7c31e4
System Agent: Starting up...
System Agent: Initializing PCH
install_ppi: overwrite GUID {ed097352-9041-445a-80b6-b29d509e8845}
install_ppi: overwrite GUID {908c7f8b-5c48-47fb-8357-f5fd4e235276}
System Agent: Initializing PCH (SMBUS)
System Agent: Initializing PCH (USB)
System Agent: Initializing PCH (SA Init)
System Agent: Initializing PCH (Me UMA)
System Agent: Initializing Memory
System Agent: Done.
Sanity checking heap.
[DEBUG] MRC Version 1.6.1 Build 2
[DEBUG] memcfg DDR3 clock 1600 MHz
[DEBUG] memcfg channel assignment: A: 0, B 1, C 2
[DEBUG] memcfg channel[0] config (00620020):
[DEBUG] ECC inactive
[DEBUG] enhanced interleave mode on
[DEBUG] rank interleave on
[DEBUG] DIMMA 8192 MB width x8 or x32 dual rank, selected
[DEBUG] DIMMB 0 MB width x8 or x32 single rank
[DEBUG] memcfg channel[1] config (00620020):
[DEBUG] ECC inactive
[DEBUG] enhanced interleave mode on
[DEBUG] rank interleave on
[DEBUG] DIMMA 8192 MB width x8 or x32 dual rank, selected
[DEBUG] DIMMB 0 MB width x8 or x32 single rank
[DEBUG] ME: FW Partition Table : OK
[DEBUG] ME: Bringup Loader Failure : NO
[DEBUG] ME: Firmware Init Complete : NO
[DEBUG] ME: Manufacturing Mode : YES
[DEBUG] ME: Boot Options Present : NO
[DEBUG] ME: Update In Progress : NO
[DEBUG] ME: Current Working State : Initializing
[DEBUG] ME: Current Operation State : Bring up
[DEBUG] ME: Current Operation Mode : Debug
[DEBUG] ME: Error Code : No Error
[DEBUG] ME: Progress Phase : BUP Phase
[DEBUG] ME: Power Management Event : Pseudo-global reset
[DEBUG] ME: Progress Phase State : 0x4d
[DEBUG] CBMEM:
[DEBUG] IMD: root @ 0x7f7ff000 254 entries.
[DEBUG] IMD: root @ 0x7f7fec00 62 entries.
[DEBUG] External stage cache:
[DEBUG] IMD: root @ 0x7fbff000 254 entries.
[DEBUG] IMD: root @ 0x7fbfec00 62 entries.
[DEBUG] FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes)
[DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'.
[DEBUG] flash size 0x2800000 bytes
[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x2800000
[ERROR] SF size 0x2800000 does not correspond to CONFIG_ROM_SIZE 0xc00000!!
[DEBUG] MRC: 'RW_MRC_CACHE' does not need update.
[DEBUG] Unhiding PEG10.
[DEBUG] Unhiding PEG11.
[DEBUG] SMM Memory Map
[DEBUG] SMRAM : 0x7f800000 0x800000
[DEBUG] Subregion 0: 0x7f800000 0x300000
[DEBUG] Subregion 1: 0x7fb00000 0x100000
[DEBUG] Subregion 2: 0x7fc00000 0x400000
[DEBUG] Normal boot
[INFO ] CBFS: Found 'fallback/postcar' @0x3d700 size 0x5814 in mcache @0xff7c305c
[DEBUG] Loading module at 0x7f7cf000 with entry 0x7f7cf031. filesize: 0x5460 memsize: 0xb798
[DEBUG] Processing 221 relocs. Offset value of 0x7d7cf000
[DEBUG] BS: romstage times (exec / console): total (unknown) / 1 ms


[NOTE ] coreboot-4.20-522-g251491c9d7 Fri Jun 30 23:57:55 UTC 2023 x86_32 postcar starting (log level: 7)...
[DEBUG] Normal boot
[DEBUG] FMAP: area COREBOOT found @ 810200 (4128256 bytes)
[INFO ] CBFS: Found 'fallback/ramstage' @0x1bb40 size 0x1c882 in mcache @0x7f7dd10c
[DEBUG] Loading module at 0x7f784000 with entry 0x7f784000. filesize: 0x38038 memsize: 0x49170
[DEBUG] Processing 3976 relocs. Offset value of 0x7b784000
[DEBUG] BS: postcar times (exec / console): total (unknown) / 0 ms


[NOTE ] coreboot-4.20-522-g251491c9d7 Fri Jun 30 23:57:55 UTC 2023 x86_32 ramstage starting (log level: 7)...
[DEBUG] Normal boot
[INFO ] Enumerating buses...
[DEBUG] Root Device scanning...
[DEBUG] CPU_CLUSTER: 0 enabled
[DEBUG] DOMAIN: 0000 enabled
[DEBUG] DOMAIN: 0000 scanning...
[DEBUG] PCI: pci_scan_bus for bus 00
[DEBUG] PCI: 00:00.0 [8086/0c04] enabled
[INFO ] PCI: Static device PCI: 00:01.0 not found, disabling it.
[DEBUG] PCI: 00:01.1 [8086/0c05] enabled
[DEBUG] PCI: 00:02.0 [8086/0416] enabled
[DEBUG] PCI: 00:03.0 [8086/0c0c] enabled
[DEBUG] PCI: 00:04.0 [8086/0c03] enabled
[DEBUG] PCI: 00:14.0 [8086/8c31] enabled
[DEBUG] PCI: 00:16.0 [8086/8c3a] enabled
[DEBUG] PCI: 00:16.1: Disabling device
[DEBUG] PCI: 00:16.2: Disabling device
[DEBUG] PCI: 00:16.3: Disabling device
[DEBUG] PCI: 00:19.0 [8086/1502] enabled
[DEBUG] PCI: 00:1a.0 [8086/8c2d] enabled
[DEBUG] PCI: 00:1b.0 [8086/8c20] enabled
[DEBUG] PCIe Root Port 1 ASPM is disabled
[DEBUG] PCI: 00:1c.0 [8086/8c10] enabled
[DEBUG] PCIe Root Port 2 ASPM is disabled
[DEBUG] PCI: 00:1c.1 [8086/8c12] enabled
[DEBUG] PCI: 00:1c.2 [8086/8c14] disabled
[DEBUG] PCI: 00:1c.3 [8086/8c16] disabled
[DEBUG] Adjusted number of PCIe root ports to 5 as per strpfusecfg2
[DEBUG] PCI: 00:1c.2: Disabling device
[DEBUG] PCI: 00:1c.3: Disabling device
[DEBUG] PCI: 00:1c.4: Disabling device
[DEBUG] PCI: 00:1c.4 [8086/8c18] disabled
[DEBUG] PCI: 00:1d.0 [8086/8c26] enabled
[DEBUG] PCI: 00:1f.0 [8086/8c4f] enabled
[DEBUG] PCI: 00:1f.2 [8086/8c03] enabled
[DEBUG] PCI: 00:1f.3 [8086/8c22] enabled
[DEBUG] PCI: 00:1f.5: Disabling device
[DEBUG] PCI: 00:1f.6: Disabling device
[WARN ] PCI: Leftover static devices:
[WARN ] PCI: 00:01.0
[WARN ] PCI: 00:16.1
[WARN ] PCI: 00:16.2
[WARN ] PCI: 00:16.3
[WARN ] PCI: 00:1c.5
[WARN ] PCI: 00:1c.6
[WARN ] PCI: 00:1c.7
[WARN ] PCI: 00:1f.5
[WARN ] PCI: 00:1f.6
[WARN ] PCI: Check your devicetree.cb.
[DEBUG] PCI: 00:01.1 scanning...
[DEBUG] PCI: pci_scan_bus for bus 01
[DEBUG] scan_bus: bus PCI: 00:01.1 finished in 0 msecs
[DEBUG] PCI: 00:1c.0 scanning...
[DEBUG] PCI: pci_scan_bus for bus 02
[DEBUG] PCI: 02:00.0 [10ec/5227] enabled
[INFO ] Enabling Common Clock Configuration
[INFO ] ASPM: Enabled L0s and L1
[INFO ] PCIe: Max_Payload_Size adjusted to 128
[INFO ] PCI: 02:00.0: Enabled LTR
[DEBUG] scan_bus: bus PCI: 00:1c.0 finished in 0 msecs
[DEBUG] PCI: 00:1c.1 scanning...
[DEBUG] PCI: pci_scan_bus for bus 03
[DEBUG] PCI: 03:00.0 [8086/08b2] enabled
[INFO ] Enabling Common Clock Configuration
[INFO ] ASPM: Enabled L1
[INFO ] PCIe: Max_Payload_Size adjusted to 128
[INFO ] PCI: 03:00.0: Enabled LTR
[DEBUG] scan_bus: bus PCI: 00:1c.1 finished in 0 msecs
[DEBUG] PCI: 00:1f.0 scanning...
[INFO ] PMH7: ID 05 Revision 12
[DEBUG] PNP: 00ff.1 enabled
[INFO ] H8: EC Firmware ID GLHT30WW-3.23, Version 3.01B
[INFO ] H8: WWAN detection not implemented. Assuming WWAN installed
[DEBUG] PNP: 00ff.2 enabled
[DEBUG] PNP: 0c31.0 enabled
[DEBUG] scan_bus: bus PCI: 00:1f.0 finished in 3 msecs
[DEBUG] PCI: 00:1f.3 scanning...
[DEBUG] scan_bus: bus PCI: 00:1f.3 finished in 0 msecs
[DEBUG] scan_bus: bus DOMAIN: 0000 finished in 3 msecs
[DEBUG] scan_bus: bus Root Device finished in 3 msecs
[INFO ] done
[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 0 ms
[DEBUG] found VGA at PCI: 00:02.0
[DEBUG] Setting up VGA for PCI: 00:02.0
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
[INFO ] Allocating resources...
[INFO ] Reading resources...
[DEBUG] mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff.
[DEBUG] mc_add_fixed_mmio_resources: Adding DMIBAR @ 68 0xfed18000-0xfed18fff.
[DEBUG] mc_add_fixed_mmio_resources: Adding EPBAR @ 40 0xfed19000-0xfed19fff.
[DEBUG] mc_add_fixed_mmio_resources: Adding GDXCBAR @ 5420 0xfed84000-0xfed84fff.
[DEBUG] mc_add_fixed_mmio_resources: Adding EDRAMBAR @ 5408 0xfed80000-0xfed83fff.
[DEBUG] Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
[DEBUG] MC MAP: TOM: 0x400000000
[DEBUG] MC MAP: TOUUD: 0x47de00000
[DEBUG] MC MAP: MESEG_BASE: 0x7ffff00000
[DEBUG] MC MAP: MESEG_LIMIT: 0xfffff
[DEBUG] MC MAP: REMAP_BASE: 0x400000000
[DEBUG] MC MAP: REMAP_LIMIT: 0x47ddfffff
[DEBUG] MC MAP: TOLUD: 0x82200000
[DEBUG] MC MAP: BGSM: 0x80000000
[DEBUG] MC MAP: BDSM: 0x80200000
[DEBUG] MC MAP: TSEGMB: 0x7f800000
[DEBUG] MC MAP: GGC: 0x209
[DEBUG] MC MAP: DPR: 0x7f800001
[INFO ] Available memory above 4GB: 14302M
[ERROR] PNP: 00ff.1 missing read_resources
[ERROR] PNP: 00ff.2 missing read_resources
[INFO ] Done reading resources.
[INFO ] === Resource allocator: DOMAIN: 0000 - Pass 1 (relative placement) ===
[DEBUG] PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG] PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
[DEBUG] PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG] PCI: 02:00.0 10 * [0x0 - 0xfff] mem
[DEBUG] PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG] PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG] PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[DEBUG] PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG] PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done
[DEBUG] PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG] PCI: 03:00.0 10 * [0x0 - 0x1fff] mem
[DEBUG] PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG] PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG] PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[INFO ] === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
[DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 84 base 00001600 limit 0000167f io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 88 base 000015e0 limit 000015ef io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed)
[INFO ] DOMAIN: 0000: Resource ranges:
[INFO ] * Base: 1000, Size: 5e0, Tag: 100
[INFO ] * Base: 15f0, Size: 10, Tag: 100
[INFO ] * Base: 1680, Size: e980, Tag: 100
[DEBUG] PCI: 00:02.0 20 * [0xffc0 - 0xffff] limit: ffff io
[DEBUG] PCI: 00:19.0 18 * [0xffa0 - 0xffbf] limit: ffbf io
[DEBUG] PCI: 00:1f.2 20 * [0xff80 - 0xff9f] limit: ff9f io
[DEBUG] PCI: 00:1f.2 10 * [0xff78 - 0xff7f] limit: ff7f io
[DEBUG] PCI: 00:1f.2 18 * [0xff70 - 0xff77] limit: ff77 io
[DEBUG] PCI: 00:1f.2 14 * [0xff6c - 0xff6f] limit: ff6f io
[DEBUG] PCI: 00:1f.2 1c * [0xff68 - 0xff6b] limit: ff6b io
[DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
[DEBUG] DOMAIN: 0000 mem: base: 7f800000 size: 0 align: 0 gran: 0 limit: efffffff
[DEBUG] DOMAIN: 0000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 48 base fed10000 limit fed17fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 68 base fed18000 limit fed18fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 40 base fed19000 limit fed19fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 5420 base fed84000 limit fed84fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 5408 base fed80000 limit fed83fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 00 base fed90000 limit fed90fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 01 base fed91000 limit fed91fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 02 base 00000000 limit 0009ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 03 base 000c0000 limit 7f7fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 04 base 7f800000 limit 7fffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 05 base 80000000 limit 821fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 06 base 100000000 limit 47ddfffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:1f.0 31fe base fec00000 limit ffffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
[INFO ] DOMAIN: 0000: Resource ranges:
[INFO ] * Base: 82200000, Size: 6de00000, Tag: 200
[INFO ] * Base: 47de00000, Size: 7b82200000, Tag: 200
[DEBUG] PCI: 00:02.0 18 * [0xe0000000 - 0xefffffff] limit: efffffff prefmem
[DEBUG] PCI: 00:02.0 10 * [0xdfc00000 - 0xdfffffff] limit: dfffffff mem
[DEBUG] PCI: 00:1c.0 20 * [0xdfb00000 - 0xdfbfffff] limit: dfbfffff mem
[DEBUG] PCI: 00:1c.1 20 * [0xdfa00000 - 0xdfafffff] limit: dfafffff mem
[DEBUG] PCI: 00:19.0 10 * [0xdf9e0000 - 0xdf9fffff] limit: df9fffff mem
[DEBUG] PCI: 00:14.0 10 * [0xdf9d0000 - 0xdf9dffff] limit: df9dffff mem
[DEBUG] PCI: 00:04.0 10 * [0xdf9c8000 - 0xdf9cffff] limit: df9cffff mem
[DEBUG] PCI: 00:03.0 10 * [0xdf9c4000 - 0xdf9c7fff] limit: df9c7fff mem
[DEBUG] PCI: 00:1b.0 10 * [0xdf9c0000 - 0xdf9c3fff] limit: df9c3fff mem
[DEBUG] PCI: 00:19.0 14 * [0xdf9bf000 - 0xdf9bffff] limit: df9bffff mem
[DEBUG] PCI: 00:1f.2 24 * [0xdf9be000 - 0xdf9be7ff] limit: df9be7ff mem
[DEBUG] PCI: 00:1a.0 10 * [0xdf9bd000 - 0xdf9bd3ff] limit: df9bd3ff mem
[DEBUG] PCI: 00:1d.0 10 * [0xdf9bc000 - 0xdf9bc3ff] limit: df9bc3ff mem
[DEBUG] PCI: 00:1f.3 10 * [0xdf9bb000 - 0xdf9bb0ff] limit: df9bb0ff mem
[DEBUG] PCI: 00:16.0 10 * [0xdf9ba000 - 0xdf9ba00f] limit: df9ba00f mem
[DEBUG] DOMAIN: 0000 mem: base: 7f800000 size: 0 align: 0 gran: 0 limit: efffffff done
[DEBUG] DOMAIN: 0000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff done
[DEBUG] PCI: 02:00.0 10 * [0xdfb00000 - 0xdfb00fff] limit: dfb00fff mem
[DEBUG] PCI: 03:00.0 10 * [0xdfa00000 - 0xdfa01fff] limit: dfa01fff mem
[INFO ] === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
[DEBUG] PCI: 00:01.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 01 io
[DEBUG] PCI: 00:01.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
[DEBUG] PCI: 00:01.1 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 bus 01 mem
[DEBUG] PCI: 00:02.0 10 <- [0x00000000dfc00000 - 0x00000000dfffffff] size 0x00400000 gran 0x16 mem64
[DEBUG] PCI: 00:02.0 18 <- [0x00000000e0000000 - 0x00000000efffffff] size 0x10000000 gran 0x1c prefmem64
[DEBUG] PCI: 00:02.0 20 <- [0x000000000000ffc0 - 0x000000000000ffff] size 0x00000040 gran 0x06 io
[DEBUG] PCI: 00:03.0 10 <- [0x00000000df9c4000 - 0x00000000df9c7fff] size 0x00004000 gran 0x0e mem64
[DEBUG] PCI: 00:04.0 10 <- [0x00000000df9c8000 - 0x00000000df9cffff] size 0x00008000 gran 0x0f mem64
[DEBUG] PCI: 00:14.0 10 <- [0x00000000df9d0000 - 0x00000000df9dffff] size 0x00010000 gran 0x10 mem64
[DEBUG] PCI: 00:16.0 10 <- [0x00000000df9ba000 - 0x00000000df9ba00f] size 0x00000010 gran 0x04 mem64
[DEBUG] PCI: 00:19.0 10 <- [0x00000000df9e0000 - 0x00000000df9fffff] size 0x00020000 gran 0x11 mem
[DEBUG] PCI: 00:19.0 14 <- [0x00000000df9bf000 - 0x00000000df9bffff] size 0x00001000 gran 0x0c mem
[DEBUG] PCI: 00:19.0 18 <- [0x000000000000ffa0 - 0x000000000000ffbf] size 0x00000020 gran 0x05 io
[DEBUG] PCI: 00:1a.0 10 <- [0x00000000df9bd000 - 0x00000000df9bd3ff] size 0x00000400 gran 0x0a mem
[DEBUG] PCI: 00:1b.0 10 <- [0x00000000df9c0000 - 0x00000000df9c3fff] size 0x00004000 gran 0x0e mem64
[DEBUG] PCI: 00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 02 io
[DEBUG] PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
[DEBUG] PCI: 00:1c.0 20 <- [0x00000000dfb00000 - 0x00000000dfbfffff] size 0x00100000 gran 0x14 bus 02 mem
[DEBUG] PCI: 02:00.0 10 <- [0x00000000dfb00000 - 0x00000000dfb00fff] size 0x00001000 gran 0x0c mem
[DEBUG] PCI: 00:1c.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 03 io
[DEBUG] PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
[DEBUG] PCI: 00:1c.1 20 <- [0x00000000dfa00000 - 0x00000000dfafffff] size 0x00100000 gran 0x14 bus 03 mem
[DEBUG] PCI: 03:00.0 10 <- [0x00000000dfa00000 - 0x00000000dfa01fff] size 0x00002000 gran 0x0d mem64
[DEBUG] PCI: 00:1d.0 10 <- [0x00000000df9bc000 - 0x00000000df9bc3ff] size 0x00000400 gran 0x0a mem
[ERROR] PNP: 00ff.1 missing set_resources
[ERROR] PNP: 00ff.2 missing set_resources
[DEBUG] PCI: 00:1f.2 10 <- [0x000000000000ff78 - 0x000000000000ff7f] size 0x00000008 gran 0x03 io
[DEBUG] PCI: 00:1f.2 14 <- [0x000000000000ff6c - 0x000000000000ff6f] size 0x00000004 gran 0x02 io
[DEBUG] PCI: 00:1f.2 18 <- [0x000000000000ff70 - 0x000000000000ff77] size 0x00000008 gran 0x03 io
[DEBUG] PCI: 00:1f.2 1c <- [0x000000000000ff68 - 0x000000000000ff6b] size 0x00000004 gran 0x02 io
[DEBUG] PCI: 00:1f.2 20 <- [0x000000000000ff80 - 0x000000000000ff9f] size 0x00000020 gran 0x05 io
[DEBUG] PCI: 00:1f.2 24 <- [0x00000000df9be000 - 0x00000000df9be7ff] size 0x00000800 gran 0x0b mem
[DEBUG] PCI: 00:1f.3 10 <- [0x00000000df9bb000 - 0x00000000df9bb0ff] size 0x00000100 gran 0x08 mem64
[INFO ] Done setting resources.
[INFO ] Done allocating resources.
[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 2 / 0 ms
[INFO ] Enabling resources...
[DEBUG] PCI: 00:00.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:00.0 cmd <- 06
[DEBUG] PCI: 00:01.1 bridge ctrl <- 0013
[DEBUG] PCI: 00:01.1 subsystem <- 17aa/220e
[DEBUG] PCI: 00:01.1 cmd <- 00
[DEBUG] PCI: 00:02.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:02.0 cmd <- 03
[DEBUG] PCI: 00:03.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:03.0 cmd <- 02
[DEBUG] PCI: 00:04.0 cmd <- 02
[DEBUG] PCI: 00:14.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:14.0 cmd <- 102
[DEBUG] PCI: 00:16.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:16.0 cmd <- 02
[DEBUG] PCI: 00:19.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:19.0 cmd <- 103
[DEBUG] PCI: 00:1a.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1a.0 cmd <- 102
[DEBUG] PCI: 00:1b.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1b.0 cmd <- 102
[DEBUG] PCI: 00:1c.0 bridge ctrl <- 0013
[DEBUG] PCI: 00:1c.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1c.0 cmd <- 06
[DEBUG] PCI: 00:1c.1 bridge ctrl <- 0013
[DEBUG] PCI: 00:1c.1 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1c.1 cmd <- 06
[DEBUG] PCI: 00:1d.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1d.0 cmd <- 102
[DEBUG] PCI: 00:1f.0 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1f.0 cmd <- 107
[DEBUG] PCI: 00:1f.2 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1f.2 cmd <- 103
[DEBUG] PCI: 00:1f.3 subsystem <- 17aa/220e
[DEBUG] PCI: 00:1f.3 cmd <- 103
[DEBUG] PCI: 02:00.0 cmd <- 02
[DEBUG] PCI: 03:00.0 cmd <- 02
[INFO ] done.
[INFO ] Initializing devices...
[DEBUG] CPU_CLUSTER: 0 init
[DEBUG] MTRR: Physical address space:
[DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
[DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
[DEBUG] 0x00000000000c0000 - 0x000000007fffffff size 0x7ff40000 type 6
[DEBUG] 0x0000000080000000 - 0x00000000dfffffff size 0x60000000 type 0
[DEBUG] 0x00000000e0000000 - 0x00000000efffffff size 0x10000000 type 1
[DEBUG] 0x00000000f0000000 - 0x00000000ffffffff size 0x10000000 type 0
[DEBUG] 0x0000000100000000 - 0x000000047ddfffff size 0x37de00000 type 6
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
[DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
[DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 39 bits
[DEBUG] MTRR: default type WB/UC MTRR counts: 4/5.
[DEBUG] MTRR: WB selected as default type.
[DEBUG] MTRR: 0 base 0x0000000080000000 mask 0x0000007fc0000000 type 0
[DEBUG] MTRR: 1 base 0x00000000c0000000 mask 0x0000007fe0000000 type 0
[DEBUG] MTRR: 2 base 0x00000000e0000000 mask 0x0000007ff0000000 type 1
[DEBUG] MTRR: 3 base 0x00000000f0000000 mask 0x0000007ff0000000 type 0

[DEBUG] MTRR check
[DEBUG] Fixed MTRRs : Enabled
[DEBUG] Variable MTRRs: Enabled

[DEBUG] Initializing VR config.
[DEBUG] CPU has 2 cores, 4 threads enabled.
[DEBUG] Setting up SMI for CPU
[INFO ] Will perform SMM setup.
[DEBUG] FMAP: area COREBOOT found @ 810200 (4128256 bytes)
[INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0xc240 size 0xf800 in mcache @0x7f7dd0ac
[DEBUG] microcode: sig=0x306c3 pf=0x10 revision=0x28
[INFO ] CPU: Intel(R) Core(TM) i7-4600M CPU @ 2.90GHz.
[INFO ] LAPIC 0x0 in XAPIC mode.
[DEBUG] CPU: APIC: 00 enabled
[DEBUG] CPU: APIC: 01 enabled
[DEBUG] CPU: APIC: 02 enabled
[DEBUG] CPU: APIC: 03 enabled
[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
[DEBUG] Processing 16 relocs. Offset value of 0x00030000
[DEBUG] Attempting to start 3 APs
[DEBUG] Waiting for 10ms after sending INIT.
[DEBUG] Waiting for SIPI to complete...
[DEBUG] done.
[DEBUG] Waiting for SIPI to complete...
[DEBUG] done.
[INFO ] LAPIC 0x1 in XAPIC mode.
[INFO ] AP: slot 1 apic_id 1, MCU rev: 0x00000028
[INFO ] LAPIC 0x3 in XAPIC mode.
[INFO ] LAPIC 0x2 in XAPIC mode.
[INFO ] AP: slot 3 apic_id 3, MCU rev: 0x00000028
[INFO ] AP: slot 2 apic_id 2, MCU rev: 0x00000028
[DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1a0 memsize: 0x1a0
[DEBUG] Processing 9 relocs. Offset value of 0x00038000
[DEBUG] smm_module_setup_stub: stack_top = 0x7f801000
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000
[DEBUG] SMM Module: stub loaded at 38000. Will call 0x7f7a2ecd
[DEBUG] Installing permanent SMM handler to 0x7f800000
[DEBUG] HANDLER [0x7faff000-0x7faffea8]

[DEBUG] CPU 0
[DEBUG] ss0 [0x7fafec00-0x7faff000]
[DEBUG] stub0 [0x7faf7000-0x7faf71a0]

[DEBUG] CPU 1
[DEBUG] ss1 [0x7fafe800-0x7fafec00]
[DEBUG] stub1 [0x7faf6c00-0x7faf6da0]

[DEBUG] CPU 2
[DEBUG] ss2 [0x7fafe400-0x7fafe800]
[DEBUG] stub2 [0x7faf6800-0x7faf69a0]

[DEBUG] CPU 3
[DEBUG] ss3 [0x7fafe000-0x7fafe400]
[DEBUG] stub3 [0x7faf6400-0x7faf65a0]

[DEBUG] stacks [0x7f800000-0x7f801000]
[DEBUG] Loading module at 0x7faff000 with entry 0x7faff2a4. filesize: 0xe90 memsize: 0xea8
[DEBUG] Processing 54 relocs. Offset value of 0x7faff000
[DEBUG] Loading module at 0x7faf7000 with entry 0x7faf7000. filesize: 0x1a0 memsize: 0x1a0
[DEBUG] Processing 9 relocs. Offset value of 0x7faf7000
[DEBUG] smm_module_setup_stub: stack_top = 0x7f801000
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x300000
[DEBUG] SMM Module: placing smm entry code at 7faf6c00, cpu # 0x1
[DEBUG] SMM Module: placing smm entry code at 7faf6800, cpu # 0x2
[DEBUG] SMM Module: placing smm entry code at 7faf6400, cpu # 0x3
[DEBUG] SMM Module: stub loaded at 7faf7000. Will call 0x7faff2a4
[DEBUG] SMI_STS: MCSMI
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7faef000, cpu = 0
[DEBUG] In relocation handler: CPU 0
[DEBUG] New SMBASE=0x7faef000 IEDBASE=0x7fc00000
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7faeec00, cpu = 1
[DEBUG] In relocation handler: CPU 1
[DEBUG] New SMBASE=0x7faeec00 IEDBASE=0x7fc00000
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7faee400, cpu = 3
[DEBUG] In relocation handler: CPU 3
[DEBUG] New SMBASE=0x7faee400 IEDBASE=0x7fc00000
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7faee800, cpu = 2
[DEBUG] In relocation handler: CPU 2
[DEBUG] New SMBASE=0x7faee800 IEDBASE=0x7fc00000
[DEBUG] Writing SMRR. base = 0x7f800006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] microcode: Update skipped, already up-to-date
[INFO ] Initializing CPU #0
[DEBUG] CPU: vendor Intel device 306c3
[DEBUG] CPU: family 06, model 3c, stepping 03
[DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL already locked
[DEBUG] cpu: energy policy set to 6
[INFO ] Turbo is available but hidden
[INFO ] Turbo is available and visible
[INFO ] CPU #0 initialized
[INFO ] Initializing CPU #1
[INFO ] Initializing CPU #2
[INFO ] Initializing CPU #3
[DEBUG] CPU: vendor Intel device 306c3
[DEBUG] CPU: family 06, model 3c, stepping 03
[DEBUG] CPU: vendor Intel device 306c3
[DEBUG] CPU: family 06, model 3c, stepping 03
[DEBUG] CPU: vendor Intel device 306c3
[DEBUG] CPU: family 06, model 3c, stepping 03
[DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL already locked
[DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL already locked
[DEBUG] IA32_FEATURE_CONTROL already locked
[DEBUG] cpu: energy policy set to 6
[INFO ] CPU #2 initialized
[DEBUG] cpu: energy policy set to 6
[DEBUG] cpu: energy policy set to 6
[INFO ] CPU #3 initialized
[INFO ] CPU #1 initialized
[INFO ] bsp_do_flight_plan done after 2 msecs.
[DEBUG] CPU: frequency set to 3600
[DEBUG] Enabling SMIs.
[DEBUG] Locking SMM.
[DEBUG] CPU_CLUSTER: 0 init finished in 12 msecs
[DEBUG] PCI: 00:00.0 init
[DEBUG] Disabling PEG12.
[DEBUG] Disabling PEG10.
[DEBUG] Disabling "device 7".
[DEBUG] Set BIOS_RESET_CPL
[DEBUG] CPU TDP: 37 Watts
[DEBUG] PCI: 00:00.0 init finished in 1 msecs
[DEBUG] PCI: 00:01.1 init
[DEBUG] PCI: 00:01.1 init finished in 0 msecs
[DEBUG] PCI: 00:02.0 init
[INFO ] CBFS: Found 'vbt.bin' @0x3cc00 size 0x582 in mcache @0x7f7dd204
[INFO ] Found a VBT of 4608 bytes after decompression
[INFO ] GMA: Found VBT in CBFS
[INFO ] GMA: Found valid VBT in CBFS
[DEBUG] GT Power Management Init
[INFO ] GMA: Setting backlight PWM frequency to 135MHz / 128 / 4794 = 220Hz
[DEBUG] GT Power Management Init (post VBIOS)
[DEBUG] PCI: 00:02.0 init finished in 222 msecs
[DEBUG] PCI: 00:03.0 init
[DEBUG] Mini-HD: base = 0xdf9c4000
[DEBUG] azalia_audio: Initializing codec #0
[DEBUG] azalia_audio: codec viddid: 80862807
[DEBUG] azalia_audio: verb_size: 16
[DEBUG] azalia_audio: verb loaded.
[DEBUG] PCI: 00:03.0 init finished in 3 msecs
[DEBUG] PCI: 00:04.0 init
[DEBUG] PCI: 00:04.0 init finished in 0 msecs
[DEBUG] PCI: 00:14.0 init
[DEBUG] PCI: 00:14.0 init finished in 0 msecs
[DEBUG] PCI: 00:16.0 init
[DEBUG] ME: FW Partition Table : OK
[DEBUG] ME: Bringup Loader Failure : NO
[DEBUG] ME: Firmware Init Complete : NO
[DEBUG] ME: Manufacturing Mode : YES
[DEBUG] ME: Boot Options Present : NO
[DEBUG] ME: Update In Progress : NO
[DEBUG] ME: Current Working State : Initializing
[DEBUG] ME: Current Operation State : Bring up
[DEBUG] ME: Current Operation Mode : Debug
[DEBUG] ME: Error Code : No Error
[DEBUG] ME: Progress Phase : BUP Phase
[DEBUG] ME: Power Management Event : Pseudo-global reset
[DEBUG] ME: Progress Phase State : 0x4d
[CRIT ] intel_me_path: mbp is not ready!
[NOTE ] ME: BIOS path: Error
[ERROR] ME: MBP not ready
[DEBUG] PCI: 00:16.0 init finished in 0 msecs
[DEBUG] PCI: 00:19.0 init
[DEBUG] PCI: 00:19.0 init finished in 0 msecs
[DEBUG] PCI: 00:1a.0 init
[DEBUG] EHCI: Setting up controller.. done.
[DEBUG] PCI: 00:1a.0 init finished in 0 msecs
[DEBUG] PCI: 00:1b.0 init
[DEBUG] Azalia: base = 0xdf9c0000
[DEBUG] Azalia: codec_mask = 01
[DEBUG] azalia_audio: Initializing codec #0
[DEBUG] azalia_audio: codec viddid: 10ec0292
[DEBUG] azalia_audio: verb_size: 128
[DEBUG] azalia_audio: verb loaded.
[DEBUG] PCI: 00:1b.0 init finished in 7 msecs
[DEBUG] PCI: 00:1c.0 init
[DEBUG] Initializing PCH PCIe bridge.
[DEBUG] PCI: 00:1c.0 init finished in 0 msecs
[DEBUG] PCI: 00:1c.1 init
[DEBUG] Initializing PCH PCIe bridge.
[DEBUG] PCI: 00:1c.1 init finished in 0 msecs
[DEBUG] PCI: 00:1d.0 init
[DEBUG] EHCI: Setting up controller.. done.
[DEBUG] PCI: 00:1d.0 init finished in 0 msecs
[DEBUG] PCI: 00:1f.0 init
[DEBUG] pch: lpc_init
[DEBUG] IOAPIC: Initializing IOAPIC at 0xfec00000
[DEBUG] IOAPIC: ID = 0x00
[DEBUG] IOAPIC: 24 interrupts
[DEBUG] IOAPIC: Clearing IOAPIC at 0xfec00000
[DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00
[INFO ] Set power off after power failure.
[INFO ] NMI sources disabled.
[DEBUG] LynxPoint H PM init
[DEBUG] RTC: failed = 0x0
[DEBUG] RTC Init
[DEBUG] apm_control: Disabling ACPI.
[DEBUG] APMC done.
[DEBUG] PCI: 00:1f.0 init finished in 0 msecs
[DEBUG] PCI: 00:1f.2 init
[DEBUG] SATA: Initializing...
[DEBUG] SATA: Controller in AHCI mode.
[DEBUG] ABAR: 0xdf9be000
[DEBUG] PCI: 00:1f.2 init finished in 0 msecs
[DEBUG] PCI: 00:1f.3 init
[DEBUG] PCI: 00:1f.3 init finished in 0 msecs
[DEBUG] PCI: 02:00.0 init
[DEBUG] PCI: 02:00.0 init finished in 0 msecs
[DEBUG] PCI: 03:00.0 init
[DEBUG] PCI: 03:00.0 init finished in 0 msecs
[DEBUG] PNP: 00ff.2 init
[DEBUG] PNP: 00ff.2 init finished in 0 msecs
[INFO ] Devices initialized
[DEBUG] BS: BS_DEV_INIT run times (exec / console): 248 / 0 ms
[INFO ] Found TPM ST33ZP24 by ST Microelectronics
[DEBUG] TPM: Startup
[DEBUG] TPM: command 0x99 returned 0x0
[DEBUG] TPM: Asserting physical presence
[DEBUG] TPM: command 0x4000000a returned 0x0
[DEBUG] TPM: command 0x65 returned 0x0
[DEBUG] TPM: flags disable=0, deactivated=0, nvlocked=1
[INFO ] TPM: setup succeeded
[DEBUG] BS: BS_DEV_INIT exit times (exec / console): 54 / 0 ms
[INFO ] Finalize devices...
[DEBUG] PCI: 00:00.0 final
[DEBUG] PCI: 00:16.0 final
[INFO ] ME: MBP cleared
[DEBUG] PCI: 00:1b.0 final
[DEBUG] PCI: 00:1f.0 final
[DEBUG] flash size 0x2800000 bytes
[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x2800000
[ERROR] SF size 0x2800000 does not correspond to CONFIG_ROM_SIZE 0xc00000!!
[DEBUG] apm_control: Finalizing SMM.
[DEBUG] APMC done.
[INFO ] Devices finalized
[INFO ] CBFS: Found 'fallback/dsdt.aml' @0x39500 size 0x36a1 in mcache @0x7f7dd1d8
[WARN ] CBFS: 'fallback/slic' not found.
[INFO ] ACPI: Writing ACPI tables at 7f743000.
[DEBUG] ACPI: * FACS
[DEBUG] ACPI: * DSDT
[DEBUG] ACPI: * FADT
[DEBUG] ACPI: added table 1/32, length now 40
[DEBUG] ACPI: * SSDT
[DEBUG] Found 1 CPU(s) with 4 core(s) each.
[DEBUG] PSS: 2901MHz power 37000 control 0x2400 status 0x2400
[DEBUG] PSS: 2900MHz power 37000 control 0x1d00 status 0x1d00
[DEBUG] PSS: 2400MHz power 28854 control 0x1800 status 0x1800
[DEBUG] PSS: 2000MHz power 22943 control 0x1400 status 0x1400
[DEBUG] PSS: 1600MHz power 17471 control 0x1000 status 0x1000
[DEBUG] PSS: 1200MHz power 12469 control 0xc00 status 0xc00
[DEBUG] PSS: 800MHz power 7885 control 0x800 status 0x800
[DEBUG] PSS: 2901MHz power 37000 control 0x2400 status 0x2400
[DEBUG] PSS: 2900MHz power 37000 control 0x1d00 status 0x1d00
[DEBUG] PSS: 2400MHz power 28854 control 0x1800 status 0x1800
[DEBUG] PSS: 2000MHz power 22943 control 0x1400 status 0x1400
[DEBUG] PSS: 1600MHz power 17471 control 0x1000 status 0x1000
[DEBUG] PSS: 1200MHz power 12469 control 0xc00 status 0xc00
[DEBUG] PSS: 800MHz power 7885 control 0x800 status 0x800
[DEBUG] PSS: 2901MHz power 37000 control 0x2400 status 0x2400
[DEBUG] PSS: 2900MHz power 37000 control 0x1d00 status 0x1d00
[DEBUG] PSS: 2400MHz power 28854 control 0x1800 status 0x1800
[DEBUG] PSS: 2000MHz power 22943 control 0x1400 status 0x1400
[DEBUG] PSS: 1600MHz power 17471 control 0x1000 status 0x1000
[DEBUG] PSS: 1200MHz power 12469 control 0xc00 status 0xc00
[DEBUG] PSS: 800MHz power 7885 control 0x800 status 0x800
[DEBUG] PSS: 2901MHz power 37000 control 0x2400 status 0x2400
[DEBUG] PSS: 2900MHz power 37000 control 0x1d00 status 0x1d00
[DEBUG] PSS: 2400MHz power 28854 control 0x1800 status 0x1800
[DEBUG] PSS: 2000MHz power 22943 control 0x1400 status 0x1400
[DEBUG] PSS: 1600MHz power 17471 control 0x1000 status 0x1000
[DEBUG] PSS: 1200MHz power 12469 control 0xc00 status 0xc00
[DEBUG] PSS: 800MHz power 7885 control 0x800 status 0x800
[DEBUG] Generating ACPI PIRQ entries
[INFO ] ACPI: * H8
[INFO ] H8: BDC detection not implemented. Assuming BDC installed
[INFO ] H8: WWAN detection not implemented. Assuming WWAN installed
[INFO ] \_SB_.PCI0.TPM: LPC TPM PNP: 0c31.0
[DEBUG] ACPI: added table 2/32, length now 44
[DEBUG] ACPI: * MCFG
[DEBUG] ACPI: added table 3/32, length now 48
[DEBUG] ACPI: * TCPA
[DEBUG] TCPA log created at 0x7f733000
[DEBUG] ACPI: added table 4/32, length now 52
[DEBUG] ACPI: * MADT
[DEBUG] IOAPIC: 24 interrupts
[DEBUG] ACPI: added table 5/32, length now 56
[DEBUG] ACPI: * SPCR
[DEBUG] current = 7f7482f0
[DEBUG] ACPI: * DMAR
[DEBUG] ACPI: added table 6/32, length now 60
[DEBUG] ACPI: * HPET
[DEBUG] ACPI: added table 7/32, length now 64
[DEBUG] current = 7f7483f0
[INFO ] ACPI: done.
[DEBUG] ACPI tables: 21488 bytes.
[DEBUG] smbios_write_tables: 7f72b000
[DEBUG] SMBIOS firmware version is set to coreboot_version: '4.20-522-g251491c9d7'
[INFO ] Create SMBIOS type 16
[INFO ] Create SMBIOS type 17
[INFO ] Create SMBIOS type 20
[INFO ] PCI: 03:00.0 (unknown)
[DEBUG] SMBIOS tables: 1119 bytes.
[DEBUG] Writing table forward entry at 0x00000500
[DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 1068
[DEBUG] Writing coreboot table at 0x7f767000
[DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
[DEBUG] 1. 0000000000001000-000000000009ffff: RAM
[DEBUG] 2. 00000000000a0000-00000000000fffff: RESERVED
[DEBUG] 3. 0000000000100000-000000007f72afff: RAM
[DEBUG] 4. 000000007f72b000-000000007f783fff: CONFIGURATION TABLES
[DEBUG] 5. 000000007f784000-000000007f7cdfff: RAMSTAGE
[DEBUG] 6. 000000007f7ce000-000000007f7fffff: CONFIGURATION TABLES
[DEBUG] 7. 000000007f800000-00000000821fffff: RESERVED
[DEBUG] 8. 00000000f0000000-00000000f3ffffff: RESERVED
[DEBUG] 9. 00000000fed10000-00000000fed19fff: RESERVED
[DEBUG] 10. 00000000fed40000-00000000fed44fff: RESERVED
[DEBUG] 11. 00000000fed80000-00000000fed84fff: RESERVED
[DEBUG] 12. 00000000fed90000-00000000fed91fff: RESERVED
[DEBUG] 13. 0000000100000000-000000047ddfffff: RAM
[DEBUG] Wrote coreboot table at: 0x7f767000, 0x3d4 bytes, checksum a815
[DEBUG] coreboot table: 1004 bytes.
[DEBUG] IMD ROOT 0. 0x7f7ff000 0x00001000
[DEBUG] IMD SMALL 1. 0x7f7fe000 0x00001000
[DEBUG] CONSOLE 2. 0x7f7de000 0x00020000
[DEBUG] RO MCACHE 3. 0x7f7dd000 0x00000468
[DEBUG] TIME STAMP 4. 0x7f7dc000 0x00000910
[DEBUG] MEM INFO 5. 0x7f7db000 0x000007a8
[DEBUG] AFTER CAR 6. 0x7f7ce000 0x0000d000
[DEBUG] RAMSTAGE 7. 0x7f783000 0x0004b000
[DEBUG] SMM BACKUP 8. 0x7f773000 0x00010000
[DEBUG] IGD OPREGION 9. 0x7f76f000 0x00003130
[DEBUG] COREBOOT 10. 0x7f767000 0x00008000
[DEBUG] ACPI 11. 0x7f743000 0x00024000
[DEBUG] TCPA TCGLOG12. 0x7f733000 0x00010000
[DEBUG] SMBIOS 13. 0x7f72b000 0x00008000
[DEBUG] IMD small region:
[DEBUG] IMD ROOT 0. 0x7f7fec00 0x00000400
[DEBUG] FMAP 1. 0x7f7feb20 0x000000e0
[DEBUG] ROMSTAGE 2. 0x7f7feb00 0x00000004
[DEBUG] ROMSTG STCK 3. 0x7f7fea40 0x000000a8
[DEBUG] ACPI GNVS 4. 0x7f7fe980 0x000000b0
[DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 4 / 0 ms
[INFO ] CBFS: Found 'fallback/payload' @0x42f80 size 0x11897 in mcache @0x7f7dd2a0
[DEBUG] Checking segment from ROM address 0xffc531ac
[DEBUG] Payload being loaded at below 1MiB without region being marked as RAM usable.
[DEBUG] Checking segment from ROM address 0xffc531c8
[DEBUG] Loading segment from ROM address 0xffc531ac
[DEBUG] code (compression=1)
[DEBUG] New segment dstaddr 0x000deda0 memsize 0x21260 srcaddr 0xffc531e4 filesize 0x1185f
[DEBUG] Loading Segment: addr: 0x000deda0 memsz: 0x0000000000021260 filesz: 0x000000000001185f
[DEBUG] using LZMA
[DEBUG] Loading segment from ROM address 0xffc531c8
[DEBUG] Entry Point 0x000fd25b
[DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 0 ms
[DEBUG] ICH-NM10-PCH: watchdog disabled
[DEBUG] Jumping to boot code at 0x000fd25b(0x7f767000)
SeaBIOS (version rel-1.16.2-0-gea1b7a0)
BUILD: gcc: (coreboot toolchain v2023-06-24_2b4d2edfd6) 11.3.0 binutils: (GNU Binutils) 2.40
Found coreboot cbmem console @ 7f7de000
Found mainboard LENOVO ThinkPad T440p
Relocating init from 0x000e0500 to 0x7e71da80 (size 54496)
Found CBFS header at 0xffc1022c
multiboot: eax=7f7bb49c, ebx=7f7bb464
Found 17 PCI devices (max PCI bus is 03)
Copying SMBIOS from 0x7f72b000 to 0x000f67c0
Copying SMBIOS 3.0 from 0x7f72b020 to 0x000f67a0
Copying ACPI RSDP from 0x7f743000 to 0x000f6770
table(50434146)=0x7f746940 (via xsdt)
Using pmtimer, ioport 0x508
table(41504354)=0x7f748230 (via xsdt)
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.16.2-0-gea1b7a0)
PCI: XHCI at 00:14.0 (mmio 0xdf9d0000)
XHCI init: regs @ 0xdf9d0000, 21 ports, 32 slots, 32 byte contexts
XHCI protocol USB 2.00, 15 ports (offset 1), def 3001
XHCI protocol USB 3.00, 6 ports (offset 16), def 1000
XHCI extcap 0xc1 @ 0xdf9d8040
XHCI extcap 0xc0 @ 0xdf9d8070
XHCI extcap 0x1 @ 0xdf9d846c
EHCI init on dev 00:1a.0 (regs=0xdf9bd020)
EHCI init on dev 00:1d.0 (regs=0xdf9bc020)
AHCI controller at 00:1f.2, iobase 0xdf9be000, irq 10
Searching bootorder for: HALT
Found 0 lpt ports
Found 0 serial ports
Discarding ps2 data f0 (status=11)
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@5/disk@0
AHCI/5: Set transfer mode to UDMA-6
Searching bios-geometry for: /pci@i0cf8/*@1f,2/drive@5/disk@0
AHCI/5: registering: "AHCI/5: Samsung SSD 840 EVO 120GB ATA-9 Hard-Disk (111 GiBytes)"
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0
AHCI/0: Set transfer mode to UDMA-6
Searching bios-geometry for: /pci@i0cf8/*@1f,2/drive@0/disk@0
AHCI/0: registering: "AHCI/0: SK hynix SC311 SATA 128GB ATA-10 Hard-Disk (119 GiBytes)"
XHCI no devices found
Searching bootorder for: /pci@i0cf8/usb@1a/hub@1/storage@2/*@0/*@0,0
Searching bootorder for: /pci@i0cf8/usb@1a/hub@1/usb-*@2
USB MSC vendor='' product='USB DISK 3.0' rev='PMAP' type=0 removable=1
USB MSC blksize=512 sectors=60566016
Initialized USB HUB (0 ports used)
Initialized USB HUB (1 ports used)
PS2 keyboard initialized
All threads complete.
Scan for option roms

Press ESC for boot menu.

Turning on vga text mode console
SeaBIOS (version rel-1.16.2-0-gea1b7a0)
Select boot device:

1. AHCI/0: SK hynix SC311 SATA 128GB ATA-10 Hard-Disk (119 GiBytes)
2. AHCI/5: Samsung SSD 840 EVO 120GB ATA-9 Hard-Disk (111 GiBytes)
3. USB MSC Drive USB DISK 3.0 PMAP

t. TPM Configuration

Searching bootorder for: HALT
drive 0x000f6670: PCHS=0/0/0 translation=lba LCHS=1024/255/63 s=60566016
drive 0x000f66b0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=250069680
drive 0x000f6700: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=234441648
Space available for UMB: cf000-ec000, f5fe0-f6670
Returned 16695296 bytes of ZoneHigh
e820 map has 11 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 000000007f717000 = 1 RAM
4: 000000007f717000 - 0000000082200000 = 2 RESERVED
5: 00000000f0000000 - 00000000f4000000 = 2 RESERVED
6: 00000000fed10000 - 00000000fed1a000 = 2 RESERVED
7: 00000000fed40000 - 00000000fed45000 = 2 RESERVED
8: 00000000fed80000 - 00000000fed85000 = 2 RESERVED
9: 00000000fed90000 - 00000000fed92000 = 2 RESERVED
10: 0000000100000000 - 000000047de00000 = 1 RAM
enter handle_19:
NULL
Booting from Hard Disk...
Booting from 0000:7c00
(6-6/11)