|
Looking for coreboot table at 0 4096 bytes.
|
|
Mapping 4096B of physical memory at 0x0 (requested 0x0).
|
|
Mapping 1320B of physical memory at 0x0 (requested 0x518).
|
|
... padding virtual address with 0x518 bytes.
|
|
Found!
|
|
coreboot table entry 0x11
|
|
Found forwarding entry.
|
|
Looking for coreboot table at 7f74b000 4096 bytes.
|
|
Mapping 4096B of physical memory at 0x7f74b000 (requested 0x7f74b000).
|
|
Mapping 2642B of physical memory at 0x7f74b000 (requested 0x7f74b018).
|
|
... padding virtual address with 0x18 bytes.
|
|
Found!
|
|
coreboot table entry 0xc8
|
|
coreboot table entry 0xcc
|
|
coreboot table entry 0x01
|
|
Found memory map.
|
|
LB_MEM_TABLE found.
|
|
LB_MEM_TABLE found.
|
|
coreboot table entry 0x03
|
|
coreboot table entry 0x04
|
|
coreboot table entry 0x05
|
|
coreboot table entry 0x06
|
|
coreboot table entry 0x07
|
|
coreboot table entry 0x26
|
|
coreboot table entry 0x12
|
|
coreboot table entry 0x29
|
|
coreboot table entry 0x16
|
|
Found timestamp table.
|
|
cbmem_addr = 7f7dc000
|
|
coreboot table entry 0x17
|
|
Found cbmem console.
|
|
cbmem_addr = 7f7dd000
|
|
coreboot table entry 0x24
|
|
coreboot table entry 0x37
|
|
coreboot table entry 0x39
|
|
coreboot table entry 0x30
|
|
coreboot table entry 0x40
|
|
coreboot table entry 0x3a
|
|
coreboot table entry 0x32
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
coreboot table entry 0x31
|
|
Mapping 8B of physical memory at 0x7f7dd000 (requested 0x7f7dd000).
|
|
Mapping 103640B of physical memory at 0x7f7dd000 (requested 0x7f7dd000).
|
|
|
|
coreboot-4.13-2365-gec05ced278-dirty-GLETA1WW (2.55) Sat Feb 27 00:35:20 UTC 2021 bootblock starting (log level: 4)...
|
|
Timestamp - end of bootblock: 344416354
|
|
FMAP: Found "FLASH" version 1.1 at 0x70000.
|
|
FMAP: base = 0xff400000 size = 0xc00000 #areas = 5
|
|
FMAP: area COREBOOT found @ 70200 (12123648 bytes)
|
|
CBFS: mcache @0xff7c2e00 built for 16 files, used 0x304 of 0x2000 bytes
|
|
CBFS: Found 'fallback/romstage' @0x80 size 0x8b9c in mcache @0xff7c2e2c
|
|
Timestamp - starting to load romstage: 345649579
|
|
Timestamp - finished loading romstage: 345688164
|
|
BS: bootblock times (exec / console): total (unknown) / 0 ms
|
|
|
|
|
|
coreboot-4.13-2365-gec05ced278-dirty-GLETA1WW (2.55) Sat Feb 27 00:35:20 UTC 2021 romstage starting (log level: 4)...
|
|
Disabling Watchdog reboot... done.
|
|
SMBus controller enabled
|
|
SB: Resume from S3 detected.
|
|
Setting up static northbridge registers... done.
|
|
Started PEG11 link training.
|
|
Temporarily hiding PEG11.
|
|
Started PEG10 link training.
|
|
Temporarily hiding PEG10.
|
|
Initializing IGD...
|
|
Back from haswell_early_initialization()
|
|
Resume from S3 detected.
|
|
Timestamp - before RAM initialization: 500925990
|
|
CPU id(306c3) ucode:00000028 Intel(R) Core(TM) i7-4600M CPU @ 2.90GHz
|
|
AES supported, TXT supported, VT supported
|
|
PCH type: QM87, device id: 8c4f, rev id 5
|
|
Starting UEFI PEI System Agent
|
|
FMAP: area RW_MRC_CACHE found @ 20000 (65536 bytes)
|
|
prepare_mrc_cache: at 0xff420030, size fd4
|
|
CBFS: Found 'mrc.bin' @0xb2fdc0 size 0x2e6e4 in mcache @0xff7c3090
|
|
System Agent: Starting up...
|
|
System Agent: S3 resume detected
|
|
System Agent: Initializing PCH
|
|
install_ppi: overwrite GUID {ed097352-9041-445a-80b6-b29d509e8845}
|
|
install_ppi: overwrite GUID {908c7f8b-5c48-47fb-8357-f5fd4e235276}
|
|
System Agent: Initializing PCH (SMBUS)
|
|
System Agent: Initializing PCH (USB)
|
|
System Agent: Initializing PCH (SA Init)
|
|
System Agent: Initializing PCH (Me UMA)
|
|
System Agent: Initializing Memory
|
|
System Agent: Done.
|
|
Sanity checking heap.
|
|
MRC Version 1.6.1 Build 2
|
|
memcfg DDR3 clock 1600 MHz
|
|
memcfg channel assignment: A: 0, B 1, C 2
|
|
memcfg channel[0] config (00620020):
|
|
ECC inactive
|
|
enhanced interleave mode on
|
|
rank interleave on
|
|
DIMMA 8192 MB width x8 or x32 dual rank, selected
|
|
DIMMB 0 MB width x8 or x32 single rank
|
|
memcfg channel[1] config (00600010):
|
|
ECC inactive
|
|
enhanced interleave mode on
|
|
rank interleave on
|
|
DIMMA 4096 MB width x8 or x32 single rank, selected
|
|
DIMMB 0 MB width x8 or x32 single rank
|
|
Timestamp - after RAM initialization: 1605367370
|
|
Unhiding PEG10.
|
|
Unhiding PEG11.
|
|
SMM Memory Map
|
|
SMRAM : 0x7f800000 0x800000
|
|
Subregion 0: 0x7f800000 0x300000
|
|
Subregion 1: 0x7fb00000 0x100000
|
|
Subregion 2: 0x7fc00000 0x400000
|
|
MTRR Range: Start=7f000000 End=80000000 (Size 1000000)
|
|
MTRR Range: Start=ff800000 End=0 (Size 800000)
|
|
S3 Resume
|
|
Timestamp - end of romstage: 2346372267
|
|
BS: romstage times (exec / console): total (unknown) / 270 ms
|
|
|
|
|
|
coreboot-4.13-2365-gec05ced278-dirty-GLETA1WW (2.55) Sat Feb 27 00:35:20 UTC 2021 postcar starting (log level: 4)...
|
|
Timestamp - start of postcar: 2379417187
|
|
Timestamp - end of postcar: 2379428366
|
|
S3 Resume
|
|
Jumping to image.
|
|
|
|
|
|
coreboot-4.13-2365-gec05ced278-dirty-GLETA1WW (2.55) Sat Feb 27 00:35:20 UTC 2021 ramstage starting (log level: 4)...
|
|
Timestamp - start of ramstage: 2380330397
|
|
S3 Resume
|
|
Timestamp - device enumeration: 2380368633
|
|
Enumerating buses...
|
|
Root Device scanning...
|
|
CPU_CLUSTER: 0 enabled
|
|
DOMAIN: 0000 enabled
|
|
DOMAIN: 0000 scanning...
|
|
PCI: pci_scan_bus for bus 00
|
|
PCI: 00:00.0 [8086/0c04] enabled
|
|
PCI: Static device PCI: 00:01.0 not found, disabling it.
|
|
PCI: 00:01.1 [8086/0c05] enabled
|
|
PCI: 00:02.0 [8086/0416] enabled
|
|
PCI: 00:03.0 [8086/0c0c] enabled
|
|
PCI: 00:04.0 [8086/0c03] enabled
|
|
PCI: 00:14.0 [8086/8c31] enabled
|
|
PCI: 00:16.0 [8086/8c3a] disabled
|
|
PCI: 00:16.1: Disabling device
|
|
PCI: 00:16.2: Disabling device
|
|
PCI: 00:16.3: Disabling device
|
|
PCI: 00:19.0 [8086/153a] enabled
|
|
PCI: 00:1a.0 [8086/8c2d] enabled
|
|
PCI: 00:1b.0 [8086/8c20] enabled
|
|
PCIe Root Port 1 ASPM is disabled
|
|
PCI: 00:1c.0 [8086/8c10] enabled
|
|
PCIe Root Port 2 ASPM is disabled
|
|
PCI: 00:1c.1 [8086/8c12] enabled
|
|
PCI: 00:1c.2 [8086/8c14] disabled
|
|
PCI: 00:1c.3 [8086/8c16] disabled
|
|
Adjusted number of PCIe root ports to 5 as per strpfusecfg2
|
|
PCI: 00:1c.2: Disabling device
|
|
PCI: 00:1c.3: Disabling device
|
|
PCI: 00:1c.4: Disabling device
|
|
PCI: 00:1c.4 [8086/8c18] disabled
|
|
PCI: 00:1d.0 [8086/8c26] enabled
|
|
PCI: 00:1f.0 [8086/8c4f] enabled
|
|
PCI: 00:1f.2 [8086/8c03] enabled
|
|
PCI: 00:1f.3 [8086/8c22] enabled
|
|
PCI: 00:1f.5: Disabling device
|
|
PCI: 00:1f.6: Disabling device
|
|
PCI: Leftover static devices:
|
|
PCI: 00:01.0
|
|
PCI: 00:16.1
|
|
PCI: 00:16.2
|
|
PCI: 00:16.3
|
|
PCI: 00:1c.5
|
|
PCI: 00:1c.6
|
|
PCI: 00:1c.7
|
|
PCI: 00:1f.5
|
|
PCI: 00:1f.6
|
|
PCI: Check your devicetree.cb.
|
|
PCI: 00:01.1 scanning...
|
|
PCI: pci_scan_bus for bus 01
|
|
scan_bus: bus PCI: 00:01.1 finished in 0 msecs
|
|
PCI: 00:1c.0 scanning...
|
|
PCI: pci_scan_bus for bus 02
|
|
PCI: 02:00.0 [10ec/5227] enabled
|
|
Enabling Common Clock Configuration
|
|
ASPM: Enabled L0s and L1
|
|
PCIe: Max_Payload_Size adjusted to 128
|
|
scan_bus: bus PCI: 00:1c.0 finished in 0 msecs
|
|
PCI: 00:1c.1 scanning...
|
|
PCI: pci_scan_bus for bus 03
|
|
PCI: 03:00.0 [8086/095b] enabled
|
|
Enabling Common Clock Configuration
|
|
ASPM: Enabled L1
|
|
PCIe: Max_Payload_Size adjusted to 128
|
|
scan_bus: bus PCI: 00:1c.1 finished in 0 msecs
|
|
PCI: 00:1f.0 scanning...
|
|
No CMOS option 'touchpad'.
|
|
PMH7: ID 05 Revision 01
|
|
PNP: 00ff.1 enabled
|
|
H8: EC Firmware ID GLHT29WW-3.23, Version 2.01B
|
|
No CMOS option 'bluetooth'.
|
|
H8: WWAN detection not implemented. Assuming WWAN installed
|
|
No CMOS option 'wwan'.
|
|
PNP: 00ff.2 enabled
|
|
PNP: 0c31.0 enabled
|
|
scan_bus: bus PCI: 00:1f.0 finished in 5 msecs
|
|
PCI: 00:1f.3 scanning...
|
|
scan_bus: bus PCI: 00:1f.3 finished in 0 msecs
|
|
scan_bus: bus DOMAIN: 0000 finished in 6 msecs
|
|
scan_bus: bus Root Device finished in 6 msecs
|
|
done
|
|
BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 0 ms
|
|
FMAP: area RW_MRC_CACHE found @ 20000 (65536 bytes)
|
|
FMAP: area RW_MRC_CACHE found @ 20000 (65536 bytes)
|
|
MRC: Checking cached data update for 'RW_MRC_CACHE'.
|
|
flash size 0x2800000 bytes
|
|
SF: Detected 00 0000 with sector size 0x1000, total 0x2800000
|
|
SF size 0x2800000 does not correspond to CONFIG_ROM_SIZE 0xc00000!!
|
|
MRC: 'RW_MRC_CACHE' does not need update.
|
|
BS: BS_DEV_ENUMERATE exit times (exec / console): 3 / 0 ms
|
|
Timestamp - device configuration: 2406894165
|
|
found VGA at PCI: 00:02.0
|
|
Setting up VGA for PCI: 00:02.0
|
|
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
|
|
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
|
|
Allocating resources...
|
|
Reading resources...
|
|
mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff.
|
|
mc_add_fixed_mmio_resources: Adding DMIBAR @ 68 0xfed18000-0xfed18fff.
|
|
mc_add_fixed_mmio_resources: Adding EPBAR @ 40 0xfed19000-0xfed19fff.
|
|
mc_add_fixed_mmio_resources: Adding GDXCBAR @ 5420 0xfed84000-0xfed84fff.
|
|
Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
|
|
MC MAP: TOM: 0x300000000
|
|
MC MAP: TOUUD: 0x37de00000
|
|
MC MAP: MESEG_BASE: 0x7ffff00000
|
|
MC MAP: MESEG_LIMIT: 0xfffff
|
|
MC MAP: REMAP_BASE: 0x300000000
|
|
MC MAP: REMAP_LIMIT: 0x37ddfffff
|
|
MC MAP: TOLUD: 0x82200000
|
|
MC MAP: BGSM: 0x80000000
|
|
MC MAP: BDSM: 0x80200000
|
|
MC MAP: TSEGMB: 0x7f800000
|
|
MC MAP: GGC: 0x209
|
|
MC MAP: DPR: 0x7f800001
|
|
PNP: 00ff.1 missing read_resources
|
|
PNP: 00ff.2 missing read_resources
|
|
Done reading resources.
|
|
==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
|
|
PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
|
|
PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
|
|
PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
|
|
PCI: 02:00.0 10 * [0x0 - 0xfff] mem
|
|
PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
|
|
PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
|
PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
|
|
PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
|
|
PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done
|
|
PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
|
|
PCI: 03:00.0 10 * [0x0 - 0x1fff] mem
|
|
PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
|
|
PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
|
PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
|
|
=== Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
|
|
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
|
|
update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
|
|
update_constraints: PCI: 00:1f.0 84 base 00001600 limit 0000167f io (fixed)
|
|
update_constraints: PCI: 00:1f.0 88 base 000015e0 limit 000015ef io (fixed)
|
|
update_constraints: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed)
|
|
update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed)
|
|
DOMAIN: 0000: Resource ranges:
|
|
* Base: 1000, Size: 5e0, Tag: 100
|
|
* Base: 15f0, Size: 10, Tag: 100
|
|
* Base: 1680, Size: e980, Tag: 100
|
|
PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
|
|
PCI: 00:19.0 18 * [0x1040 - 0x105f] limit: 105f io
|
|
PCI: 00:1f.2 20 * [0x1060 - 0x107f] limit: 107f io
|
|
PCI: 00:1f.2 10 * [0x1080 - 0x1087] limit: 1087 io
|
|
PCI: 00:1f.2 18 * [0x1088 - 0x108f] limit: 108f io
|
|
PCI: 00:1f.2 14 * [0x1090 - 0x1093] limit: 1093 io
|
|
PCI: 00:1f.2 1c * [0x1094 - 0x1097] limit: 1097 io
|
|
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
|
|
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
|
|
update_constraints: PCI: 00:00.0 48 base fed10000 limit fed17fff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 68 base fed18000 limit fed18fff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 40 base fed19000 limit fed19fff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 5420 base fed84000 limit fed84fff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 00 base fed90000 limit fed90fff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 01 base fed91000 limit fed91fff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 02 base 00000000 limit 0009ffff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 03 base 000c0000 limit 7f7fffff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 04 base 7f800000 limit 7fffffff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 05 base 80000000 limit 821fffff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 06 base 100000000 limit 37ddfffff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
|
|
update_constraints: PCI: 00:1f.0 31fe base fec00000 limit ffffffff mem (fixed)
|
|
update_constraints: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
|
|
DOMAIN: 0000: Resource ranges:
|
|
* Base: 82200000, Size: 6de00000, Tag: 200
|
|
* Base: f4000000, Size: ac00000, Tag: 200
|
|
* Base: 37de00000, Size: 7c82200000, Tag: 100200
|
|
PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
|
|
PCI: 00:02.0 10 * [0x82400000 - 0x827fffff] limit: 827fffff mem
|
|
PCI: 00:1c.0 20 * [0x82200000 - 0x822fffff] limit: 822fffff mem
|
|
PCI: 00:1c.1 20 * [0x82300000 - 0x823fffff] limit: 823fffff mem
|
|
PCI: 00:19.0 10 * [0x82800000 - 0x8281ffff] limit: 8281ffff mem
|
|
PCI: 00:14.0 10 * [0x82820000 - 0x8282ffff] limit: 8282ffff mem
|
|
PCI: 00:04.0 10 * [0x82830000 - 0x82837fff] limit: 82837fff mem
|
|
PCI: 00:03.0 10 * [0x82838000 - 0x8283bfff] limit: 8283bfff mem
|
|
PCI: 00:1b.0 10 * [0x8283c000 - 0x8283ffff] limit: 8283ffff mem
|
|
PCI: 00:19.0 14 * [0x82840000 - 0x82840fff] limit: 82840fff mem
|
|
PCI: 00:1f.2 24 * [0x82841000 - 0x828417ff] limit: 828417ff mem
|
|
PCI: 00:1a.0 10 * [0x82842000 - 0x828423ff] limit: 828423ff mem
|
|
PCI: 00:1d.0 10 * [0x82843000 - 0x828433ff] limit: 828433ff mem
|
|
PCI: 00:1f.3 10 * [0x82844000 - 0x828440ff] limit: 828440ff mem
|
|
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
|
|
PCI: 00:1c.0 mem: base: 82200000 size: 100000 align: 20 gran: 20 limit: 822fffff
|
|
PCI: 00:1c.0: Resource ranges:
|
|
* Base: 82200000, Size: 100000, Tag: 200
|
|
PCI: 02:00.0 10 * [0x82200000 - 0x82200fff] limit: 82200fff mem
|
|
PCI: 00:1c.0 mem: base: 82200000 size: 100000 align: 20 gran: 20 limit: 822fffff done
|
|
PCI: 00:1c.1 mem: base: 82300000 size: 100000 align: 20 gran: 20 limit: 823fffff
|
|
PCI: 00:1c.1: Resource ranges:
|
|
* Base: 82300000, Size: 100000, Tag: 200
|
|
PCI: 03:00.0 10 * [0x82300000 - 0x82301fff] limit: 82301fff mem
|
|
PCI: 00:1c.1 mem: base: 82300000 size: 100000 align: 20 gran: 20 limit: 823fffff done
|
|
=== Resource allocator: DOMAIN: 0000 - resource allocation complete ===
|
|
PCI: 00:01.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
|
|
PCI: 00:01.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
|
|
PCI: 00:01.1 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 01 mem
|
|
PCI: 00:02.0 10 <- [0x0082400000 - 0x00827fffff] size 0x00400000 gran 0x16 mem64
|
|
PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
|
|
PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
|
|
PCI: 00:03.0 10 <- [0x0082838000 - 0x008283bfff] size 0x00004000 gran 0x0e mem64
|
|
PCI: 00:04.0 10 <- [0x0082830000 - 0x0082837fff] size 0x00008000 gran 0x0f mem64
|
|
PCI: 00:14.0 10 <- [0x0082820000 - 0x008282ffff] size 0x00010000 gran 0x10 mem64
|
|
PCI: 00:19.0 10 <- [0x0082800000 - 0x008281ffff] size 0x00020000 gran 0x11 mem
|
|
PCI: 00:19.0 14 <- [0x0082840000 - 0x0082840fff] size 0x00001000 gran 0x0c mem
|
|
PCI: 00:19.0 18 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io
|
|
PCI: 00:1a.0 10 <- [0x0082842000 - 0x00828423ff] size 0x00000400 gran 0x0a mem
|
|
PCI: 00:1b.0 10 <- [0x008283c000 - 0x008283ffff] size 0x00004000 gran 0x0e mem64
|
|
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
|
|
PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
|
|
PCI: 00:1c.0 20 <- [0x0082200000 - 0x00822fffff] size 0x00100000 gran 0x14 bus 02 mem
|
|
PCI: 02:00.0 10 <- [0x0082200000 - 0x0082200fff] size 0x00001000 gran 0x0c mem
|
|
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
|
|
PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
|
|
PCI: 00:1c.1 20 <- [0x0082300000 - 0x00823fffff] size 0x00100000 gran 0x14 bus 03 mem
|
|
PCI: 03:00.0 10 <- [0x0082300000 - 0x0082301fff] size 0x00002000 gran 0x0d mem64
|
|
PCI: 00:1d.0 10 <- [0x0082843000 - 0x00828433ff] size 0x00000400 gran 0x0a mem
|
|
PNP: 00ff.1 missing set_resources
|
|
PNP: 00ff.2 missing set_resources
|
|
PCI: 00:1f.2 10 <- [0x0000001080 - 0x0000001087] size 0x00000008 gran 0x03 io
|
|
PCI: 00:1f.2 14 <- [0x0000001090 - 0x0000001093] size 0x00000004 gran 0x02 io
|
|
PCI: 00:1f.2 18 <- [0x0000001088 - 0x000000108f] size 0x00000008 gran 0x03 io
|
|
PCI: 00:1f.2 1c <- [0x0000001094 - 0x0000001097] size 0x00000004 gran 0x02 io
|
|
PCI: 00:1f.2 20 <- [0x0000001060 - 0x000000107f] size 0x00000020 gran 0x05 io
|
|
PCI: 00:1f.2 24 <- [0x0082841000 - 0x00828417ff] size 0x00000800 gran 0x0b mem
|
|
PCI: 00:1f.3 10 <- [0x0082844000 - 0x00828440ff] size 0x00000100 gran 0x08 mem64
|
|
Done setting resources.
|
|
Done allocating resources.
|
|
BS: BS_DEV_RESOURCES run times (exec / console): 1 / 0 ms
|
|
Timestamp - device enable: 2410962531
|
|
Enabling resources...
|
|
PCI: 00:00.0 subsystem <- 17aa/220e
|
|
PCI: 00:00.0 cmd <- 06
|
|
PCI: 00:01.1 bridge ctrl <- 0013
|
|
PCI: 00:01.1 cmd <- 00
|
|
PCI: 00:02.0 subsystem <- 17aa/220e
|
|
PCI: 00:02.0 cmd <- 03
|
|
PCI: 00:03.0 subsystem <- 17aa/220e
|
|
PCI: 00:03.0 cmd <- 02
|
|
PCI: 00:04.0 cmd <- 02
|
|
PCI: 00:14.0 subsystem <- 17aa/220e
|
|
PCI: 00:14.0 cmd <- 102
|
|
PCI: 00:19.0 subsystem <- 17aa/220e
|
|
PCI: 00:19.0 cmd <- 103
|
|
PCI: 00:1a.0 subsystem <- 17aa/220e
|
|
PCI: 00:1a.0 cmd <- 106
|
|
PCI: 00:1b.0 subsystem <- 17aa/220e
|
|
PCI: 00:1b.0 cmd <- 102
|
|
PCI: 00:1c.0 bridge ctrl <- 0013
|
|
PCI: 00:1c.0 subsystem <- 17aa/220e
|
|
PCI: 00:1c.0 cmd <- 06
|
|
PCI: 00:1c.1 bridge ctrl <- 0013
|
|
PCI: 00:1c.1 subsystem <- 17aa/220e
|
|
PCI: 00:1c.1 cmd <- 06
|
|
PCI: 00:1d.0 subsystem <- 17aa/220e
|
|
PCI: 00:1d.0 cmd <- 106
|
|
PCI: 00:1f.0 subsystem <- 17aa/220e
|
|
PCI: 00:1f.0 cmd <- 107
|
|
PCI: 00:1f.2 subsystem <- 17aa/220e
|
|
PCI: 00:1f.2 cmd <- 103
|
|
PCI: 00:1f.3 subsystem <- 17aa/220e
|
|
PCI: 00:1f.3 cmd <- 103
|
|
PCI: 02:00.0 cmd <- 02
|
|
PCI: 03:00.0 cmd <- 02
|
|
done.
|
|
Found TPM ST33ZP24 by ST Microelectronics
|
|
TPM: Handle S3 resume.
|
|
TPM: Resume
|
|
TPM: command 0x99 returned 0x0
|
|
TPM: setup succeeded
|
|
BS: BS_DEV_INIT entry times (exec / console): 106 / 0 ms
|
|
Timestamp - device initialization: 2718642773
|
|
Initializing devices...
|
|
CPU_CLUSTER: 0 init
|
|
MTRR: Physical address space:
|
|
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
|
|
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
|
|
0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6
|
|
0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 0
|
|
0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
|
|
0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
|
|
0x0000000100000000 - 0x000000037de00000 size 0x27de00000 type 6
|
|
MTRR: Fixed MSR 0x250 0x0606060606060606
|
|
MTRR: Fixed MSR 0x258 0x0606060606060606
|
|
MTRR: Fixed MSR 0x259 0x0000000000000000
|
|
MTRR: Fixed MSR 0x268 0x0606060606060606
|
|
MTRR: Fixed MSR 0x269 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26a 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26b 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26c 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26d 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26e 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26f 0x0606060606060606
|
|
CPU physical address size: 39 bits
|
|
MTRR: default type WB/UC MTRR counts: 4/4.
|
|
MTRR: UC selected as default type.
|
|
MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
|
|
MTRR: 1 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
|
|
MTRR: 2 base 0x0000000100000000 mask 0x0000007f00000000 type 6
|
|
MTRR: 3 base 0x0000000200000000 mask 0x0000007e00000000 type 6
|
|
|
|
MTRR check
|
|
Fixed MTRRs : Enabled
|
|
Variable MTRRs: Enabled
|
|
|
|
Initializing VR config.
|
|
CPU has 2 cores, 4 threads enabled.
|
|
Setting up SMI for CPU
|
|
Will perform SMM setup.
|
|
CBFS: Found 'cpu_microcode_blob.bin' @0x8c80 size 0xb400 in mcache @0x7f7fd090
|
|
microcode: sig=0x306c3 pf=0x10 revision=0x28
|
|
CPU: Intel(R) Core(TM) i7-4600M CPU @ 2.90GHz.
|
|
Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
|
|
Processing 16 relocs. Offset value of 0x00030000
|
|
Attempting to start 3 APs
|
|
Waiting for 10ms after sending INIT.
|
|
Waiting for 1st SIPI to complete...done.
|
|
Waiting for 2nd SIPI to complete...done.
|
|
AP: slot 1 apic_id 1, MCU rev: 0x00000028
|
|
AP: slot 2 apic_id 2, MCU rev: 0x00000028
|
|
AP: slot 3 apic_id 3, MCU rev: 0x00000028
|
|
Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
|
|
Processing 13 relocs. Offset value of 0x00038000
|
|
SMM Module: stub loaded at 0x00038000. Will call 0x7f79732e(0x00000000)
|
|
Installing permanent SMM handler to 0x7f800000
|
|
Loading module at 0x7f810000 with entry 0x7f810d9d. filesize: 0x4790 memsize: 0x88d0
|
|
Processing 278 relocs. Offset value of 0x7f810000
|
|
Loading module at 0x7f808000 with entry 0x7f808000. filesize: 0x1b8 memsize: 0x1b8
|
|
Processing 13 relocs. Offset value of 0x7f808000
|
|
SMM Module: placing jmp sequence at 0x7f807c00 rel16 0x03fd
|
|
SMM Module: placing jmp sequence at 0x7f807800 rel16 0x07fd
|
|
SMM Module: placing jmp sequence at 0x7f807400 rel16 0x0bfd
|
|
SMM Module: stub loaded at 0x7f808000. Will call 0x7f810d9d(0x00000000)
|
|
Initializing Southbridge SMI...
|
|
SMI_STS: MCSMI PM1
|
|
WAK PWRBTN smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7f800000, cpu = 0
|
|
In relocation handler: CPU 0
|
|
New SMBASE=0x7f800000 IEDBASE=0x7fc00000
|
|
Writing SMRR. base = 0x7f800006, mask=0xff800800
|
|
Relocation complete.
|
|
microcode: Update skipped, already up-to-date
|
|
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7f7ffc00, cpu = 1
|
|
In relocation handler: CPU 1
|
|
New SMBASE=0x7f7ffc00 IEDBASE=0x7fc00000
|
|
Writing SMRR. base = 0x7f800006, mask=0xff800800
|
|
Relocation complete.
|
|
microcode: Update skipped, already up-to-date
|
|
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7f7ff800, cpu = 2
|
|
In relocation handler: CPU 2
|
|
New SMBASE=0x7f7ff800 IEDBASE=0x7fc00000
|
|
Writing SMRR. base = 0x7f800006, mask=0xff800800
|
|
Relocation complete.
|
|
microcode: Update skipped, already up-to-date
|
|
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7f7ff400, cpu = 3
|
|
In relocation handler: CPU 3
|
|
New SMBASE=0x7f7ff400 IEDBASE=0x7fc00000
|
|
Writing SMRR. base = 0x7f800006, mask=0xff800800
|
|
Relocation complete.
|
|
microcode: Update skipped, already up-to-date
|
|
Initializing CPU #0
|
|
CPU: vendor Intel device 306c3
|
|
CPU: family 06, model 3c, stepping 03
|
|
Setting up local APIC...
|
|
apic_id: 0x00 done.
|
|
VMX status: enabled
|
|
IA32_FEATURE_CONTROL status: locked
|
|
cpu: energy policy set to 6
|
|
Turbo is available but hidden
|
|
Turbo is available and visible
|
|
CPU #0 initialized
|
|
Initializing CPU #1
|
|
Initializing CPU #2
|
|
Initializing CPU #3
|
|
CPU: vendor Intel device 306c3
|
|
CPU: family 06, model 3c, stepping 03
|
|
CPU: vendor Intel device 306c3
|
|
CPU: family 06, model 3c, stepping 03
|
|
CPU: vendor Intel device 306c3
|
|
CPU: family 06, model 3c, stepping 03
|
|
Setting up local APIC...
|
|
Setting up local APIC...
|
|
apic_id: 0x02 done.
|
|
Setting up local APIC...
|
|
apic_id: 0x03 done.
|
|
VMX status: enabled
|
|
VMX status: enabled
|
|
IA32_FEATURE_CONTROL status: locked
|
|
apic_id: 0x01 done.
|
|
IA32_FEATURE_CONTROL status: locked
|
|
VMX status: enabled
|
|
IA32_FEATURE_CONTROL status: locked
|
|
cpu: energy policy set to 6
|
|
CPU #2 initialized
|
|
cpu: energy policy set to 6
|
|
CPU #3 initialized
|
|
cpu: energy policy set to 6
|
|
CPU #1 initialized
|
|
bsp_do_flight_plan done after 1 msecs.
|
|
CPU: frequency set to 3600
|
|
Enabling SMIs.
|
|
Locking SMM.
|
|
CPU_CLUSTER: 0 init finished in 17 msecs
|
|
PCI: 00:00.0 init
|
|
Disabling PEG12.
|
|
Disabling PEG10.
|
|
Disabling "device 7".
|
|
Set BIOS_RESET_CPL
|
|
CPU TDP: 37 Watts
|
|
PCI: 00:00.0 init finished in 1 msecs
|
|
PCI: 00:01.1 init
|
|
PCI: 00:01.1 init finished in 0 msecs
|
|
PCI: 00:02.0 init
|
|
GT Power Management Init
|
|
GMA: Setting backlight PWM frequency to 135MHz / 128 / 4794 = 220Hz
|
|
framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
|
|
x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
|
|
GT Power Management Init (post VBIOS)
|
|
PCI: 00:02.0 init finished in 219 msecs
|
|
PCI: 00:03.0 init
|
|
Mini-HD: base = 0x82838000
|
|
HDA: No codec!
|
|
PCI: 00:03.0 init finished in 51 msecs
|
|
PCI: 00:04.0 init
|
|
PCI: 00:04.0 init finished in 0 msecs
|
|
PCI: 00:14.0 init
|
|
PCI: 00:14.0 init finished in 0 msecs
|
|
PCI: 00:19.0 init
|
|
PCI: 00:19.0 init finished in 0 msecs
|
|
PCI: 00:1a.0 init
|
|
EHCI: Setting up controller.. done.
|
|
PCI: 00:1a.0 init finished in 0 msecs
|
|
PCI: 00:1b.0 init
|
|
Azalia: base = 0x8283c000
|
|
Azalia: codec_mask = 01
|
|
HDA: Initializing codec #0
|
|
HDA: codec viddid: 10ec0292
|
|
HDA: verb loaded.
|
|
PCI: 00:1b.0 init finished in 6 msecs
|
|
PCI: 00:1c.0 init
|
|
Initializing PCH PCIe bridge.
|
|
PCI: 00:1c.0 init finished in 0 msecs
|
|
PCI: 00:1c.1 init
|
|
Initializing PCH PCIe bridge.
|
|
PCI: 00:1c.1 init finished in 0 msecs
|
|
PCI: 00:1d.0 init
|
|
EHCI: Setting up controller.. done.
|
|
PCI: 00:1d.0 init finished in 0 msecs
|
|
PCI: 00:1f.0 init
|
|
pch: lpc_init
|
|
IOAPIC: Initializing IOAPIC at 0xfec00000
|
|
IOAPIC: Bootstrap Processor Local APIC = 0x00
|
|
IOAPIC: ID = 0x02
|
|
Set power off after power failure.
|
|
NMI sources enabled.
|
|
LynxPoint H PM init
|
|
RTC: failed = 0x0
|
|
PCI: 00:1f.0 init finished in 0 msecs
|
|
PCI: 00:1f.2 init
|
|
SATA: Initializing...
|
|
SATA: Controller in AHCI mode.
|
|
ABAR: 0x82841000
|
|
PCI: 00:1f.2 init finished in 0 msecs
|
|
PCI: 00:1f.3 init
|
|
PCI: 00:1f.3 init finished in 0 msecs
|
|
PCI: 02:00.0 init
|
|
PCI: 02:00.0 init finished in 0 msecs
|
|
PCI: 03:00.0 init
|
|
PCI: 03:00.0 init finished in 0 msecs
|
|
PNP: 00ff.2 init
|
|
PNP: 00ff.2 init finished in 0 msecs
|
|
Devices initialized
|
|
BS: BS_DEV_INIT run times (exec / console): 296 / 0 ms
|
|
FMAP: area SMMSTORE found @ 30000 (262144 bytes)
|
|
smm store: 4 # blocks with size 0x10000
|
|
SMMSTORE: Setting up SMI handler
|
|
Finalize devices...
|
|
PCI: 00:1f.0 final
|
|
apm_control: Finalizing SMM.
|
|
APMC done.
|
|
Devices finalized
|
|
Timestamp - device setup done: 3595086344
|
|
Trying to find the wakeup vector...
|
|
Looking on 0x000f0000 for valid checksum
|
|
Checksum 1 passed
|
|
Checksum 2 passed all OK
|
|
RSDP found at 0x000f0000
|
|
RSDT found at 0x7f727030 ends at 0x7f727070
|
|
FADT found at 0x7f72a990
|
|
FACS found at 0x7f727240
|
|
OS waking vector is 0x0009a1f0
|
|
Timestamp - ACPI wake jump: 3595217664
|
|
|
|
Mapping 16B of physical memory at 0x7f7dc000 (requested 0x7f7dc000).
|
|
Timestamp tick frequency: 2900 MHz
|
|
Mapping 220B of physical memory at 0x7f7dc000 (requested 0x7f7dc000).
|
|
0 8790 8790 1st timestamp
|
|
11 127003 118213 start of bootblock
|
|
12 127554 551 end of bootblock
|
|
13 127979 425 starting to load romstage
|
|
14 127993 13 finished loading romstage
|
|
1 128111 118 start of romstage
|
|
2 181523 53412 before RAM initialization
|
|
3 562365 380841 after RAM initialization
|
|
4 817884 255518 end of romstage
|
|
100 829278 11394 start of postcar
|
|
101 829282 3 end of postcar
|
|
10 829593 311 start of ramstage
|
|
30 829607 13 device enumeration
|
|
40 838753 9146 device configuration
|
|
50 840156 1402 device enable
|
|
60 946253 106096 device initialization
|
|
70 1248475 302221 device setup done
|
|
98 1248520 45 ACPI wake jump
|