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USB
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coreboot-4.12-750-gb8d8002ea2 Wed Jun 17 22:52:47 UTC 2020 bootblock starting (log level: 7)...
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FMAP: area COREBOOT found @ 610200 (2031104 bytes)
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CBFS: Locating 'fallback/romstage'
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CBFS: Found @ offset 80 size 161b4
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BS: bootblock times (exec / console): total (unknown) / 4 ms
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coreboot-4.12-750-gb8d8002ea2 Wed Jun 17 22:52:47 UTC 2020 romstage starting (log level: 7)...
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SMBus controller enabled
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Setting up static northbridge registers... done
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Initializing Graphics...
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FMAP: area COREBOOT found @ 610200 (2031104 bytes)
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CBFS: Locating 'cmos_layout.bin'
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|
CBFS: Found @ offset 3d6c0 size 7e4
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Back from systemagent_early_init()
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Hybrid graphics: Disabling discrete GPU.
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Intel ME early init
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Intel ME firmware is ready
|
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ME: Requested 0MB UMA
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Starting native Platform init
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DMI: Running at X4 @ 5000MT/s
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FMAP: area RW_MRC_CACHE found @ 600000 (65536 bytes)
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MRC: no data in 'RW_MRC_CACHE'
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ECC supported: no ECC forced: no
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ECC RAM unsupported.
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SPD probe channel0, slot0
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|
Revision : 10
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|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
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|
Supported voltages : 1.5V
|
|
SDRAM width : 8
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|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : no
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
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|
Thermal features : PASR ext_temp_range
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|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
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|
DIMM Reference card: F
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|
Manufacturer ID : 9801
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|
Part number : 99U5428-065.A00L
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SPD probe channel0, slot1
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|
Revision : 11
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|
Type : b
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|
Key : 3
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|
Banks : 8
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|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : yes
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
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|
Thermal features : ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
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|
DIMM Reference card: F
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|
Manufacturer ID : ce80
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|
Part number : M471B1G73BH0-CK0
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SPD probe channel0, slot0
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|
Revision : 10
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : no
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : PASR ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
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|
DIMM Reference card: F
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|
Manufacturer ID : 9801
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Part number : 99U5428-065.A00L
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Not a DDR3 XMP profile!
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|
No valid XMP profile found.
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|
Revision : 10
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
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|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : no
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : PASR ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
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|
DIMM Reference card: F
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|
Manufacturer ID : 9801
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|
Part number : 99U5428-065.A00L
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|
Row addr bits : 16
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|
Column addr bits : 10
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|
Number of ranks : 2
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|
DIMM Capacity : 8192 MB
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|
CAS latencies : 5 6 7 8 9
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|
tCKmin : 1.500 ns
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|
tAAmin : 13.125 ns
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|
tWRmin : 15.000 ns
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|
tRCDmin : 13.125 ns
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|
tRRDmin : 6.000 ns
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|
tRPmin : 13.125 ns
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|
tRASmin : 36.000 ns
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|
tRCmin : 49.125 ns
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|
tRFCmin : 260.000 ns
|
|
tWTRmin : 7.500 ns
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|
tRTPmin : 7.500 ns
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|
tFAWmin : 30.000 ns
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|
channel[0] rankmap = 0x3
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|
SPD probe channel0, slot1
|
|
Revision : 11
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : yes
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : ce80
|
|
Part number : M471B1G73BH0-CK0
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|
Not a DDR3 XMP profile!
|
|
No valid XMP profile found.
|
|
Revision : 11
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : yes
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : ce80
|
|
Part number : M471B1G73BH0-CK0
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|
Row addr bits : 16
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|
Column addr bits : 10
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|
Number of ranks : 2
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|
DIMM Capacity : 8192 MB
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|
CAS latencies : 5 6 7 8 9 10 11
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|
tCKmin : 1.250 ns
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|
tAAmin : 13.125 ns
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|
tWRmin : 15.000 ns
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|
tRCDmin : 13.125 ns
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|
tRRDmin : 6.000 ns
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|
tRPmin : 13.125 ns
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|
tRASmin : 35.000 ns
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|
tRCmin : 48.125 ns
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|
tRFCmin : 260.000 ns
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|
tWTRmin : 7.500 ns
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|
tRTPmin : 7.500 ns
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|
tFAWmin : 30.000 ns
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|
channel[0] rankmap = 0xf
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|
SPD probe channel1, slot0
|
|
Revision : 11
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : yes
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : ce80
|
|
Part number : M471B1G73BH0-CK0
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|
SPD probe channel1, slot1
|
|
Revision : 10
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : no
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : PASR ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : 9801
|
|
Part number : 99U5428-065.A00L
|
|
SPD probe channel1, slot0
|
|
Revision : 11
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : yes
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : ce80
|
|
Part number : M471B1G73BH0-CK0
|
|
Not a DDR3 XMP profile!
|
|
No valid XMP profile found.
|
|
Revision : 11
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : yes
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : ce80
|
|
Part number : M471B1G73BH0-CK0
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|
Row addr bits : 16
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|
Column addr bits : 10
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|
Number of ranks : 2
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|
DIMM Capacity : 8192 MB
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|
CAS latencies : 5 6 7 8 9 10 11
|
|
tCKmin : 1.250 ns
|
|
tAAmin : 13.125 ns
|
|
tWRmin : 15.000 ns
|
|
tRCDmin : 13.125 ns
|
|
tRRDmin : 6.000 ns
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|
tRPmin : 13.125 ns
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|
tRASmin : 35.000 ns
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|
tRCmin : 48.125 ns
|
|
tRFCmin : 260.000 ns
|
|
tWTRmin : 7.500 ns
|
|
tRTPmin : 7.500 ns
|
|
tFAWmin : 30.000 ns
|
|
channel[1] rankmap = 0x3
|
|
SPD probe channel1, slot1
|
|
Revision : 10
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : no
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : PASR ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : 9801
|
|
Part number : 99U5428-065.A00L
|
|
Not a DDR3 XMP profile!
|
|
No valid XMP profile found.
|
|
Revision : 10
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : no
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : PASR ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : 9801
|
|
Part number : 99U5428-065.A00L
|
|
Row addr bits : 16
|
|
Column addr bits : 10
|
|
Number of ranks : 2
|
|
DIMM Capacity : 8192 MB
|
|
CAS latencies : 5 6 7 8 9
|
|
tCKmin : 1.500 ns
|
|
tAAmin : 13.125 ns
|
|
tWRmin : 15.000 ns
|
|
tRCDmin : 13.125 ns
|
|
tRRDmin : 6.000 ns
|
|
tRPmin : 13.125 ns
|
|
tRASmin : 36.000 ns
|
|
tRCmin : 49.125 ns
|
|
tRFCmin : 260.000 ns
|
|
tWTRmin : 7.500 ns
|
|
tRTPmin : 7.500 ns
|
|
tFAWmin : 30.000 ns
|
|
channel[1] rankmap = 0xf
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|
ECC is disabled
|
|
Starting Ivy Bridge RAM training (full initialization).
|
|
100MHz reference clock support: yes
|
|
PLL_REF100_CFG value: 0x7
|
|
Trying CAS 11, tCK 320.
|
|
Trying CAS 10, tCK 365.
|
|
Trying CAS 9, tCK 384.
|
|
Found compatible clock, CAS pair.
|
|
Selected DRAM frequency: 666 MHz
|
|
Selected CAS latency : 9T
|
|
PLL busy... done in 10 us
|
|
MCU frequency is set at : 666 MHz
|
|
Selected CWL latency : 7T
|
|
Selected tRCD : 9T
|
|
Selected tRP : 9T
|
|
Selected tRAS : 24T
|
|
Selected tWR : 10T
|
|
Selected tFAW : 20T
|
|
Selected tRRD : 4T
|
|
Selected tRTP : 5T
|
|
Selected tWTR : 5T
|
|
Selected tRFC : 174T
|
|
XOVER CLK [c14] = f000000
|
|
XOVER CMD [320c] = 4024000
|
|
XOVER CLK [d14] = f000000
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|
XOVER CMD [330c] = 4024000
|
|
DBP [4000] = 187999
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|
RAP [4004] = ca145454
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|
OTHP [400c] = a0690
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|
OTHP [400c] = 690
|
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REFI [4298] = 5aae1450
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SRFTP [42a4] = 41f97200
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DBP [4400] = 187999
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RAP [4404] = ca145454
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|
OTHP [440c] = a0690
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|
OTHP [440c] = 690
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|
REFI [4698] = 5aae1450
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|
SRFTP [46a4] = 41f97200
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|
Done dimm mapping
|
|
Update PCI-E configuration space:
|
|
PCI(0, 0, 0)[a0] = 0
|
|
PCI(0, 0, 0)[a4] = 8
|
|
PCI(0, 0, 0)[bc] = 82a00000
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|
PCI(0, 0, 0)[a8] = 7d600000
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|
PCI(0, 0, 0)[ac] = 8
|
|
PCI(0, 0, 0)[b8] = 80000000
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|
PCI(0, 0, 0)[b0] = 80a00000
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|
PCI(0, 0, 0)[b4] = 80800000
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|
Done memory map
|
|
RCOMP...done
|
|
COMP2 done
|
|
COMP1 done
|
|
FORCE RCOMP and wait 20us...done
|
|
Done io registers
|
|
Done jedec reset
|
|
Done MRS commands
|
|
timA: 0, 0, 0: 0x63-0x02-0x22
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|
timA: 0, 0, 1: 0x4f-0x6e-0x0e
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|
timA: 0, 0, 2: 0x6b-0x0c-0x2e
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|
timA: 0, 0, 3: 0x32-0x52-0x73
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|
timA: 0, 0, 4: 0x36-0x55-0x75
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|
timA: 0, 0, 5: 0x12-0x31-0x50
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|
timA: 0, 0, 6: 0x28-0x49-0x6a
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|
timA: 0, 0, 7: 0x29-0x48-0x67
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|
4024++;
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|
4028++;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4028 += 2;
|
|
increment 0, 0, 0
|
|
increment 0, 0, 2
|
|
increment 0, 0, 4
|
|
increment 0, 0, 5
|
|
increment 0, 0, 6
|
|
increment 0, 0, 7
|
|
4024 += 1;
|
|
4028 += 1;
|
|
lane 0: -7, -2
|
|
Aval: 0, 0, 0: 9e
|
|
lane 1: -9, -2
|
|
Aval: 0, 0, 1: 89
|
|
lane 2: -11, -5
|
|
Aval: 0, 0, 2: a6
|
|
lane 3: -5, 0
|
|
Aval: 0, 0, 3: 71
|
|
lane 4: -5, 2
|
|
Aval: 0, 0, 4: f4
|
|
lane 5: -6, 0
|
|
Aval: 0, 0, 5: cd
|
|
lane 6: -7, -1
|
|
Aval: 0, 0, 6: e6
|
|
lane 7: -9, -3
|
|
Aval: 0, 0, 7: e1
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4028 -= 1;
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4/8: 0, 0, 2b, 7
|
|
final results:
|
|
Aval: 0, 0, 0: 5e
|
|
Aval: 0, 0, 1: 49
|
|
Aval: 0, 0, 2: 66
|
|
Aval: 0, 0, 3: 31
|
|
Aval: 0, 0, 4: b4
|
|
Aval: 0, 0, 5: 8d
|
|
Aval: 0, 0, 6: a6
|
|
Aval: 0, 0, 7: a1
|
|
timA: 0, 1, 0: 0x5f-0x7f-0x1f
|
|
timA: 0, 1, 1: 0x4e-0x6e-0x0f
|
|
timA: 0, 1, 2: 0x70-0x0f-0x2e
|
|
timA: 0, 1, 3: 0x34-0x53-0x73
|
|
timA: 0, 1, 4: 0x38-0x58-0x79
|
|
timA: 0, 1, 5: 0x0f-0x30-0x51
|
|
timA: 0, 1, 6: 0x21-0x42-0x63
|
|
timA: 0, 1, 7: 0x2a-0x4a-0x6b
|
|
4024++;
|
|
4028++;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4028 += 2;
|
|
increment 0, 1, 2
|
|
increment 0, 1, 4
|
|
increment 0, 1, 5
|
|
increment 0, 1, 6
|
|
increment 0, 1, 7
|
|
4024 += 1;
|
|
4028 += 1;
|
|
lane 0: -6, -2
|
|
Aval: 0, 1, 0: 9b
|
|
lane 1: -8, -1
|
|
Aval: 0, 1, 1: 8b
|
|
lane 2: -2, 3
|
|
Aval: 0, 1, 2: ae
|
|
lane 3: -7, -1
|
|
Aval: 0, 1, 3: 6f
|
|
lane 4: -5, 1
|
|
Aval: 0, 1, 4: f7
|
|
lane 5: -9, -2
|
|
Aval: 0, 1, 5: cc
|
|
lane 6: -7, 0
|
|
Aval: 0, 1, 6: e0
|
|
lane 7: -8, -2
|
|
Aval: 0, 1, 7: e6
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4028 -= 1;
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4/8: 0, 1, 2b, 7
|
|
final results:
|
|
Aval: 0, 1, 0: 5b
|
|
Aval: 0, 1, 1: 4b
|
|
Aval: 0, 1, 2: 6e
|
|
Aval: 0, 1, 3: 2f
|
|
Aval: 0, 1, 4: b7
|
|
Aval: 0, 1, 5: 8c
|
|
Aval: 0, 1, 6: a0
|
|
Aval: 0, 1, 7: a6
|
|
timA: 0, 2, 0: 0x59-0x78-0x17
|
|
timA: 0, 2, 1: 0x4e-0x6c-0x0b
|
|
timA: 0, 2, 2: 0x6a-0x0a-0x2a
|
|
timA: 0, 2, 3: 0x2b-0x4a-0x6a
|
|
timA: 0, 2, 4: 0x41-0x61-0x01
|
|
timA: 0, 2, 5: 0x0b-0x29-0x47
|
|
timA: 0, 2, 6: 0x2a-0x49-0x69
|
|
timA: 0, 2, 7: 0x24-0x43-0x62
|
|
4024++;
|
|
4028++;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4028 += 2;
|
|
increment 0, 2, 2
|
|
increment 0, 2, 4
|
|
increment 0, 2, 5
|
|
increment 0, 2, 6
|
|
increment 0, 2, 7
|
|
4024 += 1;
|
|
4028 += 1;
|
|
lane 0: -4, 3
|
|
Aval: 0, 2, 0: 97
|
|
lane 1: -4, 3
|
|
Aval: 0, 2, 1: 8b
|
|
lane 2: -6, 3
|
|
Aval: 0, 2, 2: a9
|
|
lane 3: -4, 3
|
|
Aval: 0, 2, 3: 6a
|
|
lane 4: -9, 1
|
|
Aval: 0, 2, 4: fd
|
|
lane 5: -4, 4
|
|
Aval: 0, 2, 5: c7
|
|
lane 6: -6, 2
|
|
Aval: 0, 2, 6: e7
|
|
lane 7: -3, 3
|
|
Aval: 0, 2, 7: e2
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4028 -= 1;
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4/8: 0, 2, 2b, 7
|
|
final results:
|
|
Aval: 0, 2, 0: 57
|
|
Aval: 0, 2, 1: 4b
|
|
Aval: 0, 2, 2: 69
|
|
Aval: 0, 2, 3: 2a
|
|
Aval: 0, 2, 4: bd
|
|
Aval: 0, 2, 5: 87
|
|
Aval: 0, 2, 6: a7
|
|
Aval: 0, 2, 7: a2
|
|
timA: 0, 3, 0: 0x5b-0x77-0x13
|
|
timA: 0, 3, 1: 0x4c-0x6a-0x09
|
|
timA: 0, 3, 2: 0x6f-0x0d-0x2c
|
|
timA: 0, 3, 3: 0x2d-0x4b-0x6a
|
|
timA: 0, 3, 4: 0x40-0x5f-0x7e
|
|
timA: 0, 3, 5: 0x10-0x2f-0x4e
|
|
timA: 0, 3, 6: 0x2a-0x49-0x68
|
|
timA: 0, 3, 7: 0x24-0x42-0x61
|
|
4024++;
|
|
4028++;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4028 += 2;
|
|
increment 0, 3, 2
|
|
increment 0, 3, 4
|
|
increment 0, 3, 5
|
|
increment 0, 3, 6
|
|
increment 0, 3, 7
|
|
4024 += 1;
|
|
4028 += 1;
|
|
lane 0: 3, 9
|
|
Aval: 0, 3, 0: 99
|
|
lane 1: -3, 5
|
|
Aval: 0, 3, 1: 8a
|
|
lane 2: -3, 4
|
|
Aval: 0, 3, 2: ac
|
|
lane 3: -2, 3
|
|
Aval: 0, 3, 3: 6a
|
|
lane 4: -4, 3
|
|
Aval: 0, 3, 4: fe
|
|
lane 5: -5, 3
|
|
Aval: 0, 3, 5: cd
|
|
lane 6: -3, 4
|
|
Aval: 0, 3, 6: e8
|
|
lane 7: -1, 5
|
|
Aval: 0, 3, 7: e3
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4028 -= 1;
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4/8: 0, 3, 2b, 7
|
|
final results:
|
|
Aval: 0, 3, 0: 59
|
|
Aval: 0, 3, 1: 4a
|
|
Aval: 0, 3, 2: 6c
|
|
Aval: 0, 3, 3: 2a
|
|
Aval: 0, 3, 4: be
|
|
Aval: 0, 3, 5: 8d
|
|
Aval: 0, 3, 6: a8
|
|
Aval: 0, 3, 7: a3
|
|
timA: 1, 0, 0: 0x71-0x11-0x31
|
|
timA: 1, 0, 1: 0x61-0x7f-0x1e
|
|
timA: 1, 0, 2: 0x05-0x22-0x40
|
|
timA: 1, 0, 3: 0x41-0x5f-0x7e
|
|
timA: 1, 0, 4: 0x59-0x78-0x18
|
|
timA: 1, 0, 5: 0x25-0x43-0x61
|
|
timA: 1, 0, 6: 0x47-0x64-0x01
|
|
timA: 1, 0, 7: 0x40-0x5f-0x7e
|
|
4024++;
|
|
4028++;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4028 += 2;
|
|
increment 1, 0, 0
|
|
increment 1, 0, 2
|
|
increment 1, 0, 4
|
|
increment 1, 0, 5
|
|
increment 1, 0, 6
|
|
increment 1, 0, 7
|
|
4024 += 1;
|
|
4028 += 1;
|
|
lane 0: -4, 3
|
|
Aval: 1, 0, 0: b1
|
|
lane 1: -2, 5
|
|
Aval: 1, 0, 1: 9f
|
|
lane 2: 0, 8
|
|
Aval: 1, 0, 2: c4
|
|
lane 3: -2, 6
|
|
Aval: 1, 0, 3: 80
|
|
lane 4: -3, 5
|
|
Aval: 1, 0, 4: 119
|
|
lane 5: -1, 7
|
|
Aval: 1, 0, 5: e4
|
|
lane 6: -1, 7
|
|
Aval: 1, 0, 6: 104
|
|
lane 7: -4, 3
|
|
Aval: 1, 0, 7: fe
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4028 -= 2;
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4/8: 1, 0, 2b, 6
|
|
final results:
|
|
Aval: 1, 0, 0: 31
|
|
Aval: 1, 0, 1: 1f
|
|
Aval: 1, 0, 2: 44
|
|
Aval: 1, 0, 3: 0
|
|
Aval: 1, 0, 4: 99
|
|
Aval: 1, 0, 5: 64
|
|
Aval: 1, 0, 6: 84
|
|
Aval: 1, 0, 7: 7e
|
|
timA: 1, 1, 0: 0x71-0x0f-0x2e
|
|
timA: 1, 1, 1: 0x60-0x7f-0x1f
|
|
timA: 1, 1, 2: 0x07-0x25-0x44
|
|
timA: 1, 1, 3: 0x43-0x5e-0x7a
|
|
timA: 1, 1, 4: 0x5a-0x79-0x18
|
|
timA: 1, 1, 5: 0x27-0x46-0x65
|
|
timA: 1, 1, 6: 0x47-0x64-0x01
|
|
timA: 1, 1, 7: 0x40-0x5f-0x7f
|
|
4024++;
|
|
4028++;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4028 += 2;
|
|
increment 1, 1, 0
|
|
increment 1, 1, 2
|
|
increment 1, 1, 4
|
|
increment 1, 1, 5
|
|
increment 1, 1, 6
|
|
increment 1, 1, 7
|
|
4024 += 1;
|
|
4028 += 1;
|
|
lane 0: -3, 4
|
|
Aval: 1, 1, 0: ae
|
|
lane 1: -4, 3
|
|
Aval: 1, 1, 1: 9f
|
|
lane 2: -5, 4
|
|
Aval: 1, 1, 2: c4
|
|
lane 3: 4, 12
|
|
Aval: 1, 1, 3: 82
|
|
lane 4: -2, 4
|
|
Aval: 1, 1, 4: 119
|
|
lane 5: -5, 3
|
|
Aval: 1, 1, 5: e4
|
|
lane 6: -1, 8
|
|
Aval: 1, 1, 6: 104
|
|
lane 7: -3, 3
|
|
Aval: 1, 1, 7: ff
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4028 -= 2;
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4/8: 1, 1, 2b, 6
|
|
final results:
|
|
Aval: 1, 1, 0: 2e
|
|
Aval: 1, 1, 1: 1f
|
|
Aval: 1, 1, 2: 44
|
|
Aval: 1, 1, 3: 2
|
|
Aval: 1, 1, 4: 99
|
|
Aval: 1, 1, 5: 64
|
|
Aval: 1, 1, 6: 84
|
|
Aval: 1, 1, 7: 7f
|
|
timA: 1, 2, 0: 0x7c-0x1a-0x38
|
|
timA: 1, 2, 1: 0x66-0x06-0x27
|
|
timA: 1, 2, 2: 0x08-0x26-0x45
|
|
timA: 1, 2, 3: 0x4c-0x6b-0x0a
|
|
timA: 1, 2, 4: 0x55-0x75-0x16
|
|
timA: 1, 2, 5: 0x2b-0x4b-0x6b
|
|
timA: 1, 2, 6: 0x48-0x67-0x07
|
|
timA: 1, 2, 7: 0x45-0x64-0x03
|
|
4024++;
|
|
4028++;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4028 += 2;
|
|
increment 1, 2, 0
|
|
increment 1, 2, 1
|
|
increment 1, 2, 2
|
|
increment 1, 2, 4
|
|
increment 1, 2, 5
|
|
increment 1, 2, 6
|
|
increment 1, 2, 7
|
|
4024 += 1;
|
|
4028 += 1;
|
|
lane 0: -3, 2
|
|
Aval: 1, 2, 0: b8
|
|
lane 1: -8, -1
|
|
Aval: 1, 2, 1: a3
|
|
lane 2: -5, 4
|
|
Aval: 1, 2, 2: c5
|
|
lane 3: -3, 3
|
|
Aval: 1, 2, 3: 8a
|
|
lane 4: -4, 2
|
|
Aval: 1, 2, 4: 115
|
|
lane 5: -7, -1
|
|
Aval: 1, 2, 5: e7
|
|
lane 6: -4, 2
|
|
Aval: 1, 2, 6: 106
|
|
lane 7: -5, 0
|
|
Aval: 1, 2, 7: 101
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4028 -= 2;
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4/8: 1, 2, 2b, 6
|
|
final results:
|
|
Aval: 1, 2, 0: 38
|
|
Aval: 1, 2, 1: 23
|
|
Aval: 1, 2, 2: 45
|
|
Aval: 1, 2, 3: a
|
|
Aval: 1, 2, 4: 95
|
|
Aval: 1, 2, 5: 67
|
|
Aval: 1, 2, 6: 86
|
|
Aval: 1, 2, 7: 81
|
|
timA: 1, 3, 0: 0x74-0x13-0x32
|
|
timA: 1, 3, 1: 0x6a-0x09-0x29
|
|
timA: 1, 3, 2: 0x08-0x28-0x48
|
|
timA: 1, 3, 3: 0x49-0x68-0x08
|
|
timA: 1, 3, 4: 0x56-0x76-0x16
|
|
timA: 1, 3, 5: 0x27-0x46-0x66
|
|
timA: 1, 3, 6: 0x46-0x63-0x01
|
|
timA: 1, 3, 7: 0x40-0x5f-0x7f
|
|
4024++;
|
|
4028++;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4028 += 2;
|
|
increment 1, 3, 0
|
|
increment 1, 3, 1
|
|
increment 1, 3, 2
|
|
increment 1, 3, 4
|
|
increment 1, 3, 5
|
|
increment 1, 3, 6
|
|
increment 1, 3, 7
|
|
4024 += 1;
|
|
4028 += 1;
|
|
lane 0: -2, 4
|
|
Aval: 1, 3, 0: b3
|
|
lane 1: -4, 2
|
|
Aval: 1, 3, 1: a8
|
|
lane 2: -8, 0
|
|
Aval: 1, 3, 2: c4
|
|
lane 3: -2, 1
|
|
Aval: 1, 3, 3: 88
|
|
lane 4: -4, 2
|
|
Aval: 1, 3, 4: 115
|
|
lane 5: -6, 1
|
|
Aval: 1, 3, 5: e4
|
|
lane 6: -1, 6
|
|
Aval: 1, 3, 6: 103
|
|
lane 7: -5, 0
|
|
Aval: 1, 3, 7: fd
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4028 -= 2;
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4/8: 1, 3, 2b, 6
|
|
final results:
|
|
Aval: 1, 3, 0: 33
|
|
Aval: 1, 3, 1: 28
|
|
Aval: 1, 3, 2: 44
|
|
Aval: 1, 3, 3: 8
|
|
Aval: 1, 3, 4: 95
|
|
Aval: 1, 3, 5: 64
|
|
Aval: 1, 3, 6: 83
|
|
Aval: 1, 3, 7: 7d
|
|
timB: 0, 0, 0: 0x44-0x64-0x04
|
|
timB: 0, 0, 1: 0x40-0x5e-0x7e
|
|
timB: 0, 0, 2: 0x57-0x76-0x15
|
|
timB: 0, 0, 3: 0x29-0x48-0x68
|
|
timB: 0, 0, 4: 0x23-0x43-0x63
|
|
timB: 0, 0, 5: 0x6b-0x0b-0x2b
|
|
timB: 0, 0, 6: 0x06-0x25-0x44
|
|
timB: 0, 0, 7: 0x72-0x11-0x31
|
|
timB: 0, 1, 0: 0x48-0x67-0x07
|
|
timB: 0, 1, 1: 0x3d-0x5d-0x7e
|
|
timB: 0, 1, 2: 0x60-0x7f-0x1e
|
|
timB: 0, 1, 3: 0x24-0x44-0x65
|
|
timB: 0, 1, 4: 0x23-0x41-0x60
|
|
timB: 0, 1, 5: 0x63-0x02-0x22
|
|
timB: 0, 1, 6: 0x01-0x1e-0x3c
|
|
timB: 0, 1, 7: 0x72-0x10-0x2e
|
|
timB: 0, 2, 0: 0x4e-0x6e-0x0f
|
|
timB: 0, 2, 1: 0x42-0x63-0x04
|
|
timB: 0, 2, 2: 0x63-0x04-0x26
|
|
timB: 0, 2, 3: 0x2e-0x4e-0x6f
|
|
timB: 0, 2, 4: 0x2c-0x4d-0x6f
|
|
timB: 0, 2, 5: 0x70-0x10-0x30
|
|
timB: 0, 2, 6: 0x10-0x31-0x52
|
|
timB: 0, 2, 7: 0x80-0x20-0x41
|
|
timB: 0, 3, 0: 0x50-0x70-0x11
|
|
timB: 0, 3, 1: 0x44-0x65-0x06
|
|
timB: 0, 3, 2: 0x65-0x06-0x27
|
|
timB: 0, 3, 3: 0x2f-0x4f-0x6f
|
|
timB: 0, 3, 4: 0x2e-0x4e-0x6f
|
|
timB: 0, 3, 5: 0x70-0x10-0x30
|
|
timB: 0, 3, 6: 0x11-0x31-0x52
|
|
timB: 0, 3, 7: 0x80-0x20-0x41
|
|
timB: 1, 0, 0: 0x51-0x72-0x13
|
|
timB: 1, 0, 1: 0x49-0x6a-0x0b
|
|
timB: 1, 0, 2: 0x68-0x08-0x29
|
|
timB: 1, 0, 3: 0x30-0x50-0x71
|
|
timB: 1, 0, 4: 0x31-0x52-0x73
|
|
timB: 1, 0, 5: 0x75-0x16-0x37
|
|
timB: 1, 0, 6: 0x13-0x34-0x56
|
|
timB: 1, 0, 7: 0x01-0x22-0x44
|
|
timB: 1, 1, 0: 0x51-0x71-0x11
|
|
timB: 1, 1, 1: 0x49-0x69-0x0a
|
|
timB: 1, 1, 2: 0x67-0x07-0x28
|
|
timB: 1, 1, 3: 0x30-0x50-0x70
|
|
timB: 1, 1, 4: 0x2f-0x50-0x71
|
|
timB: 1, 1, 5: 0x74-0x15-0x37
|
|
timB: 1, 1, 6: 0x13-0x34-0x56
|
|
timB: 1, 1, 7: 0x00-0x20-0x41
|
|
timB: 1, 2, 0: 0x4a-0x69-0x08
|
|
timB: 1, 2, 1: 0x42-0x61-0x01
|
|
timB: 1, 2, 2: 0x5f-0x7d-0x1b
|
|
timB: 1, 2, 3: 0x24-0x46-0x68
|
|
timB: 1, 2, 4: 0x22-0x42-0x62
|
|
timB: 1, 2, 5: 0x72-0x11-0x30
|
|
timB: 1, 2, 6: 0x09-0x28-0x48
|
|
timB: 1, 2, 7: 0x80-0x1c-0x3a
|
|
timB: 1, 3, 0: 0x48-0x66-0x05
|
|
timB: 1, 3, 1: 0x47-0x65-0x03
|
|
timB: 1, 3, 2: 0x60-0x7f-0x1e
|
|
timB: 1, 3, 3: 0x29-0x47-0x65
|
|
timB: 1, 3, 4: 0x24-0x43-0x62
|
|
timB: 1, 3, 5: 0x6a-0x08-0x27
|
|
timB: 1, 3, 6: 0x06-0x24-0x43
|
|
timB: 1, 3, 7: 0x76-0x14-0x32
|
|
CPE
|
|
CPF
|
|
timC: 0, 0, 0: 0x0c-0x27-0x43
|
|
timC: 0, 0, 1: 0x07-0x22-0x3d
|
|
timC: 0, 0, 2: 0x1d-0x36-0x50
|
|
timC: 0, 0, 3: 0x2f-0x4b-0x67
|
|
timC: 0, 0, 4: 0x29-0x45-0x61
|
|
timC: 0, 0, 5: 0x30-0x4b-0x67
|
|
timC: 0, 0, 6: 0x0f-0x29-0x43
|
|
timC: 0, 0, 7: 0x38-0x52-0x6c
|
|
timC: 0, 1, 0: 0x10-0x2b-0x47
|
|
timC: 0, 1, 1: 0x43-0x5e-0x7a
|
|
timC: 0, 1, 2: 0x27-0x40-0x5a
|
|
timC: 0, 1, 3: 0x2b-0x46-0x62
|
|
timC: 0, 1, 4: 0x29-0x45-0x62
|
|
timC: 0, 1, 5: 0x29-0x44-0x60
|
|
timC: 0, 1, 6: 0x09-0x23-0x3e
|
|
timC: 0, 1, 7: 0x38-0x51-0x6b
|
|
timC: 0, 2, 0: 0x0f-0x2a-0x45
|
|
timC: 0, 2, 1: 0x07-0x22-0x3e
|
|
timC: 0, 2, 2: 0x27-0x43-0x5f
|
|
timC: 0, 2, 3: 0x31-0x4c-0x68
|
|
timC: 0, 2, 4: 0x31-0x4d-0x69
|
|
timC: 0, 2, 5: 0x32-0x4d-0x69
|
|
timC: 0, 2, 6: 0x14-0x30-0x4c
|
|
timC: 0, 2, 7: 0x00-0x1c-0x38
|
|
timC: 0, 3, 0: 0x11-0x2c-0x48
|
|
timC: 0, 3, 1: 0x09-0x24-0x40
|
|
timC: 0, 3, 2: 0x2a-0x44-0x5f
|
|
timC: 0, 3, 3: 0x32-0x4d-0x69
|
|
timC: 0, 3, 4: 0x33-0x4f-0x6b
|
|
timC: 0, 3, 5: 0x31-0x4d-0x69
|
|
timC: 0, 3, 6: 0x16-0x32-0x4e
|
|
timC: 0, 3, 7: 0x00-0x1c-0x39
|
|
timC: 1, 0, 0: 0x13-0x2d-0x48
|
|
timC: 1, 0, 1: 0x0c-0x29-0x46
|
|
timC: 1, 0, 2: 0x2a-0x45-0x61
|
|
timC: 1, 0, 3: 0x33-0x4f-0x6c
|
|
timC: 1, 0, 4: 0x34-0x51-0x6e
|
|
timC: 1, 0, 5: 0x37-0x52-0x6e
|
|
timC: 1, 0, 6: 0x15-0x31-0x4d
|
|
timC: 1, 0, 7: 0x05-0x20-0x3c
|
|
timC: 1, 1, 0: 0x13-0x2e-0x49
|
|
timC: 1, 1, 1: 0x0e-0x2a-0x47
|
|
timC: 1, 1, 2: 0x29-0x45-0x62
|
|
timC: 1, 1, 3: 0x35-0x50-0x6c
|
|
timC: 1, 1, 4: 0x31-0x4d-0x6a
|
|
timC: 1, 1, 5: 0x37-0x52-0x6e
|
|
timC: 1, 1, 6: 0x15-0x31-0x4d
|
|
timC: 1, 1, 7: 0x02-0x1d-0x39
|
|
timC: 1, 2, 0: 0x0d-0x29-0x46
|
|
timC: 1, 2, 1: 0x08-0x24-0x41
|
|
timC: 1, 2, 2: 0x23-0x40-0x5e
|
|
timC: 1, 2, 3: 0x2a-0x45-0x60
|
|
timC: 1, 2, 4: 0x28-0x44-0x61
|
|
timC: 1, 2, 5: 0x37-0x52-0x6e
|
|
timC: 1, 2, 6: 0x0f-0x28-0x41
|
|
timC: 1, 2, 7: 0x05-0x1e-0x38
|
|
timC: 1, 3, 0: 0x0b-0x27-0x43
|
|
timC: 1, 3, 1: 0x0e-0x2a-0x47
|
|
timC: 1, 3, 2: 0x26-0x42-0x5f
|
|
timC: 1, 3, 3: 0x2d-0x48-0x63
|
|
timC: 1, 3, 4: 0x29-0x45-0x62
|
|
timC: 1, 3, 5: 0x2f-0x4a-0x66
|
|
timC: 1, 3, 6: 0x0a-0x24-0x3f
|
|
timC: 1, 3, 7: 0x39-0x53-0x6d
|
|
High adjust 0:0000ffffffffffff
|
|
Bval+: 0, 0, 0, 44 -> c4
|
|
High adjust 1:0000ffffffffffff
|
|
Bval+: 0, 0, 1, 40 -> c0
|
|
High adjust 2:0000ffffffffffff
|
|
Bval+: 0, 0, 2, 57 -> d7
|
|
High adjust 3:0000ffffffffffff
|
|
Bval+: 0, 0, 3, 29 -> a9
|
|
High adjust 4:00000000ffffffff
|
|
Bval+: 0, 0, 4, 23 -> 123
|
|
High adjust 5:0000ffffffffffff
|
|
Bval+: 0, 0, 5, 6b -> eb
|
|
High adjust 6:00000000ffffffff
|
|
Bval+: 0, 0, 6, 6 -> 106
|
|
High adjust 7:0000ffffffffffff
|
|
Bval+: 0, 0, 7, 72 -> f2
|
|
High adjust 0:0000ffffffffffff
|
|
Bval+: 0, 1, 0, 48 -> c8
|
|
High adjust 1:0000ffffffffffff
|
|
Bval+: 0, 1, 1, 3d -> bd
|
|
High adjust 2:0000ffffffffffff
|
|
Bval+: 0, 1, 2, 60 -> e0
|
|
High adjust 3:0000ffffffffffff
|
|
Bval+: 0, 1, 3, 24 -> a4
|
|
High adjust 4:00000000ffffffff
|
|
Bval+: 0, 1, 4, 23 -> 123
|
|
High adjust 5:0000ffffffffffff
|
|
Bval+: 0, 1, 5, 63 -> e3
|
|
High adjust 6:00000000ffffffff
|
|
Bval+: 0, 1, 6, 1 -> 101
|
|
High adjust 7:0000ffffffffffff
|
|
Bval+: 0, 1, 7, 72 -> f2
|
|
High adjust 0:0000ffffffffffff
|
|
Bval+: 0, 2, 0, 4e -> ce
|
|
High adjust 1:0000ffffffffffff
|
|
Bval+: 0, 2, 1, 42 -> c2
|
|
High adjust 2:0000ffffffffffff
|
|
Bval+: 0, 2, 2, 63 -> e3
|
|
High adjust 3:0000ffffffffffff
|
|
Bval+: 0, 2, 3, 2e -> ae
|
|
High adjust 4:00000000ffffffff
|
|
Bval+: 0, 2, 4, 2c -> 12c
|
|
High adjust 5:0000ffffffffffff
|
|
Bval+: 0, 2, 5, 70 -> f0
|
|
High adjust 6:00000000ffffffff
|
|
Bval+: 0, 2, 6, 10 -> 110
|
|
High adjust 7:0000ffffffffffff
|
|
Bval+: 0, 2, 7, 80 -> 100
|
|
High adjust 0:0000ffffffffffff
|
|
Bval+: 0, 3, 0, 50 -> d0
|
|
High adjust 1:0000ffffffffffff
|
|
Bval+: 0, 3, 1, 44 -> c4
|
|
High adjust 2:0000ffffffffffff
|
|
Bval+: 0, 3, 2, 65 -> e5
|
|
High adjust 3:0000ffffffffffff
|
|
Bval+: 0, 3, 3, 2f -> af
|
|
High adjust 4:00000000ffffffff
|
|
Bval+: 0, 3, 4, 2e -> 12e
|
|
High adjust 5:0000ffffffffffff
|
|
Bval+: 0, 3, 5, 70 -> f0
|
|
High adjust 6:00000000ffffffff
|
|
Bval+: 0, 3, 6, 11 -> 111
|
|
High adjust 7:0000ffffffffffff
|
|
Bval+: 0, 3, 7, 80 -> 100
|
|
High adjust 0:0000ffffffffffff
|
|
Bval+: 1, 0, 0, 51 -> d1
|
|
High adjust 1:0000ffffffffffff
|
|
Bval+: 1, 0, 1, 49 -> c9
|
|
High adjust 2:0000ffffffffffff
|
|
Bval+: 1, 0, 2, 68 -> e8
|
|
High adjust 3:0000ffffffffffff
|
|
Bval+: 1, 0, 3, 30 -> b0
|
|
High adjust 4:00000000ffffffff
|
|
Bval+: 1, 0, 4, 31 -> 131
|
|
High adjust 5:0000ffffffffffff
|
|
Bval+: 1, 0, 5, 75 -> f5
|
|
High adjust 6:00000000ffffffff
|
|
Bval+: 1, 0, 6, 13 -> 113
|
|
High adjust 7:00000000ffffffff
|
|
Bval+: 1, 0, 7, 1 -> 101
|
|
High adjust 0:0000ffffffffffff
|
|
Bval+: 1, 1, 0, 51 -> d1
|
|
High adjust 1:0000ffffffffffff
|
|
Bval+: 1, 1, 1, 49 -> c9
|
|
High adjust 2:0000ffffffffffff
|
|
Bval+: 1, 1, 2, 67 -> e7
|
|
High adjust 3:0000ffffffffffff
|
|
Bval+: 1, 1, 3, 30 -> b0
|
|
High adjust 4:00000000ffffffff
|
|
Bval+: 1, 1, 4, 2f -> 12f
|
|
High adjust 5:0000ffffffffffff
|
|
Bval+: 1, 1, 5, 74 -> f4
|
|
High adjust 6:00000000ffffffff
|
|
Bval+: 1, 1, 6, 13 -> 113
|
|
High adjust 7:00000000ffffffff
|
|
Bval+: 1, 1, 7, 0 -> 100
|
|
High adjust 0:0000ffffffffffff
|
|
Bval+: 1, 2, 0, 4a -> ca
|
|
High adjust 1:0000ffffffffffff
|
|
Bval+: 1, 2, 1, 42 -> c2
|
|
High adjust 2:0000ffffffffffff
|
|
Bval+: 1, 2, 2, 5f -> df
|
|
High adjust 3:0000ffffffffffff
|
|
Bval+: 1, 2, 3, 24 -> a4
|
|
High adjust 4:00000000ffffffff
|
|
Bval+: 1, 2, 4, 22 -> 122
|
|
High adjust 5:0000ffffffffffff
|
|
Bval+: 1, 2, 5, 72 -> f2
|
|
High adjust 6:00000000ffffffff
|
|
Bval+: 1, 2, 6, 9 -> 109
|
|
High adjust 7:0000ffffffffffff
|
|
Bval+: 1, 2, 7, 80 -> 100
|
|
High adjust 0:0000ffffffffffff
|
|
Bval+: 1, 3, 0, 48 -> c8
|
|
High adjust 1:0000ffffffffffff
|
|
Bval+: 1, 3, 1, 47 -> c7
|
|
High adjust 2:0000ffffffffffff
|
|
Bval+: 1, 3, 2, 60 -> e0
|
|
High adjust 3:0000ffffffffffff
|
|
Bval+: 1, 3, 3, 29 -> a9
|
|
High adjust 4:00000000ffffffff
|
|
Bval+: 1, 3, 4, 24 -> 124
|
|
High adjust 5:0000ffffffffffff
|
|
Bval+: 1, 3, 5, 6a -> ea
|
|
High adjust 6:00000000ffffffff
|
|
Bval+: 1, 3, 6, 6 -> 106
|
|
High adjust 7:0000ffffffffffff
|
|
Bval+: 1, 3, 7, 76 -> f6
|
|
CP5a
|
|
discover falling edges:
|
|
[4eb0] = 300
|
|
eval 0, 0, 0: 21
|
|
eval 0, 0, 1: 20
|
|
eval 0, 0, 2: 1e
|
|
eval 0, 0, 3: 1e
|
|
eval 0, 0, 4: 22
|
|
eval 0, 0, 5: 21
|
|
eval 0, 0, 6: 22
|
|
eval 0, 0, 7: 23
|
|
eval 0, 1, 0: 20
|
|
eval 0, 1, 1: 1f
|
|
eval 0, 1, 2: 21
|
|
eval 0, 1, 3: 1e
|
|
eval 0, 1, 4: 21
|
|
eval 0, 1, 5: 1d
|
|
eval 0, 1, 6: 22
|
|
eval 0, 1, 7: 22
|
|
eval 0, 2, 0: 23
|
|
eval 0, 2, 1: 20
|
|
eval 0, 2, 2: 1d
|
|
eval 0, 2, 3: 21
|
|
eval 0, 2, 4: 1f
|
|
eval 0, 2, 5: 22
|
|
eval 0, 2, 6: 20
|
|
eval 0, 2, 7: 23
|
|
eval 0, 3, 0: 24
|
|
eval 0, 3, 1: 20
|
|
eval 0, 3, 2: 20
|
|
eval 0, 3, 3: 21
|
|
eval 0, 3, 4: 20
|
|
eval 0, 3, 5: 23
|
|
eval 0, 3, 6: 20
|
|
eval 0, 3, 7: 25
|
|
eval 1, 0, 0: 25
|
|
eval 1, 0, 1: 24
|
|
eval 1, 0, 2: 21
|
|
eval 1, 0, 3: 21
|
|
eval 1, 0, 4: 21
|
|
eval 1, 0, 5: 22
|
|
eval 1, 0, 6: 24
|
|
eval 1, 0, 7: 25
|
|
eval 1, 1, 0: 25
|
|
eval 1, 1, 1: 24
|
|
eval 1, 1, 2: 21
|
|
eval 1, 1, 3: 22
|
|
eval 1, 1, 4: 21
|
|
eval 1, 1, 5: 22
|
|
eval 1, 1, 6: 23
|
|
eval 1, 1, 7: 25
|
|
eval 1, 2, 0: 23
|
|
eval 1, 2, 1: 21
|
|
eval 1, 2, 2: 21
|
|
eval 1, 2, 3: 22
|
|
eval 1, 2, 4: 22
|
|
eval 1, 2, 5: 23
|
|
eval 1, 2, 6: 24
|
|
eval 1, 2, 7: 23
|
|
eval 1, 3, 0: 24
|
|
eval 1, 3, 1: 24
|
|
eval 1, 3, 2: 20
|
|
eval 1, 3, 3: 20
|
|
eval 1, 3, 4: 22
|
|
eval 1, 3, 5: 23
|
|
eval 1, 3, 6: 24
|
|
eval 1, 3, 7: 23
|
|
discover rising edges:
|
|
[4eb0] = 200
|
|
eval 0, 0, 0: 23
|
|
eval 0, 0, 1: 24
|
|
eval 0, 0, 2: 25
|
|
eval 0, 0, 3: 23
|
|
eval 0, 0, 4: 24
|
|
eval 0, 0, 5: 22
|
|
eval 0, 0, 6: 26
|
|
eval 0, 0, 7: 25
|
|
eval 0, 1, 0: 22
|
|
eval 0, 1, 1: 24
|
|
eval 0, 1, 2: 22
|
|
eval 0, 1, 3: 23
|
|
eval 0, 1, 4: 24
|
|
eval 0, 1, 5: 23
|
|
eval 0, 1, 6: 25
|
|
eval 0, 1, 7: 26
|
|
eval 0, 2, 0: 24
|
|
eval 0, 2, 1: 20
|
|
eval 0, 2, 2: 23
|
|
eval 0, 2, 3: 22
|
|
eval 0, 2, 4: 1f
|
|
eval 0, 2, 5: 25
|
|
eval 0, 2, 6: 23
|
|
eval 0, 2, 7: 25
|
|
eval 0, 3, 0: 22
|
|
eval 0, 3, 1: 1f
|
|
eval 0, 3, 2: 21
|
|
eval 0, 3, 3: 22
|
|
eval 0, 3, 4: 20
|
|
eval 0, 3, 5: 24
|
|
eval 0, 3, 6: 23
|
|
eval 0, 3, 7: 23
|
|
eval 1, 0, 0: 25
|
|
eval 1, 0, 1: 23
|
|
eval 1, 0, 2: 21
|
|
eval 1, 0, 3: 23
|
|
eval 1, 0, 4: 24
|
|
eval 1, 0, 5: 24
|
|
eval 1, 0, 6: 22
|
|
eval 1, 0, 7: 25
|
|
eval 1, 1, 0: 25
|
|
eval 1, 1, 1: 23
|
|
eval 1, 1, 2: 23
|
|
eval 1, 1, 3: 20
|
|
eval 1, 1, 4: 24
|
|
eval 1, 1, 5: 23
|
|
eval 1, 1, 6: 23
|
|
eval 1, 1, 7: 25
|
|
eval 1, 2, 0: 26
|
|
eval 1, 2, 1: 26
|
|
eval 1, 2, 2: 23
|
|
eval 1, 2, 3: 24
|
|
eval 1, 2, 4: 26
|
|
eval 1, 2, 5: 25
|
|
eval 1, 2, 6: 24
|
|
eval 1, 2, 7: 27
|
|
eval 1, 3, 0: 25
|
|
eval 1, 3, 1: 24
|
|
eval 1, 3, 2: 23
|
|
eval 1, 3, 3: 25
|
|
eval 1, 3, 4: 24
|
|
eval 1, 3, 5: 26
|
|
eval 1, 3, 6: 24
|
|
eval 1, 3, 7: 27
|
|
CP5b
|
|
Trying cmd_stretch 2 on channel 0
|
|
cmd_stretch: 0, 0: 0x00-0x46-0x8c
|
|
cmd_stretch: 0, 1: 0x00-0x40-0x81
|
|
cmd_stretch: 0, 2: 0x00-0x47-0x8e
|
|
cmd_stretch: 0, 3: 0x00-0x47-0x8e
|
|
Using CMD rate 2T on channel 0
|
|
Trying cmd_stretch 2 on channel 1
|
|
cmd_stretch: 1, 0: 0x00-0x44-0x89
|
|
cmd_stretch: 1, 1: 0x00-0x45-0x8a
|
|
cmd_stretch: 1, 2: 0x00-0x46-0x8c
|
|
cmd_stretch: 1, 3: 0x00-0x44-0x88
|
|
Using CMD rate 2T on channel 1
|
|
CP5c
|
|
discover falling edges write:
|
|
[4eb0] = 300
|
|
[3000] = 0x00000000
|
|
using pattern 0
|
|
edges: 0, 0, 0: 0x01-0x17-0x2e, 0x0b-0x24
|
|
edges: 0, 0, 0: 0x02-0x17-0x2d, 0x0c-0x23
|
|
edges: 0, 0, 0: 0x03-0x18-0x2d, 0x0d-0x23
|
|
edges: 0, 0, 0: 0x01-0x18-0x2f, 0x0b-0x25
|
|
edges: 0, 0, 0: 0x02-0x1a-0x33, 0x0c-0x29
|
|
edges: 0, 0, 0: 0x01-0x1a-0x34, 0x0b-0x2a
|
|
edges: 0, 0, 0: 0x04-0x1c-0x34, 0x0e-0x2a
|
|
edges: 0, 0, 0: 0x03-0x19-0x2f, 0x0d-0x25
|
|
using pattern 1
|
|
edges: 0, 0, 0: 0x00-0x24-0x48, 0x0a-0x3e
|
|
edge write discovery failed: 0, 0, 0
|
|
RAM training failed, trying fallback.
|
|
Disable failing channel.
|
|
ECC supported: no ECC forced: no
|
|
SPD probe channel0, slot0
|
|
Revision : 10
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : no
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : PASR ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : 9801
|
|
Part number : 99U5428-065.A00L
|
|
SPD probe channel0, slot1
|
|
Revision : 11
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : yes
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : ce80
|
|
Part number : M471B1G73BH0-CK0
|
|
SPD probe channel0, slot0
|
|
Revision : 10
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : no
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : PASR ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : 9801
|
|
Part number : 99U5428-065.A00L
|
|
Not a DDR3 XMP profile!
|
|
No valid XMP profile found.
|
|
Revision : 10
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : no
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : PASR ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : 9801
|
|
Part number : 99U5428-065.A00L
|
|
Row addr bits : 16
|
|
Column addr bits : 10
|
|
Number of ranks : 2
|
|
DIMM Capacity : 8192 MB
|
|
CAS latencies : 5 6 7 8 9
|
|
tCKmin : 1.500 ns
|
|
tAAmin : 13.125 ns
|
|
tWRmin : 15.000 ns
|
|
tRCDmin : 13.125 ns
|
|
tRRDmin : 6.000 ns
|
|
tRPmin : 13.125 ns
|
|
tRASmin : 36.000 ns
|
|
tRCmin : 49.125 ns
|
|
tRFCmin : 260.000 ns
|
|
tWTRmin : 7.500 ns
|
|
tRTPmin : 7.500 ns
|
|
tFAWmin : 30.000 ns
|
|
channel[0] rankmap = 0x3
|
|
SPD probe channel0, slot1
|
|
Revision : 11
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : yes
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : ce80
|
|
Part number : M471B1G73BH0-CK0
|
|
Not a DDR3 XMP profile!
|
|
No valid XMP profile found.
|
|
Revision : 11
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : yes
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : ce80
|
|
Part number : M471B1G73BH0-CK0
|
|
Row addr bits : 16
|
|
Column addr bits : 10
|
|
Number of ranks : 2
|
|
DIMM Capacity : 8192 MB
|
|
CAS latencies : 5 6 7 8 9 10 11
|
|
tCKmin : 1.250 ns
|
|
tAAmin : 13.125 ns
|
|
tWRmin : 15.000 ns
|
|
tRCDmin : 13.125 ns
|
|
tRRDmin : 6.000 ns
|
|
tRPmin : 13.125 ns
|
|
tRASmin : 35.000 ns
|
|
tRCmin : 48.125 ns
|
|
tRFCmin : 260.000 ns
|
|
tWTRmin : 7.500 ns
|
|
tRTPmin : 7.500 ns
|
|
tFAWmin : 30.000 ns
|
|
channel[0] rankmap = 0xf
|
|
SPD probe channel1, slot0
|
|
Revision : 11
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : yes
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : ce80
|
|
Part number : M471B1G73BH0-CK0
|
|
SPD probe channel1, slot1
|
|
Revision : 10
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : no
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : PASR ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : 9801
|
|
Part number : 99U5428-065.A00L
|
|
SPD probe channel1, slot0
|
|
Revision : 11
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : yes
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : ce80
|
|
Part number : M471B1G73BH0-CK0
|
|
Not a DDR3 XMP profile!
|
|
No valid XMP profile found.
|
|
Revision : 11
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : yes
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : ce80
|
|
Part number : M471B1G73BH0-CK0
|
|
Row addr bits : 16
|
|
Column addr bits : 10
|
|
Number of ranks : 2
|
|
DIMM Capacity : 8192 MB
|
|
CAS latencies : 5 6 7 8 9 10 11
|
|
tCKmin : 1.250 ns
|
|
tAAmin : 13.125 ns
|
|
tWRmin : 15.000 ns
|
|
tRCDmin : 13.125 ns
|
|
tRRDmin : 6.000 ns
|
|
tRPmin : 13.125 ns
|
|
tRASmin : 35.000 ns
|
|
tRCmin : 48.125 ns
|
|
tRFCmin : 260.000 ns
|
|
tWTRmin : 7.500 ns
|
|
tRTPmin : 7.500 ns
|
|
tFAWmin : 30.000 ns
|
|
channel[1] rankmap = 0x3
|
|
SPD probe channel1, slot1
|
|
Revision : 10
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : no
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : PASR ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : 9801
|
|
Part number : 99U5428-065.A00L
|
|
Not a DDR3 XMP profile!
|
|
No valid XMP profile found.
|
|
Revision : 10
|
|
Type : b
|
|
Key : 3
|
|
Banks : 8
|
|
Capacity : 4 Gb
|
|
Supported voltages : 1.5V
|
|
SDRAM width : 8
|
|
Bus extension : 0 bits
|
|
Bus width : 64
|
|
FTB timings : no
|
|
Optional features : DLL-Off_mode RZQ/7 RZQ/6
|
|
Thermal features : PASR ext_temp_range
|
|
Thermal sensor : no
|
|
Standard SDRAM : yes
|
|
Rank1 Address bits : normal
|
|
DIMM Reference card: F
|
|
Manufacturer ID : 9801
|
|
Part number : 99U5428-065.A00L
|
|
Row addr bits : 16
|
|
Column addr bits : 10
|
|
Number of ranks : 2
|
|
DIMM Capacity : 8192 MB
|
|
CAS latencies : 5 6 7 8 9
|
|
tCKmin : 1.500 ns
|
|
tAAmin : 13.125 ns
|
|
tWRmin : 15.000 ns
|
|
tRCDmin : 13.125 ns
|
|
tRRDmin : 6.000 ns
|
|
tRPmin : 13.125 ns
|
|
tRASmin : 36.000 ns
|
|
tRCmin : 49.125 ns
|
|
tRFCmin : 260.000 ns
|
|
tWTRmin : 7.500 ns
|
|
tRTPmin : 7.500 ns
|
|
tFAWmin : 30.000 ns
|
|
channel[1] rankmap = 0xf
|
|
ECC is disabled
|
|
Starting Ivy Bridge RAM training (full initialization).
|
|
100MHz reference clock support: yes
|
|
PLL_REF100_CFG value: 0x7
|
|
Trying CAS 11, tCK 320.
|
|
Trying CAS 10, tCK 365.
|
|
Trying CAS 9, tCK 384.
|
|
Found compatible clock, CAS pair.
|
|
Selected DRAM frequency: 666 MHz
|
|
Selected CAS latency : 9T
|
|
Selected CWL latency : 7T
|
|
Selected tRCD : 9T
|
|
Selected tRP : 9T
|
|
Selected tRAS : 24T
|
|
Selected tWR : 10T
|
|
Selected tFAW : 20T
|
|
Selected tRRD : 4T
|
|
Selected tRTP : 5T
|
|
Selected tWTR : 5T
|
|
Selected tRFC : 174T
|
|
XOVER CLK [c14] = 0
|
|
XOVER CMD [320c] = 4000
|
|
XOVER CLK [d14] = f000000
|
|
XOVER CMD [330c] = 4024000
|
|
DBP [4000] = 187999
|
|
RAP [4004] = ca145454
|
|
OTHP [400c] = a0690
|
|
OTHP [400c] = 690
|
|
REFI [4298] = 5aae1450
|
|
SRFTP [42a4] = 41f97200
|
|
DBP [4400] = 187999
|
|
RAP [4404] = ca145454
|
|
OTHP [440c] = a0690
|
|
OTHP [440c] = 690
|
|
REFI [4698] = 5aae1450
|
|
SRFTP [46a4] = 41f97200
|
|
Done dimm mapping
|
|
Update PCI-E configuration space:
|
|
PCI(0, 0, 0)[a0] = 0
|
|
PCI(0, 0, 0)[a4] = 4
|
|
PCI(0, 0, 0)[bc] = 82a00000
|
|
PCI(0, 0, 0)[a8] = 7d600000
|
|
PCI(0, 0, 0)[ac] = 4
|
|
PCI(0, 0, 0)[b8] = 80000000
|
|
PCI(0, 0, 0)[b0] = 80a00000
|
|
PCI(0, 0, 0)[b4] = 80800000
|
|
Done memory map
|
|
RCOMP...done
|
|
COMP2 done
|
|
COMP1 done
|
|
FORCE RCOMP and wait 20us...done
|
|
Done io registers
|
|
Done jedec reset
|
|
Done MRS commands
|
|
timA: 1, 0, 0: 0x73-0x11-0x30
|
|
timA: 1, 0, 1: 0x61-0x7f-0x1e
|
|
timA: 1, 0, 2: 0x06-0x24-0x42
|
|
timA: 1, 0, 3: 0x42-0x61-0x01
|
|
timA: 1, 0, 4: 0x59-0x79-0x19
|
|
timA: 1, 0, 5: 0x25-0x45-0x65
|
|
timA: 1, 0, 6: 0x48-0x65-0x02
|
|
timA: 1, 0, 7: 0x41-0x60-0x7f
|
|
4024++;
|
|
4028++;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4028 += 2;
|
|
increment 1, 0, 0
|
|
increment 1, 0, 2
|
|
increment 1, 0, 4
|
|
increment 1, 0, 5
|
|
increment 1, 0, 6
|
|
increment 1, 0, 7
|
|
4024 += 1;
|
|
4028 += 1;
|
|
lane 0: -2, 4
|
|
Aval: 1, 0, 0: b1
|
|
lane 1: -2, 4
|
|
Aval: 1, 0, 1: 9f
|
|
lane 2: -2, 5
|
|
Aval: 1, 0, 2: c3
|
|
lane 3: -4, 1
|
|
Aval: 1, 0, 3: 80
|
|
lane 4: -3, 4
|
|
Aval: 1, 0, 4: 119
|
|
lane 5: -5, 4
|
|
Aval: 1, 0, 5: e5
|
|
lane 6: -3, 6
|
|
Aval: 1, 0, 6: 103
|
|
lane 7: -4, 2
|
|
Aval: 1, 0, 7: fe
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4028 -= 2;
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4/8: 1, 0, 2b, 6
|
|
final results:
|
|
Aval: 1, 0, 0: 31
|
|
Aval: 1, 0, 1: 1f
|
|
Aval: 1, 0, 2: 43
|
|
Aval: 1, 0, 3: 0
|
|
Aval: 1, 0, 4: 99
|
|
Aval: 1, 0, 5: 65
|
|
Aval: 1, 0, 6: 83
|
|
Aval: 1, 0, 7: 7e
|
|
timA: 1, 1, 0: 0x71-0x0f-0x2e
|
|
timA: 1, 1, 1: 0x61-0x00-0x1f
|
|
timA: 1, 1, 2: 0x07-0x25-0x43
|
|
timA: 1, 1, 3: 0x44-0x61-0x7f
|
|
timA: 1, 1, 4: 0x5a-0x79-0x18
|
|
timA: 1, 1, 5: 0x26-0x45-0x64
|
|
timA: 1, 1, 6: 0x47-0x64-0x02
|
|
timA: 1, 1, 7: 0x41-0x60-0x7f
|
|
4024++;
|
|
4028++;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4028 += 2;
|
|
increment 1, 1, 0
|
|
increment 1, 1, 1
|
|
increment 1, 1, 2
|
|
increment 1, 1, 4
|
|
increment 1, 1, 5
|
|
increment 1, 1, 6
|
|
increment 1, 1, 7
|
|
4024 += 1;
|
|
4028 += 1;
|
|
lane 0: -3, 4
|
|
Aval: 1, 1, 0: ae
|
|
lane 1: -5, 4
|
|
Aval: 1, 1, 1: 9f
|
|
lane 2: -4, 4
|
|
Aval: 1, 1, 2: c3
|
|
lane 3: 0, 6
|
|
Aval: 1, 1, 3: 82
|
|
lane 4: -2, 5
|
|
Aval: 1, 1, 4: 119
|
|
lane 5: -5, 4
|
|
Aval: 1, 1, 5: e4
|
|
lane 6: -2, 7
|
|
Aval: 1, 1, 6: 104
|
|
lane 7: -4, 2
|
|
Aval: 1, 1, 7: fe
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4028 -= 2;
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4/8: 1, 1, 2b, 6
|
|
final results:
|
|
Aval: 1, 1, 0: 2e
|
|
Aval: 1, 1, 1: 1f
|
|
Aval: 1, 1, 2: 43
|
|
Aval: 1, 1, 3: 2
|
|
Aval: 1, 1, 4: 99
|
|
Aval: 1, 1, 5: 64
|
|
Aval: 1, 1, 6: 84
|
|
Aval: 1, 1, 7: 7e
|
|
timA: 1, 2, 0: 0x7c-0x1a-0x38
|
|
timA: 1, 2, 1: 0x66-0x06-0x27
|
|
timA: 1, 2, 2: 0x09-0x28-0x47
|
|
timA: 1, 2, 3: 0x4f-0x6c-0x0a
|
|
timA: 1, 2, 4: 0x55-0x75-0x16
|
|
timA: 1, 2, 5: 0x29-0x4a-0x6b
|
|
timA: 1, 2, 6: 0x48-0x67-0x06
|
|
timA: 1, 2, 7: 0x44-0x64-0x04
|
|
4024++;
|
|
4028++;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4028 += 2;
|
|
increment 1, 2, 0
|
|
increment 1, 2, 1
|
|
increment 1, 2, 2
|
|
increment 1, 2, 4
|
|
increment 1, 2, 5
|
|
increment 1, 2, 6
|
|
increment 1, 2, 7
|
|
4024 += 1;
|
|
4028 += 1;
|
|
lane 0: -3, 2
|
|
Aval: 1, 2, 0: b8
|
|
lane 1: -7, 0
|
|
Aval: 1, 2, 1: a4
|
|
lane 2: -7, 1
|
|
Aval: 1, 2, 2: c4
|
|
lane 3: -3, 3
|
|
Aval: 1, 2, 3: 8a
|
|
lane 4: -5, 3
|
|
Aval: 1, 2, 4: 115
|
|
lane 5: -7, -1
|
|
Aval: 1, 2, 5: e7
|
|
lane 6: -2, 3
|
|
Aval: 1, 2, 6: 106
|
|
lane 7: -6, -2
|
|
Aval: 1, 2, 7: 100
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4028 -= 2;
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4/8: 1, 2, 2b, 6
|
|
final results:
|
|
Aval: 1, 2, 0: 38
|
|
Aval: 1, 2, 1: 24
|
|
Aval: 1, 2, 2: 44
|
|
Aval: 1, 2, 3: a
|
|
Aval: 1, 2, 4: 95
|
|
Aval: 1, 2, 5: 67
|
|
Aval: 1, 2, 6: 86
|
|
Aval: 1, 2, 7: 80
|
|
timA: 1, 3, 0: 0x72-0x12-0x32
|
|
timA: 1, 3, 1: 0x6a-0x09-0x28
|
|
timA: 1, 3, 2: 0x0b-0x2a-0x49
|
|
timA: 1, 3, 3: 0x4a-0x6a-0x0b
|
|
timA: 1, 3, 4: 0x57-0x76-0x15
|
|
timA: 1, 3, 5: 0x28-0x47-0x66
|
|
timA: 1, 3, 6: 0x46-0x63-0x00
|
|
timA: 1, 3, 7: 0x40-0x5f-0x7f
|
|
4024++;
|
|
4028++;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4024 -= 2;
|
|
4028 += 2;
|
|
increment 1, 3, 0
|
|
increment 1, 3, 1
|
|
increment 1, 3, 2
|
|
increment 1, 3, 4
|
|
increment 1, 3, 5
|
|
increment 1, 3, 6
|
|
increment 1, 3, 7
|
|
4024 += 1;
|
|
4028 += 1;
|
|
lane 0: -2, 5
|
|
Aval: 1, 3, 0: b3
|
|
lane 1: -2, 0
|
|
Aval: 1, 3, 1: a7
|
|
lane 2: -5, 0
|
|
Aval: 1, 3, 2: c7
|
|
lane 3: -5, -2
|
|
Aval: 1, 3, 3: 88
|
|
lane 4: -3, 4
|
|
Aval: 1, 3, 4: 115
|
|
lane 5: -4, 1
|
|
Aval: 1, 3, 5: e5
|
|
lane 6: 0, 7
|
|
Aval: 1, 3, 6: 103
|
|
lane 7: -5, 1
|
|
Aval: 1, 3, 7: fd
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4028 -= 2;
|
|
4024 += 0;
|
|
4028 += 0;
|
|
4/8: 1, 3, 2b, 6
|
|
final results:
|
|
Aval: 1, 3, 0: 33
|
|
Aval: 1, 3, 1: 27
|
|
Aval: 1, 3, 2: 47
|
|
Aval: 1, 3, 3: 8
|
|
Aval: 1, 3, 4: 95
|
|
Aval: 1, 3, 5: 65
|
|
Aval: 1, 3, 6: 83
|
|
Aval: 1, 3, 7: 7d
|
|
timB: 1, 0, 0: 0x51-0x72-0x14
|
|
timB: 1, 0, 1: 0x49-0x6a-0x0b
|
|
timB: 1, 0, 2: 0x68-0x09-0x2a
|
|
timB: 1, 0, 3: 0x30-0x50-0x71
|
|
timB: 1, 0, 4: 0x31-0x52-0x74
|
|
timB: 1, 0, 5: 0x75-0x16-0x37
|
|
timB: 1, 0, 6: 0x14-0x35-0x57
|
|
timB: 1, 0, 7: 0x02-0x23-0x44
|
|
timB: 1, 1, 0: 0x51-0x71-0x11
|
|
timB: 1, 1, 1: 0x49-0x6a-0x0b
|
|
timB: 1, 1, 2: 0x68-0x08-0x28
|
|
timB: 1, 1, 3: 0x30-0x50-0x70
|
|
timB: 1, 1, 4: 0x30-0x50-0x71
|
|
timB: 1, 1, 5: 0x74-0x15-0x37
|
|
timB: 1, 1, 6: 0x13-0x34-0x56
|
|
timB: 1, 1, 7: 0x00-0x21-0x42
|
|
timB: 1, 2, 0: 0x4a-0x69-0x08
|
|
timB: 1, 2, 1: 0x42-0x61-0x01
|
|
timB: 1, 2, 2: 0x5e-0x7d-0x1c
|
|
timB: 1, 2, 3: 0x23-0x45-0x68
|
|
timB: 1, 2, 4: 0x22-0x42-0x63
|
|
timB: 1, 2, 5: 0x72-0x11-0x30
|
|
timB: 1, 2, 6: 0x09-0x29-0x49
|
|
timB: 1, 2, 7: 0x80-0x1c-0x3a
|
|
timB: 1, 3, 0: 0x48-0x66-0x05
|
|
timB: 1, 3, 1: 0x47-0x65-0x03
|
|
timB: 1, 3, 2: 0x60-0x7f-0x1e
|
|
timB: 1, 3, 3: 0x29-0x47-0x66
|
|
timB: 1, 3, 4: 0x23-0x42-0x62
|
|
timB: 1, 3, 5: 0x6a-0x08-0x27
|
|
timB: 1, 3, 6: 0x05-0x23-0x42
|
|
timB: 1, 3, 7: 0x76-0x14-0x33
|
|
CPE
|
|
CPF
|
|
timC: 1, 0, 0: 0x13-0x2e-0x4a
|
|
timC: 1, 0, 1: 0x0c-0x29-0x46
|
|
timC: 1, 0, 2: 0x2a-0x47-0x64
|
|
timC: 1, 0, 3: 0x33-0x4f-0x6c
|
|
timC: 1, 0, 4: 0x34-0x51-0x6e
|
|
timC: 1, 0, 5: 0x36-0x52-0x6f
|
|
timC: 1, 0, 6: 0x17-0x33-0x50
|
|
timC: 1, 0, 7: 0x06-0x21-0x3d
|
|
timC: 1, 1, 0: 0x13-0x2f-0x4b
|
|
timC: 1, 1, 1: 0x0e-0x2a-0x47
|
|
timC: 1, 1, 2: 0x2a-0x47-0x64
|
|
timC: 1, 1, 3: 0x36-0x52-0x6e
|
|
timC: 1, 1, 4: 0x33-0x50-0x6d
|
|
timC: 1, 1, 5: 0x37-0x52-0x6e
|
|
timC: 1, 1, 6: 0x14-0x31-0x4f
|
|
timC: 1, 1, 7: 0x02-0x1e-0x3a
|
|
timC: 1, 2, 0: 0x0d-0x29-0x46
|
|
timC: 1, 2, 1: 0x08-0x24-0x41
|
|
timC: 1, 2, 2: 0x20-0x3e-0x5c
|
|
timC: 1, 2, 3: 0x29-0x44-0x5f
|
|
timC: 1, 2, 4: 0x27-0x44-0x61
|
|
timC: 1, 2, 5: 0x36-0x52-0x6f
|
|
timC: 1, 2, 6: 0x0c-0x27-0x43
|
|
timC: 1, 2, 7: 0x05-0x1e-0x38
|
|
timC: 1, 3, 0: 0x09-0x26-0x43
|
|
timC: 1, 3, 1: 0x0e-0x2a-0x47
|
|
timC: 1, 3, 2: 0x24-0x41-0x5f
|
|
timC: 1, 3, 3: 0x2c-0x47-0x63
|
|
timC: 1, 3, 4: 0x28-0x45-0x62
|
|
timC: 1, 3, 5: 0x2c-0x49-0x66
|
|
timC: 1, 3, 6: 0x07-0x23-0x3f
|
|
timC: 1, 3, 7: 0x39-0x53-0x6d
|
|
High adjust 0:0000ffffffffffff
|
|
Bval+: 1, 0, 0, 51 -> d1
|
|
High adjust 1:0000ffffffffffff
|
|
Bval+: 1, 0, 1, 49 -> c9
|
|
High adjust 2:0000ffffffffffff
|
|
Bval+: 1, 0, 2, 68 -> e8
|
|
High adjust 3:0000ffffffffffff
|
|
Bval+: 1, 0, 3, 30 -> b0
|
|
High adjust 4:00000000ffffffff
|
|
Bval+: 1, 0, 4, 31 -> 131
|
|
High adjust 5:0000ffffffffffff
|
|
Bval+: 1, 0, 5, 75 -> f5
|
|
High adjust 6:00000000ffffffff
|
|
Bval+: 1, 0, 6, 14 -> 114
|
|
High adjust 7:00000000ffffffff
|
|
Bval+: 1, 0, 7, 2 -> 102
|
|
High adjust 0:0000ffffffffffff
|
|
Bval+: 1, 1, 0, 51 -> d1
|
|
High adjust 1:0000ffffffffffff
|
|
Bval+: 1, 1, 1, 49 -> c9
|
|
High adjust 2:0000ffffffffffff
|
|
Bval+: 1, 1, 2, 68 -> e8
|
|
High adjust 3:0000ffffffffffff
|
|
Bval+: 1, 1, 3, 30 -> b0
|
|
High adjust 4:00000000ffffffff
|
|
Bval+: 1, 1, 4, 30 -> 130
|
|
High adjust 5:0000ffffffffffff
|
|
Bval+: 1, 1, 5, 74 -> f4
|
|
High adjust 6:00000000ffffffff
|
|
Bval+: 1, 1, 6, 13 -> 113
|
|
High adjust 7:00000000ffffffff
|
|
Bval+: 1, 1, 7, 0 -> 100
|
|
High adjust 0:0000ffffffffffff
|
|
Bval+: 1, 2, 0, 4a -> ca
|
|
High adjust 1:0000ffffffffffff
|
|
Bval+: 1, 2, 1, 42 -> c2
|
|
High adjust 2:0000ffffffffffff
|
|
Bval+: 1, 2, 2, 5e -> de
|
|
High adjust 3:0000ffffffffffff
|
|
Bval+: 1, 2, 3, 23 -> a3
|
|
High adjust 4:00000000ffffffff
|
|
Bval+: 1, 2, 4, 22 -> 122
|
|
High adjust 5:0000ffffffffffff
|
|
Bval+: 1, 2, 5, 72 -> f2
|
|
High adjust 6:00000000ffffffff
|
|
Bval+: 1, 2, 6, 9 -> 109
|
|
High adjust 7:0000ffffffffffff
|
|
Bval+: 1, 2, 7, 80 -> 100
|
|
High adjust 0:0000ffffffffffff
|
|
Bval+: 1, 3, 0, 48 -> c8
|
|
High adjust 1:0000ffffffffffff
|
|
Bval+: 1, 3, 1, 47 -> c7
|
|
High adjust 2:0000ffffffffffff
|
|
Bval+: 1, 3, 2, 60 -> e0
|
|
High adjust 3:0000ffffffffffff
|
|
Bval+: 1, 3, 3, 29 -> a9
|
|
High adjust 4:00000000ffffffff
|
|
Bval+: 1, 3, 4, 23 -> 123
|
|
High adjust 5:0000ffffffffffff
|
|
Bval+: 1, 3, 5, 6a -> ea
|
|
High adjust 6:00000000ffffffff
|
|
Bval+: 1, 3, 6, 5 -> 105
|
|
High adjust 7:0000ffffffffffff
|
|
Bval+: 1, 3, 7, 76 -> f6
|
|
CP5a
|
|
discover falling edges:
|
|
[4eb0] = 300
|
|
eval 1, 0, 0: 25
|
|
eval 1, 0, 1: 24
|
|
eval 1, 0, 2: 21
|
|
eval 1, 0, 3: 21
|
|
eval 1, 0, 4: 21
|
|
eval 1, 0, 5: 22
|
|
eval 1, 0, 6: 24
|
|
eval 1, 0, 7: 25
|
|
eval 1, 1, 0: 25
|
|
eval 1, 1, 1: 24
|
|
eval 1, 1, 2: 21
|
|
eval 1, 1, 3: 22
|
|
eval 1, 1, 4: 21
|
|
eval 1, 1, 5: 22
|
|
eval 1, 1, 6: 23
|
|
eval 1, 1, 7: 25
|
|
eval 1, 2, 0: 23
|
|
eval 1, 2, 1: 22
|
|
eval 1, 2, 2: 21
|
|
eval 1, 2, 3: 22
|
|
eval 1, 2, 4: 22
|
|
eval 1, 2, 5: 23
|
|
eval 1, 2, 6: 24
|
|
eval 1, 2, 7: 23
|
|
eval 1, 3, 0: 24
|
|
eval 1, 3, 1: 24
|
|
eval 1, 3, 2: 20
|
|
eval 1, 3, 3: 20
|
|
eval 1, 3, 4: 23
|
|
eval 1, 3, 5: 23
|
|
eval 1, 3, 6: 24
|
|
eval 1, 3, 7: 22
|
|
discover rising edges:
|
|
[4eb0] = 200
|
|
eval 1, 0, 0: 25
|
|
eval 1, 0, 1: 23
|
|
eval 1, 0, 2: 21
|
|
eval 1, 0, 3: 23
|
|
eval 1, 0, 4: 24
|
|
eval 1, 0, 5: 23
|
|
eval 1, 0, 6: 22
|
|
eval 1, 0, 7: 25
|
|
eval 1, 1, 0: 25
|
|
eval 1, 1, 1: 23
|
|
eval 1, 1, 2: 23
|
|
eval 1, 1, 3: 20
|
|
eval 1, 1, 4: 24
|
|
eval 1, 1, 5: 23
|
|
eval 1, 1, 6: 23
|
|
eval 1, 1, 7: 25
|
|
eval 1, 2, 0: 26
|
|
eval 1, 2, 1: 26
|
|
eval 1, 2, 2: 24
|
|
eval 1, 2, 3: 24
|
|
eval 1, 2, 4: 26
|
|
eval 1, 2, 5: 25
|
|
eval 1, 2, 6: 24
|
|
eval 1, 2, 7: 27
|
|
eval 1, 3, 0: 25
|
|
eval 1, 3, 1: 24
|
|
eval 1, 3, 2: 22
|
|
eval 1, 3, 3: 25
|
|
eval 1, 3, 4: 24
|
|
eval 1, 3, 5: 25
|
|
eval 1, 3, 6: 24
|
|
eval 1, 3, 7: 28
|
|
CP5b
|
|
Trying cmd_stretch 2 on channel 1
|
|
cmd_stretch: 1, 0: 0x00-0x44-0x89
|
|
cmd_stretch: 1, 1: 0x00-0x45-0x8a
|
|
cmd_stretch: 1, 2: 0x00-0x46-0x8c
|
|
cmd_stretch: 1, 3: 0x00-0x44-0x88
|
|
Using CMD rate 2T on channel 1
|
|
CP5c
|
|
discover falling edges write:
|
|
[4eb0] = 300
|
|
[3100] = 0x00000000
|
|
using pattern 0
|
|
edges: 1, 0, 0: 0x0b-0x25-0x3f, 0x15-0x35
|
|
edges: 1, 0, 0: 0x09-0x22-0x3b, 0x13-0x31
|
|
edges: 1, 0, 0: 0x07-0x20-0x3a, 0x11-0x30
|
|
edges: 1, 0, 0: 0x08-0x20-0x38, 0x12-0x2e
|
|
edges: 1, 0, 0: 0x09-0x22-0x3b, 0x13-0x31
|
|
edges: 1, 0, 0: 0x0a-0x22-0x3b, 0x14-0x31
|
|
edges: 1, 0, 0: 0x0a-0x23-0x3d, 0x14-0x33
|
|
edges: 1, 0, 0: 0x0b-0x24-0x3d, 0x15-0x33
|
|
using pattern 1
|
|
edges: 1, 0, 0: 0x0b-0x25-0x40, 0x15-0x36
|
|
edges: 1, 0, 0: 0x09-0x24-0x3f, 0x13-0x35
|
|
edges: 1, 0, 0: 0x07-0x21-0x3c, 0x11-0x32
|
|
edges: 1, 0, 0: 0x08-0x20-0x39, 0x12-0x2f
|
|
edges: 1, 0, 0: 0x09-0x23-0x3d, 0x13-0x33
|
|
edges: 1, 0, 0: 0x0b-0x23-0x3c, 0x15-0x32
|
|
edges: 1, 0, 0: 0x0a-0x24-0x3e, 0x14-0x34
|
|
edges: 1, 0, 0: 0x0b-0x24-0x3d, 0x15-0x33
|
|
using pattern 2
|
|
edges: 1, 0, 0: 0x0b-0x25-0x3f, 0x15-0x35
|
|
edges: 1, 0, 0: 0x09-0x22-0x3c, 0x13-0x32
|
|
edges: 1, 0, 0: 0x07-0x20-0x3a, 0x11-0x30
|
|
edges: 1, 0, 0: 0x08-0x20-0x38, 0x12-0x2e
|
|
edges: 1, 0, 0: 0x09-0x22-0x3b, 0x13-0x31
|
|
edges: 1, 0, 0: 0x0a-0x23-0x3c, 0x14-0x32
|
|
edges: 1, 0, 0: 0x0a-0x22-0x3b, 0x14-0x31
|
|
edges: 1, 0, 0: 0x0b-0x25-0x3f, 0x15-0x35
|
|
using pattern 3
|
|
edges: 1, 0, 0: 0x0b-0x25-0x3f, 0x15-0x35
|
|
edges: 1, 0, 0: 0x09-0x22-0x3b, 0x13-0x31
|
|
edges: 1, 0, 0: 0x07-0x20-0x39, 0x11-0x2f
|
|
edges: 1, 0, 0: 0x08-0x21-0x3a, 0x12-0x30
|
|
edges: 1, 0, 0: 0x09-0x22-0x3b, 0x13-0x31
|
|
edges: 1, 0, 0: 0x0a-0x22-0x3b, 0x14-0x31
|
|
edges: 1, 0, 0: 0x0a-0x23-0x3d, 0x14-0x33
|
|
edges: 1, 0, 0: 0x0b-0x24-0x3d, 0x15-0x33
|
|
[3100] = 0x0c000000
|
|
using pattern 0
|
|
edges: 1, 0, 1: 0x0f-0x25-0x3b, 0x13-0x37
|
|
edges: 1, 0, 1: 0x0c-0x22-0x39, 0x10-0x35
|
|
edges: 1, 0, 1: 0x0a-0x20-0x37, 0x0e-0x33
|
|
edges: 1, 0, 1: 0x09-0x20-0x37, 0x0d-0x33
|
|
edges: 1, 0, 1: 0x0a-0x21-0x38, 0x0e-0x34
|
|
edges: 1, 0, 1: 0x0c-0x22-0x39, 0x10-0x35
|
|
edges: 1, 0, 1: 0x0b-0x22-0x3a, 0x0f-0x36
|
|
edges: 1, 0, 1: 0x0e-0x25-0x3c, 0x12-0x38
|
|
using pattern 1
|
|
edges: 1, 0, 1: 0x0f-0x26-0x3e, 0x13-0x3a
|
|
edges: 1, 0, 1: 0x0c-0x24-0x3c, 0x10-0x38
|
|
edges: 1, 0, 1: 0x0a-0x21-0x39, 0x0e-0x35
|
|
edges: 1, 0, 1: 0x09-0x20-0x38, 0x0d-0x34
|
|
edges: 1, 0, 1: 0x0b-0x22-0x3a, 0x0f-0x36
|
|
edges: 1, 0, 1: 0x0d-0x23-0x3a, 0x11-0x36
|
|
edges: 1, 0, 1: 0x0c-0x22-0x39, 0x10-0x35
|
|
edges: 1, 0, 1: 0x0e-0x25-0x3c, 0x12-0x38
|
|
using pattern 2
|
|
edges: 1, 0, 1: 0x0f-0x26-0x3e, 0x13-0x3a
|
|
edges: 1, 0, 1: 0x0c-0x23-0x3b, 0x10-0x37
|
|
edges: 1, 0, 1: 0x0a-0x22-0x3a, 0x0e-0x36
|
|
edges: 1, 0, 1: 0x09-0x20-0x37, 0x0d-0x33
|
|
edges: 1, 0, 1: 0x0b-0x22-0x3a, 0x0f-0x36
|
|
edges: 1, 0, 1: 0x0d-0x24-0x3b, 0x11-0x37
|
|
edges: 1, 0, 1: 0x0c-0x23-0x3a, 0x10-0x36
|
|
edges: 1, 0, 1: 0x0e-0x26-0x3e, 0x12-0x3a
|
|
using pattern 3
|
|
edges: 1, 0, 1: 0x0f-0x26-0x3d, 0x13-0x39
|
|
edges: 1, 0, 1: 0x0c-0x22-0x39, 0x10-0x35
|
|
edges: 1, 0, 1: 0x0a-0x20-0x37, 0x0e-0x33
|
|
edges: 1, 0, 1: 0x09-0x20-0x38, 0x0d-0x34
|
|
edges: 1, 0, 1: 0x0b-0x21-0x37, 0x0f-0x33
|
|
edges: 1, 0, 1: 0x0d-0x23-0x3a, 0x11-0x36
|
|
edges: 1, 0, 1: 0x0c-0x23-0x3a, 0x10-0x36
|
|
edges: 1, 0, 1: 0x0f-0x24-0x3a, 0x13-0x36
|
|
[3100] = 0x2c000000
|
|
using pattern 0
|
|
edges: 1, 0, 2: 0x10-0x24-0x39, 0x14-0x35
|
|
edges: 1, 0, 2: 0x10-0x23-0x36, 0x14-0x32
|
|
edges: 1, 0, 2: 0x0f-0x21-0x33, 0x13-0x2f
|
|
edges: 1, 0, 2: 0x0f-0x21-0x34, 0x13-0x30
|
|
edges: 1, 0, 2: 0x0f-0x22-0x35, 0x13-0x31
|
|
edges: 1, 0, 2: 0x10-0x22-0x35, 0x14-0x31
|
|
edges: 1, 0, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 0, 2: 0x11-0x24-0x37, 0x15-0x33
|
|
using pattern 1
|
|
edges: 1, 0, 2: 0x10-0x25-0x3b, 0x14-0x37
|
|
edges: 1, 0, 2: 0x0f-0x23-0x38, 0x13-0x34
|
|
edges: 1, 0, 2: 0x0f-0x22-0x36, 0x13-0x32
|
|
edges: 1, 0, 2: 0x0f-0x22-0x35, 0x13-0x31
|
|
edges: 1, 0, 2: 0x0f-0x23-0x38, 0x13-0x34
|
|
edges: 1, 0, 2: 0x11-0x23-0x36, 0x15-0x32
|
|
edges: 1, 0, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 0, 2: 0x11-0x24-0x37, 0x15-0x33
|
|
using pattern 2
|
|
edges: 1, 0, 2: 0x10-0x24-0x39, 0x14-0x35
|
|
edges: 1, 0, 2: 0x10-0x23-0x36, 0x14-0x32
|
|
edges: 1, 0, 2: 0x0f-0x21-0x34, 0x13-0x30
|
|
edges: 1, 0, 2: 0x0f-0x21-0x33, 0x13-0x2f
|
|
edges: 1, 0, 2: 0x0f-0x22-0x36, 0x13-0x32
|
|
edges: 1, 0, 2: 0x10-0x23-0x36, 0x14-0x32
|
|
edges: 1, 0, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 0, 2: 0x11-0x25-0x3a, 0x15-0x36
|
|
using pattern 3
|
|
edges: 1, 0, 2: 0x10-0x24-0x39, 0x14-0x35
|
|
edges: 1, 0, 2: 0x10-0x23-0x36, 0x14-0x32
|
|
edges: 1, 0, 2: 0x0f-0x21-0x33, 0x13-0x2f
|
|
edges: 1, 0, 2: 0x0f-0x22-0x35, 0x13-0x31
|
|
edges: 1, 0, 2: 0x0f-0x22-0x36, 0x13-0x32
|
|
edges: 1, 0, 2: 0x10-0x22-0x35, 0x14-0x31
|
|
edges: 1, 0, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 0, 2: 0x11-0x24-0x37, 0x15-0x33
|
|
CPA
|
|
[3100] = 0x00000000
|
|
using pattern 0
|
|
edges: 1, 1, 0: 0x0a-0x23-0x3d, 0x14-0x33
|
|
edges: 1, 1, 0: 0x09-0x21-0x39, 0x13-0x2f
|
|
edges: 1, 1, 0: 0x06-0x1e-0x36, 0x10-0x2c
|
|
edges: 1, 1, 0: 0x08-0x22-0x3d, 0x12-0x33
|
|
edges: 1, 1, 0: 0x08-0x21-0x3a, 0x12-0x30
|
|
edges: 1, 1, 0: 0x09-0x20-0x38, 0x13-0x2e
|
|
edges: 1, 1, 0: 0x08-0x21-0x3a, 0x12-0x30
|
|
edges: 1, 1, 0: 0x0b-0x22-0x3a, 0x15-0x30
|
|
using pattern 1
|
|
edges: 1, 1, 0: 0x0a-0x24-0x3f, 0x14-0x35
|
|
edges: 1, 1, 0: 0x09-0x22-0x3b, 0x13-0x31
|
|
edges: 1, 1, 0: 0x07-0x1f-0x38, 0x11-0x2e
|
|
edges: 1, 1, 0: 0x08-0x22-0x3d, 0x12-0x33
|
|
edges: 1, 1, 0: 0x08-0x22-0x3d, 0x12-0x33
|
|
edges: 1, 1, 0: 0x09-0x21-0x3a, 0x13-0x30
|
|
edges: 1, 1, 0: 0x08-0x22-0x3c, 0x12-0x32
|
|
edges: 1, 1, 0: 0x0b-0x23-0x3b, 0x15-0x31
|
|
using pattern 2
|
|
edges: 1, 1, 0: 0x0a-0x24-0x3e, 0x14-0x34
|
|
edges: 1, 1, 0: 0x09-0x21-0x39, 0x13-0x2f
|
|
edges: 1, 1, 0: 0x07-0x1f-0x37, 0x11-0x2d
|
|
edges: 1, 1, 0: 0x08-0x22-0x3d, 0x12-0x33
|
|
edges: 1, 1, 0: 0x08-0x21-0x3b, 0x12-0x31
|
|
edges: 1, 1, 0: 0x09-0x22-0x3b, 0x13-0x31
|
|
edges: 1, 1, 0: 0x08-0x21-0x3a, 0x12-0x30
|
|
edges: 1, 1, 0: 0x0b-0x24-0x3d, 0x15-0x33
|
|
using pattern 3
|
|
edges: 1, 1, 0: 0x09-0x23-0x3e, 0x13-0x34
|
|
edges: 1, 1, 0: 0x09-0x20-0x38, 0x13-0x2e
|
|
edges: 1, 1, 0: 0x06-0x1e-0x36, 0x10-0x2c
|
|
edges: 1, 1, 0: 0x07-0x22-0x3e, 0x11-0x34
|
|
edges: 1, 1, 0: 0x08-0x21-0x3b, 0x12-0x31
|
|
edges: 1, 1, 0: 0x09-0x21-0x3a, 0x13-0x30
|
|
edges: 1, 1, 0: 0x08-0x22-0x3c, 0x12-0x32
|
|
edges: 1, 1, 0: 0x0a-0x22-0x3b, 0x14-0x31
|
|
[3100] = 0x0c000000
|
|
using pattern 0
|
|
edges: 1, 1, 1: 0x0e-0x24-0x3a, 0x12-0x36
|
|
edges: 1, 1, 1: 0x0b-0x20-0x36, 0x0f-0x32
|
|
edges: 1, 1, 1: 0x09-0x1f-0x35, 0x0d-0x31
|
|
edges: 1, 1, 1: 0x09-0x21-0x39, 0x0d-0x35
|
|
edges: 1, 1, 1: 0x0a-0x20-0x37, 0x0e-0x33
|
|
edges: 1, 1, 1: 0x0c-0x21-0x37, 0x10-0x33
|
|
edges: 1, 1, 1: 0x0b-0x21-0x37, 0x0f-0x33
|
|
edges: 1, 1, 1: 0x0d-0x23-0x39, 0x11-0x35
|
|
using pattern 1
|
|
edges: 1, 1, 1: 0x0e-0x25-0x3c, 0x12-0x38
|
|
edges: 1, 1, 1: 0x0b-0x21-0x38, 0x0f-0x34
|
|
edges: 1, 1, 1: 0x09-0x1f-0x35, 0x0d-0x31
|
|
edges: 1, 1, 1: 0x09-0x21-0x3a, 0x0d-0x36
|
|
edges: 1, 1, 1: 0x0b-0x21-0x38, 0x0f-0x34
|
|
edges: 1, 1, 1: 0x0c-0x22-0x38, 0x10-0x34
|
|
edges: 1, 1, 1: 0x0b-0x21-0x37, 0x0f-0x33
|
|
edges: 1, 1, 1: 0x0e-0x24-0x3a, 0x12-0x36
|
|
using pattern 2
|
|
edges: 1, 1, 1: 0x0e-0x25-0x3c, 0x12-0x38
|
|
edges: 1, 1, 1: 0x0b-0x21-0x38, 0x0f-0x34
|
|
edges: 1, 1, 1: 0x08-0x1f-0x37, 0x0c-0x33
|
|
edges: 1, 1, 1: 0x08-0x20-0x39, 0x0c-0x35
|
|
edges: 1, 1, 1: 0x0a-0x21-0x39, 0x0e-0x35
|
|
edges: 1, 1, 1: 0x0c-0x22-0x38, 0x10-0x34
|
|
edges: 1, 1, 1: 0x0b-0x22-0x39, 0x0f-0x35
|
|
edges: 1, 1, 1: 0x0e-0x24-0x3b, 0x12-0x37
|
|
using pattern 3
|
|
edges: 1, 1, 1: 0x0e-0x24-0x3b, 0x12-0x37
|
|
edges: 1, 1, 1: 0x0a-0x20-0x36, 0x0e-0x32
|
|
edges: 1, 1, 1: 0x08-0x1e-0x35, 0x0c-0x31
|
|
edges: 1, 1, 1: 0x09-0x22-0x3b, 0x0d-0x37
|
|
edges: 1, 1, 1: 0x0a-0x20-0x37, 0x0e-0x33
|
|
edges: 1, 1, 1: 0x0c-0x22-0x39, 0x10-0x35
|
|
edges: 1, 1, 1: 0x0b-0x21-0x37, 0x0f-0x33
|
|
edges: 1, 1, 1: 0x0e-0x22-0x37, 0x12-0x33
|
|
[3100] = 0x2c000000
|
|
using pattern 0
|
|
edges: 1, 1, 2: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 1, 2: 0x0f-0x21-0x33, 0x13-0x2f
|
|
edges: 1, 1, 2: 0x0e-0x1f-0x31, 0x12-0x2d
|
|
edges: 1, 1, 2: 0x0f-0x22-0x36, 0x13-0x32
|
|
edges: 1, 1, 2: 0x0e-0x21-0x35, 0x12-0x31
|
|
edges: 1, 1, 2: 0x0f-0x21-0x33, 0x13-0x2f
|
|
edges: 1, 1, 2: 0x0f-0x22-0x35, 0x13-0x31
|
|
edges: 1, 1, 2: 0x10-0x22-0x35, 0x14-0x31
|
|
using pattern 1
|
|
edges: 1, 1, 2: 0x0f-0x24-0x3a, 0x13-0x36
|
|
edges: 1, 1, 2: 0x0f-0x22-0x36, 0x13-0x32
|
|
edges: 1, 1, 2: 0x0e-0x20-0x32, 0x12-0x2e
|
|
edges: 1, 1, 2: 0x0f-0x22-0x36, 0x13-0x32
|
|
edges: 1, 1, 2: 0x0e-0x22-0x37, 0x12-0x33
|
|
edges: 1, 1, 2: 0x10-0x21-0x33, 0x14-0x2f
|
|
edges: 1, 1, 2: 0x0f-0x22-0x36, 0x13-0x32
|
|
edges: 1, 1, 2: 0x11-0x23-0x35, 0x15-0x31
|
|
using pattern 2
|
|
edges: 1, 1, 2: 0x10-0x24-0x39, 0x14-0x35
|
|
edges: 1, 1, 2: 0x0f-0x22-0x35, 0x13-0x31
|
|
edges: 1, 1, 2: 0x0e-0x1f-0x31, 0x12-0x2d
|
|
edges: 1, 1, 2: 0x0f-0x22-0x36, 0x13-0x32
|
|
edges: 1, 1, 2: 0x0e-0x21-0x35, 0x12-0x31
|
|
edges: 1, 1, 2: 0x0f-0x21-0x34, 0x13-0x30
|
|
edges: 1, 1, 2: 0x0f-0x22-0x35, 0x13-0x31
|
|
edges: 1, 1, 2: 0x10-0x23-0x36, 0x14-0x32
|
|
using pattern 3
|
|
edges: 1, 1, 2: 0x10-0x24-0x38, 0x14-0x34
|
|
edges: 1, 1, 2: 0x0f-0x20-0x31, 0x13-0x2d
|
|
edges: 1, 1, 2: 0x0e-0x1f-0x31, 0x12-0x2d
|
|
edges: 1, 1, 2: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 1, 2: 0x0e-0x21-0x35, 0x12-0x31
|
|
edges: 1, 1, 2: 0x0f-0x20-0x32, 0x13-0x2e
|
|
edges: 1, 1, 2: 0x0f-0x22-0x36, 0x13-0x32
|
|
edges: 1, 1, 2: 0x10-0x22-0x35, 0x14-0x31
|
|
CPA
|
|
[3100] = 0x00000000
|
|
using pattern 0
|
|
edges: 1, 2, 0: 0x0a-0x21-0x39, 0x14-0x2f
|
|
edges: 1, 2, 0: 0x07-0x1e-0x35, 0x11-0x2b
|
|
edges: 1, 2, 0: 0x06-0x1e-0x36, 0x10-0x2c
|
|
edges: 1, 2, 0: 0x06-0x1d-0x35, 0x10-0x2b
|
|
edges: 1, 2, 0: 0x07-0x1e-0x35, 0x11-0x2b
|
|
edges: 1, 2, 0: 0x07-0x1f-0x38, 0x11-0x2e
|
|
edges: 1, 2, 0: 0x09-0x20-0x38, 0x13-0x2e
|
|
edges: 1, 2, 0: 0x09-0x21-0x39, 0x13-0x2f
|
|
using pattern 1
|
|
edges: 1, 2, 0: 0x0a-0x20-0x37, 0x14-0x2d
|
|
edges: 1, 2, 0: 0x07-0x1e-0x35, 0x11-0x2b
|
|
edges: 1, 2, 0: 0x06-0x1d-0x35, 0x10-0x2b
|
|
edges: 1, 2, 0: 0x06-0x1e-0x36, 0x10-0x2c
|
|
edges: 1, 2, 0: 0x07-0x1e-0x36, 0x11-0x2c
|
|
edges: 1, 2, 0: 0x08-0x20-0x39, 0x12-0x2f
|
|
edges: 1, 2, 0: 0x08-0x22-0x3c, 0x12-0x32
|
|
edges: 1, 2, 0: 0x0a-0x22-0x3b, 0x14-0x31
|
|
using pattern 2
|
|
edges: 1, 2, 0: 0x0a-0x21-0x39, 0x14-0x2f
|
|
edges: 1, 2, 0: 0x07-0x1c-0x32, 0x11-0x28
|
|
edges: 1, 2, 0: 0x06-0x1d-0x34, 0x10-0x2a
|
|
edges: 1, 2, 0: 0x06-0x1e-0x36, 0x10-0x2c
|
|
edges: 1, 2, 0: 0x07-0x1e-0x35, 0x11-0x2b
|
|
edges: 1, 2, 0: 0x08-0x20-0x38, 0x12-0x2e
|
|
edges: 1, 2, 0: 0x08-0x21-0x3a, 0x12-0x30
|
|
edges: 1, 2, 0: 0x0a-0x22-0x3a, 0x14-0x30
|
|
using pattern 3
|
|
edges: 1, 2, 0: 0x0a-0x23-0x3d, 0x14-0x33
|
|
edges: 1, 2, 0: 0x07-0x1d-0x34, 0x11-0x2a
|
|
edges: 1, 2, 0: 0x06-0x1f-0x39, 0x10-0x2f
|
|
edges: 1, 2, 0: 0x06-0x1d-0x35, 0x10-0x2b
|
|
edges: 1, 2, 0: 0x07-0x20-0x39, 0x11-0x2f
|
|
edges: 1, 2, 0: 0x08-0x20-0x38, 0x12-0x2e
|
|
edges: 1, 2, 0: 0x08-0x1f-0x37, 0x12-0x2d
|
|
edges: 1, 2, 0: 0x09-0x22-0x3c, 0x13-0x32
|
|
[3100] = 0x0c000000
|
|
using pattern 0
|
|
edges: 1, 2, 1: 0x0c-0x21-0x36, 0x10-0x32
|
|
edges: 1, 2, 1: 0x09-0x1e-0x34, 0x0d-0x30
|
|
edges: 1, 2, 1: 0x0a-0x1e-0x33, 0x0e-0x2f
|
|
edges: 1, 2, 1: 0x09-0x1f-0x35, 0x0d-0x31
|
|
edges: 1, 2, 1: 0x09-0x1f-0x36, 0x0d-0x32
|
|
edges: 1, 2, 1: 0x0e-0x22-0x36, 0x12-0x32
|
|
edges: 1, 2, 1: 0x0c-0x20-0x35, 0x10-0x31
|
|
edges: 1, 2, 1: 0x0e-0x22-0x37, 0x12-0x33
|
|
using pattern 1
|
|
edges: 1, 2, 1: 0x0c-0x20-0x34, 0x10-0x30
|
|
edges: 1, 2, 1: 0x09-0x1e-0x34, 0x0d-0x30
|
|
edges: 1, 2, 1: 0x0b-0x1f-0x33, 0x0f-0x2f
|
|
edges: 1, 2, 1: 0x09-0x1e-0x34, 0x0d-0x30
|
|
edges: 1, 2, 1: 0x0a-0x1f-0x35, 0x0e-0x31
|
|
edges: 1, 2, 1: 0x0d-0x21-0x36, 0x11-0x32
|
|
edges: 1, 2, 1: 0x0b-0x21-0x38, 0x0f-0x34
|
|
edges: 1, 2, 1: 0x0e-0x23-0x39, 0x12-0x35
|
|
using pattern 2
|
|
edges: 1, 2, 1: 0x0c-0x21-0x36, 0x10-0x32
|
|
edges: 1, 2, 1: 0x09-0x1e-0x34, 0x0d-0x30
|
|
edges: 1, 2, 1: 0x0b-0x20-0x35, 0x0f-0x31
|
|
edges: 1, 2, 1: 0x09-0x1f-0x35, 0x0d-0x31
|
|
edges: 1, 2, 1: 0x09-0x1f-0x35, 0x0d-0x31
|
|
edges: 1, 2, 1: 0x0d-0x21-0x36, 0x11-0x32
|
|
edges: 1, 2, 1: 0x0b-0x21-0x37, 0x0f-0x33
|
|
edges: 1, 2, 1: 0x0e-0x23-0x38, 0x12-0x34
|
|
using pattern 3
|
|
edges: 1, 2, 1: 0x0c-0x22-0x39, 0x10-0x35
|
|
edges: 1, 2, 1: 0x09-0x1f-0x36, 0x0d-0x32
|
|
edges: 1, 2, 1: 0x0b-0x20-0x36, 0x0f-0x32
|
|
edges: 1, 2, 1: 0x08-0x1e-0x35, 0x0c-0x31
|
|
edges: 1, 2, 1: 0x09-0x20-0x38, 0x0d-0x34
|
|
edges: 1, 2, 1: 0x0d-0x22-0x37, 0x11-0x33
|
|
edges: 1, 2, 1: 0x0a-0x1f-0x34, 0x0e-0x30
|
|
edges: 1, 2, 1: 0x0e-0x23-0x39, 0x12-0x35
|
|
[3100] = 0x2c000000
|
|
using pattern 0
|
|
edges: 1, 2, 2: 0x10-0x21-0x32, 0x14-0x2e
|
|
edges: 1, 2, 2: 0x0e-0x1e-0x2e, 0x12-0x2a
|
|
edges: 1, 2, 2: 0x0e-0x1e-0x2e, 0x12-0x2a
|
|
edges: 1, 2, 2: 0x0e-0x1e-0x2f, 0x12-0x2b
|
|
edges: 1, 2, 2: 0x0e-0x1e-0x2e, 0x12-0x2a
|
|
edges: 1, 2, 2: 0x0f-0x20-0x32, 0x13-0x2e
|
|
edges: 1, 2, 2: 0x0e-0x1f-0x31, 0x12-0x2d
|
|
edges: 1, 2, 2: 0x11-0x22-0x33, 0x15-0x2f
|
|
using pattern 1
|
|
edges: 1, 2, 2: 0x0f-0x20-0x32, 0x13-0x2e
|
|
edges: 1, 2, 2: 0x0d-0x1d-0x2e, 0x11-0x2a
|
|
edges: 1, 2, 2: 0x0e-0x1f-0x30, 0x12-0x2c
|
|
edges: 1, 2, 2: 0x0d-0x1f-0x31, 0x11-0x2d
|
|
edges: 1, 2, 2: 0x0e-0x1e-0x2f, 0x12-0x2b
|
|
edges: 1, 2, 2: 0x0e-0x20-0x33, 0x12-0x2f
|
|
edges: 1, 2, 2: 0x0e-0x21-0x35, 0x12-0x31
|
|
edges: 1, 2, 2: 0x10-0x22-0x35, 0x14-0x31
|
|
using pattern 2
|
|
edges: 1, 2, 2: 0x10-0x21-0x32, 0x14-0x2e
|
|
edges: 1, 2, 2: 0x0e-0x1d-0x2c, 0x12-0x28
|
|
edges: 1, 2, 2: 0x0e-0x1e-0x2e, 0x12-0x2a
|
|
edges: 1, 2, 2: 0x0e-0x1f-0x31, 0x12-0x2d
|
|
edges: 1, 2, 2: 0x0e-0x1d-0x2d, 0x12-0x29
|
|
edges: 1, 2, 2: 0x0e-0x20-0x33, 0x12-0x2f
|
|
edges: 1, 2, 2: 0x0e-0x21-0x35, 0x12-0x31
|
|
edges: 1, 2, 2: 0x11-0x22-0x34, 0x15-0x30
|
|
using pattern 3
|
|
edges: 1, 2, 2: 0x10-0x22-0x35, 0x14-0x31
|
|
edges: 1, 2, 2: 0x0e-0x1e-0x2e, 0x12-0x2a
|
|
edges: 1, 2, 2: 0x0e-0x20-0x33, 0x12-0x2f
|
|
edges: 1, 2, 2: 0x0d-0x1f-0x31, 0x11-0x2d
|
|
edges: 1, 2, 2: 0x0e-0x21-0x34, 0x12-0x30
|
|
edges: 1, 2, 2: 0x0f-0x1f-0x30, 0x13-0x2c
|
|
edges: 1, 2, 2: 0x0e-0x1f-0x31, 0x12-0x2d
|
|
edges: 1, 2, 2: 0x11-0x23-0x35, 0x15-0x31
|
|
CPA
|
|
[3100] = 0x00000000
|
|
using pattern 0
|
|
edges: 1, 3, 0: 0x0b-0x23-0x3b, 0x15-0x31
|
|
edges: 1, 3, 0: 0x0a-0x22-0x3a, 0x14-0x30
|
|
edges: 1, 3, 0: 0x07-0x1e-0x36, 0x11-0x2c
|
|
edges: 1, 3, 0: 0x08-0x1f-0x37, 0x12-0x2d
|
|
edges: 1, 3, 0: 0x09-0x20-0x38, 0x13-0x2e
|
|
edges: 1, 3, 0: 0x0b-0x22-0x3a, 0x15-0x30
|
|
edges: 1, 3, 0: 0x0a-0x21-0x39, 0x14-0x2f
|
|
edges: 1, 3, 0: 0x0d-0x23-0x39, 0x17-0x2f
|
|
using pattern 1
|
|
edges: 1, 3, 0: 0x0b-0x23-0x3c, 0x15-0x32
|
|
edges: 1, 3, 0: 0x09-0x21-0x3a, 0x13-0x30
|
|
edges: 1, 3, 0: 0x07-0x1e-0x36, 0x11-0x2c
|
|
edges: 1, 3, 0: 0x08-0x20-0x38, 0x12-0x2e
|
|
edges: 1, 3, 0: 0x09-0x20-0x38, 0x13-0x2e
|
|
edges: 1, 3, 0: 0x0b-0x23-0x3b, 0x15-0x31
|
|
edges: 1, 3, 0: 0x09-0x22-0x3c, 0x13-0x32
|
|
edges: 1, 3, 0: 0x0d-0x24-0x3c, 0x17-0x32
|
|
using pattern 2
|
|
edges: 1, 3, 0: 0x0b-0x23-0x3b, 0x15-0x31
|
|
edges: 1, 3, 0: 0x0a-0x20-0x37, 0x14-0x2d
|
|
edges: 1, 3, 0: 0x07-0x1d-0x34, 0x11-0x2a
|
|
edges: 1, 3, 0: 0x08-0x20-0x38, 0x12-0x2e
|
|
edges: 1, 3, 0: 0x08-0x20-0x38, 0x12-0x2e
|
|
edges: 1, 3, 0: 0x0b-0x22-0x3a, 0x15-0x30
|
|
edges: 1, 3, 0: 0x09-0x22-0x3b, 0x13-0x31
|
|
edges: 1, 3, 0: 0x0e-0x24-0x3b, 0x18-0x31
|
|
using pattern 3
|
|
edges: 1, 3, 0: 0x0c-0x25-0x3e, 0x16-0x34
|
|
edges: 1, 3, 0: 0x0a-0x22-0x3b, 0x14-0x31
|
|
edges: 1, 3, 0: 0x06-0x1e-0x37, 0x10-0x2d
|
|
edges: 1, 3, 0: 0x08-0x1f-0x37, 0x12-0x2d
|
|
edges: 1, 3, 0: 0x09-0x22-0x3c, 0x13-0x32
|
|
edges: 1, 3, 0: 0x0b-0x21-0x38, 0x15-0x2e
|
|
edges: 1, 3, 0: 0x09-0x21-0x39, 0x13-0x2f
|
|
edges: 1, 3, 0: 0x0d-0x24-0x3c, 0x17-0x32
|
|
[3100] = 0x0c000000
|
|
using pattern 0
|
|
edges: 1, 3, 1: 0x0f-0x25-0x3b, 0x13-0x37
|
|
edges: 1, 3, 1: 0x0e-0x23-0x38, 0x12-0x34
|
|
edges: 1, 3, 1: 0x0b-0x1f-0x34, 0x0f-0x30
|
|
edges: 1, 3, 1: 0x0a-0x20-0x37, 0x0e-0x33
|
|
edges: 1, 3, 1: 0x0b-0x21-0x37, 0x0f-0x33
|
|
edges: 1, 3, 1: 0x10-0x24-0x39, 0x14-0x35
|
|
edges: 1, 3, 1: 0x0e-0x22-0x37, 0x12-0x33
|
|
edges: 1, 3, 1: 0x0e-0x23-0x39, 0x12-0x35
|
|
using pattern 1
|
|
edges: 1, 3, 1: 0x0f-0x24-0x39, 0x13-0x35
|
|
edges: 1, 3, 1: 0x0e-0x23-0x38, 0x12-0x34
|
|
edges: 1, 3, 1: 0x0c-0x1f-0x33, 0x10-0x2f
|
|
edges: 1, 3, 1: 0x0b-0x20-0x36, 0x0f-0x32
|
|
edges: 1, 3, 1: 0x0c-0x21-0x37, 0x10-0x33
|
|
edges: 1, 3, 1: 0x0f-0x24-0x39, 0x13-0x35
|
|
edges: 1, 3, 1: 0x0e-0x23-0x39, 0x12-0x35
|
|
edges: 1, 3, 1: 0x0e-0x24-0x3b, 0x12-0x37
|
|
using pattern 2
|
|
edges: 1, 3, 1: 0x0f-0x23-0x38, 0x13-0x34
|
|
edges: 1, 3, 1: 0x0e-0x22-0x37, 0x12-0x33
|
|
edges: 1, 3, 1: 0x0c-0x20-0x34, 0x10-0x30
|
|
edges: 1, 3, 1: 0x0a-0x20-0x37, 0x0e-0x33
|
|
edges: 1, 3, 1: 0x0c-0x21-0x37, 0x10-0x33
|
|
edges: 1, 3, 1: 0x0f-0x24-0x39, 0x13-0x35
|
|
edges: 1, 3, 1: 0x0e-0x24-0x3a, 0x12-0x36
|
|
edges: 1, 3, 1: 0x0e-0x23-0x39, 0x12-0x35
|
|
using pattern 3
|
|
edges: 1, 3, 1: 0x0e-0x25-0x3c, 0x12-0x38
|
|
edges: 1, 3, 1: 0x0c-0x23-0x3b, 0x10-0x37
|
|
edges: 1, 3, 1: 0x0c-0x21-0x37, 0x10-0x33
|
|
edges: 1, 3, 1: 0x0a-0x20-0x37, 0x0e-0x33
|
|
edges: 1, 3, 1: 0x0b-0x21-0x38, 0x0f-0x34
|
|
edges: 1, 3, 1: 0x0f-0x24-0x39, 0x13-0x35
|
|
edges: 1, 3, 1: 0x0c-0x21-0x37, 0x10-0x33
|
|
edges: 1, 3, 1: 0x0e-0x24-0x3a, 0x12-0x36
|
|
[3100] = 0x2c000000
|
|
using pattern 0
|
|
edges: 1, 3, 2: 0x12-0x23-0x35, 0x16-0x31
|
|
edges: 1, 3, 2: 0x11-0x22-0x34, 0x15-0x30
|
|
edges: 1, 3, 2: 0x0f-0x1f-0x30, 0x13-0x2c
|
|
edges: 1, 3, 2: 0x0f-0x20-0x32, 0x13-0x2e
|
|
edges: 1, 3, 2: 0x0f-0x21-0x33, 0x13-0x2f
|
|
edges: 1, 3, 2: 0x11-0x22-0x33, 0x15-0x2f
|
|
edges: 1, 3, 2: 0x10-0x21-0x33, 0x14-0x2f
|
|
edges: 1, 3, 2: 0x14-0x23-0x32, 0x18-0x2e
|
|
using pattern 1
|
|
edges: 1, 3, 2: 0x11-0x24-0x37, 0x15-0x33
|
|
edges: 1, 3, 2: 0x10-0x23-0x36, 0x14-0x32
|
|
edges: 1, 3, 2: 0x0f-0x1f-0x30, 0x13-0x2c
|
|
edges: 1, 3, 2: 0x0e-0x20-0x32, 0x12-0x2e
|
|
edges: 1, 3, 2: 0x0f-0x20-0x32, 0x13-0x2e
|
|
edges: 1, 3, 2: 0x11-0x22-0x34, 0x15-0x30
|
|
edges: 1, 3, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 3, 2: 0x14-0x25-0x36, 0x18-0x32
|
|
using pattern 2
|
|
edges: 1, 3, 2: 0x12-0x24-0x36, 0x16-0x32
|
|
edges: 1, 3, 2: 0x10-0x21-0x32, 0x14-0x2e
|
|
edges: 1, 3, 2: 0x0f-0x1f-0x2f, 0x13-0x2b
|
|
edges: 1, 3, 2: 0x0f-0x21-0x34, 0x13-0x30
|
|
edges: 1, 3, 2: 0x0f-0x20-0x31, 0x13-0x2d
|
|
edges: 1, 3, 2: 0x11-0x22-0x34, 0x15-0x30
|
|
edges: 1, 3, 2: 0x10-0x23-0x36, 0x14-0x32
|
|
edges: 1, 3, 2: 0x14-0x24-0x34, 0x18-0x30
|
|
using pattern 3
|
|
edges: 1, 3, 2: 0x13-0x25-0x37, 0x17-0x33
|
|
edges: 1, 3, 2: 0x11-0x24-0x37, 0x15-0x33
|
|
edges: 1, 3, 2: 0x0f-0x20-0x32, 0x13-0x2e
|
|
edges: 1, 3, 2: 0x0f-0x20-0x32, 0x13-0x2e
|
|
edges: 1, 3, 2: 0x0f-0x22-0x36, 0x13-0x32
|
|
edges: 1, 3, 2: 0x11-0x21-0x31, 0x15-0x2d
|
|
edges: 1, 3, 2: 0x10-0x21-0x32, 0x14-0x2e
|
|
edges: 1, 3, 2: 0x14-0x24-0x34, 0x18-0x30
|
|
CPA
|
|
discover rising edges write:
|
|
[4eb0] = 200
|
|
[3100] = 0x00000000
|
|
using pattern 0
|
|
edges: 1, 0, 0: 0x09-0x23-0x3e, 0x13-0x34
|
|
edges: 1, 0, 0: 0x09-0x23-0x3d, 0x13-0x33
|
|
edges: 1, 0, 0: 0x08-0x20-0x39, 0x12-0x2f
|
|
edges: 1, 0, 0: 0x09-0x23-0x3d, 0x13-0x33
|
|
edges: 1, 0, 0: 0x09-0x22-0x3c, 0x13-0x32
|
|
edges: 1, 0, 0: 0x08-0x22-0x3c, 0x12-0x32
|
|
edges: 1, 0, 0: 0x09-0x20-0x38, 0x13-0x2e
|
|
edges: 1, 0, 0: 0x0b-0x24-0x3e, 0x15-0x34
|
|
using pattern 1
|
|
edges: 1, 0, 0: 0x09-0x24-0x40, 0x13-0x36
|
|
edges: 1, 0, 0: 0x09-0x24-0x3f, 0x13-0x35
|
|
edges: 1, 0, 0: 0x08-0x21-0x3b, 0x12-0x31
|
|
edges: 1, 0, 0: 0x09-0x23-0x3e, 0x13-0x34
|
|
edges: 1, 0, 0: 0x09-0x24-0x3f, 0x13-0x35
|
|
edges: 1, 0, 0: 0x09-0x23-0x3e, 0x13-0x34
|
|
edges: 1, 0, 0: 0x09-0x21-0x39, 0x13-0x2f
|
|
edges: 1, 0, 0: 0x0b-0x24-0x3d, 0x15-0x33
|
|
using pattern 2
|
|
edges: 1, 0, 0: 0x09-0x24-0x3f, 0x13-0x35
|
|
edges: 1, 0, 0: 0x09-0x23-0x3d, 0x13-0x33
|
|
edges: 1, 0, 0: 0x08-0x21-0x3a, 0x12-0x30
|
|
edges: 1, 0, 0: 0x09-0x22-0x3c, 0x13-0x32
|
|
edges: 1, 0, 0: 0x09-0x23-0x3e, 0x13-0x34
|
|
edges: 1, 0, 0: 0x09-0x23-0x3e, 0x13-0x34
|
|
edges: 1, 0, 0: 0x09-0x20-0x38, 0x13-0x2e
|
|
edges: 1, 0, 0: 0x0b-0x25-0x3f, 0x15-0x35
|
|
using pattern 3
|
|
edges: 1, 0, 0: 0x09-0x24-0x3f, 0x13-0x35
|
|
edges: 1, 0, 0: 0x09-0x22-0x3c, 0x13-0x32
|
|
edges: 1, 0, 0: 0x08-0x21-0x3a, 0x12-0x30
|
|
edges: 1, 0, 0: 0x09-0x24-0x3f, 0x13-0x35
|
|
edges: 1, 0, 0: 0x09-0x22-0x3b, 0x13-0x31
|
|
edges: 1, 0, 0: 0x09-0x23-0x3d, 0x13-0x33
|
|
edges: 1, 0, 0: 0x09-0x20-0x38, 0x13-0x2e
|
|
edges: 1, 0, 0: 0x0b-0x24-0x3d, 0x15-0x33
|
|
[3100] = 0x0c000000
|
|
using pattern 0
|
|
edges: 1, 0, 1: 0x10-0x25-0x3a, 0x14-0x36
|
|
edges: 1, 0, 1: 0x0f-0x23-0x38, 0x13-0x34
|
|
edges: 1, 0, 1: 0x0e-0x22-0x37, 0x12-0x33
|
|
edges: 1, 0, 1: 0x0e-0x23-0x39, 0x12-0x35
|
|
edges: 1, 0, 1: 0x0e-0x22-0x37, 0x12-0x33
|
|
edges: 1, 0, 1: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 0, 1: 0x0e-0x21-0x34, 0x12-0x30
|
|
edges: 1, 0, 1: 0x10-0x24-0x39, 0x14-0x35
|
|
using pattern 1
|
|
edges: 1, 0, 1: 0x10-0x26-0x3d, 0x14-0x39
|
|
edges: 1, 0, 1: 0x0f-0x25-0x3b, 0x13-0x37
|
|
edges: 1, 0, 1: 0x0e-0x23-0x38, 0x12-0x34
|
|
edges: 1, 0, 1: 0x0f-0x25-0x3b, 0x13-0x37
|
|
edges: 1, 0, 1: 0x0f-0x24-0x39, 0x13-0x35
|
|
edges: 1, 0, 1: 0x10-0x24-0x39, 0x14-0x35
|
|
edges: 1, 0, 1: 0x0d-0x20-0x33, 0x11-0x2f
|
|
edges: 1, 0, 1: 0x10-0x24-0x39, 0x14-0x35
|
|
using pattern 2
|
|
edges: 1, 0, 1: 0x10-0x25-0x3b, 0x14-0x37
|
|
edges: 1, 0, 1: 0x0f-0x24-0x39, 0x13-0x35
|
|
edges: 1, 0, 1: 0x0e-0x23-0x38, 0x12-0x34
|
|
edges: 1, 0, 1: 0x0f-0x24-0x39, 0x13-0x35
|
|
edges: 1, 0, 1: 0x0f-0x24-0x39, 0x13-0x35
|
|
edges: 1, 0, 1: 0x10-0x24-0x38, 0x14-0x34
|
|
edges: 1, 0, 1: 0x0e-0x20-0x33, 0x12-0x2f
|
|
edges: 1, 0, 1: 0x10-0x25-0x3b, 0x14-0x37
|
|
using pattern 3
|
|
edges: 1, 0, 1: 0x10-0x25-0x3b, 0x14-0x37
|
|
edges: 1, 0, 1: 0x0f-0x23-0x38, 0x13-0x34
|
|
edges: 1, 0, 1: 0x0d-0x22-0x37, 0x11-0x33
|
|
edges: 1, 0, 1: 0x0e-0x24-0x3b, 0x12-0x37
|
|
edges: 1, 0, 1: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 0, 1: 0x10-0x24-0x38, 0x14-0x34
|
|
edges: 1, 0, 1: 0x0e-0x20-0x33, 0x12-0x2f
|
|
edges: 1, 0, 1: 0x10-0x24-0x38, 0x14-0x34
|
|
[3100] = 0x2c000000
|
|
using pattern 0
|
|
edges: 1, 0, 2: 0x11-0x24-0x38, 0x15-0x34
|
|
edges: 1, 0, 2: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 0, 2: 0x0f-0x22-0x35, 0x13-0x31
|
|
edges: 1, 0, 2: 0x0f-0x23-0x38, 0x13-0x34
|
|
edges: 1, 0, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 0, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 0, 2: 0x0f-0x20-0x32, 0x13-0x2e
|
|
edges: 1, 0, 2: 0x12-0x24-0x37, 0x16-0x33
|
|
using pattern 1
|
|
edges: 1, 0, 2: 0x11-0x25-0x3a, 0x15-0x36
|
|
edges: 1, 0, 2: 0x0f-0x23-0x38, 0x13-0x34
|
|
edges: 1, 0, 2: 0x10-0x23-0x36, 0x14-0x32
|
|
edges: 1, 0, 2: 0x10-0x24-0x38, 0x14-0x34
|
|
edges: 1, 0, 2: 0x10-0x24-0x38, 0x14-0x34
|
|
edges: 1, 0, 2: 0x11-0x24-0x37, 0x15-0x33
|
|
edges: 1, 0, 2: 0x0f-0x20-0x32, 0x13-0x2e
|
|
edges: 1, 0, 2: 0x13-0x25-0x37, 0x17-0x33
|
|
using pattern 2
|
|
edges: 1, 0, 2: 0x11-0x24-0x38, 0x15-0x34
|
|
edges: 1, 0, 2: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 0, 2: 0x0f-0x22-0x35, 0x13-0x31
|
|
edges: 1, 0, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 0, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 0, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 0, 2: 0x0f-0x20-0x31, 0x13-0x2d
|
|
edges: 1, 0, 2: 0x12-0x25-0x39, 0x16-0x35
|
|
using pattern 3
|
|
edges: 1, 0, 2: 0x11-0x24-0x38, 0x15-0x34
|
|
edges: 1, 0, 2: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 0, 2: 0x0f-0x22-0x35, 0x13-0x31
|
|
edges: 1, 0, 2: 0x10-0x24-0x39, 0x14-0x35
|
|
edges: 1, 0, 2: 0x10-0x23-0x36, 0x14-0x32
|
|
edges: 1, 0, 2: 0x11-0x24-0x37, 0x15-0x33
|
|
edges: 1, 0, 2: 0x0f-0x20-0x32, 0x13-0x2e
|
|
edges: 1, 0, 2: 0x12-0x25-0x38, 0x16-0x34
|
|
CPA
|
|
[3100] = 0x00000000
|
|
using pattern 0
|
|
edges: 1, 1, 0: 0x09-0x23-0x3e, 0x13-0x34
|
|
edges: 1, 1, 0: 0x09-0x23-0x3d, 0x13-0x33
|
|
edges: 1, 1, 0: 0x07-0x21-0x3c, 0x11-0x32
|
|
edges: 1, 1, 0: 0x08-0x1f-0x37, 0x12-0x2d
|
|
edges: 1, 1, 0: 0x08-0x20-0x38, 0x12-0x2e
|
|
edges: 1, 1, 0: 0x08-0x21-0x3b, 0x12-0x31
|
|
edges: 1, 1, 0: 0x08-0x20-0x38, 0x12-0x2e
|
|
edges: 1, 1, 0: 0x0a-0x23-0x3d, 0x14-0x33
|
|
using pattern 1
|
|
edges: 1, 1, 0: 0x09-0x24-0x3f, 0x13-0x35
|
|
edges: 1, 1, 0: 0x09-0x24-0x3f, 0x13-0x35
|
|
edges: 1, 1, 0: 0x07-0x22-0x3d, 0x11-0x33
|
|
edges: 1, 1, 0: 0x08-0x1f-0x37, 0x12-0x2d
|
|
edges: 1, 1, 0: 0x09-0x23-0x3d, 0x13-0x33
|
|
edges: 1, 1, 0: 0x08-0x22-0x3d, 0x12-0x33
|
|
edges: 1, 1, 0: 0x08-0x20-0x38, 0x12-0x2e
|
|
edges: 1, 1, 0: 0x0a-0x23-0x3d, 0x14-0x33
|
|
using pattern 2
|
|
edges: 1, 1, 0: 0x09-0x23-0x3e, 0x13-0x34
|
|
edges: 1, 1, 0: 0x09-0x23-0x3d, 0x13-0x33
|
|
edges: 1, 1, 0: 0x07-0x21-0x3c, 0x11-0x32
|
|
edges: 1, 1, 0: 0x08-0x1f-0x36, 0x12-0x2c
|
|
edges: 1, 1, 0: 0x08-0x21-0x3a, 0x12-0x30
|
|
edges: 1, 1, 0: 0x08-0x22-0x3d, 0x12-0x33
|
|
edges: 1, 1, 0: 0x08-0x1f-0x37, 0x12-0x2d
|
|
edges: 1, 1, 0: 0x0a-0x24-0x3f, 0x14-0x35
|
|
using pattern 3
|
|
edges: 1, 1, 0: 0x09-0x23-0x3e, 0x13-0x34
|
|
edges: 1, 1, 0: 0x09-0x22-0x3b, 0x13-0x31
|
|
edges: 1, 1, 0: 0x07-0x21-0x3b, 0x11-0x31
|
|
edges: 1, 1, 0: 0x08-0x1f-0x37, 0x12-0x2d
|
|
edges: 1, 1, 0: 0x08-0x20-0x39, 0x12-0x2f
|
|
edges: 1, 1, 0: 0x08-0x22-0x3c, 0x12-0x32
|
|
edges: 1, 1, 0: 0x08-0x20-0x38, 0x12-0x2e
|
|
edges: 1, 1, 0: 0x0a-0x23-0x3d, 0x14-0x33
|
|
[3100] = 0x0c000000
|
|
using pattern 0
|
|
edges: 1, 1, 1: 0x0f-0x23-0x38, 0x13-0x34
|
|
edges: 1, 1, 1: 0x0f-0x23-0x38, 0x13-0x34
|
|
edges: 1, 1, 1: 0x0b-0x21-0x38, 0x0f-0x34
|
|
edges: 1, 1, 1: 0x0c-0x1f-0x32, 0x10-0x2e
|
|
edges: 1, 1, 1: 0x0e-0x21-0x35, 0x12-0x31
|
|
edges: 1, 1, 1: 0x0e-0x22-0x36, 0x12-0x32
|
|
edges: 1, 1, 1: 0x0d-0x20-0x34, 0x11-0x30
|
|
edges: 1, 1, 1: 0x0f-0x24-0x39, 0x13-0x35
|
|
using pattern 1
|
|
edges: 1, 1, 1: 0x0f-0x25-0x3c, 0x13-0x38
|
|
edges: 1, 1, 1: 0x0f-0x24-0x3a, 0x13-0x36
|
|
edges: 1, 1, 1: 0x0b-0x22-0x39, 0x0f-0x35
|
|
edges: 1, 1, 1: 0x0d-0x20-0x34, 0x11-0x30
|
|
edges: 1, 1, 1: 0x0e-0x22-0x37, 0x12-0x33
|
|
edges: 1, 1, 1: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 1, 1: 0x0c-0x1f-0x33, 0x10-0x2f
|
|
edges: 1, 1, 1: 0x0f-0x24-0x3a, 0x13-0x36
|
|
using pattern 2
|
|
edges: 1, 1, 1: 0x0f-0x25-0x3c, 0x13-0x38
|
|
edges: 1, 1, 1: 0x0f-0x24-0x3a, 0x13-0x36
|
|
edges: 1, 1, 1: 0x0c-0x23-0x3b, 0x10-0x37
|
|
edges: 1, 1, 1: 0x0d-0x20-0x33, 0x11-0x2f
|
|
edges: 1, 1, 1: 0x0e-0x22-0x37, 0x12-0x33
|
|
edges: 1, 1, 1: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 1, 1: 0x0d-0x20-0x34, 0x11-0x30
|
|
edges: 1, 1, 1: 0x10-0x25-0x3b, 0x14-0x37
|
|
using pattern 3
|
|
edges: 1, 1, 1: 0x0f-0x25-0x3b, 0x13-0x37
|
|
edges: 1, 1, 1: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 1, 1: 0x0b-0x21-0x37, 0x0f-0x33
|
|
edges: 1, 1, 1: 0x0d-0x21-0x35, 0x11-0x31
|
|
edges: 1, 1, 1: 0x0e-0x22-0x36, 0x12-0x32
|
|
edges: 1, 1, 1: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 1, 1: 0x0c-0x1f-0x33, 0x10-0x2f
|
|
edges: 1, 1, 1: 0x10-0x23-0x37, 0x14-0x33
|
|
[3100] = 0x2c000000
|
|
using pattern 0
|
|
edges: 1, 1, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 1, 2: 0x0e-0x22-0x36, 0x12-0x32
|
|
edges: 1, 1, 2: 0x0d-0x22-0x37, 0x11-0x33
|
|
edges: 1, 1, 2: 0x0e-0x20-0x32, 0x12-0x2e
|
|
edges: 1, 1, 2: 0x0f-0x21-0x34, 0x13-0x30
|
|
edges: 1, 1, 2: 0x10-0x22-0x35, 0x14-0x31
|
|
edges: 1, 1, 2: 0x0e-0x20-0x33, 0x12-0x2f
|
|
edges: 1, 1, 2: 0x11-0x23-0x36, 0x15-0x32
|
|
using pattern 1
|
|
edges: 1, 1, 2: 0x10-0x24-0x39, 0x14-0x35
|
|
edges: 1, 1, 2: 0x0e-0x23-0x39, 0x12-0x35
|
|
edges: 1, 1, 2: 0x0e-0x22-0x37, 0x12-0x33
|
|
edges: 1, 1, 2: 0x0f-0x20-0x32, 0x13-0x2e
|
|
edges: 1, 1, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 1, 2: 0x10-0x23-0x36, 0x14-0x32
|
|
edges: 1, 1, 2: 0x0f-0x20-0x31, 0x13-0x2d
|
|
edges: 1, 1, 2: 0x12-0x24-0x36, 0x16-0x32
|
|
using pattern 2
|
|
edges: 1, 1, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 1, 2: 0x0e-0x22-0x37, 0x12-0x33
|
|
edges: 1, 1, 2: 0x0d-0x21-0x36, 0x11-0x32
|
|
edges: 1, 1, 2: 0x0e-0x1f-0x31, 0x12-0x2d
|
|
edges: 1, 1, 2: 0x0f-0x22-0x35, 0x13-0x31
|
|
edges: 1, 1, 2: 0x10-0x23-0x36, 0x14-0x32
|
|
edges: 1, 1, 2: 0x0e-0x1f-0x31, 0x12-0x2d
|
|
edges: 1, 1, 2: 0x12-0x24-0x37, 0x16-0x33
|
|
using pattern 3
|
|
edges: 1, 1, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 1, 2: 0x0e-0x22-0x36, 0x12-0x32
|
|
edges: 1, 1, 2: 0x0d-0x22-0x37, 0x11-0x33
|
|
edges: 1, 1, 2: 0x0f-0x20-0x32, 0x13-0x2e
|
|
edges: 1, 1, 2: 0x10-0x22-0x35, 0x14-0x31
|
|
edges: 1, 1, 2: 0x10-0x23-0x36, 0x14-0x32
|
|
edges: 1, 1, 2: 0x0e-0x1f-0x31, 0x12-0x2d
|
|
edges: 1, 1, 2: 0x12-0x24-0x37, 0x16-0x33
|
|
CPA
|
|
[3100] = 0x00000000
|
|
using pattern 0
|
|
edges: 1, 2, 0: 0x08-0x23-0x3e, 0x12-0x34
|
|
edges: 1, 2, 0: 0x09-0x22-0x3c, 0x13-0x32
|
|
edges: 1, 2, 0: 0x07-0x1e-0x36, 0x11-0x2c
|
|
edges: 1, 2, 0: 0x07-0x21-0x3c, 0x11-0x32
|
|
edges: 1, 2, 0: 0x08-0x21-0x3a, 0x12-0x30
|
|
edges: 1, 2, 0: 0x08-0x22-0x3d, 0x12-0x33
|
|
edges: 1, 2, 0: 0x08-0x1f-0x37, 0x12-0x2d
|
|
edges: 1, 2, 0: 0x09-0x23-0x3d, 0x13-0x33
|
|
using pattern 1
|
|
edges: 1, 2, 0: 0x08-0x22-0x3c, 0x12-0x32
|
|
edges: 1, 2, 0: 0x08-0x23-0x3e, 0x12-0x34
|
|
edges: 1, 2, 0: 0x07-0x1e-0x36, 0x11-0x2c
|
|
edges: 1, 2, 0: 0x07-0x21-0x3b, 0x11-0x31
|
|
edges: 1, 2, 0: 0x08-0x21-0x3a, 0x12-0x30
|
|
edges: 1, 2, 0: 0x07-0x22-0x3d, 0x11-0x33
|
|
edges: 1, 2, 0: 0x07-0x21-0x3b, 0x11-0x31
|
|
edges: 1, 2, 0: 0x09-0x24-0x40, 0x13-0x36
|
|
using pattern 2
|
|
edges: 1, 2, 0: 0x08-0x23-0x3e, 0x12-0x34
|
|
edges: 1, 2, 0: 0x09-0x22-0x3c, 0x13-0x32
|
|
edges: 1, 2, 0: 0x07-0x1e-0x35, 0x11-0x2b
|
|
edges: 1, 2, 0: 0x07-0x21-0x3c, 0x11-0x32
|
|
edges: 1, 2, 0: 0x07-0x20-0x39, 0x11-0x2f
|
|
edges: 1, 2, 0: 0x07-0x21-0x3c, 0x11-0x32
|
|
edges: 1, 2, 0: 0x08-0x20-0x39, 0x12-0x2f
|
|
edges: 1, 2, 0: 0x09-0x23-0x3d, 0x13-0x33
|
|
using pattern 3
|
|
edges: 1, 2, 0: 0x08-0x23-0x3f, 0x12-0x35
|
|
edges: 1, 2, 0: 0x09-0x24-0x40, 0x13-0x36
|
|
edges: 1, 2, 0: 0x07-0x20-0x39, 0x11-0x2f
|
|
edges: 1, 2, 0: 0x07-0x21-0x3b, 0x11-0x31
|
|
edges: 1, 2, 0: 0x08-0x22-0x3c, 0x12-0x32
|
|
edges: 1, 2, 0: 0x07-0x22-0x3d, 0x11-0x33
|
|
edges: 1, 2, 0: 0x07-0x1e-0x36, 0x11-0x2c
|
|
edges: 1, 2, 0: 0x09-0x23-0x3e, 0x13-0x34
|
|
[3100] = 0x0c000000
|
|
using pattern 0
|
|
edges: 1, 2, 1: 0x0e-0x23-0x38, 0x12-0x34
|
|
edges: 1, 2, 1: 0x0d-0x24-0x3c, 0x11-0x38
|
|
edges: 1, 2, 1: 0x0e-0x21-0x35, 0x12-0x31
|
|
edges: 1, 2, 1: 0x0c-0x21-0x37, 0x10-0x33
|
|
edges: 1, 2, 1: 0x0d-0x21-0x36, 0x11-0x32
|
|
edges: 1, 2, 1: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 2, 1: 0x0e-0x20-0x32, 0x12-0x2e
|
|
edges: 1, 2, 1: 0x10-0x24-0x38, 0x14-0x34
|
|
using pattern 1
|
|
edges: 1, 2, 1: 0x0d-0x22-0x38, 0x11-0x34
|
|
edges: 1, 2, 1: 0x0d-0x24-0x3b, 0x11-0x37
|
|
edges: 1, 2, 1: 0x0e-0x20-0x33, 0x12-0x2f
|
|
edges: 1, 2, 1: 0x0c-0x21-0x37, 0x10-0x33
|
|
edges: 1, 2, 1: 0x0d-0x21-0x36, 0x11-0x32
|
|
edges: 1, 2, 1: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 2, 1: 0x0d-0x21-0x35, 0x11-0x31
|
|
edges: 1, 2, 1: 0x0f-0x24-0x3a, 0x13-0x36
|
|
using pattern 2
|
|
edges: 1, 2, 1: 0x0e-0x24-0x3a, 0x12-0x36
|
|
edges: 1, 2, 1: 0x0d-0x23-0x3a, 0x11-0x36
|
|
edges: 1, 2, 1: 0x0e-0x20-0x33, 0x12-0x2f
|
|
edges: 1, 2, 1: 0x0c-0x23-0x3a, 0x10-0x36
|
|
edges: 1, 2, 1: 0x0e-0x22-0x36, 0x12-0x32
|
|
edges: 1, 2, 1: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 2, 1: 0x0e-0x22-0x36, 0x12-0x32
|
|
edges: 1, 2, 1: 0x10-0x25-0x3a, 0x14-0x36
|
|
using pattern 3
|
|
edges: 1, 2, 1: 0x0e-0x25-0x3c, 0x12-0x38
|
|
edges: 1, 2, 1: 0x0c-0x24-0x3d, 0x10-0x39
|
|
edges: 1, 2, 1: 0x0e-0x21-0x35, 0x12-0x31
|
|
edges: 1, 2, 1: 0x0b-0x21-0x38, 0x0f-0x34
|
|
edges: 1, 2, 1: 0x0e-0x23-0x38, 0x12-0x34
|
|
edges: 1, 2, 1: 0x10-0x23-0x36, 0x14-0x32
|
|
edges: 1, 2, 1: 0x0d-0x1e-0x30, 0x11-0x2c
|
|
edges: 1, 2, 1: 0x10-0x24-0x39, 0x14-0x35
|
|
[3100] = 0x2c000000
|
|
using pattern 0
|
|
edges: 1, 2, 2: 0x0f-0x22-0x36, 0x13-0x32
|
|
edges: 1, 2, 2: 0x10-0x23-0x36, 0x14-0x32
|
|
edges: 1, 2, 2: 0x0e-0x1f-0x30, 0x12-0x2c
|
|
edges: 1, 2, 2: 0x0e-0x21-0x35, 0x12-0x31
|
|
edges: 1, 2, 2: 0x0f-0x21-0x34, 0x13-0x30
|
|
edges: 1, 2, 2: 0x10-0x22-0x35, 0x14-0x31
|
|
edges: 1, 2, 2: 0x0d-0x1e-0x30, 0x11-0x2c
|
|
edges: 1, 2, 2: 0x12-0x24-0x36, 0x16-0x32
|
|
using pattern 1
|
|
edges: 1, 2, 2: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 2, 2: 0x10-0x24-0x38, 0x14-0x34
|
|
edges: 1, 2, 2: 0x0f-0x20-0x31, 0x13-0x2d
|
|
edges: 1, 2, 2: 0x0e-0x21-0x35, 0x12-0x31
|
|
edges: 1, 2, 2: 0x10-0x22-0x34, 0x14-0x30
|
|
edges: 1, 2, 2: 0x10-0x22-0x35, 0x14-0x31
|
|
edges: 1, 2, 2: 0x0d-0x20-0x34, 0x11-0x30
|
|
edges: 1, 2, 2: 0x12-0x25-0x38, 0x16-0x34
|
|
using pattern 2
|
|
edges: 1, 2, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 2, 2: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 2, 2: 0x0e-0x1e-0x2f, 0x12-0x2b
|
|
edges: 1, 2, 2: 0x0e-0x22-0x36, 0x12-0x32
|
|
edges: 1, 2, 2: 0x0f-0x21-0x34, 0x13-0x30
|
|
edges: 1, 2, 2: 0x10-0x22-0x34, 0x14-0x30
|
|
edges: 1, 2, 2: 0x0d-0x20-0x34, 0x11-0x30
|
|
edges: 1, 2, 2: 0x12-0x24-0x37, 0x16-0x33
|
|
using pattern 3
|
|
edges: 1, 2, 2: 0x0f-0x24-0x39, 0x13-0x35
|
|
edges: 1, 2, 2: 0x0f-0x24-0x39, 0x13-0x35
|
|
edges: 1, 2, 2: 0x0e-0x21-0x34, 0x12-0x30
|
|
edges: 1, 2, 2: 0x0e-0x21-0x35, 0x12-0x31
|
|
edges: 1, 2, 2: 0x0f-0x22-0x36, 0x13-0x32
|
|
edges: 1, 2, 2: 0x0f-0x21-0x34, 0x13-0x30
|
|
edges: 1, 2, 2: 0x0d-0x1d-0x2e, 0x11-0x2a
|
|
edges: 1, 2, 2: 0x11-0x24-0x37, 0x15-0x33
|
|
CPA
|
|
[3100] = 0x00000000
|
|
using pattern 0
|
|
edges: 1, 3, 0: 0x09-0x24-0x40, 0x13-0x36
|
|
edges: 1, 3, 0: 0x09-0x22-0x3c, 0x13-0x32
|
|
edges: 1, 3, 0: 0x09-0x21-0x3a, 0x13-0x30
|
|
edges: 1, 3, 0: 0x0a-0x24-0x3e, 0x14-0x34
|
|
edges: 1, 3, 0: 0x09-0x23-0x3d, 0x13-0x33
|
|
edges: 1, 3, 0: 0x0c-0x25-0x3e, 0x16-0x34
|
|
edges: 1, 3, 0: 0x09-0x21-0x3a, 0x13-0x30
|
|
edges: 1, 3, 0: 0x0d-0x26-0x3f, 0x17-0x35
|
|
using pattern 1
|
|
edges: 1, 3, 0: 0x0a-0x24-0x3f, 0x14-0x35
|
|
edges: 1, 3, 0: 0x0a-0x23-0x3d, 0x14-0x33
|
|
edges: 1, 3, 0: 0x08-0x21-0x3a, 0x12-0x30
|
|
edges: 1, 3, 0: 0x0a-0x23-0x3d, 0x14-0x33
|
|
edges: 1, 3, 0: 0x09-0x22-0x3b, 0x13-0x31
|
|
edges: 1, 3, 0: 0x0c-0x24-0x3d, 0x16-0x33
|
|
edges: 1, 3, 0: 0x09-0x22-0x3c, 0x13-0x32
|
|
edges: 1, 3, 0: 0x0d-0x26-0x40, 0x17-0x36
|
|
using pattern 2
|
|
edges: 1, 3, 0: 0x0a-0x24-0x3e, 0x14-0x34
|
|
edges: 1, 3, 0: 0x09-0x20-0x38, 0x13-0x2e
|
|
edges: 1, 3, 0: 0x08-0x20-0x38, 0x12-0x2e
|
|
edges: 1, 3, 0: 0x09-0x24-0x3f, 0x13-0x35
|
|
edges: 1, 3, 0: 0x09-0x21-0x3a, 0x13-0x30
|
|
edges: 1, 3, 0: 0x0b-0x24-0x3d, 0x15-0x33
|
|
edges: 1, 3, 0: 0x09-0x22-0x3b, 0x13-0x31
|
|
edges: 1, 3, 0: 0x0d-0x26-0x40, 0x17-0x36
|
|
using pattern 3
|
|
edges: 1, 3, 0: 0x0a-0x25-0x41, 0x14-0x37
|
|
edges: 1, 3, 0: 0x0a-0x24-0x3e, 0x14-0x34
|
|
edges: 1, 3, 0: 0x08-0x22-0x3d, 0x12-0x33
|
|
edges: 1, 3, 0: 0x0a-0x23-0x3d, 0x14-0x33
|
|
edges: 1, 3, 0: 0x09-0x24-0x3f, 0x13-0x35
|
|
edges: 1, 3, 0: 0x0c-0x24-0x3d, 0x16-0x33
|
|
edges: 1, 3, 0: 0x09-0x20-0x38, 0x13-0x2e
|
|
edges: 1, 3, 0: 0x0d-0x26-0x3f, 0x17-0x35
|
|
[3100] = 0x0c000000
|
|
using pattern 0
|
|
edges: 1, 3, 1: 0x10-0x25-0x3a, 0x14-0x36
|
|
edges: 1, 3, 1: 0x0f-0x23-0x38, 0x13-0x34
|
|
edges: 1, 3, 1: 0x10-0x24-0x39, 0x14-0x35
|
|
edges: 1, 3, 1: 0x0e-0x23-0x38, 0x12-0x34
|
|
edges: 1, 3, 1: 0x0f-0x23-0x38, 0x13-0x34
|
|
edges: 1, 3, 1: 0x11-0x24-0x38, 0x15-0x34
|
|
edges: 1, 3, 1: 0x10-0x22-0x35, 0x14-0x31
|
|
edges: 1, 3, 1: 0x11-0x25-0x39, 0x15-0x35
|
|
using pattern 1
|
|
edges: 1, 3, 1: 0x10-0x25-0x3b, 0x14-0x37
|
|
edges: 1, 3, 1: 0x0f-0x23-0x38, 0x13-0x34
|
|
edges: 1, 3, 1: 0x0f-0x22-0x36, 0x13-0x32
|
|
edges: 1, 3, 1: 0x0e-0x24-0x3a, 0x12-0x36
|
|
edges: 1, 3, 1: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 3, 1: 0x11-0x25-0x39, 0x15-0x35
|
|
edges: 1, 3, 1: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 3, 1: 0x10-0x26-0x3d, 0x14-0x39
|
|
using pattern 2
|
|
edges: 1, 3, 1: 0x10-0x24-0x39, 0x14-0x35
|
|
edges: 1, 3, 1: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 3, 1: 0x0f-0x23-0x38, 0x13-0x34
|
|
edges: 1, 3, 1: 0x0f-0x25-0x3b, 0x13-0x37
|
|
edges: 1, 3, 1: 0x10-0x24-0x38, 0x14-0x34
|
|
edges: 1, 3, 1: 0x12-0x25-0x38, 0x16-0x34
|
|
edges: 1, 3, 1: 0x0f-0x23-0x38, 0x13-0x34
|
|
edges: 1, 3, 1: 0x11-0x26-0x3c, 0x15-0x38
|
|
using pattern 3
|
|
edges: 1, 3, 1: 0x10-0x26-0x3d, 0x14-0x39
|
|
edges: 1, 3, 1: 0x0e-0x23-0x39, 0x12-0x35
|
|
edges: 1, 3, 1: 0x0f-0x24-0x39, 0x13-0x35
|
|
edges: 1, 3, 1: 0x0e-0x24-0x3b, 0x12-0x37
|
|
edges: 1, 3, 1: 0x0f-0x23-0x38, 0x13-0x34
|
|
edges: 1, 3, 1: 0x11-0x24-0x37, 0x15-0x33
|
|
edges: 1, 3, 1: 0x0f-0x21-0x33, 0x13-0x2f
|
|
edges: 1, 3, 1: 0x11-0x26-0x3b, 0x15-0x37
|
|
[3100] = 0x2c000000
|
|
using pattern 0
|
|
edges: 1, 3, 2: 0x11-0x25-0x39, 0x15-0x35
|
|
edges: 1, 3, 2: 0x11-0x22-0x34, 0x15-0x30
|
|
edges: 1, 3, 2: 0x0f-0x23-0x37, 0x13-0x33
|
|
edges: 1, 3, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 3, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 3, 2: 0x13-0x25-0x37, 0x17-0x33
|
|
edges: 1, 3, 2: 0x10-0x21-0x33, 0x14-0x2f
|
|
edges: 1, 3, 2: 0x15-0x26-0x38, 0x19-0x34
|
|
using pattern 1
|
|
edges: 1, 3, 2: 0x11-0x25-0x39, 0x15-0x35
|
|
edges: 1, 3, 2: 0x11-0x24-0x37, 0x15-0x33
|
|
edges: 1, 3, 2: 0x0f-0x22-0x36, 0x13-0x32
|
|
edges: 1, 3, 2: 0x10-0x24-0x38, 0x14-0x34
|
|
edges: 1, 3, 2: 0x10-0x23-0x36, 0x14-0x32
|
|
edges: 1, 3, 2: 0x13-0x24-0x35, 0x17-0x31
|
|
edges: 1, 3, 2: 0x10-0x23-0x36, 0x14-0x32
|
|
edges: 1, 3, 2: 0x15-0x27-0x39, 0x19-0x35
|
|
using pattern 2
|
|
edges: 1, 3, 2: 0x11-0x24-0x37, 0x15-0x33
|
|
edges: 1, 3, 2: 0x10-0x22-0x34, 0x14-0x30
|
|
edges: 1, 3, 2: 0x0f-0x21-0x33, 0x13-0x2f
|
|
edges: 1, 3, 2: 0x10-0x24-0x39, 0x14-0x35
|
|
edges: 1, 3, 2: 0x10-0x22-0x35, 0x14-0x31
|
|
edges: 1, 3, 2: 0x13-0x24-0x36, 0x17-0x32
|
|
edges: 1, 3, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 3, 2: 0x15-0x27-0x39, 0x19-0x35
|
|
using pattern 3
|
|
edges: 1, 3, 2: 0x11-0x25-0x39, 0x15-0x35
|
|
edges: 1, 3, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 3, 2: 0x0f-0x23-0x38, 0x13-0x34
|
|
edges: 1, 3, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
edges: 1, 3, 2: 0x11-0x24-0x38, 0x15-0x34
|
|
edges: 1, 3, 2: 0x13-0x24-0x36, 0x17-0x32
|
|
edges: 1, 3, 2: 0x10-0x21-0x32, 0x14-0x2e
|
|
edges: 1, 3, 2: 0x15-0x27-0x39, 0x19-0x35
|
|
CPA
|
|
discover timC write:
|
|
timC: 1, 0, 0: 0x17-0x2d-0x43, 0x22-0x38
|
|
timC: 1, 0, 0: 0x10-0x27-0x3e, 0x1b-0x33
|
|
timC: 1, 0, 0: 0x2e-0x45-0x5c, 0x39-0x51
|
|
timC: 1, 0, 0: 0x37-0x4f-0x67, 0x42-0x5c
|
|
timC: 1, 0, 0: 0x38-0x50-0x69, 0x43-0x5e
|
|
timC: 1, 0, 0: 0x3a-0x53-0x6c, 0x45-0x61
|
|
timC: 1, 0, 0: 0x1a-0x33-0x4c, 0x25-0x41
|
|
timC: 1, 0, 0: 0x08-0x20-0x38, 0x13-0x2d
|
|
timC: 1, 1, 0: 0x17-0x2d-0x44, 0x22-0x39
|
|
timC: 1, 1, 0: 0x11-0x28-0x3f, 0x1c-0x34
|
|
timC: 1, 1, 0: 0x2d-0x45-0x5e, 0x38-0x53
|
|
timC: 1, 1, 0: 0x39-0x51-0x69, 0x44-0x5e
|
|
timC: 1, 1, 0: 0x37-0x50-0x69, 0x42-0x5e
|
|
timC: 1, 1, 0: 0x39-0x51-0x6a, 0x44-0x5f
|
|
timC: 1, 1, 0: 0x1b-0x32-0x49, 0x26-0x3e
|
|
timC: 1, 1, 0: 0x07-0x1e-0x36, 0x12-0x2b
|
|
timC: 1, 2, 0: 0x11-0x28-0x3f, 0x1c-0x34
|
|
timC: 1, 2, 0: 0x0b-0x22-0x39, 0x16-0x2e
|
|
timC: 1, 2, 0: 0x27-0x3e-0x55, 0x32-0x4a
|
|
timC: 1, 2, 0: 0x2d-0x45-0x5d, 0x38-0x52
|
|
timC: 1, 2, 0: 0x2a-0x42-0x5a, 0x35-0x4f
|
|
timC: 1, 2, 0: 0x39-0x50-0x68, 0x44-0x5d
|
|
timC: 1, 2, 0: 0x13-0x29-0x3f, 0x1e-0x34
|
|
timC: 1, 2, 0: 0x09-0x1f-0x36, 0x14-0x2b
|
|
timC: 1, 3, 0: 0x10-0x27-0x3e, 0x1b-0x33
|
|
timC: 1, 3, 0: 0x12-0x28-0x3e, 0x1d-0x33
|
|
timC: 1, 3, 0: 0x29-0x40-0x57, 0x34-0x4c
|
|
timC: 1, 3, 0: 0x30-0x48-0x60, 0x3b-0x55
|
|
timC: 1, 3, 0: 0x2e-0x44-0x5b, 0x39-0x50
|
|
timC: 1, 3, 0: 0x32-0x49-0x60, 0x3d-0x55
|
|
timC: 1, 3, 0: 0x0f-0x26-0x3d, 0x1a-0x32
|
|
timC: 1, 3, 0: 0x40-0x55-0x6a, 0x4b-0x5f
|
|
timC: 1, 0, 0: 0x14-0x2b-0x43, 0x1f-0x38
|
|
timC: 1, 0, 0: 0x0f-0x26-0x3e, 0x1a-0x33
|
|
timC: 1, 0, 0: 0x2f-0x45-0x5c, 0x3a-0x51
|
|
timC: 1, 0, 0: 0x35-0x4e-0x67, 0x40-0x5c
|
|
timC: 1, 0, 0: 0x39-0x50-0x68, 0x44-0x5d
|
|
timC: 1, 0, 0: 0x38-0x52-0x6c, 0x43-0x61
|
|
timC: 1, 0, 0: 0x1a-0x33-0x4c, 0x25-0x41
|
|
timC: 1, 0, 0: 0x08-0x1f-0x37, 0x13-0x2c
|
|
timC: 1, 1, 0: 0x15-0x2c-0x44, 0x20-0x39
|
|
timC: 1, 1, 0: 0x0e-0x26-0x3f, 0x19-0x34
|
|
timC: 1, 1, 0: 0x2e-0x46-0x5e, 0x39-0x53
|
|
timC: 1, 1, 0: 0x37-0x4f-0x68, 0x42-0x5d
|
|
timC: 1, 1, 0: 0x38-0x51-0x6a, 0x43-0x5f
|
|
timC: 1, 1, 0: 0x38-0x51-0x6a, 0x43-0x5f
|
|
timC: 1, 1, 0: 0x1a-0x31-0x49, 0x25-0x3e
|
|
timC: 1, 1, 0: 0x07-0x1e-0x36, 0x12-0x2b
|
|
timC: 1, 2, 0: 0x14-0x29-0x3f, 0x1f-0x34
|
|
timC: 1, 2, 0: 0x0d-0x23-0x39, 0x18-0x2e
|
|
timC: 1, 2, 0: 0x2a-0x3f-0x55, 0x35-0x4a
|
|
timC: 1, 2, 0: 0x2b-0x44-0x5d, 0x36-0x52
|
|
timC: 1, 2, 0: 0x2a-0x42-0x5b, 0x35-0x50
|
|
timC: 1, 2, 0: 0x37-0x51-0x6b, 0x42-0x60
|
|
timC: 1, 2, 0: 0x12-0x28-0x3e, 0x1d-0x33
|
|
timC: 1, 2, 0: 0x07-0x1e-0x35, 0x12-0x2a
|
|
timC: 1, 3, 0: 0x11-0x27-0x3e, 0x1c-0x33
|
|
timC: 1, 3, 0: 0x12-0x28-0x3e, 0x1d-0x33
|
|
timC: 1, 3, 0: 0x2d-0x42-0x57, 0x38-0x4c
|
|
timC: 1, 3, 0: 0x2f-0x47-0x60, 0x3a-0x55
|
|
timC: 1, 3, 0: 0x2b-0x43-0x5b, 0x36-0x50
|
|
timC: 1, 3, 0: 0x30-0x49-0x62, 0x3b-0x57
|
|
timC: 1, 3, 0: 0x0f-0x25-0x3c, 0x1a-0x31
|
|
timC: 1, 3, 0: 0x3c-0x53-0x6b, 0x47-0x60
|
|
timC: 1, 0, 0: 0x13-0x2c-0x45, 0x1e-0x3a
|
|
timC: 1, 0, 0: 0x0f-0x27-0x3f, 0x1a-0x34
|
|
timC: 1, 0, 0: 0x2d-0x44-0x5c, 0x38-0x51
|
|
timC: 1, 0, 0: 0x36-0x4e-0x67, 0x41-0x5c
|
|
timC: 1, 0, 0: 0x38-0x50-0x68, 0x43-0x5d
|
|
timC: 1, 0, 0: 0x38-0x52-0x6c, 0x43-0x61
|
|
timC: 1, 0, 0: 0x19-0x33-0x4d, 0x24-0x42
|
|
timC: 1, 0, 0: 0x07-0x1f-0x38, 0x12-0x2d
|
|
timC: 1, 1, 0: 0x15-0x2d-0x45, 0x20-0x3a
|
|
timC: 1, 1, 0: 0x0e-0x26-0x3f, 0x19-0x34
|
|
timC: 1, 1, 0: 0x2b-0x44-0x5e, 0x36-0x53
|
|
timC: 1, 1, 0: 0x37-0x50-0x69, 0x42-0x5e
|
|
timC: 1, 1, 0: 0x37-0x50-0x69, 0x42-0x5e
|
|
timC: 1, 1, 0: 0x38-0x51-0x6b, 0x43-0x60
|
|
timC: 1, 1, 0: 0x18-0x31-0x4a, 0x23-0x3f
|
|
timC: 1, 1, 0: 0x06-0x1e-0x37, 0x11-0x2c
|
|
timC: 1, 2, 0: 0x11-0x28-0x3f, 0x1c-0x34
|
|
timC: 1, 2, 0: 0x0e-0x23-0x39, 0x19-0x2e
|
|
timC: 1, 2, 0: 0x28-0x3e-0x55, 0x33-0x4a
|
|
timC: 1, 2, 0: 0x29-0x43-0x5d, 0x34-0x52
|
|
timC: 1, 2, 0: 0x2a-0x42-0x5b, 0x35-0x50
|
|
timC: 1, 2, 0: 0x37-0x50-0x6a, 0x42-0x5f
|
|
timC: 1, 2, 0: 0x10-0x27-0x3f, 0x1b-0x34
|
|
timC: 1, 2, 0: 0x0a-0x1f-0x35, 0x15-0x2a
|
|
timC: 1, 3, 0: 0x0f-0x26-0x3e, 0x1a-0x33
|
|
timC: 1, 3, 0: 0x14-0x29-0x3f, 0x1f-0x34
|
|
timC: 1, 3, 0: 0x29-0x40-0x57, 0x34-0x4c
|
|
timC: 1, 3, 0: 0x2f-0x47-0x60, 0x3a-0x55
|
|
timC: 1, 3, 0: 0x2c-0x44-0x5c, 0x37-0x51
|
|
timC: 1, 3, 0: 0x31-0x49-0x61, 0x3c-0x56
|
|
timC: 1, 3, 0: 0x0f-0x26-0x3d, 0x1a-0x32
|
|
timC: 1, 3, 0: 0x3c-0x53-0x6b, 0x47-0x60
|
|
timC: 1, 0, 0: 0x15-0x2c-0x44, 0x20-0x39
|
|
timC: 1, 0, 0: 0x12-0x28-0x3e, 0x1d-0x33
|
|
timC: 1, 0, 0: 0x2f-0x45-0x5c, 0x3a-0x51
|
|
timC: 1, 0, 0: 0x34-0x4d-0x67, 0x3f-0x5c
|
|
timC: 1, 0, 0: 0x38-0x50-0x68, 0x43-0x5d
|
|
timC: 1, 0, 0: 0x38-0x51-0x6b, 0x43-0x60
|
|
timC: 1, 0, 0: 0x19-0x32-0x4c, 0x24-0x41
|
|
timC: 1, 0, 0: 0x08-0x20-0x38, 0x13-0x2d
|
|
timC: 1, 1, 0: 0x17-0x2e-0x45, 0x22-0x3a
|
|
timC: 1, 1, 0: 0x11-0x28-0x3f, 0x1c-0x34
|
|
timC: 1, 1, 0: 0x2e-0x46-0x5e, 0x39-0x53
|
|
timC: 1, 1, 0: 0x37-0x50-0x69, 0x42-0x5e
|
|
timC: 1, 1, 0: 0x36-0x4f-0x69, 0x41-0x5e
|
|
timC: 1, 1, 0: 0x37-0x50-0x6a, 0x42-0x5f
|
|
timC: 1, 1, 0: 0x18-0x30-0x48, 0x23-0x3d
|
|
timC: 1, 1, 0: 0x06-0x1e-0x37, 0x11-0x2c
|
|
timC: 1, 2, 0: 0x0f-0x27-0x40, 0x1a-0x35
|
|
timC: 1, 2, 0: 0x0d-0x23-0x3a, 0x18-0x2f
|
|
timC: 1, 2, 0: 0x26-0x3d-0x55, 0x31-0x4a
|
|
timC: 1, 2, 0: 0x2a-0x43-0x5d, 0x35-0x52
|
|
timC: 1, 2, 0: 0x2d-0x44-0x5c, 0x38-0x51
|
|
timC: 1, 2, 0: 0x39-0x51-0x6a, 0x44-0x5f
|
|
timC: 1, 2, 0: 0x16-0x2b-0x40, 0x21-0x35
|
|
timC: 1, 2, 0: 0x07-0x1e-0x35, 0x12-0x2a
|
|
timC: 1, 3, 0: 0x0f-0x27-0x3f, 0x1a-0x34
|
|
timC: 1, 3, 0: 0x10-0x27-0x3f, 0x1b-0x34
|
|
timC: 1, 3, 0: 0x28-0x3f-0x57, 0x33-0x4c
|
|
timC: 1, 3, 0: 0x2d-0x46-0x60, 0x38-0x55
|
|
timC: 1, 3, 0: 0x2f-0x46-0x5e, 0x3a-0x53
|
|
timC: 1, 3, 0: 0x31-0x49-0x61, 0x3c-0x56
|
|
timC: 1, 3, 0: 0x10-0x26-0x3d, 0x1b-0x32
|
|
timC: 1, 3, 0: 0x3e-0x55-0x6c, 0x49-0x61
|
|
timC: 1, 0, 1: 0x18-0x2b-0x3f, 0x1c-0x3b
|
|
timC: 1, 0, 1: 0x10-0x24-0x39, 0x14-0x35
|
|
timC: 1, 0, 1: 0x30-0x44-0x58, 0x34-0x54
|
|
timC: 1, 0, 1: 0x38-0x4f-0x66, 0x3c-0x62
|
|
timC: 1, 0, 1: 0x3c-0x50-0x64, 0x40-0x60
|
|
timC: 1, 0, 1: 0x3d-0x52-0x68, 0x41-0x64
|
|
timC: 1, 0, 1: 0x1c-0x31-0x46, 0x20-0x42
|
|
timC: 1, 0, 1: 0x08-0x1d-0x32, 0x0c-0x2e
|
|
timC: 1, 1, 1: 0x1a-0x2c-0x3f, 0x1e-0x3b
|
|
timC: 1, 1, 1: 0x13-0x26-0x39, 0x17-0x35
|
|
timC: 1, 1, 1: 0x2f-0x43-0x57, 0x33-0x53
|
|
timC: 1, 1, 1: 0x3a-0x4f-0x65, 0x3e-0x61
|
|
timC: 1, 1, 1: 0x3a-0x4f-0x65, 0x3e-0x61
|
|
timC: 1, 1, 1: 0x3d-0x51-0x66, 0x41-0x62
|
|
timC: 1, 1, 1: 0x1e-0x30-0x43, 0x22-0x3f
|
|
timC: 1, 1, 1: 0x0a-0x1d-0x31, 0x0e-0x2d
|
|
timC: 1, 2, 1: 0x16-0x29-0x3c, 0x1a-0x38
|
|
timC: 1, 2, 1: 0x10-0x23-0x36, 0x14-0x32
|
|
timC: 1, 2, 1: 0x2c-0x3d-0x4f, 0x30-0x4b
|
|
timC: 1, 2, 1: 0x30-0x44-0x59, 0x34-0x55
|
|
timC: 1, 2, 1: 0x2f-0x42-0x56, 0x33-0x52
|
|
timC: 1, 2, 1: 0x3e-0x51-0x65, 0x42-0x61
|
|
timC: 1, 2, 1: 0x17-0x29-0x3c, 0x1b-0x38
|
|
timC: 1, 2, 1: 0x0e-0x1f-0x30, 0x12-0x2c
|
|
timC: 1, 3, 1: 0x14-0x26-0x38, 0x18-0x34
|
|
timC: 1, 3, 1: 0x17-0x27-0x38, 0x1b-0x34
|
|
timC: 1, 3, 1: 0x2e-0x3f-0x51, 0x32-0x4d
|
|
timC: 1, 3, 1: 0x34-0x49-0x5e, 0x38-0x5a
|
|
timC: 1, 3, 1: 0x31-0x44-0x57, 0x35-0x53
|
|
timC: 1, 3, 1: 0x37-0x49-0x5c, 0x3b-0x58
|
|
timC: 1, 3, 1: 0x12-0x25-0x39, 0x16-0x35
|
|
timC: 1, 3, 1: 0x42-0x53-0x65, 0x46-0x61
|
|
timC: 1, 0, 1: 0x16-0x2a-0x3f, 0x1a-0x3b
|
|
timC: 1, 0, 1: 0x12-0x25-0x39, 0x16-0x35
|
|
timC: 1, 0, 1: 0x30-0x44-0x58, 0x34-0x54
|
|
timC: 1, 0, 1: 0x38-0x4d-0x63, 0x3c-0x5f
|
|
timC: 1, 0, 1: 0x3b-0x50-0x65, 0x3f-0x61
|
|
timC: 1, 0, 1: 0x3b-0x51-0x67, 0x3f-0x63
|
|
timC: 1, 0, 1: 0x1e-0x32-0x46, 0x22-0x42
|
|
timC: 1, 0, 1: 0x0a-0x1d-0x31, 0x0e-0x2d
|
|
timC: 1, 1, 1: 0x17-0x2b-0x3f, 0x1b-0x3b
|
|
timC: 1, 1, 1: 0x12-0x25-0x39, 0x16-0x35
|
|
timC: 1, 1, 1: 0x2f-0x43-0x57, 0x33-0x53
|
|
timC: 1, 1, 1: 0x39-0x4f-0x65, 0x3d-0x61
|
|
timC: 1, 1, 1: 0x3a-0x50-0x66, 0x3e-0x62
|
|
timC: 1, 1, 1: 0x3b-0x50-0x66, 0x3f-0x62
|
|
timC: 1, 1, 1: 0x1d-0x30-0x43, 0x21-0x3f
|
|
timC: 1, 1, 1: 0x09-0x1d-0x31, 0x0d-0x2d
|
|
timC: 1, 2, 1: 0x18-0x2a-0x3c, 0x1c-0x38
|
|
timC: 1, 2, 1: 0x11-0x23-0x36, 0x15-0x32
|
|
timC: 1, 2, 1: 0x2e-0x3e-0x4f, 0x32-0x4b
|
|
timC: 1, 2, 1: 0x2f-0x44-0x59, 0x33-0x55
|
|
timC: 1, 2, 1: 0x2e-0x42-0x56, 0x32-0x52
|
|
timC: 1, 2, 1: 0x3d-0x51-0x66, 0x41-0x62
|
|
timC: 1, 2, 1: 0x17-0x29-0x3c, 0x1b-0x38
|
|
timC: 1, 2, 1: 0x0c-0x1e-0x30, 0x10-0x2c
|
|
timC: 1, 3, 1: 0x16-0x27-0x38, 0x1a-0x34
|
|
timC: 1, 3, 1: 0x17-0x28-0x39, 0x1b-0x35
|
|
timC: 1, 3, 1: 0x30-0x40-0x51, 0x34-0x4d
|
|
timC: 1, 3, 1: 0x33-0x48-0x5e, 0x37-0x5a
|
|
timC: 1, 3, 1: 0x30-0x43-0x57, 0x34-0x53
|
|
timC: 1, 3, 1: 0x35-0x49-0x5e, 0x39-0x5a
|
|
timC: 1, 3, 1: 0x11-0x24-0x38, 0x15-0x34
|
|
timC: 1, 3, 1: 0x40-0x53-0x66, 0x44-0x62
|
|
timC: 1, 0, 1: 0x17-0x2b-0x40, 0x1b-0x3c
|
|
timC: 1, 0, 1: 0x12-0x25-0x39, 0x16-0x35
|
|
timC: 1, 0, 1: 0x2f-0x44-0x59, 0x33-0x55
|
|
timC: 1, 0, 1: 0x37-0x4e-0x66, 0x3b-0x62
|
|
timC: 1, 0, 1: 0x3b-0x50-0x65, 0x3f-0x61
|
|
timC: 1, 0, 1: 0x3b-0x51-0x68, 0x3f-0x64
|
|
timC: 1, 0, 1: 0x1c-0x31-0x47, 0x20-0x43
|
|
timC: 1, 0, 1: 0x09-0x1d-0x32, 0x0d-0x2e
|
|
timC: 1, 1, 1: 0x18-0x2b-0x3f, 0x1c-0x3b
|
|
timC: 1, 1, 1: 0x11-0x25-0x3a, 0x15-0x36
|
|
timC: 1, 1, 1: 0x2f-0x44-0x59, 0x33-0x55
|
|
timC: 1, 1, 1: 0x38-0x4e-0x65, 0x3c-0x61
|
|
timC: 1, 1, 1: 0x3a-0x4f-0x65, 0x3e-0x61
|
|
timC: 1, 1, 1: 0x3a-0x50-0x66, 0x3e-0x62
|
|
timC: 1, 1, 1: 0x1c-0x30-0x44, 0x20-0x40
|
|
timC: 1, 1, 1: 0x08-0x1c-0x31, 0x0c-0x2d
|
|
timC: 1, 2, 1: 0x16-0x29-0x3c, 0x1a-0x38
|
|
timC: 1, 2, 1: 0x12-0x24-0x36, 0x16-0x32
|
|
timC: 1, 2, 1: 0x2d-0x3e-0x4f, 0x31-0x4b
|
|
timC: 1, 2, 1: 0x2e-0x44-0x5a, 0x32-0x56
|
|
timC: 1, 2, 1: 0x2e-0x42-0x57, 0x32-0x53
|
|
timC: 1, 2, 1: 0x3d-0x51-0x66, 0x41-0x62
|
|
timC: 1, 2, 1: 0x16-0x29-0x3c, 0x1a-0x38
|
|
timC: 1, 2, 1: 0x0e-0x1f-0x30, 0x12-0x2c
|
|
timC: 1, 3, 1: 0x13-0x25-0x38, 0x17-0x34
|
|
timC: 1, 3, 1: 0x18-0x28-0x39, 0x1c-0x35
|
|
timC: 1, 3, 1: 0x2e-0x40-0x52, 0x32-0x4e
|
|
timC: 1, 3, 1: 0x32-0x48-0x5e, 0x36-0x5a
|
|
timC: 1, 3, 1: 0x30-0x43-0x57, 0x34-0x53
|
|
timC: 1, 3, 1: 0x35-0x49-0x5e, 0x39-0x5a
|
|
timC: 1, 3, 1: 0x11-0x25-0x39, 0x15-0x35
|
|
timC: 1, 3, 1: 0x40-0x53-0x66, 0x44-0x62
|
|
timC: 1, 0, 1: 0x19-0x2c-0x3f, 0x1d-0x3b
|
|
timC: 1, 0, 1: 0x14-0x26-0x39, 0x18-0x35
|
|
timC: 1, 0, 1: 0x30-0x44-0x59, 0x34-0x55
|
|
timC: 1, 0, 1: 0x37-0x4e-0x66, 0x3b-0x62
|
|
timC: 1, 0, 1: 0x3c-0x51-0x66, 0x40-0x62
|
|
timC: 1, 0, 1: 0x3b-0x51-0x67, 0x3f-0x63
|
|
timC: 1, 0, 1: 0x1d-0x32-0x47, 0x21-0x43
|
|
timC: 1, 0, 1: 0x0d-0x1f-0x32, 0x11-0x2e
|
|
timC: 1, 1, 1: 0x1a-0x2c-0x3f, 0x1e-0x3b
|
|
timC: 1, 1, 1: 0x15-0x27-0x3a, 0x19-0x36
|
|
timC: 1, 1, 1: 0x30-0x44-0x58, 0x34-0x54
|
|
timC: 1, 1, 1: 0x37-0x4e-0x65, 0x3b-0x61
|
|
timC: 1, 1, 1: 0x3a-0x4f-0x65, 0x3e-0x61
|
|
timC: 1, 1, 1: 0x3a-0x50-0x66, 0x3e-0x62
|
|
timC: 1, 1, 1: 0x1c-0x30-0x44, 0x20-0x40
|
|
timC: 1, 1, 1: 0x09-0x1d-0x31, 0x0d-0x2d
|
|
timC: 1, 2, 1: 0x15-0x29-0x3d, 0x19-0x39
|
|
timC: 1, 2, 1: 0x10-0x23-0x36, 0x14-0x32
|
|
timC: 1, 2, 1: 0x2a-0x3d-0x50, 0x2e-0x4c
|
|
timC: 1, 2, 1: 0x2e-0x44-0x5a, 0x32-0x56
|
|
timC: 1, 2, 1: 0x2f-0x43-0x58, 0x33-0x54
|
|
timC: 1, 2, 1: 0x3e-0x51-0x65, 0x42-0x61
|
|
timC: 1, 2, 1: 0x1a-0x2b-0x3d, 0x1e-0x39
|
|
timC: 1, 2, 1: 0x0c-0x1e-0x30, 0x10-0x2c
|
|
timC: 1, 3, 1: 0x12-0x25-0x39, 0x16-0x35
|
|
timC: 1, 3, 1: 0x14-0x26-0x39, 0x18-0x35
|
|
timC: 1, 3, 1: 0x2c-0x3f-0x53, 0x30-0x4f
|
|
timC: 1, 3, 1: 0x31-0x47-0x5e, 0x35-0x5a
|
|
timC: 1, 3, 1: 0x31-0x45-0x59, 0x35-0x55
|
|
timC: 1, 3, 1: 0x37-0x4a-0x5d, 0x3b-0x59
|
|
timC: 1, 3, 1: 0x14-0x26-0x39, 0x18-0x35
|
|
timC: 1, 3, 1: 0x41-0x53-0x66, 0x45-0x62
|
|
timC: 1, 0, 2: 0x18-0x2b-0x3f, 0x1c-0x3b
|
|
timC: 1, 0, 2: 0x10-0x24-0x38, 0x14-0x34
|
|
timC: 1, 0, 2: 0x31-0x44-0x57, 0x35-0x53
|
|
timC: 1, 0, 2: 0x3a-0x4d-0x61, 0x3e-0x5d
|
|
timC: 1, 0, 2: 0x3c-0x4f-0x63, 0x40-0x5f
|
|
timC: 1, 0, 2: 0x3f-0x52-0x66, 0x43-0x62
|
|
timC: 1, 0, 2: 0x1e-0x32-0x47, 0x22-0x43
|
|
timC: 1, 0, 2: 0x08-0x1d-0x32, 0x0c-0x2e
|
|
timC: 1, 1, 2: 0x1c-0x2d-0x3e, 0x20-0x3a
|
|
timC: 1, 1, 2: 0x17-0x27-0x38, 0x1b-0x34
|
|
timC: 1, 1, 2: 0x30-0x43-0x57, 0x34-0x53
|
|
timC: 1, 1, 2: 0x3e-0x50-0x63, 0x42-0x5f
|
|
timC: 1, 1, 2: 0x3d-0x50-0x64, 0x41-0x60
|
|
timC: 1, 1, 2: 0x3f-0x52-0x65, 0x43-0x61
|
|
timC: 1, 1, 2: 0x1f-0x31-0x43, 0x23-0x3f
|
|
timC: 1, 1, 2: 0x0c-0x1d-0x2f, 0x10-0x2b
|
|
timC: 1, 2, 2: 0x13-0x26-0x3a, 0x17-0x36
|
|
timC: 1, 2, 2: 0x0e-0x21-0x35, 0x12-0x31
|
|
timC: 1, 2, 2: 0x29-0x3b-0x4e, 0x2d-0x4a
|
|
timC: 1, 2, 2: 0x2e-0x42-0x57, 0x32-0x53
|
|
timC: 1, 2, 2: 0x2d-0x41-0x55, 0x31-0x51
|
|
timC: 1, 2, 2: 0x3d-0x51-0x65, 0x41-0x61
|
|
timC: 1, 2, 2: 0x14-0x28-0x3c, 0x18-0x38
|
|
timC: 1, 2, 2: 0x0b-0x1e-0x31, 0x0f-0x2d
|
|
timC: 1, 3, 2: 0x10-0x23-0x37, 0x14-0x33
|
|
timC: 1, 3, 2: 0x12-0x25-0x38, 0x16-0x34
|
|
timC: 1, 3, 2: 0x2b-0x3e-0x51, 0x2f-0x4d
|
|
timC: 1, 3, 2: 0x31-0x46-0x5c, 0x35-0x58
|
|
timC: 1, 3, 2: 0x2f-0x43-0x58, 0x33-0x54
|
|
timC: 1, 3, 2: 0x36-0x49-0x5c, 0x3a-0x58
|
|
timC: 1, 3, 2: 0x10-0x24-0x39, 0x14-0x35
|
|
timC: 1, 3, 2: 0x40-0x53-0x66, 0x44-0x62
|
|
timC: 1, 0, 2: 0x18-0x2b-0x3e, 0x1c-0x3a
|
|
timC: 1, 0, 2: 0x13-0x25-0x38, 0x17-0x34
|
|
timC: 1, 0, 2: 0x33-0x45-0x57, 0x37-0x53
|
|
timC: 1, 0, 2: 0x39-0x4d-0x61, 0x3d-0x5d
|
|
timC: 1, 0, 2: 0x3e-0x50-0x62, 0x42-0x5e
|
|
timC: 1, 0, 2: 0x3e-0x52-0x66, 0x42-0x62
|
|
timC: 1, 0, 2: 0x20-0x33-0x47, 0x24-0x43
|
|
timC: 1, 0, 2: 0x0f-0x1f-0x30, 0x13-0x2c
|
|
timC: 1, 1, 2: 0x1a-0x2c-0x3e, 0x1e-0x3a
|
|
timC: 1, 1, 2: 0x13-0x26-0x39, 0x17-0x35
|
|
timC: 1, 1, 2: 0x31-0x44-0x57, 0x35-0x53
|
|
timC: 1, 1, 2: 0x3c-0x4f-0x63, 0x40-0x5f
|
|
timC: 1, 1, 2: 0x3e-0x51-0x65, 0x42-0x61
|
|
timC: 1, 1, 2: 0x3d-0x51-0x65, 0x41-0x61
|
|
timC: 1, 1, 2: 0x1f-0x31-0x43, 0x23-0x3f
|
|
timC: 1, 1, 2: 0x0c-0x1d-0x2f, 0x10-0x2b
|
|
timC: 1, 2, 2: 0x15-0x27-0x3a, 0x19-0x36
|
|
timC: 1, 2, 2: 0x0d-0x20-0x34, 0x11-0x30
|
|
timC: 1, 2, 2: 0x2c-0x3d-0x4e, 0x30-0x4a
|
|
timC: 1, 2, 2: 0x2b-0x41-0x57, 0x2f-0x53
|
|
timC: 1, 2, 2: 0x2d-0x41-0x55, 0x31-0x51
|
|
timC: 1, 2, 2: 0x39-0x4f-0x66, 0x3d-0x62
|
|
timC: 1, 2, 2: 0x13-0x28-0x3d, 0x17-0x39
|
|
timC: 1, 2, 2: 0x07-0x1b-0x30, 0x0b-0x2c
|
|
timC: 1, 3, 2: 0x11-0x24-0x37, 0x15-0x33
|
|
timC: 1, 3, 2: 0x12-0x25-0x39, 0x16-0x35
|
|
timC: 1, 3, 2: 0x2d-0x3f-0x51, 0x31-0x4d
|
|
timC: 1, 3, 2: 0x30-0x46-0x5c, 0x34-0x58
|
|
timC: 1, 3, 2: 0x2f-0x43-0x58, 0x33-0x54
|
|
timC: 1, 3, 2: 0x32-0x48-0x5e, 0x36-0x5a
|
|
timC: 1, 3, 2: 0x10-0x24-0x39, 0x14-0x35
|
|
timC: 1, 3, 2: 0x3f-0x52-0x65, 0x43-0x61
|
|
timC: 1, 0, 2: 0x18-0x2b-0x3f, 0x1c-0x3b
|
|
timC: 1, 0, 2: 0x13-0x25-0x38, 0x17-0x34
|
|
timC: 1, 0, 2: 0x31-0x44-0x57, 0x35-0x53
|
|
timC: 1, 0, 2: 0x3a-0x4d-0x61, 0x3e-0x5d
|
|
timC: 1, 0, 2: 0x3d-0x50-0x63, 0x41-0x5f
|
|
timC: 1, 0, 2: 0x3c-0x51-0x66, 0x40-0x62
|
|
timC: 1, 0, 2: 0x1f-0x33-0x47, 0x23-0x43
|
|
timC: 1, 0, 2: 0x0b-0x1d-0x30, 0x0f-0x2c
|
|
timC: 1, 1, 2: 0x19-0x2c-0x3f, 0x1d-0x3b
|
|
timC: 1, 1, 2: 0x12-0x25-0x39, 0x16-0x35
|
|
timC: 1, 1, 2: 0x2f-0x43-0x57, 0x33-0x53
|
|
timC: 1, 1, 2: 0x3c-0x4f-0x63, 0x40-0x5f
|
|
timC: 1, 1, 2: 0x3d-0x50-0x64, 0x41-0x60
|
|
timC: 1, 1, 2: 0x3d-0x51-0x65, 0x41-0x61
|
|
timC: 1, 1, 2: 0x1e-0x31-0x44, 0x22-0x40
|
|
timC: 1, 1, 2: 0x0b-0x1d-0x2f, 0x0f-0x2b
|
|
timC: 1, 2, 2: 0x11-0x26-0x3c, 0x15-0x38
|
|
timC: 1, 2, 2: 0x10-0x22-0x34, 0x14-0x30
|
|
timC: 1, 2, 2: 0x29-0x3b-0x4e, 0x2d-0x4a
|
|
timC: 1, 2, 2: 0x2c-0x42-0x58, 0x30-0x54
|
|
timC: 1, 2, 2: 0x2d-0x41-0x55, 0x31-0x51
|
|
timC: 1, 2, 2: 0x3b-0x50-0x66, 0x3f-0x62
|
|
timC: 1, 2, 2: 0x12-0x27-0x3d, 0x16-0x39
|
|
timC: 1, 2, 2: 0x09-0x1c-0x30, 0x0d-0x2c
|
|
timC: 1, 3, 2: 0x10-0x24-0x39, 0x14-0x35
|
|
timC: 1, 3, 2: 0x15-0x27-0x39, 0x19-0x35
|
|
timC: 1, 3, 2: 0x2b-0x3e-0x52, 0x2f-0x4e
|
|
timC: 1, 3, 2: 0x30-0x46-0x5d, 0x34-0x59
|
|
timC: 1, 3, 2: 0x2f-0x43-0x58, 0x33-0x54
|
|
timC: 1, 3, 2: 0x33-0x48-0x5e, 0x37-0x5a
|
|
timC: 1, 3, 2: 0x0f-0x24-0x3a, 0x13-0x36
|
|
timC: 1, 3, 2: 0x3f-0x52-0x66, 0x43-0x62
|
|
timC: 1, 0, 2: 0x1a-0x2c-0x3f, 0x1e-0x3b
|
|
timC: 1, 0, 2: 0x18-0x28-0x38, 0x1c-0x34
|
|
timC: 1, 0, 2: 0x33-0x45-0x57, 0x37-0x53
|
|
timC: 1, 0, 2: 0x38-0x4c-0x61, 0x3c-0x5d
|
|
timC: 1, 0, 2: 0x3d-0x50-0x63, 0x41-0x5f
|
|
timC: 1, 0, 2: 0x3e-0x52-0x66, 0x42-0x62
|
|
timC: 1, 0, 2: 0x1f-0x33-0x47, 0x23-0x43
|
|
timC: 1, 0, 2: 0x0f-0x1f-0x30, 0x13-0x2c
|
|
timC: 1, 1, 2: 0x1c-0x2d-0x3e, 0x20-0x3a
|
|
timC: 1, 1, 2: 0x17-0x27-0x38, 0x1b-0x34
|
|
timC: 1, 1, 2: 0x31-0x44-0x57, 0x35-0x53
|
|
timC: 1, 1, 2: 0x3b-0x4f-0x64, 0x3f-0x60
|
|
timC: 1, 1, 2: 0x3b-0x50-0x65, 0x3f-0x61
|
|
timC: 1, 1, 2: 0x3d-0x50-0x64, 0x41-0x60
|
|
timC: 1, 1, 2: 0x1e-0x30-0x43, 0x22-0x3f
|
|
timC: 1, 1, 2: 0x0b-0x1d-0x2f, 0x0f-0x2b
|
|
timC: 1, 2, 2: 0x10-0x25-0x3b, 0x14-0x37
|
|
timC: 1, 2, 2: 0x0c-0x20-0x35, 0x10-0x31
|
|
timC: 1, 2, 2: 0x27-0x3a-0x4e, 0x2b-0x4a
|
|
timC: 1, 2, 2: 0x2b-0x41-0x58, 0x2f-0x54
|
|
timC: 1, 2, 2: 0x2e-0x42-0x56, 0x32-0x52
|
|
timC: 1, 2, 2: 0x3d-0x51-0x66, 0x41-0x62
|
|
timC: 1, 2, 2: 0x16-0x29-0x3c, 0x1a-0x38
|
|
timC: 1, 2, 2: 0x08-0x1c-0x30, 0x0c-0x2c
|
|
timC: 1, 3, 2: 0x0f-0x23-0x38, 0x13-0x34
|
|
timC: 1, 3, 2: 0x0f-0x24-0x39, 0x13-0x35
|
|
timC: 1, 3, 2: 0x28-0x3d-0x52, 0x2c-0x4e
|
|
timC: 1, 3, 2: 0x30-0x46-0x5c, 0x34-0x58
|
|
timC: 1, 3, 2: 0x2f-0x44-0x59, 0x33-0x55
|
|
timC: 1, 3, 2: 0x34-0x49-0x5e, 0x38-0x5a
|
|
timC: 1, 3, 2: 0x10-0x24-0x39, 0x14-0x35
|
|
timC: 1, 3, 2: 0x3f-0x52-0x66, 0x43-0x62
|
|
CPB
|
|
timC 1, 0, 0: 2d
|
|
timC 1, 0, 1: 28
|
|
timC 1, 0, 2: 45
|
|
timC 1, 0, 3: 4f
|
|
timC 1, 0, 4: 50
|
|
timC 1, 0, 5: 52
|
|
timC 1, 0, 6: 33
|
|
timC 1, 0, 7: 1f
|
|
timC 1, 1, 0: 2d
|
|
timC 1, 1, 1: 28
|
|
timC 1, 1, 2: 46
|
|
timC 1, 1, 3: 50
|
|
timC 1, 1, 4: 50
|
|
timC 1, 1, 5: 51
|
|
timC 1, 1, 6: 31
|
|
timC 1, 1, 7: 1e
|
|
timC 1, 2, 0: 29
|
|
timC 1, 2, 1: 23
|
|
timC 1, 2, 2: 3f
|
|
timC 1, 2, 3: 45
|
|
timC 1, 2, 4: 43
|
|
timC 1, 2, 5: 50
|
|
timC 1, 2, 6: 2a
|
|
timC 1, 2, 7: 1f
|
|
timC 1, 3, 0: 27
|
|
timC 1, 3, 1: 29
|
|
timC 1, 3, 2: 42
|
|
timC 1, 3, 3: 48
|
|
timC 1, 3, 4: 45
|
|
timC 1, 3, 5: 49
|
|
timC 1, 3, 6: 26
|
|
timC 1, 3, 7: 55
|
|
normalize 1, 0, 8: mat 153
|
|
normalize 1, 0, 8: delta -4
|
|
normalize 1, 1, 8: mat 153
|
|
normalize 1, 1, 8: delta -4
|
|
normalize 1, 2, 8: mat 149
|
|
normalize 1, 2, 8: delta -4
|
|
normalize 1, 3, 8: mat 149
|
|
normalize 1, 3, 8: delta -4
|
|
OTHP [440c] = 690
|
|
t123: 1912, 6000, 7620
|
|
ME: FW Partition Table : OK
|
|
ME: Bringup Loader Failure : NO
|
|
ME: Firmware Init Complete : NO
|
|
ME: Manufacturing Mode : YES
|
|
ME: Boot Options Present : NO
|
|
ME: Update In Progress : NO
|
|
ME: Current Working State : Initializing
|
|
ME: Current Operation State : Bring up
|
|
ME: Current Operation Mode : Debug or Disabled by AltDisableBit
|
|
ME: Error Code : No Error
|
|
ME: Progress Phase : BUP Phase
|
|
ME: Power Management Event : Pseudo-global reset
|
|
ME: Progress Phase State : Check to see if straps say ME DISABLED
|
|
ME: Wrong mode : 2
|
|
ME: FWS2: 0x160a0140
|
|
ME: Bist in progress: 0x0
|
|
ME: ICC Status : 0x0
|
|
ME: Invoke MEBx : 0x0
|
|
ME: CPU replaced : 0x0
|
|
ME: MBP ready : 0x0
|
|
ME: MFS failure : 0x1
|
|
ME: Warm reset req : 0x0
|
|
ME: CPU repl valid : 0x1
|
|
ME: (Reserved) : 0x0
|
|
ME: FW update req : 0x0
|
|
ME: (Reserved) : 0x0
|
|
ME: Current state : 0xa
|
|
ME: Current PM event: 0x6
|
|
ME: Progress code : 0x1
|
|
PASSED! Tell ME that DRAM is ready
|
|
ME: ME is reporting as disabled, so not waiting for a response.
|
|
ME: FWS2: 0x160a0140
|
|
ME: Bist in progress: 0x0
|
|
ME: ICC Status : 0x0
|
|
ME: Invoke MEBx : 0x0
|
|
ME: CPU replaced : 0x0
|
|
ME: MBP ready : 0x0
|
|
ME: MFS failure : 0x1
|
|
ME: Warm reset req : 0x0
|
|
ME: CPU repl valid : 0x1
|
|
ME: (Reserved) : 0x0
|
|
ME: FW update req : 0x0
|
|
ME: (Reserved) : 0x0
|
|
ME: Current state : 0xa
|
|
ME: Current PM event: 0x6
|
|
ME: Progress code : 0x1
|
|
ME: Requested BIOS Action: No DID Ack received
|
|
ME: FW Partition Table : OK
|
|
ME: Bringup Loader Failure : NO
|
|
ME: Firmware Init Complete : NO
|
|
ME: Manufacturing Mode : YES
|
|
ME: Boot Options Present : NO
|
|
ME: Update In Progress : NO
|
|
ME: Current Working State : Initializing
|
|
ME: Current Operation State : Bring up
|
|
ME: Current Operation Mode : Debug or Disabled by AltDisableBit
|
|
ME: Error Code : No Error
|
|
ME: Progress Phase : BUP Phase
|
|
ME: Power Management Event : Pseudo-global reset
|
|
ME: Progress Phase State : Check to see if straps say ME DISABLED
|
|
memcfg DDR3 ref clock 133 MHz
|
|
memcfg DDR3 clock 1330 MHz
|
|
memcfg channel assignment: A: 1, B 0, C 2
|
|
memcfg channel[0] config (00000000):
|
|
ECC inactive
|
|
enhanced interleave mode off
|
|
rank interleave off
|
|
DIMMA 0 MB width x8 single rank, selected
|
|
DIMMB 0 MB width x8 single rank
|
|
memcfg channel[1] config (00662020):
|
|
ECC inactive
|
|
enhanced interleave mode on
|
|
rank interleave on
|
|
DIMMA 8192 MB width x8 dual rank, selected
|
|
DIMMB 8192 MB width x8 dual rank
|
|
CBMEM:
|
|
IMD: root @ 0x7ffff000 254 entries.
|
|
IMD: root @ 0x7fffec00 62 entries.
|
|
External stage cache:
|
|
IMD: root @ 0x803ff000 254 entries.
|
|
IMD: root @ 0x803fec00 62 entries.
|
|
CBMEM entry for DIMM info: 0x7fffe900
|
|
SMM Memory Map
|
|
SMRAM : 0x80000000 0x800000
|
|
Subregion 0: 0x80000000 0x300000
|
|
Subregion 1: 0x80300000 0x100000
|
|
Subregion 2: 0x80400000 0x400000
|
|
MTRR Range: Start=7f800000 End=80000000 (Size 800000)
|
|
MTRR Range: Start=80000000 End=80800000 (Size 800000)
|
|
MTRR Range: Start=ff800000 End=0 (Size 800000)
|
|
FMAP: area COREBOOT found @ 610200 (2031104 bytes)
|
|
CBFS: Locating 'fallback/postcar'
|
|
CBFS: Found @ offset 3df00 size 4e14
|
|
Decompressing stage fallback/postcar @ 0x7ffd1fc0 (36496 bytes)
|
|
Loading module at 0x7ffd2000 with entry 0x7ffd2000. filesize: 0x4ad0 memsize: 0x8e50
|
|
Processing 186 relocs. Offset value of 0x7dfd2000
|
|
BS: romstage times (exec / console): total (unknown) / 7246 ms
|
|
usbdebug: postcar starting...
|
|
FMAP: area COREBOOT found @ 610200 (2031104 bytes)
|
|
CBFS: Locating 'fallback/ramstage'
|
|
CBFS: Found @ offset 1cb40 size 1c5ec
|
|
Decompressing stage fallback/ramstage @ 0x7ff80fc0 (327120 bytes)
|
|
Loading module at 0x7ff81000 with entry 0x7ff81000. filesize: 0x3ad78 memsize: 0x4fd90
|
|
Processing 3941 relocs. Offset value of 0x7f181000
|
|
BS: postcar times (exec / console): total (unknown) / 23 ms
|
|
usbdebug: ramstage starting...
|
|
Normal boot
|
|
Enumerating buses...
|
|
Root Device scanning...
|
|
CPU_CLUSTER: 0 enabled
|
|
DOMAIN: 0000 enabled
|
|
DOMAIN: 0000 scanning...
|
|
PCI: pci_scan_bus for bus 00
|
|
PCI: 00:00.0 [8086/0154] enabled
|
|
PCI: Static device PCI: 00:01.0 not found, disabling it.
|
|
PCI: 00:02.0 [8086/0166] enabled
|
|
PCI: 00:04.0 [8086/0153] enabled
|
|
PCI: 00:14.0 [8086/1e31] enabled
|
|
PCI: 00:16.0 [8086/1e3a] enabled
|
|
PCI: 00:16.1: Disabling device
|
|
PCI: 00:16.2: Disabling device
|
|
PCI: Static device PCI: 00:16.3 not found, disabling it.
|
|
PCI: 00:19.0 [8086/1502] enabled
|
|
PCI: 00:1a.0 [8086/1e2d] enabled
|
|
PCI: 00:1b.0 [8086/1e20] enabled
|
|
PCH: PCIe Root Port coalescing is enabled
|
|
PCI: 00:1c.0 [8086/1e10] enabled
|
|
PCI: 00:1c.1 [8086/1e12] enabled
|
|
PCI: 00:1c.2 [8086/1e14] enabled
|
|
PCI: 00:1c.3: Disabling device
|
|
PCI: 00:1c.3 [8086/1e16] disabled
|
|
PCI: 00:1c.4: Disabling device
|
|
PCI: 00:1c.4: check set enabled
|
|
PCI: 00:1c.5: Disabling device
|
|
PCI: 00:1c.6: Disabling device
|
|
PCI: 00:1c.7: Disabling device
|
|
PCI: 00:1d.0 [8086/1e26] enabled
|
|
PCI: 00:1e.0: Disabling device
|
|
PCI: 00:1e.0 [8086/2448] disabled
|
|
PCI: 00:1f.0 [8086/1e55] enabled
|
|
PCI: 00:1f.2 [8086/1e01] enabled
|
|
PCI: 00:1f.3 [8086/1e22] enabled
|
|
PCI: 00:1f.5: Disabling device
|
|
PCI: 00:1f.5 [8086/1e09] disabled No operations
|
|
PCI: 00:1f.6: Disabling device
|
|
PCI: 00:1f.6 [8086/1e24] disabled No operations
|
|
PCI: Leftover static devices:
|
|
PCI: 00:01.0
|
|
PCI: 00:16.1
|
|
PCI: 00:16.2
|
|
PCI: 00:16.3
|
|
PCI: 00:1c.4
|
|
PCI: 00:1c.5
|
|
PCI: 00:1c.6
|
|
PCI: 00:1c.7
|
|
PCI: Check your devicetree.cb.
|
|
PCI: 00:1c.0 scanning...
|
|
PCI: pci_scan_bus for bus 01
|
|
PCI: 01:00.0 [1180/e822] enabled
|
|
PCI: 01:00.3 [1180/e832] enabled
|
|
Enabling Common Clock Configuration
|
|
ASPM: Enabled L0s and L1
|
|
PCIe: Max_Payload_Size adjusted to 128
|
|
Enabling Common Clock Configuration
|
|
ASPM: Enabled L0s and L1
|
|
PCIe: Max_Payload_Size adjusted to 128
|
|
Failed to enable LTR for dev = PCI: 01:00.0
|
|
Failed to enable LTR for dev = PCI: 01:00.3
|
|
scan_bus: bus PCI: 00:1c.0 finished in 33 msecs
|
|
PCI: 00:1c.1 scanning...
|
|
PCI: pci_scan_bus for bus 02
|
|
PCI: 02:00.0 [8086/0085] enabled
|
|
Enabling Common Clock Configuration
|
|
ASPM: Enabled L1
|
|
PCIe: Max_Payload_Size adjusted to 128
|
|
Failed to enable LTR for dev = PCI: 02:00.0
|
|
scan_bus: bus PCI: 00:1c.1 finished in 17 msecs
|
|
PCI: 00:1c.2 scanning...
|
|
PCI: pci_scan_bus for bus 03
|
|
scan_bus: bus PCI: 00:1c.2 finished in 2 msecs
|
|
PCI: 00:1f.0 scanning...
|
|
PMH7: ID 05 Revision 12
|
|
PNP: 00ff.1 enabled
|
|
PNP: 0c31.0 enabled
|
|
H8: EC Firmware ID G4HT39WW-3.22, Version 3.01B
|
|
H8: BDC installed
|
|
H8: WWAN detection not implemented. Assuming WWAN installed
|
|
PNP: 00ff.2 enabled
|
|
Hybrid graphics: Switching panel to integrated GPU.
|
|
PNP: 00ff.f disabled
|
|
scan_bus: bus PCI: 00:1f.0 finished in 24 msecs
|
|
PCI: 00:1f.3 scanning...
|
|
bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled
|
|
bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled
|
|
bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled
|
|
bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled
|
|
bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled
|
|
bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled
|
|
bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled
|
|
bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled
|
|
scan_bus: bus PCI: 00:1f.3 finished in 28 msecs
|
|
scan_bus: bus DOMAIN: 0000 finished in 253 msecs
|
|
scan_bus: bus Root Device finished in 259 msecs
|
|
done
|
|
BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 260 ms
|
|
FMAP: area RW_MRC_CACHE found @ 600000 (65536 bytes)
|
|
MRC: Checking cached data update for 'RW_MRC_CACHE'.
|
|
flash size 0xc00000 bytes
|
|
SF: Detected 00 0000 with sector size 0x100, total 0xc00000
|
|
SF size 0xc00000 does not correspond to CONFIG_ROM_SIZE 0x800000!!
|
|
MRC: no data in 'RW_MRC_CACHE'
|
|
MRC: cache data 'RW_MRC_CACHE' needs update.
|
|
SF: Successfully written 2 bytes @ 0x600000
|
|
SF: Successfully written 2 bytes @ 0x600002
|
|
SF: Successfully written 1604 bytes @ 0x600050
|
|
MRC: updated 'RW_MRC_CACHE'.
|
|
BS: BS_DEV_ENUMERATE exit times (exec / console): 18 / 40 ms
|
|
found VGA at PCI: 00:02.0
|
|
Setting up VGA for PCI: 00:02.0
|
|
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
|
|
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
|
|
Allocating resources...
|
|
Reading resources...
|
|
Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
|
|
TOUUD 0x47d600000 TOLUD 0x82a00000 TOM 0x400000000
|
|
MEBASE 0x7ffff00000
|
|
IGD decoded, subtracting 32M UMA and 2M GTT
|
|
TSEG base 0x80000000 size 8M
|
|
Available memory below 4GB: 2048M
|
|
Available memory above 4GB: 14294M
|
|
PCI: 00:1a.0 EHCI BAR hook registered
|
|
More than one caller of pci_ehci_read_resources from PCI: 00:1d.0
|
|
PNP: 00ff.1 missing read_resources
|
|
PNP: 00ff.2 missing read_resources
|
|
Done reading resources.
|
|
==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
|
|
PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
|
|
PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
|
|
PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
|
|
PCI: 01:00.3 10 * [0x0 - 0x7ff] mem
|
|
PCI: 01:00.0 10 * [0x1000 - 0x10ff] mem
|
|
PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
|
|
PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
|
PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
|
|
PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
|
|
PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done
|
|
PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
|
|
PCI: 02:00.0 10 * [0x0 - 0x1fff] mem
|
|
PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
|
|
PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
|
PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
|
|
PCI: 00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff
|
|
NONE 18 * [0x0 - 0xfff] io
|
|
PCI: 00:1c.2 io: size: 1000 align: 12 gran: 12 limit: ffff done
|
|
PCI: 00:1c.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
|
|
NONE 10 * [0x0 - 0x7fffff] mem
|
|
PCI: 00:1c.2 mem: size: 800000 align: 22 gran: 20 limit: ffffffff done
|
|
PCI: 00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
|
|
NONE 14 * [0x0 - 0x7fffff] prefmem
|
|
PCI: 00:1c.2 prefmem: size: 800000 align: 22 gran: 20 limit: ffffffff done
|
|
=== Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
|
|
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
|
|
update_constraints: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
|
|
update_constraints: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed)
|
|
update_constraints: PCI: 00:1f.0 10000300 base 000015e0 limit 000015eb io (fixed)
|
|
update_constraints: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed)
|
|
update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed)
|
|
DOMAIN: 0000: Resource ranges:
|
|
* Base: 1000, Size: 5e0, Tag: 100
|
|
* Base: 15f0, Size: 10, Tag: 100
|
|
* Base: 167c, Size: e984, Tag: 100
|
|
PCI: 00:1c.2 1c * [0x2000 - 0x2fff] limit: 2fff io
|
|
PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
|
|
PCI: 00:19.0 18 * [0x1040 - 0x105f] limit: 105f io
|
|
PCI: 00:1f.2 20 * [0x1060 - 0x107f] limit: 107f io
|
|
PCI: 00:1f.2 10 * [0x1080 - 0x1087] limit: 1087 io
|
|
PCI: 00:1f.2 18 * [0x1088 - 0x108f] limit: 108f io
|
|
PCI: 00:1f.2 14 * [0x1090 - 0x1093] limit: 1093 io
|
|
PCI: 00:1f.2 1c * [0x1094 - 0x1097] limit: 1097 io
|
|
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
|
|
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff
|
|
update_constraints: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 03 base 00000000 limit 0009ffff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 04 base 00100000 limit 7fffffff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 05 base 100000000 limit 47d5fffff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 06 base 80000000 limit 829fffff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 09 base fed90000 limit fed90fff mem (fixed)
|
|
update_constraints: PCI: 00:00.0 0a base fed91000 limit fed91fff mem (fixed)
|
|
update_constraints: PCI: 00:1f.0 10000100 base ff000000 limit ffffffff mem (fixed)
|
|
update_constraints: PCI: 00:1f.0 03 base fec00000 limit fec00fff mem (fixed)
|
|
update_constraints: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
|
|
DOMAIN: 0000: Resource ranges:
|
|
* Base: 82a00000, Size: 6d600000, Tag: 200
|
|
* Base: f4000000, Size: ac00000, Tag: 200
|
|
* Base: fec01000, Size: 13f000, Tag: 200
|
|
* Base: fed45000, Size: 4b000, Tag: 200
|
|
* Base: fed92000, Size: 26e000, Tag: 200
|
|
* Base: 47d600000, Size: b82a00000, Tag: 100200
|
|
PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
|
|
PCI: 00:1c.2 24 * [0x82c00000 - 0x833fffff] limit: 833fffff prefmem
|
|
PCI: 00:1c.2 20 * [0x83400000 - 0x83bfffff] limit: 83bfffff mem
|
|
PCI: 00:02.0 10 * [0x83c00000 - 0x83ffffff] limit: 83ffffff mem
|
|
PCI: 00:1c.0 20 * [0x82a00000 - 0x82afffff] limit: 82afffff mem
|
|
PCI: 00:1c.1 20 * [0x82b00000 - 0x82bfffff] limit: 82bfffff mem
|
|
PCI: 00:19.0 10 * [0x84000000 - 0x8401ffff] limit: 8401ffff mem
|
|
PCI: 00:14.0 10 * [0x84020000 - 0x8402ffff] limit: 8402ffff mem
|
|
PCI: 00:04.0 10 * [0x84030000 - 0x84037fff] limit: 84037fff mem
|
|
PCI: 00:1b.0 10 * [0x84038000 - 0x8403bfff] limit: 8403bfff mem
|
|
PCI: 00:19.0 14 * [0x8403c000 - 0x8403cfff] limit: 8403cfff mem
|
|
PCI: 00:1f.2 24 * [0x8403d000 - 0x8403d7ff] limit: 8403d7ff mem
|
|
PCI: 00:1a.0 10 * [0x8403e000 - 0x8403e3ff] limit: 8403e3ff mem
|
|
PCI: 00:1d.0 10 * [0x8403f000 - 0x8403f3ff] limit: 8403f3ff mem
|
|
PCI: 00:1f.3 10 * [0x84040000 - 0x840400ff] limit: 840400ff mem
|
|
PCI: 00:16.0 10 * [0x84041000 - 0x8404100f] limit: 8404100f mem
|
|
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff done
|
|
PCI: 00:1c.0 mem: base: 82a00000 size: 100000 align: 20 gran: 20 limit: 82afffff
|
|
PCI: 00:1c.0: Resource ranges:
|
|
* Base: 82a00000, Size: 100000, Tag: 200
|
|
PCI: 01:00.3 10 * [0x82a00000 - 0x82a007ff] limit: 82a007ff mem
|
|
PCI: 01:00.0 10 * [0x82a01000 - 0x82a010ff] limit: 82a010ff mem
|
|
PCI: 00:1c.0 mem: base: 82a00000 size: 100000 align: 20 gran: 20 limit: 82afffff done
|
|
PCI: 00:1c.1 mem: base: 82b00000 size: 100000 align: 20 gran: 20 limit: 82bfffff
|
|
PCI: 00:1c.1: Resource ranges:
|
|
* Base: 82b00000, Size: 100000, Tag: 200
|
|
PCI: 02:00.0 10 * [0x82b00000 - 0x82b01fff] limit: 82b01fff mem
|
|
PCI: 00:1c.1 mem: base: 82b00000 size: 100000 align: 20 gran: 20 limit: 82bfffff done
|
|
PCI: 00:1c.2 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff
|
|
PCI: 00:1c.2: Resource ranges:
|
|
* Base: 2000, Size: 1000, Tag: 100
|
|
NONE 18 * [0x2000 - 0x2fff] limit: 2fff io
|
|
PCI: 00:1c.2 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done
|
|
PCI: 00:1c.2 prefmem: base: 82c00000 size: 800000 align: 22 gran: 20 limit: 833fffff
|
|
PCI: 00:1c.2: Resource ranges:
|
|
* Base: 82c00000, Size: 800000, Tag: 1200
|
|
NONE 14 * [0x82c00000 - 0x833fffff] limit: 833fffff prefmem
|
|
PCI: 00:1c.2 prefmem: base: 82c00000 size: 800000 align: 22 gran: 20 limit: 833fffff done
|
|
PCI: 00:1c.2 mem: base: 83400000 size: 800000 align: 22 gran: 20 limit: 83bfffff
|
|
PCI: 00:1c.2: Resource ranges:
|
|
* Base: 83400000, Size: 800000, Tag: 200
|
|
NONE 10 * [0x83400000 - 0x83bfffff] limit: 83bfffff mem
|
|
PCI: 00:1c.2 mem: base: 83400000 size: 800000 align: 22 gran: 20 limit: 83bfffff done
|
|
=== Resource allocator: DOMAIN: 0000 - resource allocation complete ===
|
|
PCI: 00:02.0 10 <- [0x0083c00000 - 0x0083ffffff] size 0x00400000 gran 0x16 mem64
|
|
PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
|
|
PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
|
|
PCI: 00:04.0 10 <- [0x0084030000 - 0x0084037fff] size 0x00008000 gran 0x0f mem64
|
|
PCI: 00:14.0 10 <- [0x0084020000 - 0x008402ffff] size 0x00010000 gran 0x10 mem64
|
|
PCI: 00:16.0 10 <- [0x0084041000 - 0x008404100f] size 0x00000010 gran 0x04 mem64
|
|
PCI: 00:19.0 10 <- [0x0084000000 - 0x008401ffff] size 0x00020000 gran 0x11 mem
|
|
PCI: 00:19.0 14 <- [0x008403c000 - 0x008403cfff] size 0x00001000 gran 0x0c mem
|
|
PCI: 00:19.0 18 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io
|
|
PCI: 00:1a.0 EHCI Debug Port hook triggered
|
|
PCI: 00:1a.0 10 <- [0x008403e000 - 0x008403e3ff] size 0x00000400 gran 0x0a mem
|
|
PCI: 00:1a.0 EHCI Debug Port relocated
|
|
PCI: 00:1b.0 10 <- [0x0084038000 - 0x008403bfff] size 0x00004000 gran 0x0e mem64
|
|
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
|
|
PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
|
|
PCI: 00:1c.0 20 <- [0x0082a00000 - 0x0082afffff] size 0x00100000 gran 0x14 bus 01 mem
|
|
PCI: 01:00.0 10 <- [0x0082a01000 - 0x0082a010ff] size 0x00000100 gran 0x08 mem
|
|
PCI: 01:00.3 10 <- [0x0082a00000 - 0x0082a007ff] size 0x00000800 gran 0x0b mem
|
|
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
|
|
PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
|
|
PCI: 00:1c.1 20 <- [0x0082b00000 - 0x0082bfffff] size 0x00100000 gran 0x14 bus 02 mem
|
|
PCI: 02:00.0 10 <- [0x0082b00000 - 0x0082b01fff] size 0x00002000 gran 0x0d mem64
|
|
PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io
|
|
PCI: 00:1c.2 24 <- [0x0082c00000 - 0x00833fffff] size 0x00800000 gran 0x14 bus 03 prefmem
|
|
PCI: 00:1c.2 20 <- [0x0083400000 - 0x0083bfffff] size 0x00800000 gran 0x14 bus 03 mem
|
|
NONE missing set_resources
|
|
PCI: 00:1d.0 10 <- [0x008403f000 - 0x008403f3ff] size 0x00000400 gran 0x0a mem
|
|
PNP: 00ff.1 missing set_resources
|
|
PNP: 00ff.2 missing set_resources
|
|
PCI: 00:1f.2 10 <- [0x0000001080 - 0x0000001087] size 0x00000008 gran 0x03 io
|
|
PCI: 00:1f.2 14 <- [0x0000001090 - 0x0000001093] size 0x00000004 gran 0x02 io
|
|
PCI: 00:1f.2 18 <- [0x0000001088 - 0x000000108f] size 0x00000008 gran 0x03 io
|
|
PCI: 00:1f.2 1c <- [0x0000001094 - 0x0000001097] size 0x00000004 gran 0x02 io
|
|
PCI: 00:1f.2 20 <- [0x0000001060 - 0x000000107f] size 0x00000020 gran 0x05 io
|
|
PCI: 00:1f.2 24 <- [0x008403d000 - 0x008403d7ff] size 0x00000800 gran 0x0b mem
|
|
PCI: 00:1f.3 10 <- [0x0084040000 - 0x00840400ff] size 0x00000100 gran 0x08 mem64
|
|
Done setting resources.
|
|
Done allocating resources.
|
|
BS: BS_DEV_RESOURCES run times (exec / console): 2 / 888 ms
|
|
Enabling resources...
|
|
PCI: 00:00.0 subsystem <- 8086/0154
|
|
PCI: 00:00.0 cmd <- 06
|
|
PCI: 00:02.0 subsystem <- 17aa/21f5
|
|
PCI: 00:02.0 cmd <- 03
|
|
PCI: 00:04.0 cmd <- 02
|
|
PCI: 00:14.0 subsystem <- 8086/1e31
|
|
PCI: 00:14.0 cmd <- 102
|
|
PCI: 00:16.0 subsystem <- 8086/1e3a
|
|
PCI: 00:16.0 cmd <- 02
|
|
PCI: 00:19.0 subsystem <- 17aa/21f3
|
|
PCI: 00:19.0 cmd <- 103
|
|
PCI: 00:1a.0 subsystem <- 8086/1e2d
|
|
PCI: 00:1a.0 cmd <- 106
|
|
PCI: 00:1b.0 subsystem <- 8086/1e20
|
|
PCI: 00:1b.0 cmd <- 102
|
|
PCI: 00:1c.0 bridge ctrl <- 0013
|
|
PCI: 00:1c.0 subsystem <- 8086/1e10
|
|
PCI: 00:1c.0 cmd <- 106
|
|
PCI: 00:1c.1 bridge ctrl <- 0013
|
|
PCI: 00:1c.1 subsystem <- 8086/1e12
|
|
PCI: 00:1c.1 cmd <- 106
|
|
PCI: 00:1c.2 bridge ctrl <- 0013
|
|
PCI: 00:1c.2 subsystem <- 8086/1e14
|
|
PCI: 00:1c.2 cmd <- 107
|
|
PCI: 00:1d.0 subsystem <- 8086/1e26
|
|
PCI: 00:1d.0 cmd <- 102
|
|
PCI: 00:1f.0 subsystem <- 8086/1e55
|
|
PCI: 00:1f.0 cmd <- 107
|
|
PCI: 00:1f.2 subsystem <- 8086/1e03
|
|
PCI: 00:1f.2 cmd <- 03
|
|
PCI: 00:1f.3 subsystem <- 8086/1e22
|
|
PCI: 00:1f.3 cmd <- 103
|
|
PCI: 01:00.0 subsystem <- 1180/e822
|
|
PCI: 01:00.0 cmd <- 06
|
|
PCI: 01:00.3 cmd <- 02
|
|
PCI: 02:00.0 cmd <- 02
|
|
done.
|
|
BS: BS_DEV_ENABLE run times (exec / console): 1 / 97 ms
|
|
Found TPM ST33ZP24 by ST Microelectronics
|
|
TPM: Startup
|
|
TPM: command 0x99 returned 0x0
|
|
TPM: Asserting physical presence
|
|
TPM: command 0x4000000a returned 0x0
|
|
TPM: command 0x65 returned 0x0
|
|
TPM: flags disable=0, deactivated=0, nvlocked=1
|
|
TPM: setup succeeded
|
|
BS: BS_DEV_INIT entry times (exec / console): 61 / 9 ms
|
|
Initializing devices...
|
|
CPU_CLUSTER: 0 init
|
|
MTRR: Physical address space:
|
|
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
|
|
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
|
|
0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6
|
|
0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 0
|
|
0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
|
|
0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
|
|
0x0000000100000000 - 0x000000047d600000 size 0x37d600000 type 6
|
|
MTRR: Fixed MSR 0x250 0x0606060606060606
|
|
MTRR: Fixed MSR 0x258 0x0606060606060606
|
|
MTRR: Fixed MSR 0x259 0x0000000000000000
|
|
MTRR: Fixed MSR 0x268 0x0606060606060606
|
|
MTRR: Fixed MSR 0x269 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26a 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26b 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26c 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26d 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26e 0x0606060606060606
|
|
MTRR: Fixed MSR 0x26f 0x0606060606060606
|
|
CPU physical address size: 36 bits
|
|
MTRR: default type WB/UC MTRR counts: 4/5.
|
|
MTRR: WB selected as default type.
|
|
MTRR: 0 base 0x0000000080000000 mask 0x0000000ff0000000 type 0
|
|
MTRR: 1 base 0x0000000090000000 mask 0x0000000ff0000000 type 1
|
|
MTRR: 2 base 0x00000000a0000000 mask 0x0000000fe0000000 type 0
|
|
MTRR: 3 base 0x00000000c0000000 mask 0x0000000fc0000000 type 0
|
|
|
|
MTRR check
|
|
Fixed MTRRs : Enabled
|
|
Variable MTRRs: Enabled
|
|
|
|
CPU has 4 cores, 8 threads enabled.
|
|
Setting up SMI for CPU
|
|
Will perform SMM setup.
|
|
FMAP: area COREBOOT found @ 610200 (2031104 bytes)
|
|
CBFS: Locating 'cpu_microcode_blob.bin'
|
|
CBFS: Found @ offset 162c0 size 6800
|
|
microcode: sig=0x306a9 pf=0x10 revision=0x21
|
|
CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz.
|
|
Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
|
|
Processing 16 relocs. Offset value of 0x00030000
|
|
Attempting to start 7 APs
|
|
Waiting for 10ms after sending INIT.
|
|
Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
|
|
done.
|
|
Waiting for 2nd SIPI to complete...done.
|
|
AP: slot 2 apic_id 7.
|
|
AP: slot 3 apic_id 6.
|
|
AP: slot 5 apic_id 2.
|
|
AP: slot 4 apic_id 3.
|
|
AP: slot 7 apic_id 4.
|
|
AP: slot 6 apic_id 5.
|
|
Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
|
|
Processing 13 relocs. Offset value of 0x00038000
|
|
SMM Module: stub loaded at 0x00038000. Will call 0x7ffa12f8(0x00000000)
|
|
Installing SMM handler to 0x80000000
|
|
Loading module at 0x80010000 with entry 0x80010614. filesize: 0x1d50 memsize: 0x5da8
|
|
Processing 84 relocs. Offset value of 0x80010000
|
|
Loading module at 0x80008000 with entry 0x80008000. filesize: 0x1b8 memsize: 0x1b8
|
|
Processing 13 relocs. Offset value of 0x80008000
|
|
SMM Module: placing jmp sequence at 0x80007c00 rel16 0x03fd
|
|
SMM Module: placing jmp sequence at 0x80007800 rel16 0x07fd
|
|
SMM Module: placing jmp sequence at 0x80007400 rel16 0x0bfd
|
|
SMM Module: placing jmp sequence at 0x80007000 rel16 0x0ffd
|
|
SMM Module: placing jmp sequence at 0x80006c00 rel16 0x13fd
|
|
SMM Module: placing jmp sequence at 0x80006800 rel16 0x17fd
|
|
SMM Module: placing jmp sequence at 0x80006400 rel16 0x1bfd
|
|
SMM Module: stub loaded at 0x80008000. Will call 0x80010614(0x00000000)
|
|
Initializing southbridge SMI...
|
|
New SMBASE 0x80000000
|
|
In relocation handler: cpu 0
|
|
New SMBASE=0x80000000 IEDBASE=0x80400000
|
|
Writing SMRR. base = 0x80000006, mask=0xff800800
|
|
Relocation complete.
|
|
microcode: Update skipped, already up-to-date
|
|
New SMBASE 0x7ffffc00
|
|
In relocation handler: cpu 1
|
|
New SMBASE=0x7ffffc00 IEDBASE=0x80400000
|
|
Writing SMRR. base = 0x80000006, mask=0xff800800
|
|
Relocation complete.
|
|
microcode: Update skipped, already up-to-date
|
|
New SMBASE 0x7fffe400
|
|
In relocation handler: cpu 7
|
|
New SMBASE=0x7fffe400 IEDBASE=0x80400000
|
|
Writing SMRR. base = 0x80000006, mask=0xff800800
|
|
Relocation complete.
|
|
microcode: Update skipped, already up-to-date
|
|
New SMBASE 0x7fffe800
|
|
In relocation handler: cpu 6
|
|
New SMBASE=0x7fffe800 IEDBASE=0x80400000
|
|
Writing SMRR. base = 0x80000006, mask=0xff800800
|
|
Relocation complete.
|
|
microcode: Update skipped, already up-to-date
|
|
New SMBASE 0x7fffec00
|
|
In relocation handler: cpu 5
|
|
New SMBASE=0x7fffec00 IEDBASE=0x80400000
|
|
Writing SMRR. base = 0x80000006, mask=0xff800800
|
|
Relocation complete.
|
|
microcode: Update skipped, already up-to-date
|
|
New SMBASE 0x7ffff000
|
|
In relocation handler: cpu 4
|
|
New SMBASE=0x7ffff000 IEDBASE=0x80400000
|
|
Writing SMRR. base = 0x80000006, mask=0xff800800
|
|
Relocation complete.
|
|
microcode: Update skipped, already up-to-date
|
|
New SMBASE 0x7ffff400
|
|
In relocation handler: cpu 3
|
|
New SMBASE=0x7ffff400 IEDBASE=0x80400000
|
|
Writing SMRR. base = 0x80000006, mask=0xff800800
|
|
Relocation complete.
|
|
microcode: Update skipped, already up-to-date
|
|
New SMBASE 0x7ffff800
|
|
In relocation handler: cpu 2
|
|
New SMBASE=0x7ffff800 IEDBASE=0x80400000
|
|
Writing SMRR. base = 0x80000006, mask=0xff800800
|
|
Relocation complete.
|
|
microcode: Update skipped, already up-to-date
|
|
Initializing CPU #0
|
|
CPU: vendor Intel device 306a9
|
|
CPU: family 06, model 3a, stepping 09
|
|
Enabling cache
|
|
CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz.
|
|
CPU: platform id 4
|
|
CPU: cpuid(1) 0x306a9
|
|
CPU: AES supported
|
|
CPU: TXT supported
|
|
CPU: VT supported
|
|
Setting up local APIC...
|
|
apic_id: 0x00 done.
|
|
IA32_FEATURE_CONTROL already locked; VMX status: enabled
|
|
IA32_FEATURE_CONTROL already locked
|
|
model_x06ax: energy policy set to 6
|
|
model_x06ax: frequency set to 3000
|
|
Turbo is available but hidden
|
|
Turbo is available and visible
|
|
CPU #0 initialized
|
|
Initializing CPU #1
|
|
Initializing CPU #2
|
|
Initializing CPU #3
|
|
CPU: vendor Intel device 306a9
|
|
CPU: family 06, model 3a, stepping 09
|
|
CPU: vendor Intel device 306a9
|
|
CPU: family 06, model 3a, stepping 09
|
|
Enabling cache
|
|
Enabling cache
|
|
CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz.
|
|
CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz.
|
|
CPU: platform id 4
|
|
CPU: platform id 4
|
|
CPU: cpuid(1) 0x306a9
|
|
CPU: cpuid(1) 0x306a9
|
|
CPU: AES supported
|
|
CPU: TXT supported
|
|
CPU: VT supported
|
|
CPU: AES supported
|
|
CPU: TXT supported
|
|
CPU: VT supported
|
|
Setting up local APIC...
|
|
Setting up local APIC...
|
|
apic_id: 0x07 done.
|
|
apic_id: 0x06 done.
|
|
IA32_FEATURE_CONTROL already locked; VMX status: enabled
|
|
IA32_FEATURE_CONTROL already locked; VMX status: enabled
|
|
IA32_FEATURE_CONTROL already locked
|
|
IA32_FEATURE_CONTROL already locked
|
|
model_x06ax: energy policy set to 6
|
|
model_x06ax: energy policy set to 6
|
|
model_x06ax: frequency set to 3000
|
|
model_x06ax: frequency set to 3000
|
|
CPU #2 initialized
|
|
CPU #3 initialized
|
|
Initializing CPU #6
|
|
CPU: vendor Intel device 306a9
|
|
CPU: family 06, model 3a, stepping 09
|
|
Initializing CPU #5
|
|
Initializing CPU #4
|
|
CPU: vendor Intel device 306a9
|
|
CPU: family 06, model 3a, stepping 09
|
|
CPU: vendor Intel device 306a9
|
|
CPU: family 06, model 3a, stepping 09
|
|
Enabling cache
|
|
Enabling cache
|
|
CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz.
|
|
CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz.
|
|
CPU: platform id 4
|
|
CPU: platform id 4
|
|
CPU: cpuid(1) 0x306a9
|
|
CPU: cpuid(1) 0x306a9
|
|
CPU: AES supported
|
|
CPU: TXT supported
|
|
CPU: VT supported
|
|
CPU: AES supported
|
|
CPU: TXT supported
|
|
CPU: VT supported
|
|
Setting up local APIC...
|
|
Setting up local APIC...
|
|
apic_id: 0x02 done.
|
|
apic_id: 0x03 done.
|
|
IA32_FEATURE_CONTROL already locked; VMX status: enabled
|
|
IA32_FEATURE_CONTROL already locked; VMX status: enabled
|
|
IA32_FEATURE_CONTROL already locked
|
|
IA32_FEATURE_CONTROL already locked
|
|
model_x06ax: energy policy set to 6
|
|
model_x06ax: energy policy set to 6
|
|
model_x06ax: frequency set to 3000
|
|
CPU #5 initialized
|
|
model_x06ax: frequency set to 3000
|
|
CPU #4 initialized
|
|
Enabling cache
|
|
CPU: vendor Intel device 306a9
|
|
CPU: family 06, model 3a, stepping 09
|
|
Initializing CPU #7
|
|
Enabling cache
|
|
CPU: vendor Intel device 306a9
|
|
CPU: family 06, model 3a, stepping 09
|
|
CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz.
|
|
Enabling cache
|
|
CPU: platform id 4
|
|
CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz.
|
|
CPU: cpuid(1) 0x306a9
|
|
CPU: platform id 4
|
|
CPU: AES supported
|
|
CPU: TXT supported
|
|
CPU: VT supported
|
|
CPU: cpuid(1) 0x306a9
|
|
Setting up local APIC...
|
|
CPU: AES supported
|
|
CPU: TXT supported
|
|
CPU: VT supported
|
|
apic_id: 0x05 done.
|
|
Setting up local APIC...
|
|
IA32_FEATURE_CONTROL already locked; VMX status: enabled
|
|
apic_id: 0x04 done.
|
|
IA32_FEATURE_CONTROL already locked
|
|
IA32_FEATURE_CONTROL already locked; VMX status: enabled
|
|
model_x06ax: energy policy set to 6
|
|
IA32_FEATURE_CONTROL already locked
|
|
model_x06ax: frequency set to 3000
|
|
model_x06ax: energy policy set to 6
|
|
CPU #6 initialized
|
|
model_x06ax: frequency set to 3000
|
|
CPU #7 initialized
|
|
CPU: Intel(R) Core(TM) i7-3940XM CPU @ 3.00GHz.
|
|
CPU: platform id 4
|
|
CPU: cpuid(1) 0x306a9
|
|
CPU: AES supported
|
|
CPU: TXT supported
|
|
CPU: VT supported
|
|
Setting up local APIC...
|
|
apic_id: 0x01 done.
|
|
IA32_FEATURE_CONTROL already locked; VMX status: enabled
|
|
IA32_FEATURE_CONTROL already locked
|
|
model_x06ax: energy policy set to 6
|
|
model_x06ax: frequency set to 3000
|
|
CPU #1 initialized
|
|
bsp_do_flight_plan done after 594 msecs.
|
|
Initializing southbridge SMI...
|
|
SMI_STS:
|
|
GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO9 GPIO7 GPIO5 GPIO4 GPIO3 GPIO0
|
|
ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI5 GPI4 GPI3 GPI1 GPI0
|
|
TCO_STS:
|
|
Locking SMM.
|
|
CPU_CLUSTER: 0 init finished in 752 msecs
|
|
PCI: 00:00.0 init
|
|
Disabling PEG12.
|
|
Disabling PEG11.
|
|
Disabling PEG10.
|
|
Disabling PEG60.
|
|
Disabling Device 7.
|
|
Disabling PEG IO clock.
|
|
Set BIOS_RESET_CPL
|
|
CPU TDP: 55 Watts
|
|
PCI: 00:00.0 init finished in 13 msecs
|
|
PCI: 00:02.0 init
|
|
FMAP: area COREBOOT found @ 610200 (2031104 bytes)
|
|
CBFS: Locating 'vbt.bin'
|
|
CBFS: Found @ offset 3d0c0 size 58a
|
|
Found a VBT of 4459 bytes after decompression
|
|
GMA: Found VBT in CBFS
|
|
GMA: Found valid VBT in CBFS
|
|
GT Power Management Init
|
|
IVB GT2 35W Power Meter Weights
|
|
GT Power Management Init (post VBIOS)
|
|
|
|
[2.719396] CONFIG =>
|
|
[2.719694] (Primary =>
|
|
[2.720068] (Port => LVDS ,
|
|
[2.720690] Framebuffer =>
|
|
[2.721188] (Width => 640,
|
|
[2.721812] Height => 400,
|
|
[2.722310] Start_X => 0,
|
|
[2.722933] Start_Y => 0,
|
|
[2.723556] Stride => 1,
|
|
[2.724055] V_Stride => 1,
|
|
[2.724678] Tiling => Linear ,
|
|
[2.725301] Rotation => No_Rotation,
|
|
[2.726049] Offset => 0xffffffff,
|
|
[2.726797] BPC => 8),
|
|
[2.727295] Mode =>
|
|
[2.727669] (Dotclock => 139000000,
|
|
[2.728541] H_Visible => 1920,
|
|
[2.729289] H_Sync_Begin => 1980,
|
|
[2.730037] H_Sync_End => 2028,
|
|
[2.730785] H_Total => 2050,
|
|
[2.731533] V_Visible => 1080,
|
|
[2.732405] V_Sync_Begin => 1090,
|
|
[2.733153] V_Sync_End => 1100,
|
|
[2.733901] V_Total => 1130,
|
|
[2.734649] H_Sync_Active_High => False,
|
|
[2.735397] V_Sync_Active_High => False,
|
|
[2.736145] BPC => 5)),
|
|
[2.736893] Secondary =>
|
|
[2.737391] (Port => Disabled,
|
|
[2.737889] Framebuffer =>
|
|
[2.738512] (Width => 1,
|
|
[2.739011] Height => 1,
|
|
[2.739634] Start_X => 0,
|
|
[2.740133] Start_Y => 0,
|
|
[2.740756] Stride => 1,
|
|
[2.741379] V_Stride => 1,
|
|
[2.741878] Tiling => Linear ,
|
|
[2.742625] Rotation => No_Rotation,
|
|
[2.743373] Offset => 0x00000000,
|
|
[2.743996] BPC => 8),
|
|
[2.744495] Mode =>
|
|
[2.744993] (Dotclock => 1000000,
|
|
[2.745741] H_Visible => 1,
|
|
[2.746489] H_Sync_Begin => 1,
|
|
[2.747236] H_Sync_End => 1,
|
|
[2.747859] H_Total => 1,
|
|
[2.748607] V_Visible => 1,
|
|
[2.749355] V_Sync_Begin => 1,
|
|
[2.750102] V_Sync_End => 1,
|
|
[2.750725] V_Total => 1,
|
|
[2.751473] H_Sync_Active_High => False,
|
|
[2.752221] V_Sync_Active_High => False,
|
|
[2.753093] BPC => 5)),
|
|
[2.753840] Tertiary =>
|
|
[2.754214] (Port => Disabled,
|
|
[2.754837] Framebuffer =>
|
|
[2.755335] (Width => 1,
|
|
[2.755834] Height => 1,
|
|
[2.756457] Start_X => 0,
|
|
[2.757081] Start_Y => 0,
|
|
[2.757579] Stride => 1,
|
|
[2.758202] V_Stride => 1,
|
|
[2.758701] Tiling => Linear ,
|
|
[2.759449] Rotation => No_Rotation,
|
|
[2.760197] Offset => 0x00000000,
|
|
[2.760821] BPC => 8),
|
|
[2.761319] Mode =>
|
|
[2.761817] (Dotclock => 1000000,
|
|
[2.762565] H_Visible => 1,
|
|
[2.763313] H_Sync_Begin => 1,
|
|
[2.764061] H_Sync_End => 1,
|
|
[2.764685] H_Total => 1,
|
|
[2.765433] V_Visible => 1,
|
|
[2.766181] V_Sync_Begin => 1,
|
|
[2.766929] V_Sync_End => 1,
|
|
[2.767553] V_Total => 1,
|
|
[2.768301] H_Sync_Active_High => False,
|
|
[2.769049] V_Sync_Active_High => False,
|
|
[2.769921] BPC => 5)));
|
|
PCI: 00:02.0 init finished in 590 msecs
|
|
PCI: 00:04.0 init
|
|
PCI: 00:04.0 init finished in 0 msecs
|
|
PCI: 00:14.0 init
|
|
XHCI: Setting up controller.. done.
|
|
PCI: 00:14.0 init finished in 0 msecs
|
|
PCI: 00:16.0 init
|
|
ME: FW Partition Table : OK
|
|
ME: Bringup Loader Failure : NO
|
|
ME: Firmware Init Complete : NO
|
|
ME: Manufacturing Mode : YES
|
|
ME: Boot Options Present : NO
|
|
ME: Update In Progress : NO
|
|
ME: Current Working State : Initializing
|
|
ME: Current Operation State : Bring up
|
|
ME: Current Operation Mode : Debug or Disabled by AltDisableBit
|
|
ME: Error Code : No Error
|
|
ME: Progress Phase : BUP Phase
|
|
ME: Power Management Event : Pseudo-global reset
|
|
ME: Progress Phase State : Check to see if straps say ME DISABLED
|
|
intel_me_path: mbp is not ready!
|
|
ME: BIOS path: Error
|
|
PCI: 00:16.0 init finished in 16 msecs
|
|
PCI: 00:19.0 init
|
|
PCI: 00:19.0 init finished in 0 msecs
|
|
PCI: 00:1a.0 init
|
|
EHCI: Setting up controller.. done.
|
|
PCI: 00:1a.0 init finished in 1 msecs
|
|
PCI: 00:1b.0 init
|
|
Azalia: base = 84038000
|
|
Azalia: codec_mask = 09
|
|
Azalia: Initializing codec #3
|
|
Azalia: codec viddid: 80862806
|
|
Azalia: verb_size: 16
|
|
Azalia: verb loaded.
|
|
Azalia: Initializing codec #0
|
|
Azalia: codec viddid: 10ec0269
|
|
Azalia: verb_size: 72
|
|
Azalia: verb loaded.
|
|
PCI: 00:1b.0 init finished in 14 msecs
|
|
PCI: 00:1c.0 init
|
|
Initializing PCH PCIe bridge.
|
|
PCI: 00:1c.0 init finished in 1 msecs
|
|
PCI: 00:1c.1 init
|
|
Initializing PCH PCIe bridge.
|
|
PCI: 00:1c.1 init finished in 2 msecs
|
|
PCI: 00:1c.2 init
|
|
Initializing PCH PCIe bridge.
|
|
PCI: 00:1c.2 init finished in 2 msecs
|
|
PCI: 00:1d.0 init
|
|
EHCI: Setting up controller.. done.
|
|
PCI: 00:1d.0 init finished in 2 msecs
|
|
PCI: 00:1f.0 init
|
|
pch: lpc_init
|
|
PCH: detected QM77, device id: 0x1e55, rev id 0x4
|
|
IOAPIC: Initializing IOAPIC at 0xfec00000
|
|
IOAPIC: Bootstrap Processor Local APIC = 0x00
|
|
IOAPIC: ID = 0x02
|
|
Set power off after power failure.
|
|
NMI sources enabled.
|
|
PantherPoint PM init
|
|
RTC: failed = 0x0
|
|
RTC Init
|
|
Disabling ACPI via APMC.
|
|
APMC done.
|
|
pch_spi_init
|
|
PCI: 00:1f.0 init finished in 28 msecs
|
|
PCI: 00:1f.2 init
|
|
SATA: Initializing...
|
|
SATA: Controller in AHCI mode.
|
|
ABAR: 0x8403d000
|
|
PCI: 00:1f.2 init finished in 6 msecs
|
|
PCI: 00:1f.3 init
|
|
PCI: 00:1f.3 init finished in 0 msecs
|
|
PCI: 01:00.0 init
|
|
PCI: 01:00.0 init finished in 0 msecs
|
|
PCI: 01:00.3 init
|
|
PCI: 01:00.3 init finished in 0 msecs
|
|
PCI: 02:00.0 init
|
|
PCI: 02:00.0 init finished in 0 msecs
|
|
PNP: 00ff.2 init
|
|
PNP: 00ff.2 init finished in 0 msecs
|
|
smbus: PCI: 00:1f.3[0]->I2C: 01:54 init
|
|
I2C: 01:54 init finished in 0 msecs
|
|
smbus: PCI: 00:1f.3[0]->I2C: 01:55 init
|
|
I2C: 01:55 init finished in 0 msecs
|
|
smbus: PCI: 00:1f.3[0]->I2C: 01:56 init
|
|
I2C: 01:56 init finished in 0 msecs
|
|
smbus: PCI: 00:1f.3[0]->I2C: 01:57 init
|
|
I2C: 01:57 init finished in 0 msecs
|
|
smbus: PCI: 00:1f.3[0]->I2C: 01:5c init
|
|
Locking EEPROM RFID
|
|
init EEPROM done
|
|
I2C: 01:5c init finished in 27 msecs
|
|
smbus: PCI: 00:1f.3[0]->I2C: 01:5d init
|
|
I2C: 01:5d init finished in 0 msecs
|
|
smbus: PCI: 00:1f.3[0]->I2C: 01:5e init
|
|
I2C: 01:5e init finished in 0 msecs
|
|
smbus: PCI: 00:1f.3[0]->I2C: 01:5f init
|
|
I2C: 01:5f init finished in 0 msecs
|
|
Devices initialized
|
|
BS: BS_DEV_INIT run times (exec / console): 1070 / 509 ms
|
|
Finalize devices...
|
|
PCI: 00:1f.0 final
|
|
Finalizing SMM.
|
|
APMC done.
|
|
Devices finalized
|
|
BS: BS_POST_DEVICE run times (exec / console): 0 / 3 ms
|
|
FMAP: area COREBOOT found @ 610200 (2031104 bytes)
|
|
CBFS: Locating 'fallback/dsdt.aml'
|
|
CBFS: Found @ offset 39600 size 3926
|
|
FMAP: area COREBOOT found @ 610200 (2031104 bytes)
|
|
CBFS: Locating 'fallback/slic'
|
|
CBFS: 'fallback/slic' not found.
|
|
ACPI: Writing ACPI tables at 7ff42000.
|
|
ACPI: * FACS
|
|
ACPI: * DSDT
|
|
ACPI: * FADT
|
|
ACPI: added table 1/32, length now 40
|
|
ACPI: * SSDT
|
|
Found 1 CPU(s) with 8 core(s) each.
|
|
PSS: 3001MHz power 55000 control 0x2700 status 0x2700
|
|
PSS: 3000MHz power 55000 control 0x1e00 status 0x1e00
|
|
PSS: 2400MHz power 41008 control 0x1800 status 0x1800
|
|
PSS: 2000MHz power 32564 control 0x1400 status 0x1400
|
|
PSS: 1600MHz power 24829 control 0x1000 status 0x1000
|
|
PSS: 1200MHz power 17710 control 0xc00 status 0xc00
|
|
PSS: 3001MHz power 55000 control 0x2700 status 0x2700
|
|
PSS: 3000MHz power 55000 control 0x1e00 status 0x1e00
|
|
PSS: 2400MHz power 41008 control 0x1800 status 0x1800
|
|
PSS: 2000MHz power 32564 control 0x1400 status 0x1400
|
|
PSS: 1600MHz power 24829 control 0x1000 status 0x1000
|
|
PSS: 1200MHz power 17710 control 0xc00 status 0xc00
|
|
PSS: 3001MHz power 55000 control 0x2700 status 0x2700
|
|
PSS: 3000MHz power 55000 control 0x1e00 status 0x1e00
|
|
PSS: 2400MHz power 41008 control 0x1800 status 0x1800
|
|
PSS: 2000MHz power 32564 control 0x1400 status 0x1400
|
|
PSS: 1600MHz power 24829 control 0x1000 status 0x1000
|
|
PSS: 1200MHz power 17710 control 0xc00 status 0xc00
|
|
PSS: 3001MHz power 55000 control 0x2700 status 0x2700
|
|
PSS: 3000MHz power 55000 control 0x1e00 status 0x1e00
|
|
PSS: 2400MHz power 41008 control 0x1800 status 0x1800
|
|
PSS: 2000MHz power 32564 control 0x1400 status 0x1400
|
|
PSS: 1600MHz power 24829 control 0x1000 status 0x1000
|
|
PSS: 1200MHz power 17710 control 0xc00 status 0xc00
|
|
PSS: 3001MHz power 55000 control 0x2700 status 0x2700
|
|
PSS: 3000MHz power 55000 control 0x1e00 status 0x1e00
|
|
PSS: 2400MHz power 41008 control 0x1800 status 0x1800
|
|
PSS: 2000MHz power 32564 control 0x1400 status 0x1400
|
|
PSS: 1600MHz power 24829 control 0x1000 status 0x1000
|
|
PSS: 1200MHz power 17710 control 0xc00 status 0xc00
|
|
PSS: 3001MHz power 55000 control 0x2700 status 0x2700
|
|
PSS: 3000MHz power 55000 control 0x1e00 status 0x1e00
|
|
PSS: 2400MHz power 41008 control 0x1800 status 0x1800
|
|
PSS: 2000MHz power 32564 control 0x1400 status 0x1400
|
|
PSS: 1600MHz power 24829 control 0x1000 status 0x1000
|
|
PSS: 1200MHz power 17710 control 0xc00 status 0xc00
|
|
PSS: 3001MHz power 55000 control 0x2700 status 0x2700
|
|
PSS: 3000MHz power 55000 control 0x1e00 status 0x1e00
|
|
PSS: 2400MHz power 41008 control 0x1800 status 0x1800
|
|
PSS: 2000MHz power 32564 control 0x1400 status 0x1400
|
|
PSS: 1600MHz power 24829 control 0x1000 status 0x1000
|
|
PSS: 1200MHz power 17710 control 0xc00 status 0xc00
|
|
PSS: 3001MHz power 55000 control 0x2700 status 0x2700
|
|
PSS: 3000MHz power 55000 control 0x1e00 status 0x1e00
|
|
PSS: 2400MHz power 41008 control 0x1800 status 0x1800
|
|
PSS: 2000MHz power 32564 control 0x1400 status 0x1400
|
|
PSS: 1600MHz power 24829 control 0x1000 status 0x1000
|
|
PSS: 1200MHz power 17710 control 0xc00 status 0xc00
|
|
Generating ACPI PIRQ entries
|
|
\_SB.PCI0.LPCB.TPM.TPM: LPC TPM PNP: 0c31.0
|
|
ACPI: * H8
|
|
H8: BDC installed
|
|
H8: WWAN detection not implemented. Assuming WWAN installed
|
|
\_SB.PCI0.RP02.WF00.WF00: PCI: 02:00.0
|
|
ACPI: added table 2/32, length now 44
|
|
ACPI: * MCFG
|
|
ACPI: added table 3/32, length now 48
|
|
ACPI: * TCPA
|
|
TCPA log created at 0x7ff31000
|
|
ACPI: added table 4/32, length now 52
|
|
ACPI: * MADT
|
|
ACPI: added table 5/32, length now 56
|
|
current = 7ff48ba0
|
|
ACPI: * DMAR
|
|
ACPI: added table 6/32, length now 60
|
|
current = 7ff48c70
|
|
ACPI: * HPET
|
|
ACPI: added table 7/32, length now 64
|
|
ACPI: done.
|
|
ACPI tables: 27824 bytes.
|
|
smbios_write_tables: 7ff30000
|
|
Create SMBIOS type 17
|
|
PCI: 02:00.0 (unknown)
|
|
SMBIOS tables: 907 bytes.
|
|
Writing table forward entry at 0x00000500
|
|
Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 1fe8
|
|
Writing coreboot table at 0x7ff66000
|
|
FMAP: area COREBOOT found @ 610200 (2031104 bytes)
|
|
CBFS: Locating 'cmos_layout.bin'
|
|
CBFS: Found @ offset 3d6c0 size 7e4
|
|
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
|
|
1. 0000000000001000-000000000009ffff: RAM
|
|
2. 00000000000a0000-00000000000fffff: RESERVED
|
|
3. 0000000000100000-000000007ff2ffff: RAM
|
|
4. 000000007ff30000-000000007ff80fff: CONFIGURATION TABLES
|
|
5. 000000007ff81000-000000007ffd0fff: RAMSTAGE
|
|
6. 000000007ffd1000-000000007fffffff: CONFIGURATION TABLES
|
|
7. 0000000080000000-00000000829fffff: RESERVED
|
|
8. 00000000f0000000-00000000f3ffffff: RESERVED
|
|
9. 00000000fed40000-00000000fed44fff: RESERVED
|
|
10. 00000000fed90000-00000000fed91fff: RESERVED
|
|
11. 0000000100000000-000000047d5fffff: RAM
|
|
FMAP: area COREBOOT found @ 610200 (2031104 bytes)
|
|
Wrote coreboot table at: 0x7ff66000, 0xb9c bytes, checksum 2bb5
|
|
coreboot table: 2996 bytes.
|
|
IMD ROOT 0. 0x7ffff000 0x00001000
|
|
IMD SMALL 1. 0x7fffe000 0x00001000
|
|
CONSOLE 2. 0x7ffde000 0x00020000
|
|
TIME STAMP 3. 0x7ffdd000 0x00000910
|
|
MRC DATA 4. 0x7ffdc000 0x00000644
|
|
ROMSTG STCK 5. 0x7ffdb000 0x00001000
|
|
AFTER CAR 6. 0x7ffd1000 0x0000a000
|
|
RAMSTAGE 7. 0x7ff80000 0x00051000
|
|
SMM BACKUP 8. 0x7ff70000 0x00010000
|
|
4f444749 9. 0x7ff6e000 0x00002000
|
|
COREBOOT 10. 0x7ff66000 0x00008000
|
|
ACPI 11. 0x7ff42000 0x00024000
|
|
ACPI GNVS 12. 0x7ff41000 0x00001000
|
|
TCPA TCGLOG13. 0x7ff31000 0x00010000
|
|
SMBIOS 14. 0x7ff30000 0x00000800
|
|
IMD small region:
|
|
IMD ROOT 0. 0x7fffec00 0x00000400
|
|
USBDEBUG 1. 0x7fffeba0 0x00000050
|
|
FMAP 2. 0x7fffeac0 0x000000e0
|
|
MEM INFO 3. 0x7fffe900 0x000001b9
|
|
ROMSTAGE 4. 0x7fffe8e0 0x00000004
|
|
BS: ���
|
|
|